Data protection method, memory, electronic device, and storage medium

Abstract

This application discloses a data protection method, a memory, an electronic device, and a storage medium. This application relates to the field of storage, and the method is applied to a memory. It configures a logical address to physical address mapping table, which includes a first mapping area and a second mapping area. The first mapping area records the original mapping relationship between logical addresses and physical addresses corresponding to read / write operations performed on the snapshot area before snapshot protection mode is enabled. The second mapping area records the mapping relationship between logical addresses and physical addresses corresponding to incremental read / write operations performed on the snapshot area after snapshot protection mode is enabled. Upon receiving a snapshot enable command, the system enters snapshot protection mode and determines the snapshot area to be protected based on preset configuration information. The original mapping relationship of the snapshot area in the first mapping area is locked, and data operation requests initiated for the snapshot area are redirected to the second mapping area for incremental read / write operations.

Description

Technical Field

[0001] This application relates to the field of storage, and more particularly to a data protection method, a memory, an electronic device, and a storage medium. Background Technology

[0002] In current applications of SSDs (Solid State Drives) and other storage devices, there are common abnormal situations such as power outages or accidental file deletions. These can lead to file corruption or even loss in the storage device. Especially in scenarios where the storage device is used as a system disk, there is a high possibility of blue screens or inability to boot the system due to the corruption of critical data (such as system data).

[0003] However, current common data protection schemes for memory rely on unstable software backup mechanisms, which still carry the risk of losing critical data and being unable to recover the system.

[0004] Therefore, how to protect critical data in memory from abnormal power outages or erroneous operations has become an urgent problem to be solved. Summary of the Invention

[0005] The main objective of this application is to provide a data protection method, memory, electronic device, and storage medium, which aims to solve the technical problem of how to protect critical data in the memory from the effects of abnormal power failure or misoperation.

[0006] To achieve the above objectives, this application proposes a data protection method applied to a memory, the method comprising:

[0007] Configure a logical address to physical address mapping table, which includes a first mapping area and a second mapping area; wherein, the first mapping area is used to record the original mapping relationship between logical addresses and physical addresses corresponding to read and write operations performed on the snapshot area before the snapshot protection mode is enabled, and the second mapping area is used to record the mapping relationship between logical addresses and physical addresses corresponding to incremental read and write operations performed on the snapshot area after the snapshot protection mode is enabled.

[0008] Upon receiving the snapshot enable command, the system enters the snapshot protection mode and determines the snapshot area to be protected based on the preset configuration information.

[0009] The original mapping relationship of the snapshot area in the first mapping area is locked, and the data operation request initiated for the snapshot area is redirected to the second mapping area to perform the incremental read and write operation.

[0010] In addition, to achieve the above objectives, this application also proposes a memory comprising: a controller, flash memory, and a data protection program stored on the flash memory and executable on the controller, the data protection program being configured to implement the steps of the data protection method mentioned above.

[0011] In addition, to achieve the above objectives, this application also proposes an electronic device, which includes the memory mentioned above.

[0012] In addition, to achieve the above objectives, this application also provides a storage medium storing a program for implementing a data protection method, the program for implementing the data protection method being executed by a processor to implement the steps of the data protection method as described above.

[0013] This application provides a data protection method, a memory, an electronic device, and a storage medium. The method includes configuring a first mapping area and a second mapping area in an address mapping table; the first mapping area is used to record the physical storage location of the data to be protected, and the second mapping area is used to record the physical storage location of snapshot incremental data; obtaining the logical address range corresponding to the data to be protected; and in response to a snapshot enable command, redirecting data operation requests for the logical address range from the first mapping area to the second mapping area, and executing the data operation corresponding to the data operation request. The snapshot enable command is an command triggered when the electronic device experiences an abnormality.

[0014] This application proposes a read / write redirection technique that combines hardware-level dual-mapping areas. Specifically, based on the first mapping area in the address mapping table that records read / write operations of the snapshot area, this application further expands it to a second mapping area for storing incremental snapshot data generated during abnormal conditions, i.e., after the snapshot protection mode is enabled. By using the snapshot mechanism, all incremental read / write operations corresponding to the incremental snapshot data are redirected to the second mapping area, thereby preventing the data to be protected in the first mapping area from being modified during the snapshot protection period. This achieves the effect of protecting the data to be protected in the memory located in the first mapping area from the effects of abnormal power outages or erroneous operations. Attached Figure Description

[0015] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application.

[0016] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, for those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0017] Figure 1This is a flowchart illustrating an embodiment of the data protection method of this application;

[0018] Figure 2 This is a schematic diagram of the data operation redirection process in Embodiment 1 of the data protection method of this application;

[0019] Figure 3 This is a schematic diagram of the data recovery process in Embodiment 1 of the data protection method of this application;

[0020] Figure 4 This is a flowchart illustrating Embodiment 2 of the data protection method of this application;

[0021] Figure 5 This is a schematic diagram of the data reading process in Embodiment 2 of the data protection method of this application;

[0022] Figure 6 This is a flowchart illustrating Embodiment 3 of the data protection method of this application;

[0023] Figure 7 This is a schematic diagram of the data writing process in Embodiment 3 of the data protection method of this application.

[0024] The purpose, features, and advantages of this application will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation

[0025] It should be understood that the specific embodiments described herein are merely illustrative of the technical solutions of this application and are not intended to limit this application.

[0026] To better understand the technical solution of this application, a detailed description will be provided below in conjunction with the accompanying drawings and specific implementation methods.

[0027] The main solution of this application is to propose a data protection method applied to a memory. The method includes: configuring a logical address to physical address mapping table, which includes a first mapping area and a second mapping area; wherein, the first mapping area is used to record the original mapping relationship between logical addresses and physical addresses corresponding to read and write operations performed on the snapshot area before the snapshot protection mode is enabled, and the second mapping area is used to record the mapping relationship between logical addresses and physical addresses corresponding to incremental read and write operations performed on the snapshot area after the snapshot protection mode is enabled; upon receiving a snapshot enable command, the system enters the snapshot protection mode and determines the snapshot area to be protected according to preset configuration information; the system locks the original mapping relationship of the snapshot area in the first mapping area and redirects data operation requests initiated for the snapshot area to the second mapping area for incremental read and write operations.

[0028] Currently, common data protection schemes for storage devices are often based on the mechanism of backing up the entire system partition data of the storage device through a host computer application. However, this is highly dependent on the stability of the recovery software. If the backup and recovery software malfunctions, there is a probability that critical data will be lost and the system cannot be recovered.

[0029] To address the aforementioned issues, this application proposes a read / write redirection technique that combines hardware-level dual-mapping areas. Specifically, this application utilizes the characteristics of the FTL (Flash Translation Layer) in the memory, performing partitioning management on the corresponding L2P (Logical-to-Physical Mapping Table). In addition to the existing first mapping area in the address mapping table, a reserved mapping area is added to store incremental snapshot data generated during abnormal situations—this is the aforementioned second mapping area. Through a snapshot mechanism, incremental read / write operations corresponding to the incremental snapshot data are redirected to the second mapping area. This prevents the data to be protected in the first mapping area from being modified during snapshot protection, thereby protecting the data in the memory from the effects of abnormal power outages or erroneous operations.

[0030] It should be noted that the execution subject in this embodiment can be a memory with data storage and read / write functions, such as a solid-state drive (SSD), embedded multimedia card (eMMC), universal flash storage (UFS), secure digital memory card (SD card), or other memory supporting NAND (NOT-AND) flash memory devices. Its core characteristic is that the mapping relationship between logical addresses and physical addresses can be managed through the FTL (Flash Translation Layer). Alternatively, it can be a computing service device equipped with memory that has data storage, data processing, and program execution functions, and needs to protect critical data (such as system data), such as a tablet computer, personal computer, or mobile phone, or an electronic device capable of implementing the above functions. This embodiment does not specifically limit this. The following uses memory as the execution subject as an example to describe this embodiment and the following embodiments.

[0031] Based on this, the embodiments of this application provide a data protection method, referring to... Figure 1 , Figure 1 This is a flowchart illustrating an embodiment of the data protection method of this application.

[0032] In this embodiment, the data protection method is applied to the memory within an electronic device, and the method includes steps S10~S30:

[0033] Step S10: Configure a logical address to physical address mapping table, which includes a first mapping area and a second mapping area; wherein, the first mapping area is used to record the original mapping relationship between logical addresses and physical addresses corresponding to read and write operations performed on the snapshot area before the snapshot protection mode is enabled, and the second mapping area is used to record the mapping relationship between logical addresses and physical addresses corresponding to incremental read and write operations performed on the snapshot area after the snapshot protection mode is enabled.

[0034] It's important to understand that the aforementioned logical address to physical address mapping table can be an L2P table (Logical-to-Physical Mapping Table) located in the FTL layer of memory, which is a core data structure of the FTL layer. This L2P table records the correspondence between the logical block address (LBA) sent by the host and the physical block address (PBA) of the flash memory device, realizing the conversion between logical addresses and physical addresses, so that the host can operate the flash memory device like a traditional hard drive.

[0035] It is easy to understand that the first mapping area mentioned above can be the area in the L2P table that stores the mapping relationship before the snapshot protection mode is enabled. It can be used to record the original mapping of the snapshot area data, and the mapping relationship inside it is locked and cannot be modified after the snapshot is enabled. It is the mapping area that needs to maintain its original state during subsequent snapshot protection.

[0036] In contrast, the second mapping area can be an incremental data mapping area extended in the L2P table in this embodiment, used to record the mapping relationship of incremental read and write operations on the snapshot area after snapshotting is enabled, and can be automatically reclaimed after power failure. In this embodiment, the storage space of the second mapping area can come from the OP space (Over-Provisioning, reserved space) additionally extended in the memory. This OP space is specifically used to store the mapping relationship of snapshot incremental data generated during snapshot protection, so as to avoid interference of the incremental data corresponding to the data to be protected during snapshot protection, i.e., the aforementioned snapshot incremental data, on the first mapping area.

[0037] In practical implementation, during memory initialization, the FTL layer can partition the L2P table, dividing it into a first mapping area and a second mapping area. The size of the first mapping area can be set according to the estimated capacity of the data to be protected, ensuring that its mapping relationship can be completely stored; while the size of the second mapping area can be allocated based on the OP space capacity, which must not only meet the incremental data storage requirements during snapshot protection, but also ensure that the address ranges of the first and second mapping areas do not overlap to avoid conflicts.

[0038] Step S20: After receiving the snapshot start command, enter the snapshot protection mode and determine the snapshot area to be protected according to the preset configuration information;

[0039] It is important to understand that the aforementioned snapshot protection mode can be a data protection mode for the memory. When enabled, the original data in the snapshot area is locked, and incremental operations are redirected to the second mapping area. When disabled, incremental data becomes invalid, and the original data is restored. The original data in the snapshot area can be critical data that is important for the normal operation of the electronic device or for the user, and needs to be protected from loss / damage due to abnormal power outages or accidental operations. For example, the data to be protected can be critical data such as operating system core files, critical database data, and important user documents, and its scope can be preset by the user or the system.

[0040] It is easy to understand that the snapshot activation command mentioned above can be a command automatically triggered by the host of the electronic device and sent to the memory to start snapshot protection mode when an abnormal situation is detected. Abnormal situations include, but are not limited to, abnormal power outages (such as sudden power failures or unstable power supply), user misoperations (such as accidental deletion or modification of critical files), and system failures. For example, this snapshot activation command can be generated by a hardware detection module (such as a power failure detection circuit) that monitors the power supply status of the electronic device or a software monitoring module (such as a misoperation identification program) that monitors user operations.

[0041] It is important to understand that the snapshot enable command may include an opcode, a start LBA for the snapshot region, an end LBA, and a checksum. Therefore, in this embodiment, the snapshot region can be defined by one or more logical block address ranges. The specific location of each logical address range can be determined by the start and end LBAs in the snapshot enable command, and this range must be aligned with the page size of the memory (e.g., 4KB for SSDs, 2KB for eMMC) to avoid data fragmentation. In this case, the aforementioned preset configuration information can be a specific range division command sent by the user through the electronic device's host or a system default snapshot configuration file.

[0042] For example, after receiving a snapshot enable command and verifying its accuracy, the memory can obtain the logical address range of the snapshot region to be protected through a range resolution command. This logical address range can then be stored in non-volatile memory (such as the metadata area of ​​NAND flash memory), and the FTL's mapping policy can be updated to mark the region corresponding to this logical address range as a "snapshot region." Simultaneously, after the setup is complete, the FTL can lock the original mapping of the snapshot region to prevent unauthorized modification.

[0043] Step S30: Lock the original mapping relationship of the snapshot area in the first mapping area, and redirect the data operation request initiated for the snapshot area to the second mapping area to perform the incremental read and write operation.

[0044] It should be noted that the aforementioned locking operation indicates that after snapshotting is enabled, the original mapping relationship corresponding to the snapshot area in the first mapping area is marked as "read-only," prohibiting modification or deletion, thus ensuring that the original data is not contaminated. Therefore, after snapshotting is enabled, read and write instructions initiated by the host to the memory, including read requests (acquiring stored data) and write requests (such as data modification, addition, and deletion operations), i.e., the aforementioned data operation requests, as long as they originally pointed to the first mapping area, will be transferred to the second mapping area for execution by the processor. Correspondingly, after snapshotting is enabled, the mapping relationship of new read and write operations on the snapshot area (such as modifying existing data and writing new data), i.e., the aforementioned incremental read and write operations, is only recorded in the second mapping area and does not overwrite the original mapping in the first mapping area. That is, at this time, the memory can allocate a new physical address for the data operation request in the second mapping area, record the incremental mapping relationship, and perform incremental read and write operations at the new physical address.

[0045] It should be understood that the aforementioned redirection is the core technical means of switching data mapping relationships during snapshot protection proposed in this embodiment. That is, during the redirection process, data stream operations that originally pointed to the first mapping area can be transferred to the second mapping area for execution. In a feasible implementation, in this embodiment, step S30 includes steps S31 to S32:

[0046] Step S31: Obtain the offset logical address corresponding to the data operation request initiated for the snapshot area after it is redirected to the second mapping area; the offset logical address is determined based on the redirection offset and the initial logical address of the data operation request in the first mapping area, and the redirection offset is the address offset between the starting logical address of the second mapping area and the starting logical address of the first mapping area;

[0047] Step S32: Perform the incremental read / write operation in the reserved space of the memory according to the offset logical address.

[0048] It should be noted that the aforementioned offset logical address can be the logical address after the data operation request is redirected to the second mapping area. In this embodiment, the offset logical address is calculated from the initial logical address and the redirection offset. The initial logical address can be the logical address in the first mapping area originally pointed to by the data operation request, i.e., the initial LBA specified when the host initiates the operation; while the redirection offset can be a pre-set address offset difference between the second mapping area and the first mapping area. The specific value can be determined according to the actual situation, but this value should be greater than or equal to the total logical address space size of the snapshot area selected by the user to ensure that the redirected offset logical address falls within the address range that does not affect the original mapping relationship.

[0049] As can be understood from the above analysis, the reserved space can be the storage space reserved in the memory for garbage collection, bad block management and incremental data storage. In this embodiment, the corresponding mapped physical address of the offset logical address in the second mapping area all points to the reserved space.

[0050] Therefore, this embodiment can calculate the offset logical address by fixing the redirection offset, ensuring that the addresses of the second mapping area and the first mapping area do not overlap, thus avoiding address conflicts. Simultaneously, storing incremental read / write data in reserved space not only avoids occupying user storage space but also does not affect the normal read / write performance of the memory.

[0051] For ease of understanding, please refer to Figure 2 Explain the redirection process. Figure 2 This is a schematic diagram of the data operation redirection process in Embodiment 1 of the data protection method of this application. Figure 2 As shown, in this embodiment, the logical address-physical address mapping (L2P) table in the flash memory translation layer (FTL layer) can be expanded, based on the original size of the storage area corresponding to the user layer data mapping relationship, to store a portion of the mapping for incremental data after snapshotting is enabled. Figure 2 The second mapping region is shown. At this time, the second mapping region and the first mapping region are logically associated by address offset through the address range corresponding to the storage capacity of the user data layer data, that is, the initial storage capacity (which can be represented as SSD size). At this time, the above-mentioned redirection offset is the initial storage capacity.

[0052] At the same time, the physical storage area corresponding to the second mapping area in the reserved space (i.e., the snapshot incremental data storage area in the flash physical storage layer) is physically isolated from the physical storage area of ​​the original snapshot area data (i.e., the data storage area to be protected in the flash physical storage layer).

[0053] Therefore, as Figure 2As shown, before enabling snapshot protection mode, users read and write critical data in the snapshot area through the first mapping area of ​​the L2P table. The host's read and write operations on the critical data area directly affect the data area to be protected. After enabling snapshot protection, data read and write requests for the logical address range corresponding to the snapshot area no longer undergo address translation through the first mapping area. Instead, the data operation requests corresponding to the critical data are redirected to the second mapping area. The second mapping area is then used to find or allocate the physical address corresponding to the incremental snapshot data in the reserved space, and incremental read and write operations are performed in the reserved space, completing the address translation and data operation of the incremental snapshot data corresponding to the data to be protected.

[0054] During this process, the original mapping relationship stored in the first mapping area remains unchanged. That is, this embodiment uses a dual-mapping-area isolation design to separate the mapping relationship between the snapshot incremental data and the data to be protected, ensuring that the original physical storage location of the data to be protected is not modified during snapshot protection. This avoids isolating and protecting the data to be protected corresponding to the first mapping area, thereby preventing the impact of abnormal power outages or misoperations on critical data from the hardware level. Furthermore, since the redirection mechanism does not rely on the host computer application, it improves the stability and reliability of data protection, avoiding recovery failures caused by software anomalies.

[0055] Meanwhile, in this embodiment, the second mapping area can use the reserved space to store incremental data without occupying the user-visible storage space, thus solving the problem of traditional backup methods occupying a large amount of storage resources.

[0056] It is easy to understand that, in order to avoid the problem of incremental data mapping entries and corresponding physical storage space in the second mapping area not being released after snapshot protection terminates, resulting in mapping table redundancy and storage resource waste, in a feasible implementation, this embodiment may further include steps S40 and S50 after step S30:

[0057] Step S40: After receiving the snapshot close command, obtain the current mapping entry corresponding to the second mapping area;

[0058] Understandably, the aforementioned snapshot shutdown command can be a command used to terminate the snapshot protection state. It can be sent actively by the user (e.g., by disabling the snapshot function through the host's human-machine interface) or automatically generated by the host (e.g., after power is restored following an abnormal power outage or after a misoperation is corrected). The aforementioned current mapping entry can be the logical address and physical address mapping entries corresponding to all incremental data recorded in the second mapping area during the snapshot protection period. Each entry can contain information such as the logical allocation address of the incremental data in the second mapping area, the physical address of the incremental data, and a validity flag indicating the mapping relationship of the incremental data.

[0059] Step S50: Mark the current mapping entry as invalid and release the physical storage space corresponding to the current mapping entry in the memory.

[0060] It is easy to understand that the aforementioned invalid state can represent a status flag for a mapping entry, which is implemented by modifying the FTL metadata. In this embodiment, the invalid state flag can be used to indicate that the mapping relationship corresponding to the mapping entry is no longer valid. Therefore, subsequent FTL layers will no longer perform address translation using the current mapping entry that is marked as invalid.

[0061] It should be understood that, in this embodiment, the aforementioned release of physical storage space may refer to the process of the memory triggering garbage collection (GC). At this time, the memory can erase the physical storage unit corresponding to the mapping entry marked as invalid and reclaim the physical space for subsequent data storage. Meanwhile, the aforementioned garbage collection process can be executed asynchronously in the background to avoid affecting the user's normal operation.

[0062] In the specific implementation, refer to Figure 3 The data recovery process in this embodiment will be illustrated with an example. Figure 3 This is a schematic diagram of the data recovery process in Embodiment 1 of the data protection method of this application. Figure 3 As shown, when the FTL layer of the memory receives a snapshot shutdown command (such as a snapshot shutdown command sent by the user through the host, or a command automatically generated by the system after power is restored), it can terminate the snapshot protection state and stop the data operation redirection mechanism.

[0063] Then, it can be checked whether the data protected by the second mapping area has been completely erased. If it has not been erased, the FTL layer can scan the second mapping area of ​​the L2P table, extract the entries of the incremental data mapping relationship of the records generated during the snapshot protection, mark all current mapping entries as invalid, update the corresponding entry status field in the FTL metadata, and ensure that these mapping entries will not be used for address translation in the future.

[0064] Then, the FTL layer can trigger a garbage collection mechanism to erase the physical storage units corresponding to the current mapping entry, reclaiming these physical storage spaces so that they can be reallocated to subsequent data storage operations. The garbage collection process is executed asynchronously in the background to avoid consuming foreground operation resources and ensure that users can use the memory normally.

[0065] Therefore, this embodiment can promptly clean up redundant mapping entries and physical storage data in the second mapping area by marking invalid states and garbage collection, thereby freeing up storage resources and improving the storage utilization of the memory. At the same time, invalidating mapping entries avoids confusion during subsequent address translation, ensuring that critical data is not contaminated and guaranteeing the normal operation of the memory.

[0066] In summary, this embodiment proposes a read / write redirection technique that combines hardware-level dual-mapping zones. The first mapping zone locks the original data mapping, while the second mapping zone stores incremental data without occupying additional user storage space (utilizing the reserved space of the memory). Furthermore, this embodiment can automatically activate snapshot protection mode based on detected anomalies, redirecting all hardware-level incremental modification operations on the snapshot zone to the second mapping zone. The incremental data in the second mapping zone can be automatically rolled back after the snapshot function is disabled, ensuring that the snapshot zone data is not modified and solving the problem of data corruption due to accidental operations. Additionally, the data protection scheme proposed in this embodiment is integrated into the memory firmware layer (FTL), which not only adapts to various storage device types but also eliminates the need for host computer software, solving the recovery failure problem caused by software instability in traditional backup and recovery methods and improving the system's independence and stability.

[0067] This embodiment provides a data protection method applied to a memory. The method includes: configuring a logical address to physical address mapping table, which includes a first mapping area and a second mapping area; wherein, the first mapping area is used to record the original mapping relationship between logical addresses and physical addresses corresponding to read and write operations performed on the snapshot area before snapshot protection mode is enabled, and the second mapping area is used to record the mapping relationship between logical addresses and physical addresses corresponding to incremental read and write operations performed on the snapshot area after snapshot protection mode is enabled; upon receiving a snapshot enable command, entering snapshot protection mode, and determining the snapshot area to be protected according to preset configuration information; locking the original mapping relationship of the snapshot area in the first mapping area, and obtaining the offset logical address corresponding to the redirection of the data operation request initiated for the snapshot area to the second mapping area; the offset logical address is determined according to the redirection offset and the initial logical address of the data operation request in the first mapping area, wherein the redirection offset is the address offset between the starting logical address of the second mapping area and the starting logical address of the first mapping area; and performing incremental read and write operations in the reserved space of the memory according to the offset logical address. This embodiment uses L2P table partitioning management. After automatically starting snapshots based on detected anomalies, all incremental modification operations on the snapshot area by the hardware layer are redirected to the second mapping area. The second mapping area is automatically rolled back after the snapshot function is turned off, thereby ensuring that the data in the snapshot area is not modified and solving the problem of data corruption caused by accidental operation. At the same time, this embodiment does not rely on host computer software and achieves data protection from the storage layer, which is more stable and reliable, and solves the problem of recovery failure caused by software instability in traditional backup and recovery methods.

[0068] Based on Embodiment 1 of this application, in Embodiment 2 of this application, the same or similar content as in Embodiment 1 can be referred to the above description, and will not be repeated hereafter.

[0069] Therefore, based on Embodiment 1, in one feasible implementation method, please refer to... Figure 4 , Figure 4 This is a flowchart illustrating Embodiment 2 of the data protection method of this application. In this embodiment, step S32 includes steps S321 to S322:

[0070] Step S321: When the incremental read / write operation is a read operation, determine whether the offset logical address has a corresponding offset physical address in the second mapping area;

[0071] Step S322: If the offset physical address exists, the data corresponding to the read operation is obtained from the reserved space of the memory based on the offset physical address.

[0072] It is easy to understand that after receiving a data operation request, the FTL layer of the memory can first parse the operation type of the request instruction through the opcode in the instruction. This operation type may include the read operation mentioned above for obtaining snapshot incremental data.

[0073] It should be understood that, in order to avoid read errors caused by address mapping confusion, this embodiment also needs to perform a validity check on the offset logical address determined after redirection. At this time, the processor can determine whether the offset logical address corresponding to the incremental read and write operation in the second mapping area has established a mapping relationship with the physical address, that is, determine whether there is a corresponding offset physical address in the second mapping area.

[0074] It is easy to understand that if an offset physical address exists, it indicates that there is corresponding incremental data stored in the reserved space at that offset logical address. In this case, the processor can directly retrieve the data corresponding to the read operation from the reserved space based on the offset physical address obtained from the second mapping area, and return the read data to the host, thus realizing the reading of incremental data.

[0075] In another feasible implementation, this embodiment may further include steps S323-S324 after step S321:

[0076] Step S323: If the offset physical address does not exist, then obtain the initial physical address corresponding to the initial logical address in the first mapping area;

[0077] Step S324: Obtain the data corresponding to the read operation from the original data space of the memory based on the initial physical address.

[0078] Understandably, if the second mapping area does not store a valid incremental data mapping relationship corresponding to the offset logical address, that is, if there is no offset physical address, it indicates that there is no corresponding incremental data in the reserved space for that offset logical address, and the original data needs to be read. In this case, the processor can abandon address redirection, return to the original mapping process, and fall back to the original offset logic to read the data.

[0079] It's easy to understand that the aforementioned original data space is the core space in memory that stores non-incremental data. The physical addresses of the first mapping area all point to this space, and the data in the original data space is not modified after a snapshot is enabled. At this time, the processor can obtain the initial physical address corresponding to the initial logical address in the original mapping relationship saved in the first mapping area, and read the original data from the original data space protecting the data to be protected before the snapshot was enabled, thus ensuring that the host can obtain complete data. This rollback mechanism can directly reuse the original mapping relationship of the first mapping area without additional data backup or recovery procedures, thereby ensuring the efficiency of data reading.

[0080] In summary, referring to Figure 5 The data reading process during snapshot protection proposed in this embodiment will be explained and described. Figure 5 This is a schematic diagram of the data reading process in Embodiment 2 of the data protection method of this application. Figure 5 As shown, when the host sends a data operation request for a read operation, the FTL can obtain a read descriptor (containing the initial logical address LAA1).

[0081] Then, determine whether the initial logical address LAA1 belongs to the snapshot area. If it does, the read operation with the logical address located in the first mapping area can be redirected to obtain the offset logical address RLAA1 corresponding to the read operation (i.e., offset from the first mapping area to the second mapping area); otherwise, read directly.

[0082] Next, the validity of the offset logical address can be checked. That is, the FTL layer can check whether there is valid data in the data space of the second mapping area of ​​the offset logical address (which can be determined through FTL metadata), i.e., whether there is an offset physical address. For example, by querying the status of the mapping entry corresponding to the offset logical address in the FTL metadata, if the status is "unallocated" or "invalid", it can be determined that there is no valid data in the second mapping area of ​​the offset logical address, i.e., there is no offset logical address.

[0083] If the above validity check is not met, it means that there is no incremental data corresponding to the read operation in the second mapping area. The FTL layer can fall back to the original address, that is, fall back the logical address to the initial logical address LAA1, and find the initial physical address stored in the first mapping area through the initial logical address. Then, perform the data read operation based on the initial physical address, read the data from the physical storage space corresponding to the initial physical address and return it to the host.

[0084] Conversely, if a corresponding mapping relationship is detected in the second mapping area for the offset logical address, data reading operations can be performed directly in the reserved space based on the corresponding offset physical address to read the snapshot incremental data and return it to the host.

[0085] Therefore, this embodiment can achieve fault-tolerant processing of read operations through address validity detection and rollback mechanism, ensuring that users can read valid data (snapshot incremental data or original data) regardless of whether there is incremental mapping data corresponding to the offset logical address in the second mapping area, thereby improving the fault tolerance of data reading and user experience.

[0086] This embodiment discloses that when an incremental read / write operation is a read operation, it determines whether the offset logical address has a corresponding offset physical address in the second mapping area; if the offset physical address exists, the data corresponding to the read operation is obtained from the reserved space of the memory based on the offset physical address. If the offset physical address does not exist, the initial physical address corresponding to the initial logical address in the first mapping area is obtained; the data corresponding to the read operation is obtained from the original data space of the memory based on the initial physical address.

[0087] This embodiment can combine address offset and storage capacity-based address verification mechanisms during snapshot protection to ensure that the read operation accurately points to the second mapping area while ensuring that the offset logical address is valid. This enables precise reading of incremental data and ensures that users can obtain the latest modified data normally during snapshot protection. Furthermore, when it is ensured that there is no mapping relationship data at the offset logical address, it will fall back to the original initial logical address to read the data, avoiding reading invalid data and improving the reliability of data reading.

[0088] Based on Embodiment 1 and / or Embodiment 2 of this application, in the third embodiment of this application, the contents that are the same as or similar to Embodiment 1 and Embodiment 2 described above can be referred to the above description and will not be repeated hereafter.

[0089] Based on this, in the first feasible implementation method, please refer to Figure 6 , Figure 6 This is a flowchart illustrating Embodiment 3 of the data protection method of this application. In this embodiment, step S32 further includes steps S325-S326:

[0090] Step S325: When the incremental read / write operation is a write operation, determine whether the write data corresponding to the write operation meets the preset alignment granularity.

[0091] Step S326: If the written data meets the preset alignment granularity, then based on the offset physical address corresponding to the offset logical address, the written data is directly written into the reserved space of the memory.

[0092] It is easy to understand that the above-mentioned write operation can be a data operation corresponding to a data operation request sent by the host in the electronic device to the memory for storing or modifying snapshot incremental data, such as modifying existing data or adding new data. In this case, the data operation request may contain information such as the original logical address of the data to be written (the data content to be stored or modified), the content of the data to be written, and the data length.

[0093] It's easy to understand that the data transferred from the host to the memory via write operations—that is, the written data—must meet certain conditions in terms of size and address before it can be directly written into the reserved space. In this case, the preset alignment granularity can be the smallest data write unit specified by the memory, typically 4KB, 8KB, etc., which directly affects data write efficiency and flash memory lifespan.

[0094] Therefore, in this embodiment, before performing a write operation, it is necessary to determine whether the written data matches the physical page size of the memory, thereby avoiding data fragmentation. For example, in determining whether a preset alignment granularity is met, the processor can detect whether the starting address of the written data is an integer multiple of the page size, and whether the length of the written data is an integer multiple of the page size. For instance, when the page size of the memory is 4KB, if the starting address of the written data is 0x00001000 and the length of the written data is 4KB, then it can be determined that the written data meets the preset alignment granularity. In this case, the written data can directly correspond to one or more complete NAND flash memory pages.

[0095] It's important to understand that when the written data meets the preset alignment granularity, since a complete page is written, it won't affect other data within the page. The memory can directly allocate a new physical page in the second mapping area based on the offset physical address, i.e., the aforementioned offset physical address. The write operation is performed in the physical storage space located in the reserved space at the offset physical address. This write operation is atomic, efficient, and clean, and will not damage the integrity of the snapshot area data. Furthermore, after directly writing to the cache, the subsequent write process to flash memory can be uniformly managed by the FTL, achieving high-performance data writing.

[0096] Therefore, when the processor detects that the written data meets the preset alignment granularity, there is no need to merge or fill the data. The written data can be directly stored in the reserved space corresponding to the offset physical address, which improves writing efficiency, reduces data fragmentation and garbage collection times, and extends the life of the memory.

[0097] In a second feasible implementation, this embodiment further includes steps S327 to S329 after step S325:

[0098] Step S327: If the written data does not meet the preset alignment granularity, if the offset logical address is located within the logical address range corresponding to the second mapping area, obtain the offset physical address corresponding to the offset logical address in the second mapping area.

[0099] Step S328: If valid data is detected in the data space corresponding to the offset physical address, fill data is obtained from the reserved space of the memory until the merged fill data and the written data meet the preset alignment granularity.

[0100] Step S329: According to the offset physical address, write the merged padding data and the write data into the reserved space.

[0101] It's easy to understand that if the processor detects that the size of the data to be written is not an integer multiple of the preset alignment granularity (e.g., 2KB of data to be written with a 4KB alignment granularity), or that the target address of the data to be written is not aligned with the preset alignment granularity (e.g., target address 0x1500 with a 4KB alignment granularity), it indicates that the data to be written does not meet the preset alignment granularity. In this case, the write operation may start from the middle of a 4K page, or the amount of data to be written may be less than 4K, meaning the write operation cannot completely cover a NAND flash memory page. Because NAND flash memory does not support in-situ overwrite, in order to complete the write operation of unaligned data, the memory needs to perform data supplementation processing. That is, the memory needs to read the data of the entire 4K page of the physical area to be written, and then merge the read data and the new write data in the write cache into a complete 4K page of data that meets the preset alignment granularity before writing it to the physical area to be written.

[0102] At this point, the aforementioned valid data can refer to the data already stored in the reserved space corresponding to the offset physical address that has not been marked as invalid, i.e., the incremental data written after the snapshot was enabled. When the processor detects valid data in the data space corresponding to the offset physical address through memory metadata, the processor can obtain auxiliary data from the data space corresponding to the offset physical address to supplement the written data to the preset alignment granularity, i.e., the aforementioned padding data, and ensure that the data size after merging the padding data and the written data meets the alignment requirements. At this point, the processor can concatenate the padding data and the written data in address order to form a complete data block that meets the preset alignment granularity. The data merging process is performed internally at the FTL layer without host involvement. Therefore, this embodiment can reduce the interaction overhead between the host and the memory, ensuring the efficiency of the write operation.

[0103] Then, the processor can write the merged padding data and write data to the physical storage area in the reserved space with the offset physical address, overwriting the original valid data and updating the mapping relationship of the second mapping area.

[0104] In the third feasible implementation, in this embodiment, step S327 is followed by steps S331 to S333:

[0105] Step S331: If it is detected that there is no valid data in the data space corresponding to the offset physical address, then obtain the initial physical address corresponding to the initial logical address in the first mapping area;

[0106] Step S332: Obtain fill data from the original data space of the memory according to the initial physical address until the merged fill data and the written data meet the preset alignment granularity;

[0107] Step S333: Based on the offset physical address, write the merged padding data and the write data into the reserved space.

[0108] It's easy to understand that if the processor detects that there is no stored incremental data in the reserved space corresponding to the offset physical address, or that the data has been marked as invalid (e.g., the previous incremental operation was canceled), it can be determined that there is no valid data in the data space corresponding to the offset physical address. In this case, the data write operation needs to roll back to the original logical address to obtain valid fill data. The processor can obtain fill data from the original data before the snapshot was started based on the initial physical address pointing to the original data space (non-reserved space) of the memory, and fill the written data to the data size that meets the preset alignment granularity. At this time, the data in the original data space is only read and not modified, and the security of the original data in the snapshot area is not affected.

[0109] The above are just three possible implementations of step S32 provided in this embodiment when the data operation request for the logical address range is a write operation. This embodiment does not specifically limit the specific implementation of step S32.

[0110] In summary, referring to Figure 7 This section explains the data writing process after snapshot protection is enabled. Figure 7 This is a schematic diagram of the data writing process in Embodiment 3 of the data protection method of this application.

[0111] like Figure 7 As shown, when the host sends a write request to the memory, the FTL layer in the memory can obtain the write descriptor and then determine whether the corresponding write data meets the preset alignment granularity, such as whether the write is a 4K aligned write.

[0112] If it is a 4K aligned write, that is, when the write data corresponding to the write operation meets the preset alignment granularity, it is directly written to the cache based on the offset logical address after redirection, and then written to the flash memory in batches by FTL.

[0113] If the write is not 4K aligned, then a redirect address validity check is required:

[0114] At this time, if the offset logical address is within the logical address range corresponding to the second mapping area, and if the offset physical address corresponding to the offset logical address in the second mapping area has no valid data in the physical storage area of ​​the reserved space, then it will fall back to the initial logical address, and read part of the existing data in the original data space based on the read descriptor corresponding to the initial logical address. This data will be used as padding data and merged with the written data to form a 4KB data block that meets the preset alignment granularity. Then, it will be written to the cache to write the merged data into the reserved space.

[0115] Otherwise, the address redirection is maintained, and the padding data is read from the physical storage area corresponding to the offset physical address according to the read descriptor corresponding to the offset logical address. This data is then merged with the written data into a 4KB aligned block and written to the cache to write the merged data into the reserved space.

[0116] In addition, such as Figure 7 As shown, if the initial logical address does not belong to the first mapping area, it indicates that the data corresponding to the write operation does not need to be protected. At this time, the processor can normally perform the data write operation based on the corresponding read descriptor.

[0117] This embodiment discloses that when an incremental read / write operation is a write operation, it determines whether the write data corresponding to the write operation meets a preset alignment granularity. If the write data meets the preset alignment granularity, the write data is directly written into the reserved space of the memory based on the offset physical address corresponding to the offset logical address. If the write data does not meet the preset alignment granularity, when the offset logical address is within the logical address range corresponding to the second mapping area, the offset physical address corresponding to the offset logical address in the second mapping area is obtained. If valid data is detected in the data space corresponding to the offset physical address, fill data is obtained from the reserved space of the memory until the merged fill data and write data meet the preset alignment granularity. The merged fill data and write data are written into the reserved space according to the offset physical address. If valid data is detected in the data space corresponding to the offset physical address, the initial physical address corresponding to the initial logical address in the first mapping area is obtained. Fill data is obtained from the original data space of the memory according to the initial physical address until the merged fill data and write data meet the preset alignment granularity. The merged fill data and write data are written into the reserved space based on the offset physical address.

[0118] This embodiment can effectively store incrementally written data into the reserved space pointed to by the second mapping area through a redirection mechanism, ensuring that the original mapping relationship of the first mapping area and the corresponding original data space are not modified, thus protecting the integrity of the data to be protected from the bottom layer and avoiding damage to critical data caused by abnormal power failure or misoperation. At the same time, this embodiment can reduce write amplification phenomenon based on alignment verification with preset alignment granularity (because flash memory does not support in-situ overwrite, writing unaligned data requires additional erase-write operations), improve data writing efficiency, and extend the service life of the memory.

[0119] It should be noted that the above examples are only for understanding this application and do not constitute a limitation on the data protection method of this application. Any simple modifications based on this technical concept are within the scope of protection of this application.

[0120] This application provides a memory comprising: at least one controller; and flash memory communicatively connected to the at least one controller; wherein the flash memory stores instructions executable by the at least one controller, the instructions being executed by the at least one controller to enable at least one processor to perform the data protection method described in Embodiment 1 above.

[0121] The memory in this application embodiment may include, but is not limited to, storage devices that support flash memory, such as solid-state drives (SSDs), embedded multimedia cards (eMMCs), universal flash storage (UFS), and secure digital memory cards (SD cards).

[0122] Flash memory refers to storage units in memory used to store information such as data protection programs, snapshot data, mapping tables, and metadata. It may include cache (such as SRAM) and non-volatile memory (such as NAND flash memory chips (NOT-AND)).

[0123] The controller can be the main control chip in the memory (such as the SSD controller), which has functions such as data processing, instruction parsing, and FTL layer management. It is the core computing component that executes data protection programs.

[0124] At this time, the data protection program can be stored in the memory of the memory, and is a computer program that can run on the processor. Its code logic corresponds to the steps of the data protection method in the above embodiment, and can realize functions including dual mapping area configuration, acquisition of the logical block address range of the snapshot area, redirection execution, read and write processing, and cleanup after snapshot is closed.

[0125] After the memory is powered on, the processor can initialize the FTL layer, run the data protection program, and complete the configuration of the first and second mapping areas; receive or search the preset configuration information in the system configuration file sent by the host to determine the snapshot area to be protected; monitor the snapshot enable command in real time, and execute read-write redirection after triggering; after receiving the snapshot disable command, clean up the mapping resources of the second mapping area and complete the entire data protection process.

[0126] The memory provided in this application, employing the data protection method described in the above embodiments, can solve the technical problem of how to protect critical data in the memory from the effects of abnormal power outages or erroneous operations. Compared with the prior art, the beneficial effects of the memory provided in this application are the same as those of the data protection method provided in the above embodiments, and other technical features of this memory are the same as those disclosed in the method of the previous embodiment, and will not be repeated here.

[0127] It should be understood that the various parts disclosed in this application can be implemented using hardware, software, firmware, or a combination thereof. In the description of the above embodiments, specific features, structures, materials, or characteristics can be combined in any suitable manner in one or more embodiments or examples.

[0128] The above are merely specific embodiments of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

[0129] To achieve the above objectives, this application also proposes an electronic device that includes the memory mentioned above.

[0130] The electronic device in this application embodiment can be a computing service device equipped with memory that has data storage, data processing and program execution functions, and needs to protect critical data (such as system data). It can include, but is not limited to, mobile terminals such as mobile phones, laptops, digital broadcast receivers, PDAs (Personal Digital Assistants), PADs (Portable Application Description), PMPs (Portable Media Players), vehicle terminals (such as vehicle navigation terminals), and fixed terminals such as digital TVs and desktop computers.

[0131] Since this electronic device adopts all the technical solutions of all the above-described embodiments of the memory, it has at least all the beneficial effects brought about by the technical solutions of the above-described embodiments, which will not be repeated here.

[0132] To achieve the above objectives, this application provides a storage medium having computer-readable program instructions (i.e., a data protection program) stored thereon, which are used to execute the data protection method described in the above embodiments.

[0133] The storage medium provided in this application may be, for example, a USB flash drive, but is not limited to, electrical, magnetic, optical, electromagnetic, infrared, or semiconductor systems, devices, or any combination thereof. More specific examples of the storage medium may include, but are not limited to: electrical connections with one or more wires, portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination thereof. In this embodiment, the storage medium may be any tangible medium containing or storing a program that can be used by or in conjunction with an instruction execution system, system, or device. The program code contained on the storage medium may be transmitted using any suitable medium, including but not limited to: wires, optical cables, RF (Radio Frequency), etc., or any suitable combination thereof.

[0134] The aforementioned storage medium may be contained within a memory; or it may exist independently and not be assembled into a memory.

[0135] When the storage medium is a flash memory chip, the data protection program is stored as firmware in a specific area of ​​the chip. The main control chip (processor) of the memory automatically loads and runs the program after power-on, thus implementing the data protection method mentioned above.

[0136] When the storage medium is an independent USB flash drive, hard drive, etc., the CPU of the electronic device can read the data protection program in the storage medium through the interface, load it into memory and run it, thereby controlling the memory of the electronic device to execute the data protection method mentioned above (the memory needs to support FTL layer configuration and redirection functions).

[0137] The aforementioned storage medium carries one or more programs, which, when executed by the memory, enable the memory to solve how to protect critical data in the memory from abnormal power outages or erroneous operations.

[0138] The data protection program can be adapted to the characteristics of different storage media and processors. For example, the code of the FTL parameter configuration module can be adjusted for different storage devices such as SSD and eMMC, and the code of the instruction execution module can be adjusted for different processor architectures. This ensures that the program can accurately implement the technical solutions of the data protection methods mentioned above in different hardware environments.

[0139] Data protection program code for performing the operations of this application can be written in one or more programming languages ​​or a combination thereof. These programming languages ​​include object-oriented programming languages—such as Java, Smalltalk, and C++—and conventional procedural programming languages—such as the "C" language or similar programming languages. The program code can be executed entirely on the user's computer, partially on the user's computer, as a standalone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In cases involving remote computers, the remote computer can be connected to the user's computer via any type of network—including a local area network (LAN) or a wide area network (WAN)—or can be connected to an external computer (e.g., via the Internet using an Internet service provider).

[0140] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and data protection program products according to various embodiments of this application. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of code containing one or more executable instructions for implementing the specified logical function. It should also be noted that in some alternative implementations, the functions indicated in the blocks may occur in a different order than those indicated in the drawings. For example, two consecutively indicated blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in the block diagrams and / or flowcharts, and combinations of blocks in the block diagrams and / or flowcharts, may be implemented using a dedicated hardware-based system that performs the specified function or operation, or using a combination of dedicated hardware and computer instructions.

[0141] The modules described in the embodiments of this application can be implemented in software or hardware. The names of the modules do not necessarily limit the functionality of the unit itself.

[0142] The storage medium provided in this application is a computer-readable storage medium that stores computer-readable program instructions (i.e., a data protection program) for executing the above-described data protection method. This solves the technical problem of how to protect critical data in a memory from abnormal power outages or erroneous operations. Compared with the prior art, the beneficial effects of the storage medium provided in this application are the same as those of the data protection method provided in the above embodiments, and will not be repeated here.

[0143] The above are only some embodiments of this application and do not limit the scope of the solution of this application. All equivalent structural transformations made under the technical concept of this application and using the content of this application specification and drawings, or direct / indirect applications in other related technical fields, are included within the protection scope of this application.

Claims

1. A data protection method, characterized in that, The method is applied to a memory, and the method includes: Configure a logical address to physical address mapping table, which includes a first mapping area and a second mapping area; wherein, the first mapping area is used to record the original mapping relationship between logical addresses and physical addresses corresponding to read and write operations performed on the snapshot area before the snapshot protection mode is enabled, and the second mapping area is used to record the mapping relationship between logical addresses and physical addresses corresponding to incremental read and write operations performed on the snapshot area after the snapshot protection mode is enabled. Upon receiving the snapshot enable command, the system enters the snapshot protection mode and determines the snapshot area to be protected based on the preset configuration information. Lock the original mapping relationship of the snapshot area in the first mapping area, and redirect the data operation request initiated for the snapshot area to the second mapping area to perform the incremental read and write operation; The step of redirecting the data operation request initiated for the snapshot area to the second mapping area for the incremental read / write operation includes: Obtain the offset logical address corresponding to the data operation request initiated for the snapshot area after it is redirected to the second mapping area; the offset logical address is determined based on the redirection offset and the initial logical address of the data operation request in the first mapping area, and the redirection offset is the address offset between the starting logical address of the second mapping area and the starting logical address of the first mapping area; The incremental read / write operation is performed in the reserved space of the memory according to the offset logical address; The step of performing the incremental read / write operation in the reserved space of the memory according to the offset logical address includes: When the incremental read / write operation is a write operation, it is determined whether the write data corresponding to the write operation meets the preset alignment granularity. If the written data meets the preset alignment granularity, then based on the offset physical address corresponding to the offset logical address, the written data is directly written into the reserved space of the memory; When the incremental read / write operation is a write operation, after determining whether the write data corresponding to the write operation meets the preset alignment granularity, the method further includes: If the written data does not meet the preset alignment granularity, and the offset logical address is located within the logical address range corresponding to the second mapping area, the offset physical address corresponding to the offset logical address in the second mapping area is obtained. If valid data is detected in the data space corresponding to the offset physical address, fill data is obtained from the reserved space of the memory until the merged fill data and the written data meet the preset alignment granularity. Based on the offset physical address, the merged padding data and the write data are written into the reserved space.

2. The data protection method as described in claim 1, characterized in that, If the written data does not meet the preset alignment granularity, and the offset logical address is within the logical address range corresponding to the second mapping area, after obtaining the offset physical address corresponding to the offset logical address in the second mapping area, the method further includes: If it is detected that there is no valid data in the data space corresponding to the offset physical address, then the initial physical address corresponding to the initial logical address in the first mapping area is obtained; Fill data is obtained from the original data space of the memory according to the initial physical address until the merged fill data and the written data meet the preset alignment granularity; Based on the offset physical address, the merged padding data and the written data are written into the reserved space.

3. The data protection method as described in claim 1, characterized in that, The step of performing the incremental read / write operation in the reserved space of the memory according to the offset logical address includes: When the incremental read / write operation is a read operation, it is determined whether the offset logical address has a corresponding offset physical address in the second mapping area; If the offset physical address exists, the data corresponding to the read operation is obtained from the reserved space of the memory based on the offset physical address.

4. The data protection method as described in claim 3, characterized in that, When the incremental read / write operation is a read operation, after determining whether the offset logical address has a corresponding offset physical address in the second mapping area, it further includes: If the offset physical address does not exist, then obtain the initial physical address corresponding to the initial logical address in the first mapping area; The data corresponding to the read operation is obtained from the original data space of the memory based on the initial physical address.

5. The data protection method as described in claim 1, characterized in that, After locking the original mapping relationship of the snapshot area in the first mapping area and redirecting the data operation request initiated for the snapshot area to the second mapping area to perform the incremental read / write operation, the method further includes: Upon receiving the snapshot close command, obtain the current mapping entry corresponding to the second mapping area; The current mapping entry is marked as invalid, and the physical storage space corresponding to the current mapping entry in the memory is released.

6. A memory, characterized in that, The memory includes: a controller, flash memory, and a data protection program stored on the flash memory and executable on the controller, the data protection program being configured to implement the steps of the data protection method as described in any one of claims 1 to 5.

7. An electronic device, characterized in that, The electronic device includes: the memory as described in claim 6.

8. A storage medium, characterized in that, The storage medium stores a data protection program, which, when executed by a processor, implements the steps of the data protection method as described in any one of claims 1 to 5.

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