Current source converter admittance simulation reactive power regulation method and system

Abstract

The application provides a current source type converter admittance simulation reactive power regulation method and system, and belongs to the technical field of current source type converter regulation, and comprises the following steps: establishing a single-phase equivalent circuit of a current source type converter grid-connected system, and collecting capacitor voltage; transforming the collected capacitor voltage to obtain transformed voltage, processing the transformed voltage by using an integrator to obtain a fundamental wave in-phase component, a fundamental wave quadrature component and a non-fundamental wave residual error; constructing a fundamental wave admittance current reference according to an outer ring given active instruction reactive power instruction; low-pass shaping the non-fundamental wave residual error to obtain intermediate output, and further processing the intermediate output to obtain a non-fundamental wave damping current reference; superimposing the fundamental wave admittance current reference and the non-fundamental wave damping current reference to form a current source type converter injected current total reference; and the current source type converter adopts a current source type converter ring to make an actual injected current track the current source type converter injected current total reference, so that expected frequency division admittance simulation is realized at a capacitor node.

Description

Technical Field

[0001] This invention belongs to the field of current source converter regulation technology, and particularly relates to a method and system for reactive power regulation by admittance simulation of current source converter. Background Technology

[0002] The statements in this section are merely background information related to the present invention and do not necessarily constitute prior art.

[0003] Current source converters (CSCs) have gained attention in medium-voltage drives, high-voltage direct current transmission, and renewable energy grid connection due to their inherent short-circuit protection capability, low dv / dt output characteristics, and good boost capability. The low dv / dt output characteristic refers to the relatively low and smooth rate of change of the AC output voltage of a current source converter, which is typically the line voltage, during switching. Compared to voltage source converters (VSCs), the DC-side current of a current source converter (CSC) is continuous, naturally limiting its fault current and making it more suitable for high-reliability applications.

[0004] In terms of reactive power regulation and voltage support on the grid side, much of the existing research focuses on voltage source converters (VSCs). These methods typically rely on complete three-phase voltage and current measurements and construct active / reactive power decoupling control loops in the dq coordinate system. An impedance / admittance analog control method, which treats the converter as a passive element by mapping the voltage and current at the converter ports, can reduce the need for sensors. Without sacrificing stability, it can achieve active and reactive power control of the converter using only a single set of current / voltage sensors.

[0005] However, when the current source converter (CSC) is used for pure reactive power support or extremely low active power conditions, its equivalent active power consumption is close to zero. If the traditional admittance simulation scheme based on equivalent conductance and susceptance is still used, the physical damping in the circuit is severely insufficient, easily forming low-damped or even negative-damped resonance with the grid impedance and filter capacitor, causing oscillations in capacitor voltage and grid-side current, and grid instability. Although existing technologies usually avoid this problem by adding actual resistive devices, this sacrifices reactive power regulation capability and introduces additional losses.

[0006] Furthermore, digital control inevitably involves time delays caused by sampling, calculation, and modulation update links. For port shaping control such as admittance simulation, ignoring digital delays can lead to significant deviations between theoretical design and actual equivalent admittance, especially at high frequencies or non-fundamental frequency bands, where the virtual resistance can easily flip from positive real admittance to negative damping, exacerbating instability risks.

[0007] Therefore, the technical problem to be solved is that the inherent damping of the system is insufficient and the effect of digital delay is superimposed in the reactive power regulation of the current source converter CSC admittance simulation, which leads to stability challenges under certain operating conditions. In addition, the traditional solution of increasing physical resistance will sacrifice efficiency and regulation capability. Summary of the Invention

[0008] To overcome the shortcomings of the prior art, this invention provides a method and system for simulating reactive power regulation of admittance in current source converters (CSCs). It relies on AC capacitor voltage measurement and is applicable to the simulated reactive power regulation of admittance in current source converters (CSCs) under pure reactive or low active power conditions. At the same time, it systematically considers the constraint relationship between digital delay, band damping and grid stability, and realizes controllable shaping of the admittance / impedance of the PCC port.

[0009] To achieve the above objectives, one or more embodiments of the present invention provide the following technical solutions:

[0010] Firstly, a method for reactive power regulation based on admittance simulation of a current source converter is disclosed, including:

[0011] Establish a single-phase equivalent circuit for a grid-connected system with a current source converter, and collect capacitor voltage based on the single-phase equivalent circuit;

[0012] Perform on the collected capacitor voltage The transformed voltage is obtained by transformation, and an integrator is used to process the transformed voltage to obtain the fundamental in-phase component, the fundamental quadrature component, and the non-fundamental residual.

[0013] Construct the fundamental wave admittance current reference based on the active and reactive power commands given by the outer loop.

[0014] The non-fundamental residual is low-pass shaped to obtain the intermediate output, and the intermediate output is further processed to obtain the non-fundamental damped current reference.

[0015] The fundamental admittance current reference and the non-fundamental damped current reference are superimposed to form the total reference for the injected current of the current source converter.

[0016] The current source converter uses a current source converter loop to make the actual injected current track the total reference of the injected current of the current source converter, thereby realizing the expected frequency division admittance simulation at the capacitor node.

[0017] As a further technical solution, when establishing the single-phase equivalent circuit of the current source converter grid-connected system, the current source converter grid-connected system is simplified to a structure in which the PCC voltage source is connected to the parallel filter capacitor and the capacitor node of the current source converter injected current source through a series inductor and resistor.

[0018] The single-phase equivalent circuit uses the capacitor voltage as the only AC feedback quantity. Kirchhoff's current law is used to establish the admittance relationship between the injected current of the current source converter and the capacitor voltage, so as to realize the clear mapping between the equivalent admittance of the capacitor node and the equivalent impedance of the PCC port.

[0019] The port characteristics of the current source converter are simulated as controllable admittance connected in parallel with a capacitor, thereby achieving active and reactive power regulation.

[0020] As a further technical solution, the admittance relationship between the injected current control quantity and the AC side capacitor voltage of the current source converter is established using Kirchhoff's current law, specifically:

[0021] ;

[0022] The grid-side current is then:

[0023] ;

[0024] in, i g For grid-side current, i w Inject current control signals into the current source converter. i c For capacitor current, C For filtering capacitors, u c This is the AC side capacitor voltage. This is the equivalent admittance of the port of the current source converter.

[0025] As a further technical solution, the explicit mapping between the equivalent admittance of the capacitor node and the equivalent impedance of the PCC port is as follows:

[0026] Based on the series branch voltage relationship and the grid-side current expression, the equivalent impedance of the PCC port is obtained as follows:

[0027] ;

[0028] in, u g PCC voltage, i g For grid-side current, C For filtering capacitors, This is the port equivalent admittance of the current source converter. R For series resistance, L It is a series inductor.

[0029] As a further technical solution, an integrator is used to process the transformed voltage to obtain the fundamental in-phase component, the fundamental quadrature component, and the non-fundamental residual, specifically:

[0030] ;

[0031] ;

[0032] ;

[0033] in, The fundamental angular frequency; is the damping coefficient.

[0034] As a further technical solution, a fundamental wave admittance current reference is constructed based on the active and reactive power commands given by the outer ring, specifically as follows:

[0035] ;

[0036] in, For the fundamental in-phase component, For fundamental orthogonal components, Provide active power instructions for the outer loop. The reactive power command given to the outer loop.

[0037] As a further technical solution, the non-fundamental residual is low-pass shaped to obtain an intermediate output, and the intermediate output is further processed to obtain a non-fundamental damped current reference, specifically:

[0038] ;

[0039] in, G v Non-fundamental virtual conductance; u ch The non-fundamental residual voltage, It is a low-pass filter.

[0040] Secondly, a current source converter admittance analog reactive power regulation system is disclosed, including:

[0041] The single-phase equivalent circuit construction module is configured to: establish a single-phase equivalent circuit for a current source converter grid-connected system, and collect capacitor voltage based on the single-phase equivalent circuit;

[0042] The capacitor voltage data processing module is configured to: process the acquired capacitor voltage. The transformed voltage is obtained by transformation, and an integrator is used to process the transformed voltage to obtain the fundamental in-phase component, the fundamental quadrature component, and the non-fundamental residual.

[0043] The fundamental admittance current reference construction module is configured to construct a fundamental admittance current reference based on the active and reactive power commands given by the outer loop.

[0044] The non-fundamental damped current reference construction module is configured to: perform low-pass shaping on the non-fundamental residual to obtain an intermediate output, and further process the intermediate output to obtain the non-fundamental damped current reference;

[0045] The injection current total reference module is configured to superimpose the fundamental admittance current reference and the non-fundamental damping current reference to form the injection current total reference of the current source converter.

[0046] The admittance simulation reactive power regulation module is configured such that the current source converter uses a current source converter loop to make the actual injected current track the total reference of the injected current of the current source converter, thereby realizing the expected frequency division admittance simulation at the capacitor node.

[0047] The above one or more technical solutions have the following beneficial effects:

[0048] This invention's technical solution, based on a single-phase equivalent physical model, constructs a specific admittance relationship between the CSC injection current and the capacitor voltage by measuring only the AC-side filter capacitor voltage, thereby achieving port admittance shaping and reactive power regulation. This invention relies solely on a capacitor voltage sensor to achieve admittance simulation and reactive power regulation. Based on a single-phase equivalent circuit, through a clear mapping between node KCL and port impedance, it uses only the capacitor voltage... u c As the sole AC feedback quantity, the admittance relationship between the CSC injection current and the capacitor voltage is constructed. This eliminates the need for a three-phase AC current sensor, reducing measurement costs and insulation requirements.

[0049] This invention eliminates the need for a PLL, achieving P / Q decoupling control in a stationary coordinate system: Utilizing the fundamental in-phase and quadrature components extracted by SOGI, active / reactive power output is directly constructed in the stationary coordinate system, effectively achieving the specified fundamental complex admittance. Compared with the traditional dq coordinate system method, it can complete P / Q decoupling control without the need for a PLL, simplifying the grid synchronization process and reducing the control complexity under weak grid conditions and frequency offset conditions.

[0050] The core technologies of this invention include: SOGI frequency division and fundamental P / Q admittance simulation, non-fundamental virtual resistance for low-pass shaping, and grid-connected stability design with delay correction.

[0051] To consider the frequency division admittance design for digital delay and avoid high-frequency negative damping of the virtual resistor: explicitly treat the sampling, calculation, and modulation link as a pure delay of approximately 1.5 sampling periods, and give the critical frequency at which the virtual resistor does not fail. Based on this, by using low-pass shaping of the non-fundamental damping admittance, the effective operating frequency band of the virtual resistor is limited to below the critical frequency, enabling the system to obtain sufficient positive real damping in the resonant frequency band, while automatically suppressing the damping channel in the high-frequency danger region, theoretically avoiding the high-frequency negative damping problem caused by digital delay.

[0052] Traditional admittance simulation methods are prone to oscillations when the CSC (Cyclic Grid Controller) is not outputting active power due to a lack of physical damping. This invention introduces controllable positive real admittance into the system through a non-fundamental virtual resistance channel, while the fundamental channel handles reactive power regulation. The superposition of these two at the port constructs a frequency-division admittance characteristic that provides both reactive power support and sufficient damping, enabling the CSC to remain stable in pure reactive power support mode and flexibly adjust grid-side reactive power and voltage.

[0053] The port impedance of this invention can be analyzed and tuned, facilitating matching with unknown grid impedances. This invention provides the admittance from the capacitor port. impedance to PCC and minor-loop gain The explicit relationship facilitates stability assessment using Nyquist or impedance criteria in offline design and online optimization, enabling parameter tuning and robustness analysis for power grid scenarios with different short-circuit capacities, line parameters, and filter configurations.

[0054] The various steps and modules of this invention may be adjusted and expanded according to different CSC topologies, sampling frequencies, filtering parameters and power grid conditions without departing from the above general idea, and all such adjustments and expansions should be considered to fall within the protection scope of this invention.

[0055] Advantages of additional aspects of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. Attached Figure Description

[0056] The accompanying drawings, which form part of this invention, are used to provide a further understanding of the invention. The illustrative embodiments of the invention and their descriptions are used to explain the invention and do not constitute an improper limitation of the invention.

[0057] Figure 1 This is the single-phase equivalent circuit for the admittance simulation control of the current source converter in this embodiment;

[0058] Figure 2 The topology and control block diagram for the admittance simulation control of a current source converter are shown.

[0059] Figure 3 This is the equivalent circuit diagram of the frequency division admittance analog control of the current source converter proposed in this patent;

[0060] Figure 4The Nyquist plot of the impedance ratio on both sides of the PCC point is shown when the grid-side impedance increases.

[0061] Figure 5 It shows that when the grid-side impedance is large, as the harmonic virtual admittance increases, the system tends to become stable from unstable, and the stability margin increases with the increase of virtual admittance.

[0062] Figure 6 The control flow for the admittance simulation control of a current source converter;

[0063] Figure 7 The operating waveforms of the improved admittance analog control of the current source converter are shown.

[0064] Figure 8 To improve the admittance of current source converters and simulate power conditions during operation. Detailed Implementation

[0065] It should be noted that the following detailed descriptions are exemplary and intended to provide further illustration of the invention. Unless otherwise specified, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains.

[0066] It should be noted that the terminology used herein is for the purpose of describing particular implementations only and is not intended to limit the exemplary implementations of the present invention.

[0067] Where there is no conflict, the embodiments and features in the embodiments of the present invention can be combined with each other.

[0068] Terminology Explanation:

[0069] CSC: Current Source Converter, a type of power electronic converter that uses current as the controlled object. Its DC side uses a large inductor as an energy storage element, giving it current source characteristics.

[0070] PCC point: Point of Common Coupling, refers to the grid connection node shared by the current source converter and the power grid or other users. It is a reference port for analyzing grid impedance, admittance and stability.

[0071] Admittance simulation control: This method uses a control algorithm to make the grid-connected converter behave with a pre-set equivalent admittance Y(s) at a certain port, thus realizing the current-voltage relationship. i =Y(s) u This achieves purposes such as reactive power regulation, voltage support, or damping enhancement.

[0072] SOGI: Second-Order Generalized Integrator, used to extract the fundamental component and quadrature components from a signal.

[0073] Virtual resistance / virtual conductance: Equivalent resistance or conductance constructed through control algorithms, which appears as positive real admittance to the external circuit. It is used to provide damping and absorb oscillating energy, rather than relying on actual physical resistive components.

[0074] Digital delay: The equivalent time delay caused by discrete sampling, computation, and modulation. In a conventional sampling-calculation-PWM update process, the response of the CSC injected current to the measured voltage can be approximated as a pure delay of 1.5 sampling cycles.

[0075] PD: Phase Disposition, a carrier arrangement in which all carriers (including upper and lower layer carriers) have the same phase.

[0076] Critical frequency: The upper frequency limit at which the virtual resistance equivalent admittance changes from positive to negative damping in the presence of digital delay. Applying "damped admittance" above this frequency band may result in equivalent negative damping, leading to system instability.

[0077] Non-fundamental residual: The signal obtained by subtracting the fundamental component from the measured voltage signal, mainly containing harmonics, interharmonics, and transient components. In this invention, it is used to construct a non-fundamental damped current.

[0078] Minor-loop gain: The single-input single-output loop gain formed by the ratio L(s) = Zg(s) / Zc(s) after the power grid is equivalent to a series impedance Zg(s) at the PCC point and the CSC side is equivalent to an impedance Zc(s), is used for Nyquist stability analysis.

[0079] “ s The Laplace operator (complex frequency variable) transforms time-domain dynamic characteristics into complex-domain algebraic relationships, which are used to establish impedance transfer function models and analyze system stability.

[0080] Example 1

[0081] See appendix Figure 2 and appendix Figure 6 As shown, this embodiment discloses a method for simulating reactive power regulation using admittance in a current source converter, including:

[0082] Step 1: Establish the single-phase equivalent circuit of the grid-connected system of the current source converter;

[0083] Step 2: Based on the single-phase equivalent circuit, acquire the capacitor voltage and process the acquired capacitor voltage. The transformed voltage is obtained by transformation, and an integrator is used to process the transformed voltage to obtain the fundamental in-phase component, the fundamental quadrature component, and the non-fundamental residual.

[0084] Step 3: Construct the fundamental wave admittance current reference based on the active and reactive power commands given by the outer loop;

[0085] Step 4: Low-pass shaping is performed on the non-fundamental residual to obtain the intermediate output, and the intermediate output is further processed to obtain the non-fundamental damped current reference.

[0086] Step 5: Superimpose the fundamental admittance current reference and the non-fundamental damping current reference to form the total injection current reference for the current source converter;

[0087] Step 6: The current source converter uses a current source converter loop to make the actual injected current track the total reference of the injected current of the current source converter, thereby realizing the expected frequency division admittance simulation at the capacitor node.

[0088] In one implementation example, step one specifically discloses the grid-connected single-phase equivalent modeling and port admittance mapping of a specific current source converter (CSC).

[0089] Regarding the single-phase equivalent modeling of the current source converter (CSC) connected to the grid, specifically, the single-phase equivalent modeling of the current source converter (CSC) simplifies the CSC grid-connected system into a capacitor node structure where the PCC voltage source is connected to a parallel filter capacitor and the CSC injected current source via a series inductor and resistor. Using the capacitor voltage as the only AC feedback quantity, the admittance relationship between the CSC injected current and the capacitor voltage is established through Kirchhoff's current law, realizing a clear mapping between the equivalent admittance of the capacitor node and the equivalent impedance of the PCC port, thus providing a physical model basis for subsequent control and stability analysis.

[0090] See the appendix for details. Figure 1 As shown, the current source converter (CSC) grid-connected system of this embodiment can be described in single-phase equivalent circuit as: PCC voltage source u g Through series inductor L With resistance R Connected to capacitor node O; a filter capacitor is connected in parallel to this node. C and CSC injected current source i w Inductor current is the grid-side current. i g The capacitor voltage is u c .

[0091] Additionally, in one implementation example, see Appendix for the control equivalent circuit diagram. Figure 3As shown, the core idea of ​​this control circuit is to simulate the port characteristics of the current source converter as a controllable admittance connected in parallel with a capacitor, thereby realizing the regulation of active and reactive power in the system.

[0092] Regarding the appendix Figure 1 and appendix Figure 3 The relevant variable definitions in the text are as follows: u g PCC voltage, which is not directly involved in the control in this implementation example; i g The grid-side current is equal to the series inductor current, and is not directly measured in this example. u c The AC side capacitor voltage is the only AC feedback quantity for the admittance analog control of this invention. i w CSC injected current control quantity, which is the control target of CSC inner loop or modulation; i c Capacitor current, satisfying .

[0093] The following section introduces the mapping of capacitor node KCL and equivalent admittance based on the constructed single-phase equivalent circuit.

[0094] First, it needs to be explained that the following relationship is satisfied at the node of the single-phase equivalent capacitance:

[0095] (1)

[0096] in, i g : Grid-side current, i w CSC injection current control quantity. i c Capacitive current, u c AC side capacitor voltage, C : Filter capacitor.

[0097] If we let the current injection of the current source converter (CSC) achieve the following relationship:

[0098] (2)

[0099] The grid-side current is then:

[0100] (3)

[0101] It is evident that the equivalent port admittance at the capacitor node can be shaped simply by controlling the CSC to satisfy the following equation. Used for power regulation:

[0102] (4)

[0103] in, This is the equivalent admittance of the port of the current source converter.

[0104] In addition, the process of obtaining the equivalent impedance of the PCC port will be introduced below.

[0105] Based on the voltage relationship of series branches:

[0106] (5)

[0107] Substituting the above The equivalent impedance of the PCC port is obtained as follows:

[0108] (6)

[0109] The equivalent impedance of the PCC port clarifies the mapping relationship between the capacitor node admittance and the PCC port impedance, thus obtaining the reshaping of the capacitor node admittance to the reshaping of the PCC port impedance, which is the basis for subsequent grid-connected stability analysis.

[0110] Regarding the grid-connected stability criteria and digital delay correction location for PCC points: Based on the port impedance mapping relationship established in step one (single-phase equivalent circuit), the impact of digital delay on equivalent admittance and critical frequency constraints are clarified, providing a stability design basis for subsequent signal processing and admittance control.

[0111] Firstly, regarding the grid equivalent and minor-loop gain, the minor-loop gain, by characterizing the ratio of the grid equivalent impedance at the PCC point to the equivalent impedance on the CSC side, provides a core basis for evaluating the stability of the grid-connected system using the Nyquist or impedance criterion.

[0112] Thevenin equivalent of the power grid at point PCC is a voltage source in series with an unknown impedance. At this time, the equivalent impedance of the PCC port is The minor-loop gain is defined as follows:

[0113] (7)

[0114] Under the SISO small-signal model, if The Nyquist curve does not enclose If point 1 is reached, the grid-connected system is stable.

[0115] Secondly, regarding the introduction of digital delay: In actual digital control, CSC admittance is simulated by sampling the capacitor voltage. Port equivalent admittance The CSC injection current control quantity is obtained through calculation. And update it in the next PWM cycle, so that the target current at the next sampling time is... Approximate tracking instruction. Equivalent to:

[0116] (8)

[0117] From sampling time Digital delay time and delay transfer function In the continuous domain, it is approximated as:

[0118] (9)

[0119] Therefore, the actual port equivalent admittance after digital delay processing for:

[0120] (10)

[0121] After introducing digital delay, the PCC port impedance should be corrected by equation (6) as follows:

[0122] (11)

[0123] Regarding the critical frequency related to delay: For virtual resistance (virtual conductance), digital delay causes phase reversal of the equivalent admittance at high frequencies. The critical angular frequency at which the virtual resistance can be defined as the real resistance can be determined. Critical frequency for:

[0124] (12)

[0125] Critical angular frequency Used to calculate the cutoff angular frequency of the low-pass filter for subsequent non-fundamental damped channels. .

[0126] In the region above this frequency, if a large "damping conductance" is still applied, it may effectively create negative damping, causing the Nyquist trajectory to approach or bypass it. 1. This leads to instability. Therefore, this invention introduces a frequency-limited design in the non-fundamental damped channel.

[0127] In one implementation example, step two involves SOGI frequency division based solely on capacitor voltage measurements. Advanced three-phase extension and Transformation: In a three-phase system, this practical example preferably uses a capacitive three-phase voltage sensor. u ca , u cb , u cc As the source of the frequency division signal. Obtained through Clarke transform. For use by subsequent SOGI modules, for single-phase equivalence, can be u c Understand as Shaft voltage.

[0128] Then, fundamental decomposition is performed using SOGI: In this embodiment, a second-order generalized integrator is used for... Or single-phase AC side capacitor voltage u c Processing outputs: fundamental in-phase component fundamental orthogonal components Non-fundamental residual .

[0129] (13)

[0130] The SOGI core consists of two integrators and a feedback loop, with the following time-domain equations:

[0131] (14)

[0132] In the formula, The fundamental angular frequency; is the damping coefficient, usually taken as 0.707.

[0133] Performing a Laplace transform on the time-domain equations with initial conditions of 0, the AC side capacitor voltage... u c , the fundamental in-phase component fundamental orthogonal components In the complex frequency domain, , , ,get:

[0134] (15)

[0135] After simplification, we obtain the transfer functions of the fundamental in-phase component and the fundamental quadrature component:

[0136] (16)

[0137] (17)

[0138] In summary, the fundamental in-phase component and the fundamental quadrature component are obtained:

[0139] (18)

[0140] (19)

[0141] The non-fundamental residual is the difference between the input signal and the in-phase component of the fundamental frequency, i.e.:

[0142] (20)

[0143] By using the frequency division described above, the signal can be divided into a "fundamental wave channel" and a "non-fundamental wave channel" using only capacitor voltage measurement, laying the foundation for subsequent frequency division admittance simulation.

[0144] In one implementation example, regarding the fundamental admittance simulation reactive power regulation, there is no PLL P / Q control here. Based on the fundamental component of the SOGI frequency division in step two, and using the single-phase equivalent circuit KCL and port impedance mapping in step one as a basis, a CSC injection current fundamental reference is constructed in the stationary coordinate system. This allows for the decoupling control of the specified fundamental complex admittance and active and reactive power without the need for a phase-locked loop. This overcomes the shortcomings of traditional methods and provides core reactive power regulation support for subsequent coordination with non-fundamental damping channels to complete port admittance shaping.

[0145] Therefore, step three constructs the fundamental admittance current reference based on the active and reactive power commands given by the outer loop. Specifically, in the fundamental channel, the fundamental reference of the CSC injection current is constructed through the in-phase and quadrature components of the fundamental wave to achieve the equivalent complex admittance. The goal.

[0146] Fundamental P / Q Objective: Assume the outer loop provides active / reactive power commands as follows: , Pure reactive power support The fundamental component extracted using SOGI is then utilized. , The fundamental reference for the CSC injection current required for reactive power regulation is as follows:

[0147] (twenty one)

[0148] In a three-phase implementation, the above formula can be found in... The plane is further mapped to a three-phase fundamental current reference.

[0149] Regarding the significance of equivalent admittance: As shown in the above relationship, the equivalent admittance of the fundamental channel at the fundamental frequency is... for:

[0150] (twenty two)

[0151] The equivalent conductance of the fundamental channel is... The equivalent susceptance of the fundamental channel, Used to calculate the equivalent admittance of the PCC port.

[0152] The core function of fundamental frequency equivalent is to precisely achieve the set complex admittance characteristics in the fundamental frequency band by adjusting the fundamental conductance and susceptance parameters, thereby completing the decoupling control of active and reactive power. That is, by adjusting... , By achieving the specified complex admittance at the fundamental frequency, active / reactive power decoupling control is realized. Since SOGI already provides in-phase / quadrature components, this process does not require a PLL, and P / Q decoupling grid-connected control can be achieved in the stationary coordinate system, simplifying the synchronization process.

[0153] See appendix again Figure 3 As shown, different admittances are simulated in the fundamental frequency domain and the harmonic frequency domain to achieve decoupled control of power control and harmonic damping, so that the system can maintain stability when there is no active power output.

[0154] Regarding the non-fundamental virtual resistor damping channel and low-pass shaping: Based on the non-fundamental residual obtained by SOGI frequency division in step two, and combined with the capacitor node KCL in the single-phase equivalent circuit established in step one, the effective operating frequency band of the virtual resistor is limited to below the critical frequency through low-pass shaping. This not only responds to the constraint requirements of the grid-connected stability criterion of the PCC point, but also makes up for the deficiency of the fundamental admittance simulation in step three, which only focuses on reactive power regulation and lacks damping, thus forming a frequency division admittance control architecture that works in conjunction with the fundamental channel.

[0155] To address the issue of insufficient damping in CSC when not outputting active power, step four of this embodiment's sub-technical solution introduces virtual resistance (conductance) control in the non-fundamental channel. This control is achieved by adjusting the non-fundamental residual voltage. u ch Applying a positive real conductivity absorbs the distortion energy and suppresses resonance.

[0156] Regarding the ideal non-fundamental damped admittance: if digital delay is ignored, the ideal form of the non-fundamental virtual resistance is...

[0157] (twenty three)

[0158] symbol" This means that the admittance corresponds to the actual energy consumption and provides damping; G v Non-fundamental virtual conductance; This is a non-fundamental virtual resistance; u ch This is the non-fundamental residual voltage; i wh Inject a non-fundamental current reference into the CSC.

[0159] Regarding the risk of high-frequency negative damping caused by digital delay: Considering the aforementioned digital delay, the phase of the virtual resistor at high frequencies will be close to... This is equivalent to negative damping. To avoid high-frequency excitation under unknown network impedance and resonant frequency, the sub-solution in this embodiment does not use a "full-band virtual resistor". Instead, it is shaped by a low-pass filter to provide damping only in the low-frequency and possible resonant regions, and automatically shuts off the damping channel in the high-frequency danger region.

[0160] Regarding the non-fundamental damped admittance after low-pass shaping: In this embodiment, the sub-technical solution first passes the non-fundamental residual voltage through a low-pass filter. :

[0161] (twenty four)

[0162] Regenerate damping current command

[0163] (25)

[0164] in The damping is approximately 1 in the low-frequency / resonant band and rapidly decays to near 0 in the band above the cutoff frequency. In the low-frequency and resonant bands, the virtual resistance effect is preserved, providing positive real admittance. In the high-frequency danger zone, the damping channel is "silenced" to prevent the virtual resistance from flipping to negative damping.

[0165] Regarding typical discrete implementation: the preferred sub-technical solution in this embodiment is implemented using a first-order discrete low-pass filter. :

[0166] (26)

[0167] in, a These are the filter weight coefficients. for , for , The cutoff angular frequency is the design frequency.

[0168] To match the critical frequency generated by the digital delay, the cutoff angular frequency is selected as follows:

[0169] (27)

[0170] The effective frequency band of the non-fundamental damped channel is strictly limited to a safe region below the critical frequency.

[0171] Regarding the implementation of CSC injection current reference synthesis and modulation: In order to integrate and realize the functional objectives of the previous steps, based on the fundamental current reference generated by the fundamental admittance simulation and the damped current reference generated by the non-fundamental damped channel, relying on the mapping relationship between the SOGI frequency division signal and the port impedance, and responding to the stability criterion and delay correction requirements, the final admittance simulation and reactive power regulation objectives are achieved through current superposition and modulation.

[0172] Step five specifically involves current reference superposition: In this embodiment, the sub-technical solution superimposes the current references generated by the fundamental admittance channel and the non-fundamental damping channel to form a total CSC injected current reference.

[0173] (28)

[0174] In a three-phase system, the corresponding three-phase injection current reference .

[0175] The final step, step six, involves internal current / modulation loop tracking: The CSC internally employs methods such as current control or carrier modulation / predictive control to track the actual injected current. track Approximate implementation under the condition of digital delay:

[0176] (29)

[0177] This allows for the simulation of the desired frequency division admittance at the capacitor node.

[0178] Regarding the grid connection stability analysis during the design phase, based on the corrected PCC port impedance during the design phase:

[0179] (30)

[0180] With a given or estimated grid impedance Calculate the minor-loop gain

[0181] (31)

[0182] And examine according to the Nyquist criterion The situation of one point surrounding the virtual conductance. Low-pass cutoff frequency and fundamental waveguide admittance The parameters are constrained and modified to ensure that the CSC still has sufficient steady-state and dynamic stability when it is in pure reactive power support.

[0183] See appendix Figure 4 As shown, according to the impedance ratio stability test, the system is stable when the Nyquist curve of the system impedance ratio does not encircle (-1,0), and unstable when it does. Furthermore, the greater the distance from the focal point of the real axis (-1,0), the more unstable the system becomes. The figure also shows that as the equivalent impedance on the grid side increases (the system short-circuit ratio decreases), the stability of traditional admittance analog control weakens. Figure 5 It shows that when the grid-side impedance is large, as the harmonic virtual admittance increases, the system tends to become stable from unstable, and the stability margin increases with the increase of virtual admittance.

[0184] Engineering implementation method: See appendix Figure 6 As shown, the control flow of this invention can be summarized as follows:

[0185] 1. Sampling capacitor voltage u c (or three-phase) );

[0186] 2. Based on step three, perform Clarke transform in the three-phase scenario to obtain... ;

[0187] 3. Extract the fundamental in-phase / quadrature components using SOGI (or SOGI-FLL). , (Equations 18, 19) and non-fundamental residuals (Equation 20);

[0188] 4. Based on externally provided... Constructing a basis waveguide admittance current reference (Equation 21);

[0189] 5. Regarding Low-pass shaping was performed to obtain (Equation 24) Generates a non-fundamental damped current reference. (Equation 25);

[0190] 6. The total injected current reference is obtained by superposition. (Equation 28);

[0191] 7. Implemented by a CSC modulation loop. .

[0192] The above process relies solely on capacitor voltage measurement and a digital controller, without the need for additional physical damping components or current sensors.

[0193] Figure 7 The waveforms of the improved admittance analog control of the current source converter are shown, from top to bottom: grid-side voltage, grid-side current, capacitor voltage, and DC-side current. It can be observed that after issuing a command to the system to absorb reactive power, the grid-side current leads the grid-side voltage by 90°, proving that the system operates in a pure reactive power condition with no resonance, and can stably regulate the reactive power on the grid side. From the DC bus current, it can be seen that although the active power in the system is close to zero, stable control of the bus current can still be achieved.

[0194] Figure 8 To improve the power characteristics of current source converters during admittance simulation control, its time axis is compared with... Figure 7 Correspondingly, it can be seen that the proposed method can achieve rapid and stable reactive power regulation under conditions of no active power output.

[0195] This embodiment proposes a CSC grid-connected control method based on admittance simulation, under the condition of only configuring AC capacitor voltage sensors and lacking AC current sensors. This method enables the CSC to exhibit adjustable passive admittance at the capacitor node, thereby realizing continuous adjustment of reactive power on the grid side.

[0196] In this embodiment, under the operating mode where the CSC outputs no active power or has extremely low active power, traditional admittance analog control is prone to instability due to the lack of loop damping. This invention needs to provide an analysis method that sequentially analyzes single-phase equivalent circuits, port admittance reshaping, PCC impedance mapping, and minor-loop gain to clarify the mechanism of damping deficiency and design a stable admittance trajectory based on this.

[0197] This embodiment of the sub-technical solution, taking into account the 1.5-step sampling delay caused by digital control, constructs a frequency-limited non-fundamental damping admittance to ensure that a real virtual resistance is provided below the critical frequency to suppress resonance, while automatically "closing" the damping channel in the high-frequency danger zone to prevent the virtual resistance from flipping into negative damping.

[0198] This embodiment proposes a complete control link that can be directly implemented digitally. First, the voltage of the AC-side filter capacitor is sampled and obtained as a voltage signal in the αβ coordinate system through Clarke transformation. This voltage signal is then input into a second-order generalized integrator (SOGI) to extract the fundamental in-phase component, fundamental quadrature component, and non-fundamental residual, completing the frequency division processing of the fundamental and non-fundamental components, providing a signal basis for subsequent admittance simulation. Based on the extracted fundamental component, combined with the active and reactive power commands given by the outer loop, a fundamental reference for the injected current of the current-source converter is directly constructed in the stationary coordinate system, achieving the specified fundamental complex admittance. This allows for decoupling control of active and reactive power without a phase-locked loop. For the non-fundamental residual voltage, it is first shaped by a first-order discrete low-pass filter, limiting the effective operating frequency band of the virtual resistor to below the critical frequency corresponding to the digital delay. Then, a positive real conductance is applied to the shaped signal to generate a damping current command, forming non-fundamental damped admittance to avoid the risk of high-frequency negative damping. Finally, the fundamental current reference and the damping current reference are superimposed to obtain the total injected current reference. Through current control or carrier modulation within the current source converter, the actual injected current tracks the total reference, realizing complete admittance simulation and reactive power regulation. The entire link logic is coherent and can be implemented through existing platform software upgrades.

[0199] Example 2

[0200] The purpose of this embodiment is to provide a computer device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to implement the steps of the above-described method.

[0201] Example 3

[0202] The purpose of this embodiment is to provide a computer-readable storage medium.

[0203] A computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, performs the steps of the above method.

[0204] Example 4

[0205] The purpose of this embodiment is to provide a reactive power regulation system that simulates the admittance of a current source converter, including:

[0206] The single-phase equivalent circuit construction module is configured to: establish a single-phase equivalent circuit for a current source converter grid-connected system, and collect capacitor voltage based on the single-phase equivalent circuit;

[0207] The capacitor voltage data processing module is configured to: process the acquired capacitor voltage. The transformed voltage is obtained by transformation, and an integrator is used to process the transformed voltage to obtain the fundamental in-phase component, the fundamental quadrature component, and the non-fundamental residual.

[0208] The fundamental admittance current reference construction module is configured to construct a fundamental admittance current reference based on the active and reactive power commands given by the outer loop.

[0209] The non-fundamental damped current reference construction module is configured to: perform low-pass shaping on the non-fundamental residual to obtain an intermediate output, and further process the intermediate output to obtain the non-fundamental damped current reference;

[0210] The injection current total reference module is configured to superimpose the fundamental admittance current reference and the non-fundamental damping current reference to form the injection current total reference of the current source converter.

[0211] The admittance simulation reactive power regulation module is configured such that the current source converter uses a current source converter loop to make the actual injected current track the total reference of the injected current of the current source converter, thereby realizing the expected frequency division admittance simulation at the capacitor node.

[0212] Example 5

[0213] The purpose of this embodiment is to provide a computer program product containing instructions that, when run on a computer, cause the computer to perform the methods and functions involved in any of the above embodiments.

[0214] The steps and methods involved in the apparatus of the above embodiments correspond to those in Embodiment 1. For specific implementation details, please refer to the relevant description section of Embodiment 1. The term "computer-readable storage medium" should be understood as a single medium or multiple media including one or more instruction sets; it should also be understood as including any medium capable of storing, encoding, or carrying an instruction set for execution by a processor and enabling the processor to perform any of the methods in this invention.

[0215] Those skilled in the art will understand that the modules or steps of the present invention described above can be implemented using general-purpose computer devices. Optionally, they can be implemented using computer-executable program code, thereby allowing them to be stored in a storage device for execution by a computer device, or they can be fabricated as separate integrated circuit modules, or multiple modules or steps can be fabricated as a single integrated circuit module. The present invention is not limited to any particular combination of hardware and software.

[0216] While the specific embodiments of the present invention have been described above in conjunction with the accompanying drawings, this is not intended to limit the scope of protection of the present invention. Those skilled in the art should understand that various modifications or variations that can be made by those skilled in the art without creative effort based on the technical solutions of the present invention are still within the scope of protection of the present invention.

Claims

1. A reactive power regulation method based on admittance simulation for current source converters, characterized by: include: Establish a single-phase equivalent circuit for a grid-connected system with a current source converter, and collect capacitor voltage based on the single-phase equivalent circuit; When establishing the single-phase equivalent circuit of the current source converter grid-connected system, the current source converter grid-connected system is simplified to a structure in which the PCC voltage source is connected to the parallel filter capacitor and the capacitor node of the current source converter injected current source through a series inductor and resistor. The single-phase equivalent circuit uses the capacitor voltage as the only AC feedback quantity. Kirchhoff's current law is used to establish the admittance relationship between the injected current of the current source converter and the capacitor voltage, so as to realize the clear mapping between the equivalent admittance of the capacitor node and the equivalent impedance of the PCC port. The port characteristics of the current source converter are simulated as controllable admittance connected in parallel with a capacitor, thereby achieving active and reactive power regulation. Perform on the collected capacitor voltage The transformed voltage is obtained by transformation, and an integrator is used to process the transformed voltage to obtain the fundamental in-phase component, the fundamental quadrature component, and the non-fundamental residual. The fundamental wave admittance current reference is constructed based on the active and reactive power commands given by the outer loop, specifically as follows: ； in, For the fundamental in-phase component, For fundamental orthogonal components, Provide active power instructions for the outer loop. The reactive power command given to the outer loop; The non-fundamental residual is low-pass shaped to obtain an intermediate output. The intermediate output is then further processed to obtain a non-fundamental damped current reference, specifically: ； in, G v Non-fundamental virtual conductance; u ch The non-fundamental residual voltage, It is a low-pass filter; The fundamental admittance current reference and the non-fundamental damped current reference are superimposed to form the total reference for the injected current of the current source converter. The current source converter uses a current source converter loop to make the actual injected current track the total reference of the injected current of the current source converter, thereby realizing the expected frequency division admittance simulation at the capacitor node.

2. The reactive power regulation method for current source converter admittance simulation as described in claim 1, characterized in that, The admittance relationship between the injected current control quantity and the AC side capacitor voltage of the current source converter is established using Kirchhoff's current law, specifically as follows: ； The grid-side current is then: ； in, i g For grid-side current, i w Inject current control signals into the current source converter. i c For capacitor current, C For filtering capacitors, u c This is the AC side capacitor voltage. This is the equivalent port admittance of the current source converter; The explicit mapping between the equivalent admittance of the capacitor node and the equivalent impedance of the PCC port is as follows: Based on the series branch voltage relationship and the grid-side current expression, the equivalent impedance of the PCC port is obtained as follows: ； in, u g PCC voltage, i g For grid-side current, C For filtering capacitors, This is the port equivalent admittance of the current source converter. R For series resistance, L It is a series inductor.

3. The reactive power regulation method for current source converter admittance simulation as described in claim 1, characterized in that, An integrator is used to process the transformed voltage to obtain the fundamental in-phase component, the fundamental quadrature component, and the non-fundamental residual, specifically: ； ； ； in, The fundamental angular frequency; is the damping coefficient.

4. A current source converter admittance-simulated reactive power regulation system, characterized in that, include: The single-phase equivalent circuit construction module is configured to: establish a single-phase equivalent circuit for a current source converter grid-connected system, and collect capacitor voltage based on the single-phase equivalent circuit; When establishing the single-phase equivalent circuit of the current source converter grid-connected system, the current source converter grid-connected system is simplified to a structure in which the PCC voltage source is connected to the parallel filter capacitor and the capacitor node of the current source converter injected current source through a series inductor and resistor. The single-phase equivalent circuit uses the capacitor voltage as the only AC feedback quantity. Kirchhoff's current law is used to establish the admittance relationship between the injected current of the current source converter and the capacitor voltage, so as to realize the clear mapping between the equivalent admittance of the capacitor node and the equivalent impedance of the PCC port. The port characteristics of the current source converter are simulated as controllable admittance connected in parallel with a capacitor, thereby achieving active and reactive power regulation. The capacitor voltage data processing module is configured to: process the acquired capacitor voltage. The transformed voltage is obtained by transformation, and an integrator is used to process the transformed voltage to obtain the fundamental in-phase component, the fundamental quadrature component, and the non-fundamental residual. The fundamental admittance current reference construction module is configured to construct a fundamental admittance current reference based on the active and reactive power commands given by the outer loop, specifically: ； in, For the fundamental in-phase component, For fundamental orthogonal components, Provide active power instructions for the outer loop. The reactive power command given to the outer loop; The non-fundamental damped current reference construction module is configured to: perform low-pass shaping on the non-fundamental residual to obtain an intermediate output, and further process the intermediate output to obtain the non-fundamental damped current reference, specifically: ； in, G v Non-fundamental virtual conductance; u ch The non-fundamental residual voltage, It is a low-pass filter; The injection current total reference module is configured to superimpose the fundamental admittance current reference and the non-fundamental damping current reference to form the injection current total reference of the current source converter. The admittance simulation reactive power regulation module is configured such that the current source converter uses a current source converter loop to make the actual injected current track the total reference of the injected current of the current source converter, thereby realizing the expected frequency division admittance simulation at the capacitor node.

5. A computer program product, comprising a computer program, characterized in that, When the computer program is executed by a processor, it implements the method of any one of claims 1 to 3.

6. A computer device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the program, it implements the steps of the method described in any one of claims 1-3.

7. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the program is executed by the processor, it performs the steps of the method described in any one of claims 1-3 above.

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