Down-sampling repetitive controller applied to three-phase four-leg inverter

Abstract

The invention provides a down-sampling repetitive controller applied to a three-phase four-leg inverter, and the controller comprises an ADC sampling unit which is used for sampling an output phase voltage and an inductive current of the three-phase four-leg inverter at a switching frequency F (S), and converting the output phase voltage and the inductive current into an alpha beta 0 reference system through Clark transformation; the repetitive control unit is used for subtracting the output phase voltage and the inductive current after the Clark transformation from a reference voltage and a reference current to obtain an error voltage signal and an error current signal, applying the error voltage signal and the error current signal to an RC (Resistance-Capacitance) circuit, and performing down-sampling according to a preset proportion; and performing state feedback control on the output of the RC circuit so as to generate a three-dimensional space vector modulation component to act on the three-phase four-leg inverter. The method has the advantages that (1) a closed-loop system pole is arranged by using a state feedback strategy to stabilize the system, so that LPF does not need to be introduced; and (2) designing an integer phase lead compensator.

Description

Technical Field

[0001] This invention belongs to the field of power electronics technology, specifically relating to a downsampling repetitive controller applied to a three-phase four-arm inverter. Background Technology

[0002] With the gradual development of electrification, the demand for advanced inverters and low-distortion voltage control algorithms is increasing, and the requirements are becoming more stringent. In microgrid applications, three-phase voltage source inverters (VSIs) help control and convert energy from renewable energy sources, enabling the supply of power to three-phase and single-phase, linear and nonlinear loads. These require a neutral line to ensure the flow of zero-sequence current. A three-phase three-arm topology using a neutral line connected to the midpoint of a capacitor has been proposed, but this strategy requires a larger bus capacitance and reduces bus voltage utilization. Therefore, a three-phase four-arm inverter has been proposed. The three-phase four-arm inverter avoids the use of an output transformer, thus reducing weight and cost. Furthermore, because zero-sequence current flows through the fourth arm, it has higher voltage utilization.

[0003] For standalone three-phase four-arm inverters, various voltage control strategies have been proposed both domestically and internationally. Some have proposed Model Predictive Control (MPC), others Sliding Membrane Predictive Control (SMC), and still others Deadbeat Control (DB). While MPC, SMC, and DB controllers generally achieve satisfactory transient and steady-state performance, each has specific drawbacks: MPC requires significant computation due to the 16 switching states of the 3P4L inverter; SMC requires advanced modifications to suppress chattering and reduce variable switching frequencies; and DB control is susceptible to variations in inverter parameters. Furthermore, some have designed proportional resonant (PR) controllers based on the inner membrane principle, while others have designed repetitive control (RC) controllers. However, PR controllers require multiple levels of high-precision coefficients to achieve low output voltage distortion (THD), significantly increasing computational complexity. RC-based strategies are widely used in single-phase and three-phase three-arm inverters because they can ideally introduce gain at the fundamental frequency and its harmonics to reduce output impedance.

[0004] However, traditional repetitive controllers (C-RC) introduce high gains at both even and odd harmonic frequencies, introducing N=f into the control system. s / f1 poles, where f sHere, f is the sampling frequency, and f1 is the fundamental frequency. This necessitates N storage locations in the digital implementation to store previous data, resulting in high storage space requirements. Some have proposed combining C-RC with a high-gain PR controller or with a DB controller; both of these approaches achieve fast tracking of the fundamental component and low steady-state THD. However, C-RC requires significant storage resources, and due to the inherently slow control action of RC, the phase voltage exhibits distortion over several cycles under aperiodic disturbances (such as load changes). Therefore, downsampling techniques have been introduced, where the number of poles added to the RC is m=f s / f m The ratio decreases, of which f m This indicates the RC sampling frequency.

[0005] The drawbacks of existing technologies include: the introduction of the controlled inverter introduces phase lag. To compensate for this phase lag, researchers have introduced phase lead compensators and employed more precise fractional compensators, but these require the use of infinite impulse response (IR) or finite impulse response (FIR) filters, which significantly increases design complexity. Furthermore, the phase lead 'd' cannot be precisely calculated, making the optimization path extremely complex. This necessitates the introduction of a low-order filter (LPF) in the RC circuit, but the forced introduction of an LPF attenuates high-frequency gain, causing the RC circuit to lose its ability to suppress high-frequency harmonics, severely impacting the THD performance of the output voltage. Summary of the Invention

[0006] Based on the established discrete-time model of the inverter, this invention proposes a novel downsampled repetitive controller, taking into account the delay and downsampling rate m introduced by the digital implementation.

[0007] The objective of this invention is achieved through the following technical solutions.

[0008] This invention provides a downsampling repetitive controller for a three-phase four-arm inverter, comprising: an ADC sampling unit for sampling the output phase voltage and inductor current of the three-phase four-arm inverter at a switching frequency F(S), and transforming them to the αβ0 reference frame through a Clarke transform; a repetitive control unit for subtracting the output phase voltage and inductor current from the reference voltage and reference current to obtain an error voltage signal and an error current signal, applying the error voltage signal and error current signal to an RC circuit, and downsampling them at a preset ratio; and performing state feedback control on the output of the RC circuit to generate a three-dimensional space vector modulation component to act on the three-phase four-arm inverter.

[0009] The advantages of this invention are: (1) The system is stabilized by arranging the poles of the closed-loop system using a state feedback strategy, thus eliminating the need to introduce an LPF. (2) The design of an integer phase lead compensator. Attached Figure Description

[0010] Various other advantages and benefits will become apparent to those skilled in the art upon reading the following detailed description of preferred embodiments. The accompanying drawings are for illustrative purposes only and are not intended to limit the invention. Furthermore, the same reference numerals denote the same parts throughout the drawings. In the drawings:

[0011] Appendix Figure 1 A topology diagram of a three-phase four-arm voltage source inverter according to an embodiment of the present invention is shown.

[0012] Appendix Figure 2 A multi-voltage vector modulation control structure diagram according to an embodiment of the present invention is shown.

[0013] Appendix Figure 3 An equivalent single-rate control system for sampling at the following sampling frequency according to an embodiment of the present invention is shown.

[0014] Appendix Figure 4 A state feedback control block diagram according to an embodiment of the present invention is shown.

[0015] Appendix Figure 5 A simulation result diagram of an unbalanced load according to an embodiment of the present invention is shown.

[0016] Appendix Figure 6 A nonlinear load topology diagram according to an embodiment of the present invention is shown.

[0017] Appendix Figure 7 A simulation result diagram of a nonlinear balanced load according to an embodiment of the present invention is shown. Detailed Implementation

[0018] Exemplary embodiments of the present disclosure will now be described in more detail with reference to the accompanying drawings. While exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure may be implemented in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.

[0019] Terminology Explanation:

[0020] A repetitive controller (RC) is an intelligent controller specifically designed to eliminate periodic errors. Based on the "internal model principle," it memorizes and learns the error that occurred in the previous cycle within a control cycle, and then precisely generates an opposite compensation signal in the next cycle to actively cancel it out. This process repeats continuously, eventually almost completely eliminating periodic disturbances and steady-state errors. It is particularly suitable for systems with extremely high tracking accuracy requirements, such as inverters, robot servos, and high-precision CNC machine tools.

[0021] Downsampling reduces the amount of data while preserving key information. It's like generating a sharp "thumbnail" from a high-resolution image. To achieve this, downsampling must follow the Nyquist sampling theorem. Before sampling rate conversion, an anti-aliasing filter is used to remove high-frequency signals, preventing aliasing distortion after data reduction. This technique is widely used to reduce computational load, accelerate processing, and perform multi-resolution analysis.

[0022] A first-order low-pass filter is a fundamental and important signal processing tool. Its core function is to preserve low-frequency components and filter out high-frequency noise from complex signals. Its filtering effect is determined by the cutoff frequency; the lower the frequency, the smoother the filtered signal, but this also introduces a certain time delay. Therefore, it is often used in scenarios such as sensor signal denoising, motor control smoothing, and system anti-interference, striking a balance between effectiveness and real-time performance.

[0023] An anti-aliasing filter is a low-pass filter that must be used before signal sampling (or downsampling). Its core function is to pre-filter out excessively high-frequency components (above the Nyquist frequency) in the signal, thus preventing these high-frequency signals from being incorrectly folded into the low-frequency range after sampling due to spectral aliasing, causing signal distortion and interference. It is a crucial prerequisite for ensuring the accuracy and reliability of subsequent digital signal processing results.

[0024] A. System Model

[0025] Figure 1 The diagram illustrates the topology of a three-phase four-arm voltage source inverter and its LC filter, where V dc V represents the DC bus voltage. AN V BN V CN Indicates phase voltage, i a i b i c i n i represents the current flowing through the inductor.oa i ob i oc i on This indicates the load current.

[0026] right Figure 1 Modeling the inverter:

[0027]

[0028] in, Represents the state vector. It is the voltage across the LC filter capacitor. It is the inductor current of the LC filter. This refers to the load current. Matrices A, B, and D are defined along the α, β, and 0 axes as follows:

[0029]

[0030]

[0031] B. Control Structure

[0032] The control block diagram of multi-voltage vector modulation is as follows: Figure 2 As shown. Figure 2 As shown, a downsampling repetitive controller applied to a three-phase four-arm inverter includes:

[0033] An ADC sampling unit is used to sample the output phase voltage V of the three-phase four-arm inverter at the switching frequency F(S). AN V BN V CN and inductor current i a i b i c And obtained by transforming to the αβ0 reference frame through the Clarke transform. , , and, , , ;

[0034] The repetitive control unit is used to compare the output phase voltage and inductor current after the Clarke transform with a reference voltage, respectively. and reference current The difference is calculated to obtain the error voltage signal and the error current signal. The error voltage signal and the error current signal are applied to the RC circuit and downsampled at a preset ratio m. The output of the RC circuit is subjected to state feedback control, thereby generating three-dimensional space vector modulation components uβ, uβ and u0, which are applied to the three-phase four-bridge inverter 3DSVM.

[0035] The output phase voltage and inductor current are sampled at the switching frequency F(S) and transformed to the αβ0 reference frame using the Clarke transform. The Clarke transform matrix is ​​shown below:

[0036]

[0037] The control strategy is identical for each axis, where error voltage and current signals are applied to an O-RC (an RC used only to compensate for odd harmonics) and downsampled at a scale of m. The output of the O-RC is applied to state feedback control, resulting in three-dimensional space vector modulation (3D-α) components: uβ, uβ, and u0. Therefore, the control system operates as a multi-rate control scheme, with the O-RC sampling at frequency fm, and the state feedback signal, measured voltage, and current signals sampled at a switching frequency fs. For each axis, Figure 3 A detailed block diagram is shown. Figure 3 In the process, the reference voltage value is subtracted from the sampled voltage value, and then downsampled by a ratio of m. After passing through an anti-aliasing filter Fa(Zm), it enters the repetitive controller. The transfer function of the repetitive controller for the system is G. RC (Zm). Fi(Zm) represents the anti-imaging filter. This is the outer voltage loop; the inner current loop is treated similarly. The output is applied to the state feedback control Gv(Zm) to obtain the final output voltage value.

[0038] This invention uses a combination of a voltage loop RC and a current loop RC. Since the derivation process is the same, therefore... Figure 3 The diagram only shows the voltage-sampling RC structure. Subsequent derivations will also use voltage as an example.

[0039] C. Stability Analysis

[0040] The stability of the inverter can be analyzed from the equivalent single-rate transfer function between the reference voltage and the tracking error. This is particularly relevant when the inverter is operating under no-load conditions and has a low sampling frequency. Figure 3 The following expression is derived (taking voltage as an example):

[0041]

[0042] Among them, F(z) is given in equation (9) m This includes anti-aliasing filter F. a (z m ) and anti-imaging filter F i (z m ), while G is given in equation (10) RC (z m This indicates a compensator Z with a phase lead compensator (PL). d mThe transfer function of O-RC, and G given in (11) V (Z m ) represents the transfer function of an object with state feedback control, which can be derived from... Figure 4 It is obtained from the block diagram shown. Figure 4 middle, Figure 4 This represents the transfer function of an object with state feedback control, after... Figure 3 G in RC The error signal after (Zm) is passed through the direct gain Kr. K1 is the feedback gain. The part after the adder is the mathematical model of our controlled object. After passing through the controlled object, the output is multiplied by the feedback gain K1, and subtracted from the output signal to obtain the input of the controlled object. The output of the controlled object is multiplied by the proportional coefficient Cv to obtain the result. Figure 4 The final output, i.e., the output voltage V (kTm), is calculated as follows:

[0043]

[0044]

[0045]

[0046] Expression (11) and Figure 4 The expressions for the direct gain Kr and feedback gain K1 in the equation are as follows:

[0047]

[0048]

[0049] in, Determined by the Ackermann method, the closed-loop poles p1, p2, and p3 are placed at the desired locations. Substituting (10) and (11) into (8), we obtain the following equation:

[0050]

[0051] This expression can be transformed into the product of three independent terms, which simplifies the stability analysis:

[0052]

[0053] in:

[0054]

[0055]

[0056]

[0057] Stability analysis is as follows:

[0058] A(z m Stable because Q < 1 and .

[0059] if Stable then B(z) m )Stablize.

[0060] C(z m The system can be represented as a closed-loop system with a unit transfer function. Analyzing it, we obtain that if the following equation is satisfied, then C(z) m )Stablize:

[0061]

[0062] in, This represents the Nyquist frequency of the downsampled RC circuit. This is obtained by rewriting (17). The rewriting process is as follows: According to the frequency domain design method, the denominator of equation (17) can be changed to the following equation:

[0063]

[0064] Based on this analysis, if If the system is stable and meets condition (18), then the system is stable. This ensures the stability of the closed-loop control before the addition of RC, which facilitates its design.

[0065] D. Control Design

[0066] The design method proposed in this invention takes p1 and p2 as dominant poles to meet the transient response requirements. Then, by solving equation (18), the following expression is obtained to obtain the position of p3 as a function of m that maximizes stability.

[0067]

[0068] The design process considers the value of m that results in an integer downsampling frequency. Then, based on the trade-off between downsampling and stability, m is selected using (20). Finally, the gain K of RC is... r It is determined by the minimum value that satisfies the following formula:

[0069]

[0070] This invention includes corresponding verification experiments, and a simulation model was built on the Matlab platform to verify the correctness of the theory. The loads used included an unbalanced linear load and a balanced nonlinear load. Phase a was unloaded, while phases b and c were rated resistive loads. The results are shown in the following figure. Figure 5As shown in the figure, the phase voltages remain basically balanced and sinusoidal, with an imbalance coefficient of 0.8% and an output voltage THD content of 0.28%.

[0071] The unbalanced nonlinear load topology is as follows: Figure 6 As shown. Figure 7 The figure shows the simulation results of a nonlinear balanced load.

[0072] The above description is merely a preferred embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the present invention should be included within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. A down-sampling repetitive controller applied to a three-phase four-leg inverter, characterized in that, The application relates to a downsampling repetitive controller applied to a three-phase four-leg inverter. An ADC sampling unit is used to sample output phase voltage and inductance current of the three-phase four-leg inverter at a switching frequency and transform to an alpha-beta-zero reference frame through a Clarke transformation; A repetitive control unit is used to subtract reference voltage and reference current from the Clarke-transformed output phase voltage and inductance current respectively to obtain error voltage signals and error current signals, apply the error voltage signals and error current signals to an RC circuit, and downsample at a preset ratio; State feedback control is performed on the output of the RC circuit to generate components of three-dimensional space vector modulation for acting on the three-phase four-leg inverter.

2. The downsampling repetitive controller applied to the three-phase four-leg inverter according to claim 1, wherein the RC circuit is sampled at a frequency fm, and the signals of the state feedback control, the error voltage signals and the error current signals are sampled at a switching frequency fs.

3. The downsampling repetitive controller applied to the three-phase four-leg inverter according to claim 1 or 2, wherein the stability of the three-phase four-leg inverter is analyzed based on an equivalent single-rate transfer function between reference voltage and tracking error.

4. The downsampling repetitive controller applied to the three-phase four-leg inverter according to claim 3, wherein the equivalent single-rate transfer function comprises an anti-aliasing filter, an anti-imaging filter and a phase lead compensator.

5. The downsampling repetitive controller applied to the three-phase four-leg inverter according to claim 3, wherein poles of the equivalent single-rate transfer function are arranged using a state feedback strategy.

6. The downsampling repetitive controller applied to the three-phase four-leg inverter according to claim 1, wherein the downsample at a preset ratio comprises the following steps: After the reference voltage value is subtracted from the sampled voltage value, the voltage value is downsampled at a preset ratio, then passes through an anti-aliasing filter, and then enters a repetitive controller, wherein the repetitive controller has a repetitive controller transfer function.

7. The downsampling repetitive controller applied to the three-phase four-leg inverter according to claim 6, wherein the state feedback control performed on the output of the RC circuit to generate components of three-dimensional space vector modulation for acting on the three-phase four-leg inverter comprises the following steps: After the error signal passing through the repetitive controller transfer function passes through a direct gain and then a controlled object, the output is multiplied by a feedback gain, then subtracted from an output signal to obtain an input of the controlled object, and the output of the controlled object is multiplied by a proportional coefficient to obtain an output voltage. ​ ​ ​ ​ ​ ​

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