Signal processing circuit and method of audio amplifier and electronic equipment

Abstract

The invention provides a signal processing circuit and method of an audio amplifier and electronic equipment, the circuit comprises an integrator, a detection unit, an oscillator and a comparator, the integrator is used for receiving an input signal of the audio amplifier and performing integral operation to obtain an integral signal; the detection unit is used for receiving and detecting an input signal of the audio amplifier to obtain a frequency adjustment signal; the oscillator is used for adjusting the PWM frequency according to the frequency adjustment signal to obtain an oscillation clock signal, and the comparator is used for comparing the integral signal with the oscillation clock signal to obtain an output signal of the audio amplifier. The PWM frequency is detected and dynamically adjusted according to the audio input signal, the power consumption of equipment can be reduced by reducing the PWM clock frequency under the condition that the signal amplitude change is small, and the total harmonic distortion is improved by improving the PWM clock frequency under the condition that the signal amplitude change is large. And meanwhile, the PWM frequency can be dynamically modulated along with the amplitude change of the input signal, so that the electromagnetic interference can be reduced.

Description

Technical Field

[0001] This disclosure relates to the field of audio signal technology, and more particularly to a signal processing circuit, method, and electronic device for an audio amplifier. Background Technology

[0002] With the widespread adoption of electronic devices with audio playback capabilities, such as smartphones, smart speakers, and smartwatches, users are increasingly demanding longer battery life, as well as higher standby time and high-quality audio. This has led to multiple challenges for electronic devices, including power consumption, audio playback quality, and electromagnetic interference (EMI).

[0003] The higher the modulation frequency of an audio device, the greater its power consumption. To reduce the static power consumption of an audio device, its modulation frequency needs to be lowered. However, when the amplitude of the audio input signal varies significantly, lowering the pulse width modulation (FPWM) frequency will cause a synchronous decrease in the loop bandwidth (GBW) of the audio amplifier. This will affect the total harmonic distortion of the signal, resulting in a decrease in audio playback quality. Furthermore, a fixed frequency can lead to electromagnetic interference. Therefore, existing technologies cannot simultaneously meet the requirements of low power consumption, high playback quality, and low electromagnetic interference. Summary of the Invention

[0004] In view of this, the present disclosure provides a signal processing circuit for an audio amplifier that can solve the problem of the inability to simultaneously achieve low power consumption and high sound quality in the prior art.

[0005] According to a first aspect of this disclosure, a signal processing circuit for an audio amplifier is provided, comprising: an integrator for receiving an input signal from the audio amplifier and performing integration to obtain an integrated signal; a detection unit for receiving the input signal from the audio amplifier and performing detection to obtain a frequency adjustment signal; an oscillator for connecting to the detection unit and adjusting the PWM frequency according to the frequency adjustment signal to obtain an oscillation clock signal; and a comparator for connecting the integrator and the oscillator, comparing the integrated signal and the oscillation clock signal to obtain an output signal from the audio amplifier.

[0006] According to a second aspect of this disclosure, a signal processing method for an audio amplifier is provided, comprising: receiving an input signal of the audio amplifier and performing an integration operation to obtain an integrated signal; detecting the input signal of the audio amplifier to obtain a frequency adjustment signal; adjusting the PWM frequency according to the frequency adjustment signal to obtain an oscillation clock signal; and comparing the integrated signal and the oscillation clock signal to obtain an output signal of the audio amplifier.

[0007] According to a third aspect of this disclosure, an electronic device is provided, including a signal processing circuit as described in the first aspect, for processing audio signals of the electronic device through the signal processing circuit.

[0008] The signal processing schemes for audio amplifiers provided in the embodiments of this disclosure detect the audio input signal to dynamically adjust the PWM frequency of the oscillator. The PWM frequency can be reduced when the chip is in static operation (signal amplitude is small) to obtain low power consumption, and the PWM frequency can be increased when the signal is in operation (signal amplitude is large). This reduces static power consumption while improving the total harmonic distortion (THD) performance of large signals and reducing electromagnetic interference. Attached Figure Description

[0009] To more clearly illustrate the technical solutions in the embodiments of this disclosure or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in the embodiments of this disclosure. For those skilled in the art, other drawings can be obtained based on these drawings.

[0010] Figures 1 to 7 This is a schematic diagram of the signal processing circuit of an audio amplifier according to different embodiments of the present disclosure.

[0011] Figure 8 This is a flowchart illustrating the signal processing method of an audio amplifier according to an exemplary embodiment of the present disclosure. Detailed Implementation

[0012] To enable those skilled in the art to better understand the technical solutions in the embodiments of the present invention, the technical solutions in the embodiments of the present invention will be clearly and thoroughly described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art should fall within the protection scope of the present invention.

[0013] Reference is made to the accompanying drawings, which form part of the detailed description and illustrate exemplary embodiments. Furthermore, it should be understood that other embodiments may be utilized, and structural and / or logical changes may be made without departing from the scope of the claimed subject matter. It should also be noted that orientations and references (e.g., up, down, top, bottom, etc.) may be used merely to facilitate the description of features in the drawings. Therefore, the following detailed description is not to be construed in a limiting sense, and the scope of the claimed subject matter is defined only by the appended claims and their equivalents.

[0014] Numerous details are set forth in the following description. However, it will be apparent to those skilled in the art that the embodiments described herein can be practiced without these specific details. In some instances, well-known methods and apparatus are shown in block diagram form rather than in detail to avoid obscuring the embodiments described herein. Throughout this specification, references to “embodiment,” “one embodiment,” or “some embodiments” mean that a particular feature, structure, function, or characteristic described in connection with that embodiment is included in at least one embodiment herein. Therefore, the phrases “in an embodiment,” “in one embodiment,” or “some embodiments” appearing throughout this specification do not necessarily refer to the same embodiment. Furthermore, in one or more embodiments, particular features, structures, functions, or characteristics can be combined in any suitable manner. For example, a first embodiment can be combined with a second embodiment in any way that does not mutually exclude particular features, structures, functions, or characteristics associated with two embodiments.

[0015] As used in the description and appended claims, the singular forms “a” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will also be understood that the term “and / or” as used herein refers to and includes any and all possible combinations of one or more of the associated listed items.

[0016] The terms “coupling” and “connection”, along with their derivatives, are used herein to describe functional or structural relationships between components. It should be understood that these terms are not intended to be synonyms for each other. Rather, in certain embodiments, “connection” can be used to indicate that two or more elements are in direct physical, optical, or electrical contact with each other. “Coupling” can be used to indicate that two or more elements are in direct or indirect physical or electrical contact with each other (with other intermediary elements between them), and / or that two or more elements cooperate or interact with each other (e.g., as in a causal relationship).

[0017] As described throughout this document and in the claims, a list of items connected by the terms “at least one of” or “one or more of” may mean any combination of the listed items. For example, the phrase “at least one of A, B, or C” may mean A; B; C; A and B; A and C; B and C; or A, B, and C.

[0018] The terms "circuit" or "module" can refer to one or more passive and / or active components arranged to cooperate with each other to provide a desired function. The term "signal" can refer to at least one current signal, voltage signal, or magnetic signal. The terms "substantially," "close to," "approximately," "near," and "about" generally refer to a value + / - of the target value. Within 10%.

[0019] For electronic devices with audio playback capabilities (such as smartphones, smart speakers, and smartwatches), there is a dual need to improve both battery life and audio quality. Currently, the main approach is to reduce power consumption by lowering the pulse width modulation (FPWM) frequency.

[0020] In the case of large signals, the relationship between the loop bandwidth (GBW) and the pulse width modulation frequency (FPWM) satisfies the following formula: GBW≥min(FPWM) / π As can be seen from the above formula, when the pulse width modulation frequency (FPWM) decreases, the loop bandwidth of the audio amplifier will decrease synchronously, and the total harmonic distortion performance will deteriorate, resulting in a decrease in audio playback quality. There is a technical problem that it is impossible to balance low power consumption and high sound quality.

[0021] In view of this, the embodiments of this disclosure provide an audio signal processing solution that can simultaneously meet the design requirements of low power consumption, high sound quality and low EMI, thereby improving the user experience of electronic devices.

[0022] The specific implementation of the embodiments of this disclosure will be described in detail below with reference to the accompanying drawings.

[0023] Signal processing circuit of audio amplifier Figure 1 This is a schematic diagram of the circuit structure of the signal processing circuit 100 of an audio amplifier, which is an exemplary embodiment of the present disclosure.

[0024] As shown in the figure, the signal processing circuit 100 of this embodiment includes an integrator 102, a detection unit 104, an oscillator 106, and a comparator 108.

[0025] The integrator 102 is used to receive the input signal from the audio amplifier and perform integration to obtain the integrated signal.

[0026] The detector 104 is used to receive the input signal of the audio amplifier (e.g., differential input signals INP and INN) and perform detection to obtain the frequency adjustment signal.

[0027] The oscillator (OSC) 106 is used to connect to the detection unit 104 and adjust the PWM (pulse width modulation) frequency according to the frequency adjustment signal output by the detection unit 104 to obtain the oscillation clock signal.

[0028] The comparator (COMP Driver) 108 is used to connect the integrator 102 and the oscillator 106, and compares the integrated signal of the integrator 102 with the oscillation clock signal of the oscillator 106 to obtain the output signal of the audio amplifier.

[0029] The signal processing circuit in this embodiment dynamically adjusts the clock frequency through the coordinated operation of integrator 102, detection unit 104, oscillator 106 and comparator 108. When the signal amplitude is small (no signal or small signal), the PWM clock frequency can be reduced to obtain a smaller quiescent current, thereby reducing device power consumption and improving device battery life. When the signal amplitude is large (large signal), the PWM clock frequency can be increased to improve total harmonic distortion (THD) performance and reduce electromagnetic interference.

[0030] Figure 2 This is a schematic diagram of the circuit structure of the signal processing circuit 200 of an audio amplifier, which is another exemplary embodiment of the present disclosure.

[0031] As shown in the figure, the signal processing circuit 200 of this embodiment includes an integrator 102, a first detector 1041, an oscillator 106, and a comparator 108.

[0032] Integrator 102 is used to receive the input signals of the audio amplifier (e.g., differential input signals INP and INN) and perform integration to obtain the integrated signal.

[0033] In some embodiments, the differential input signals INP and INN of the audio amplifier can be coupled to the integrator 102 via capacitors for signal integration processing to shape signal characteristics and prepare for subsequent signal comparison and signal modulation.

[0034] The first detector 1041 is used to detect and process the signal amplitude of the input signal of the audio amplifier to obtain a frequency adjustment signal.

[0035] The oscillator 106 is used to connect to the first detector 1041 and adjust the PWM frequency according to the frequency adjustment signal output by the first detector 1041 to obtain the oscillation clock signal.

[0036] Comparator 108 is used to connect integrator 102 and oscillator 106, and compares the integrated signal of integrator 102 with the oscillation clock signal of oscillator 106 to obtain the output signal of audio amplifier (e.g., differential output signals VOP, VON).

[0037] In this embodiment, the amplitude characteristics of the input signal of the audio amplifier are detected by the first detector 1041, and a frequency adjustment signal is generated. No additional signal processing is required, which simplifies the detection process, reduces circuit complexity, and enables rapid response to changes in the amplitude of the input signal to achieve real-time adjustment of the PWM frequency, ensuring the real-time performance of audio signal processing in low-complexity scenarios.

[0038] Figure 3 This is a schematic diagram of the circuit structure of the signal processing circuit 300 of an audio amplifier, which is another exemplary embodiment of this disclosure.

[0039] As shown in the figure, the signal processing circuit 300 of this embodiment includes an integrator 102, a buffer 1042, a second detector 1043, an oscillator 106, and a comparator 108.

[0040] The buffer 1042 is used to receive the input signals of the audio amplifier (e.g., differential input signals INP and INN) and amplify them to obtain the amplified signal.

[0041] Integrator 102 is used to connect to buffer 1042 and perform integration operation based on the amplified signal output by buffer 1042 to obtain the integrated signal.

[0042] The second detector 1043 is connected to the buffer 1042 and performs detection processing based on the signal amplitude of the amplified signal to obtain the frequency adjustment signal.

[0043] The oscillator 106 is used to connect to the second detector 1043 and adjust the PWM frequency according to the frequency adjustment signal output by the second detector 1043 to obtain the oscillation clock signal.

[0044] Comparator 108 connects integrator 102 and oscillator 106, and compares the integrated signal output by integrator 102 with the oscillation clock signal output by oscillator 106 to obtain the output signal of the audio amplifier (differential output signals VOP and VON). Since the input signal of the audio amplifier is amplified and optimized in buffer 1042, the accuracy of the frequency adjustment signal output by the second detector 1043 can be further improved, thus enhancing the audio signal processing effect.

[0045] The signal processing circuit in this embodiment amplifies the input signal through buffer 1042 to solve the problem of inaccurate amplitude detection of weak input signals. The second detector 1043 dynamically adjusts the output clock frequency of the oscillator 106 based on the amplitude change of the amplified signal to optimize the accuracy of PWM frequency adjustment and better balance the requirements of low power consumption and high sound quality.

[0046] Currently, many electronic devices adjust their power supply voltage based on the amplitude or current of the load signal. Specifically, when the electronic device is in a static state, the power supply voltage (PVDD) decreases accordingly to reduce power consumption; when an input signal is detected, the power supply voltage (PVDD) increases accordingly to obtain greater output power. Based on this principle, this embodiment provides a signal processing scheme that dynamically adjusts the PWM signal frequency by detecting the change in PVDD voltage, as detailed below: Figure 4This is a schematic diagram of the circuit structure of a signal processing circuit 400 for an audio amplifier according to another exemplary embodiment of the present disclosure. The signal processing circuit 400 of this embodiment includes an integrator 102, a buffer 1042, a boost unit 1044, a third detector 1045, an oscillator 106, and a comparator 108.

[0047] The buffer 1042 is used to receive the input signal of the audio amplifier (e.g., differential input signals INP and INN) and amplify it to obtain an amplified signal.

[0048] The boost unit 1044 is used to connect the buffer 1042 and the power supply (not shown) of the audio amplifier, and to boost the voltage (PVDD) of the power supply according to the amplified signal to obtain a boosted signal.

[0049] The third detector 1045 is connected to the boost unit 1044 and performs detection processing based on the signal amplitude of the boost signal to obtain the frequency adjustment signal.

[0050] The oscillator 106 is used to connect to the third detector 1045 and adjust the PWM frequency according to the frequency adjustment signal output by the third detector 1045 to obtain the oscillation clock signal.

[0051] Integrator 102 is used to connect to buffer 1042 and perform integration operation based on the amplified signal output by buffer 1042 to obtain the integrated signal.

[0052] Comparator 108 is used to connect integrator 102 and oscillator 106, and compares the integrated signal output by integrator 102 with the oscillation clock signal output by oscillator 106 to obtain the output signal of audio amplifier (e.g., differential output signals VOP, VON).

[0053] By means of the technical solution of this embodiment, the input signal is amplified by the buffer 1042 to improve the detection sensitivity, the boost unit 1044 performs corresponding boost processing on the power supply voltage (PVDD) based on the amplified signal, and the third detector 1045 dynamically adjusts the output clock frequency of the oscillator 106 based on the amplitude change of PVDD. This can achieve coordinated matching between the PWM frequency, the power supply voltage, and the input signal strength, which not only ensures the signal integrity at high power output, but also avoids distortion caused by insufficient power supply voltage, thereby improving the power adaptability and output quality of the audio amplifier.

[0054] Figure 5 This is a schematic diagram of the circuit structure of a signal processing circuit 500 for an audio amplifier according to another exemplary embodiment of the present disclosure. The signal processing circuit 500 of this embodiment includes an integrator 102, a buffer 1042, a boost unit 1044, a third detector 1045, a controller 1046, an oscillator 106, and a comparator 108.

[0055] The buffer 1042 is used to receive the input signal of the audio amplifier (e.g., differential input signals INP and INN) and amplify it to obtain an amplified signal.

[0056] The controller 1046 is used to connect to the buffer 1042 and obtain a control signal based on the input signal of the audio amplifier and the amplified signal of the buffer 1042.

[0057] The boost unit 1044 is used to connect the controller 1046 and the power supply (not shown) of the audio amplifier, and to boost the voltage (PVDD) of the power supply according to the control signal to obtain a boost signal.

[0058] The third detector 1045 is connected to the boost unit 1044 and performs detection processing based on the signal amplitude of the boost signal to obtain the frequency adjustment signal.

[0059] The oscillator 106 is used to connect to the third detector 1045 and adjust the PWM frequency according to the frequency adjustment signal output by the third detector 1045 to obtain the oscillation clock signal.

[0060] Integrator 102 is used to connect to buffer 1042 and perform integration operation based on the amplified signal output by buffer 1042 to obtain the integrated signal.

[0061] Comparator 108 is used to connect integrator 102 and oscillator 106, and compares the integrated signal output by integrator 102 with the oscillation clock signal output by oscillator 106 to obtain the output signal of audio amplifier (e.g., differential output signals VOP, VON).

[0062] The signal processing circuit in this embodiment generates a precise control signal by adding a controller 1046 to compare the input signal of the audio amplifier and the amplified signal of the buffer 1042, so as to realize closed-loop control of the boost process, avoid over- or under-boosting, and improve the accuracy of power supply voltage adjustment.

[0063] In some embodiments, the integrator 102 is further configured to acquire the output signal of the comparator 108 (e.g., differential output signals VOP and VON), and perform integration operations based on the output signal of the comparator 108 and the input signal of the audio amplifier to obtain an integrated signal (see reference). Figure 2 Alternatively, the integrated signal can be obtained by integrating the output signal of comparator 108 with the amplified signal of buffer 1042 (see reference). Figures 3 to 5 This design uses the output signal of comparator 108 to correct the accumulated error of integrator 102 during the integration process, thereby improving the accuracy of the integrated signal.

[0064] Figure 6This is a schematic diagram of the signal processing circuit 600 of an audio amplifier according to another exemplary embodiment of this disclosure. This embodiment is an integrated circuit. Figure 2 , Figure 3 and Figure 5 The circuit structure diagrams for the three signal detection schemes are shown below. The functions and connections of each component in this embodiment can be found in the following reference. Figure 2 , Figure 3 and Figure 5 The relevant descriptions in the embodiments will not be repeated in this embodiment.

[0065] Therefore, by integrating different signal detection schemes into the same circuit board, this embodiment allows for the selection of one scheme to detect signal amplitude according to actual application requirements, thereby dynamically adjusting the output clock frequency of the oscillator and flexibly meeting the usage needs of different application scenarios.

[0066] Figure 7 This is a schematic diagram of the circuit structure of the signal processing circuit 700 of an audio amplifier, which is another exemplary embodiment of this disclosure.

[0067] As shown in the figure, the signal processing circuit 700 of this embodiment includes an integrator 102, an analog-to-digital converter 1047, an oscillator 106, and a comparator 108.

[0068] The integrator 102 is used to receive the input signal from the audio amplifier and perform integration to obtain the integrated signal.

[0069] For example, the differential input signals INP and INN can be amplified by a buffer, and integration can be performed based on the amplified signal to further improve the accuracy of the integrated signal.

[0070] The analog-to-digital converter (ADC) 1047 is used to receive the input signal of the audio amplifier, divide the input signal into multiple input signal segments according to a given segmentation accuracy, detect the data bit stream of each input signal segment, obtain the adjustment frequency of each input signal segment, and obtain the frequency adjustment signal according to each adjustment frequency.

[0071] The oscillator 106 is connected to the analog-to-digital converter 1047 and adjusts the PWM frequency according to the frequency adjustment signal output by the analog-to-digital converter 1047 to obtain the oscillation clock signal.

[0072] Comparator 108 is used to connect integrator 102 and oscillator 106, and compares the integrated signal output by integrator 102 with the oscillation clock signal output by oscillator 106 to obtain the output signal of audio amplifier.

[0073] Therefore, the signal processing circuit of this embodiment uses the analog-to-digital converter unit 1047 to finely segment the input signal of the audio amplifier, which will not cause THD (total harmonic distortion) to deteriorate. It can perform stepless frequency modulation of the input signal, and at the same time, it can achieve lower static power consumption while making the clock frequency points of PWM more dispersed. It is not subject to the technical limitation of zero-crossing adjustment frequency, and can achieve better EMI performance.

[0074] Signal processing methods for audio amplifiers Figure 8 The signal processing method of the audio amplifier shown in the exemplary embodiment of this disclosure mainly includes: Step 802: Receive the input signal from the audio amplifier and perform integration to obtain the integrated signal.

[0075] For example, the input signals of the audio amplifier are differential input signals INP and INN, which can be coupled to the integrator 102 (reference) via capacitors. Figures 1 to 7 Signal integration is performed to shape signal characteristics, preparing for subsequent signal comparison and modulation.

[0076] Step 804: Based on the input signal of the audio amplifier, perform detection to obtain the frequency adjustment signal.

[0077] In some embodiments, the signal amplitude of the input signal of the audio amplifier is detected by one of the first detection method, the second detection method, the third detection method, and the fourth detection method to obtain the frequency adjustment signal.

[0078] The first detection method includes: detecting the signal amplitude of the input signal of the audio amplifier to obtain the frequency adjustment signal.

[0079] refer to Figure 2 The frequency adjustment signal can be obtained by detecting the signal amplitude of the input signal of the audio amplifier through the first detector 1041.

[0080] The second detection method includes: amplifying the input signal of the audio amplifier to obtain an amplified signal, detecting the signal amplitude of the amplified signal, and obtaining a frequency adjustment signal.

[0081] refer to Figure 3 The input signal of the audio amplifier can be amplified by the buffer 1042 to obtain an amplified signal, and then the amplitude of the amplified signal can be detected by the second detector 1043 to obtain a frequency adjustment signal.

[0082] The third detection method includes: amplifying the input signal of the audio amplifier to obtain an amplified signal; adjusting the voltage of the power supply according to the amplified signal to obtain a boost signal; and detecting the signal amplitude of the boost signal to obtain a frequency adjustment signal.

[0083] refer to Figure 4 The input signal of the audio amplifier can be amplified by the buffer 1042 to obtain an amplified signal. The boost unit 1044 adjusts the voltage of the power supply according to the amplified signal to obtain a boost signal. The frequency adjustment signal is obtained by detecting the amplitude of the boost signal through the third detector 1045.

[0084] refer to Figure 5 The controller 1046 obtains a control signal based on the input signal of the audio amplifier and the amplified signal output by the buffer 1042. Then, the boost unit 1044 adjusts the voltage (PVDD) of the power supply based on the control signal of the controller 1046 to obtain a boost signal, thereby realizing closed-loop control of the boost process, avoiding over- or under-boosting, and improving the accuracy of power supply voltage adjustment.

[0085] In some embodiments, a fourth detection method can be used to detect the frequency adjustment signal based on the input signal of the audio amplifier.

[0086] The fourth detection method includes: dividing the input signal of the audio amplifier into multiple input signal segments according to a given segmentation accuracy; detecting the data bitstream of each input signal segment to obtain the adjustment frequency of each input signal segment; and obtaining the frequency adjustment signal based on each adjustment frequency. This design enables stepless frequency modulation of the input signal, achieving lower static power consumption while allowing the PWM clock frequency points to be more dispersed, avoiding the technical limitations of zero-crossing adjustment frequency, and achieving better EMI performance.

[0087] refer to Figure 7 The analog-to-digital converter 1047 can divide the input signal of the audio amplifier into multiple input signal segments according to a given segmentation accuracy; detect the data bitstream of each input signal segment to obtain the adjustment frequency of each input signal segment; and obtain the frequency adjustment signal according to each adjustment frequency.

[0088] Step 806: Adjust the PWM frequency according to the frequency adjustment signal to obtain the oscillation clock signal.

[0089] This can be achieved through oscillator 106 (reference) Figures 1 to 7 The PWM frequency is adjusted according to the frequency adjustment signal to obtain the oscillation clock signal.

[0090] Step 808: Compare the integral signal and the oscillation clock signal to obtain the output signal of the audio amplifier.

[0091] Comparator 108 (reference) Figures 1 to 7 By comparing the integral signal and the oscillation clock signal, the output signal of the audio amplifier (differential output signals VOP and VON) is obtained.

[0092] In summary, the signal processing method of this embodiment performs detection based on the input signal of the audio amplifier to dynamically adjust the signal frequency, thereby achieving a comprehensive performance improvement of the audio amplifier in terms of low power consumption, high sound quality, and low EMI, and providing an optimized solution for portable audio devices.

[0093] In addition, by using a variety of differentiated detection methods to perform detection on the input signal of the audio amplifier, the processing requirements of input signals with different intensities are covered, thereby improving the versatility and scenario adaptability of the method and ensuring the detection accuracy of frequency adjustment signals under various signal scenarios.

[0094] electronic devices This disclosure also provides an electronic device including the signal processing circuit described in the above embodiments, for processing audio signals of the electronic device through the signal processing circuit.

[0095] Specific embodiments of the subject matter have now been described. Other embodiments are within the scope of the appended claims. In some cases, the actions described in the claims can be performed in a different order and still achieve the desired result. Furthermore, the processes depicted in the drawings do not necessarily require a specific or sequential order to achieve the desired result. In some embodiments, multitasking and parallel processing can be advantageous.

[0096] It should also be noted that improvements to a technology can be hardware improvements (e.g., improvements to the circuit structure of diodes, transistors, switches, etc.) or software improvements (improvements to the methodology), or even direct improvements to the hardware circuit structure. Therefore, it cannot be said that an improvement to a methodology cannot be implemented using hardware modules. For example, a Programmable Logic Device (PLD) (such as a Field Programmable Gate Array (FPGA)) is such an integrated circuit whose logic function is determined by the user programming the device. Designers can program and "integrate" a digital system onto a PLD themselves, without needing chip manufacturers to design and fabricate dedicated integrated circuit chips. Furthermore, nowadays, instead of manually manufacturing integrated circuit chips, this programming is mostly implemented using "logic compiler" software. Similar to the software compiler used in program development, the original code before compilation must also be written in a specific programming language, called a Hardware Description Language (HDL). There are many HDLs, such as ABEL (Advanced Boolean Expression Language), AHDL (Altera Hardware Description Language), Confluence, CUPL (Cornell University Programming Language), HDCal, JHDL (Java Hardware Description Language), Lava, Lola, MyHDL, PALASM, and RHDL (Ruby Hardware Description Language). Currently, the most commonly used are VHDL (Very-High-Speed ​​Integrated Circuit Hardware Description Language) and Verilog. Those skilled in the art should also understand that by simply performing some logic programming on the method flow using one of these hardware description languages ​​and programming it into an integrated circuit, the hardware circuit implementing the logical method flow can be easily obtained.

[0097] The controller can be implemented in any suitable manner. For example, it can take the form of a microprocessor or processor and a computer-readable medium storing computer-readable program code (e.g., software or firmware) executable by the (micro)processor, logic gates, switches, application-specific integrated circuits (ASICs), programmable logic controllers, and embedded microcontrollers. Examples of controllers include, but are not limited to, the following microcontrollers: ARC 625D, Atmel AT91SAM, Microchip PIC18F26K20, and Silicon Labs C8051F320. A memory controller can also be implemented as part of the control logic of the memory. Those skilled in the art will also recognize that, in addition to implementing the controller in purely computer-readable program code form, the same functionality can be achieved by logically programming the method steps to make the controller take the form of logic gates, switches, application-specific integrated circuits, programmable logic controllers, and embedded microcontrollers. Therefore, such a controller can be considered a hardware component, and the means included therein for implementing various functions can also be considered as structures within the hardware component. Alternatively, the means for implementing various functions can be considered as both software modules implementing the method and structures within the hardware component.

[0098] The systems, devices, modules, or units described in the above embodiments can be implemented by computer chips or entities, or by products with certain functions. A typical implementation device is a computer. Specifically, a computer can be, for example, a personal computer, laptop computer, cellular phone, camera phone, smartphone, personal digital assistant, media player, navigation device, email device, game console, tablet computer, wearable device, or any combination of these devices.

[0099] For ease of description, the above devices are described separately by function as various units. Of course, in implementing this application, the functions of each unit can be implemented in one or more software and / or hardware.

[0100] Those skilled in the art will understand that embodiments of this application can be provided as methods, systems, or computer program products. Therefore, this application can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, this application can take the form of a computer program product embodied on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0101] This application is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of this application. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart... Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0102] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0103] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0104] In a typical configuration, a computing device includes one or more processors (CPU), input / output interfaces, network interfaces, and memory.

[0105] Memory may include non-persistent storage in computer-readable media, such as random access memory (RAM) and / or non-volatile memory, such as read-only memory (ROM) or flash RAM. Memory is an example of computer-readable media.

[0106] Computer-readable media includes both permanent and non-permanent, removable and non-removable media that can store information using any method or technology. Information can be computer-readable instructions, data structures, modules of programs, or other data. Examples of computer storage media include, but are not limited to, phase-change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technologies, CD-ROM, digital versatile optical disc (DVD) or other optical storage, magnetic tape, magnetic magnetic disk storage or other magnetic storage devices, or any other non-transferable medium that can be used to store information accessible by a computing device. As defined herein, computer-readable media does not include transient computer-readable media, such as modulated data signals and carrier waves.

[0107] It should also be noted that the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article, or apparatus. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element.

[0108] Those skilled in the art will understand that embodiments of this application can be provided as methods, systems, or computer program products. Therefore, this application can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, this application can take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0109] This application can be described in the general context of computer-executable instructions that are executed by a computer, such as program modules. Generally, program modules include routines, programs, objects, components, data structures, etc., that perform specific transactions or implement specific abstract data types. This application can also be practiced in distributed computing environments where transactions are performed by remote processing devices connected via a communication network. In distributed computing environments, program modules can reside in local and remote computer storage media, including storage devices.

[0110] The various embodiments in this specification are described in a progressive manner. Similar or identical parts between embodiments can be referred to interchangeably. Each embodiment focuses on describing the differences from other embodiments. In particular, the system embodiments are basically similar to the method embodiments, so the description is relatively simple; relevant parts can be referred to the descriptions in the method embodiments.

[0111] The above are merely embodiments of this application and are not intended to limit the scope of this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the scope of the claims of this application.

Claims

1. A signal processing circuit of an audio amplifier, comprising: an integrator configured to receive an input signal of the audio amplifier and perform an integration operation to obtain an integrated signal; a detection unit configured to receive the input signal of the audio amplifier and perform a detection to obtain a frequency adjustment signal; an oscillator configured to be connected to the detection unit and adjust a PWM frequency according to the frequency adjustment signal to obtain an oscillation clock signal; a comparator configured to be connected to the integrator and the oscillator and compare the integrated signal and the oscillation clock signal to obtain an output signal of the audio amplifier.

2. The signal processing circuit of claim 1, wherein, The detection unit comprises: a first detector configured to perform a detection process according to a signal amplitude of the input signal of the audio amplifier to obtain the frequency adjustment signal.

3. The signal processing circuit of claim 1, wherein, The detection unit comprises: a buffer configured to receive the input signal of the audio amplifier and perform an amplification process to obtain an amplified signal; a second detector configured to be connected to the buffer and perform a detection process according to a signal amplitude of the amplified signal to obtain the frequency adjustment signal; The integrator is configured to be connected to the buffer and perform an integration operation according to the amplified signal to obtain the integrated signal.

4. The signal processing circuit of claim 1, wherein, The detection unit comprises: a buffer configured to receive the input signal of the audio amplifier and perform an amplification process to obtain an amplified signal; a boost unit configured to be connected to the buffer and a power supply of the audio amplifier and perform a boost adjustment on a voltage of the power supply according to the amplified signal to obtain a boosted signal; a third detector configured to be connected to the boost unit and perform a detection process according to a signal amplitude of the boosted signal to obtain the frequency adjustment signal; The integrator is configured to be connected to the buffer and perform an integration operation according to the amplified signal to obtain the integrated signal.

5. The signal processing circuit of claim 4, wherein, The detection unit comprises: a controller configured to be connected to the buffer and obtain a control signal according to the input signal of the audio amplifier and the amplified signal of the buffer; The boost unit is configured to be connected to the controller and perform a boost adjustment on the voltage of the power supply according to the control signal to obtain the boosted signal.

6. The signal processing circuit of claim 1, wherein: The integrator is further configured to receive an output signal of the comparator and perform an integration operation according to the output signal of the comparator and the input signal of the audio amplifier to obtain the integrated signal.

7. The signal processing circuit of claim 1, wherein, The detection unit comprises: an analog-to-digital conversion unit configured to receive the input signal of the audio amplifier, divide the input signal into a plurality of input signal segments according to a given division precision, detect a data code stream of each input signal segment, obtain an adjustment frequency of each input signal segment, and obtain the frequency adjustment signal according to each adjustment frequency.

8. A signal processing method of an audio amplifier, comprising: receiving an input signal of the audio amplifier and performing an integration operation to obtain an integrated signal; performing a detection according to the input signal of the audio amplifier to obtain a frequency adjustment signal; adjusting a PWM frequency according to the frequency adjustment signal to obtain an oscillation clock signal; The integral signal is compared with the oscillation clock signal to obtain an output signal of the audio amplifier.

9. The signal processing method of claim 8, wherein, The method comprises: detecting, by one of a first detection mode, a second detection mode, a third detection mode, and a fourth detection mode, an input signal of the audio amplifier to obtain a frequency adjustment signal; The first detection mode comprises detecting a signal amplitude of the input signal of the audio amplifier to obtain the frequency adjustment signal; The second detection mode comprises amplifying the input signal of the audio amplifier to obtain an amplified signal, and detecting a signal amplitude of the amplified signal to obtain the frequency adjustment signal; The third detection mode comprises amplifying the input signal of the audio amplifier to obtain an amplified signal, boosting a power supply voltage of the audio amplifier according to the amplified signal to obtain a boosted signal, and detecting a signal amplitude of the boosted signal to obtain the frequency adjustment signal; The fourth detection mode comprises dividing the input signal of the audio amplifier into a plurality of input signal segments according to a given division precision, detecting a data code stream of each input signal segment to obtain an adjustment frequency of each input signal segment, and obtaining the frequency adjustment signal according to each adjustment frequency.

10. An electronic device comprising the signal processing circuit according to any one of claims 1 to 7 to process an audio signal of the electronic device by the signal processing circuit.

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