Self-calibration low-frequency compensation circuit system for resistance-capacitance attenuator and dynamic calibration method

Abstract

The invention discloses a self-calibration low-frequency compensation circuit system for a resistance-capacitance attenuator and a dynamic calibration method. In order to solve the problem of frequency response distortion caused by parasitic parameters and component tolerance, through cooperative work of the stepping digital potentiometer and the resistance-capacitance attenuator, gain deviation of a transition section from low frequency to high frequency is accurately compensated, and gain fluctuation and waveform distortion are effectively inhibited. According to the invention, the amplitude-frequency flatness and phase consistency in the frequency band from DC to 1MHz are obviously improved, the environment adaptability to temperature, load and parasitic parameter drift is enhanced, and the method is suitable for a high-precision AC voltage and power measurement front end. In order to solve the problem that a traditional fixed compensation element is easily influenced by environment temperature drift and long-term operation aging and the like, the adjustability of the digital potentiometer is utilized, attenuation proportion drift generated by leakage current or environment change can be corrected in real time, and it is ensured that a circuit system can maintain extremely high measurement accuracy under different working conditions.

Description

Technical Field

[0001] This invention belongs to the field of circuit design technology, specifically relating to a self-calibrating low-frequency compensation circuit system and dynamic calibration method for resistor-capacitor attenuators. Background Technology

[0002] Resistor-capacitor (RC) attenuators are core components in AC voltage and power measurements. Their main function is to achieve precise attenuation of the input voltage through voltage division using a combination of resistors and capacitors. Under ideal conditions, a well-designed RC voltage divider network can meet the needs of various testing scenarios, from DC and power frequency to pulse voltage, thanks to its wide test frequency range, high amplitude flatness, and good stability. Its amplitude handling capability can reach up to several kilovolts, and its frequency coverage encompasses almost the entire frequency band of the test voltage.

[0003] However, existing RC attenuators still have the following problems that urgently need to be solved in practical applications (especially high-precision and wide-bandwidth measurements):

[0004] 1. Under high-frequency testing, parasitic capacitance and lead inductance in the circuit will disrupt the ideal resistance-capacitance ratio, causing the voltage division ratio to shift nonlinearly with increasing frequency (gain non-flatness), and introducing severe phase distortion, which directly affects the waveform fidelity of the measurement results.

[0005] 2. Due to the influence of component tolerances, leakage current, and thermal drift caused by long-term operation, traditional fixed compensation parameters are difficult to maintain a flat amplitude-frequency response across the entire frequency band. Existing technologies mostly rely on manual adjustment of the compensation capacitor, which not only limits the adjustment accuracy but also makes it difficult to adapt to parameter drift caused by environmental changes. Summary of the Invention

[0006] To address the shortcomings of the existing technology, this invention provides a self-calibrating low-frequency compensation circuit system and dynamic calibration method for resistor-capacitor attenuators, aiming to improve the gain flatness and phase distortion of the attenuator in a wide frequency range in real time.

[0007] To achieve the above objectives, a first aspect of the present invention provides a self-calibrating low-frequency compensation circuit system for a resistive-capacitive attenuator, comprising:

[0008] An external AC signal input module is used to provide the external input signal to be tested in normal operating mode.

[0009] A calibration signal excitation module is used to generate a calibration voltage excitation and apply the calibration voltage excitation to the RC attenuator during the calibration period.

[0010] A resistor-capacitor attenuator is used to proportionally attenuate the input signal.

[0011] A voltage comparator is used to compare the holding voltage output by the sample-and-hold circuit with a reference voltage and output the comparison result signal.

[0012] A digital potentiometer is used to perform step adjustment based on the comparison result signal and output a step compensation voltage.

[0013] A buffer is used to perform impedance transformation and follow the attenuated voltage signal output by a resistor-capacitor attenuator.

[0014] Switching networks are used to configure the calibration path and signal switching in the calibration process.

[0015] The timing control and drive module is used to generate mutually coordinated timing control signals within a calibration cycle to coordinate the operation of the calibration signal excitation module, the sample-and-hold circuit and the voltage comparator; and to control the switch network to establish the calibration excitation path (from the calibration signal excitation module to the RC attenuator) and the sampling path (from the RC attenuator to the sample-and-hold circuit) in calibration mode.

[0016] A second aspect of the present invention also provides a dynamic calibration method for a resistive-capacitive attenuator, employing the above-described calibration circuit, comprising the following steps:

[0017] Step 1: The timing control and drive module controls the switching network to switch the input of the RC attenuator to the calibration signal excitation module and the output to the sample-and-hold circuit;

[0018] Step 2: The calibration signal excitation module generates a periodic step test voltage signal and applies excitation to the RC attenuator;

[0019] Step 3: The timing control and drive module controls the sample-and-hold circuit to capture the transient edge response of the output of the RC attenuator and hold it as a stable measurement value;

[0020] Step 4: Send the measured holding voltage to the voltage comparator and compare it with the preset reference voltage;

[0021] Step 5: When the comparison result signal indicates that the holding voltage deviates from the preset reference voltage, the digital potentiometer responds to the step control signal generated by the timing control and drive module, outputs a compensation voltage, and changes the equivalent parameters of the RC attenuator compensation branch.

[0022] Step 6: Repeat steps 2 to 5 until the comparison result output by the voltage comparator shows that the deviation between the holding voltage and the preset reference voltage is within the allowable range, or the digital potentiometer reaches the adjustment limit, at which point the calibration process terminates.

[0023] Based on the above technical content, and addressing the problems existing in the background art, the present invention provides the following beneficial effects:

[0024] 1. Achieves high flatness of amplitude-frequency characteristics across the entire frequency band: Addressing frequency response distortion caused by parasitic parameters and component tolerances, this invention utilizes a step-type digital potentiometer and a resistor-capacitor attenuator to precisely compensate for gain deviations in the low-frequency to high-frequency transition range, effectively suppressing gain fluctuations and waveform distortion. This invention significantly improves amplitude-frequency flatness and phase consistency within the DC to 1MHz frequency band and enhances environmental adaptability to temperature, load, and parasitic parameter drift, making it suitable for high-precision AC voltage and power measurement front-ends.

[0025] 2. Solves the problems of temperature drift and parameter stability in traditional compensation methods: In view of the problems that traditional fixed compensation elements are susceptible to environmental temperature drift and long-term aging, this invention utilizes the adjustability of digital potentiometers to correct the attenuation ratio drift caused by leakage current or environmental changes in real time, ensuring that the circuit system can maintain extremely high measurement accuracy under different operating conditions. Attached Figure Description

[0026] Figure 1 This is a circuit diagram of a self-calibrating low-frequency compensation circuit system for a resistor-capacitor attenuator according to an embodiment of this application;

[0027] Figure 2 This is a basic structural diagram of the resistor-capacitor attenuator according to an embodiment of this application;

[0028] Figure 3 This is a transient edge acquisition diagram of the RC attenuator in an embodiment of this application;

[0029] Figure 4 This is a flowchart of a dynamic calibration method for a resistive-capacitive attenuator according to an embodiment of this application;

[0030] Figure 5 This is a diagram showing the relationship between the compensation voltage and the sampling voltage during the calibration process in an embodiment of this application.

[0031] Figure 6 This is the frequency response diagram of the RC attenuator before calibration in the embodiments of this application;

[0032] Figure 7 This is the frequency response diagram of the RC attenuator after calibration in the embodiment of this application. Detailed Implementation

[0033] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0034] like Figure 1As shown in the figure, an embodiment of this application provides a low-frequency compensation circuit system for a resistive-capacitive attenuator, comprising:

[0035] An external AC signal input module is used to provide external input to the test object in normal operating mode.

[0036] The calibration signal excitation module is used to generate a calibration voltage excitation and apply the calibration voltage excitation to the RC attenuator during the calibration period.

[0037] A resistor-capacitor (RC) attenuator is used to proportionally attenuate the input signal. It further includes: an attenuation network at the input and ground terminals for proportional attenuation of the input signal, and outputting the attenuated signal to a sample-and-hold circuit; and a low-frequency compensation branch for dynamically adjusting the equivalent parameters of the RC attenuator to improve frequency response flatness. Resistor R1 and capacitor C1 constitute the input impedance, while resistors R2 and R4, and capacitor C2 constitute the output impedance.

[0038] A switching network is used to configure signal switching in the calibration path and calibration process. It includes: a first switch for selecting whether to connect an external AC signal or the calibration signal excitation module to the RC attenuator; a second switch for switching the output signal of the RC attenuator to a buffer or a sample-and-hold circuit; and a third switch for selecting whether to connect a negative voltage. Alternatively, the output of the sample-and-hold circuit can be connected to the input of a voltage comparator; the fourth switch is used to implement the reset signal of the digital potentiometer, which is connected to the step voltage control terminal of the digital potentiometer. Switching between (the negative edge signal of the step voltage output by the driving digital potentiometer).

[0039] The sample-and-hold circuit is used to sample the transient edge response voltage output by the RC attenuator at a predetermined edge time and hold it as a stable measurement value. The measurement value is connected to the positive input terminal of the voltage comparator through a third switch.

[0040] A voltage comparator is used to compare the held voltage output by the sample-and-hold circuit with a reference voltage and output a comparison result signal. Its positive input is connected to the output of the sample-and-hold circuit, and its negative input is connected to the reference voltage. The output terminal is connected to the control gate of the MOSFET.

[0041] A digital potentiometer is used to implement step adjustment and output a step compensation voltage based on a negative edge trigger signal from a comparison result, thereby changing the equivalent parameters of the compensation branch. Its output terminal... Connected to the compensation branch, direction control port With power supply Connected, Connected to the reference ground, high-end Connected to the output of the RC attenuator, low end Connected to the reference ground of the RC attenuator, output It is connected with resistor R3 to form a compensation branch.

[0042] A buffer is used to attenuate the voltage signal output by the RC attenuator. Perform impedance transformation and follow-up.

[0043] The timing control and drive module is used to generate mutually coordinating timing control signals within a calibration cycle, coordinate the operation of the calibration signal excitation module, the sample-and-hold circuit and the voltage comparator, and generate the step control signal adapted to the digital potentiometer based on the comparison result signal; and control the switch network to establish the excitation path from the calibration signal excitation module to the RC attenuator and the sampling path from the RC attenuator to the sample-and-hold circuit in calibration mode.

[0044] Furthermore, when an external clock signal is input, the signals generated by the timing control and drive module after a delay include: CLK1, used to control the output of the calibration signal excitation; CLK2, used to control the timing of triggering sample-and-hold; and CLK3, used to control the connection of the third switch.

[0045] Furthermore, the timing control and driving module operates in the following ways:

[0046] The first switch is switched to the external AC signal input module and the second switch is switched to the buffer, so that the external AC signal is connected to the RC attenuator. The output signal of the buffer is observed by an oscilloscope. The oscilloscope adopts the Bode plot mode to obtain the gain response and phase response of the RC attenuator in different frequency bands, thereby evaluating its gain flatness and phase linearity characteristics and completing the preliminary test.

[0047] After the initial test is completed, if there is a deviation in the gain flatness or phase linearity of the RC attenuator, the first switch is switched to the calibration signal excitation module and the second switch is switched to the sample-and-hold circuit to form a closed-loop calibration path, and the gain flatness and phase linearity of the RC attenuator are dynamically adjusted.

[0048] Furthermore, such as Figure 2 The diagram shown is a simplified representation of a low-frequency compensated RC attenuator provided in an embodiment of this application. To ensure the circuit is in a fully compensated state, the time constant at the input terminal must be equal to the time constant at the ground terminal. Therefore, an external digital potentiometer is used for flatness compensation, and the output terminal of the RC attenuator is connected to the high-impedance terminal of the digital potentiometer. Connect the low-impedance end of the digital potentiometer When connected to ground, the output voltage of the digital potentiometer is... (in (This refers to the number of resistor taps on a digital potentiometer), calculate the output of the digital potentiometer. and After being connected in series, equivalent resistance By changing the equivalent resistance To change the time constant.

[0049] Specifically, the flatness adjustment of the attenuation circuit is actually achieved by forming an adjustment circuit element to actively compensate the circuit, thereby adjusting the time constant of the attenuation circuit. The function of this adjustment circuit element is to change the equivalent resistance value based on the parameter-adjusted voltage input in the RC attenuator, thus completing the flatness compensation. Simultaneously, considering the need for a fixed potential to prevent jitter in applications, this embodiment calculates the adjusted equivalent resistance according to the superposition theorem and obtains the ratio of the digital potentiometer's input voltage to its output voltage. The specific calculation method is as follows:

[0050] Calculate equivalent resistance To match the time constant of the input terminal with the time constant of the ground terminal, we obtain: The final result is the ratio of the potentiometer's input voltage to its output voltage. .

[0051] Therefore, based on the ratio of the input voltage to the output voltage of the digital potentiometer... Output The equivalent resistance obtained as the compensation voltage input can match the time constant of the input terminal and the ground terminal, thereby completing the flatness compensation of the RC attenuator.

[0052] In the simulation of the RC attenuator implementation, the attenuation network at the input is set as an 1800kΩ resistor in parallel with a 20pF capacitor. The time constant at the input is then... Next, 160kΩ, 3kΩ, and 800Ω resistors are selected, and a compensation voltage is output through a digital potentiometer to drive the compensation branch, ensuring that its equivalent resistance value matches the time constant between the input and ground terminals. This achieves flatness compensation.

[0053] It is worth noting that, according to Fourier transform theory, a circuit system that produces a distortion-free step output from a step input has a transfer function that remains constant relative to the frequency of the input signal in the frequency domain. In other words, when the input time constant of the RC attenuator is equal to the ground time constant, a step input can produce a distortion-free step output.

[0054] Therefore, the calibration signal excitation module described in this embodiment includes a voltage reference chip, an operational amplifier, and a CMOS switch, used to generate a step test voltage. The voltage reference chip provides a stable reference voltage, the operational amplifier amplifies and shapes the signal, and the CMOS switch generates a step test voltage signal by rapidly switching the input signal.

[0055] Furthermore, the rise and fall times of the CMOS switch are controlled within 100ns, while having a low leakage current of less than 1nA to minimize signal distortion; the pulse width of the step test voltage signal should be greater than the time constant of the input terminal of the RC attenuator to ensure the purity of the step signal edge, thereby ensuring the high quality and test accuracy of the step signal.

[0056] Furthermore, the sample-and-hold circuit, composed of analog switches and capacitors, is used to capture the transient edge response of the output signal of the RC attenuator. When the calibration signal excitation module inputs a step test voltage signal to the RC attenuator, the fall time of the step voltage and the time constant of the RC attenuator are... Related. For example Figure 3 As shown, to accurately capture the response characteristics, a step test signal is triggered at the start of the cycle. The pulse duration of the step test signal must be greater than the RC time constant. In the simulation, the pulse duration is set to 50ms. Therefore, transient sampling of the RC attenuator is performed within 36us after the step signal is triggered, and the result is recorded as follows. The sampled holding voltage is fed into a voltage comparator and compared with a zero threshold (preferably a signal). When the comparison result is positive, the voltage comparator outputs a high level to drive the MOSFET to conduct, forming a negative edge signal applied to the step trigger input of the digital potentiometer. This causes the digital potentiometer to perform single-step adjustment and output a step compensation voltage, thereby changing the equivalent parameters of the RC attenuator compensation branch.

[0057] Therefore, the higher the counter resolution of the digital potentiometer, the higher the accuracy of the step output, enabling more precise gain adjustment and compensation. In this way, the digital potentiometer can accurately adjust the compensation voltage of the RC attenuator, optimizing its gain flatness and phase linearity within a specific frequency band.

[0058] Furthermore, the timing control and drive module is preferably LTC6994, with a delay range of 1µs to 33.6s. When an external clock signal is input, a step calibration signal is triggered during the delay CLK1. The LTC6994 derives the delay from the calibration trigger CLK1. (Within 36µs) as CLK2; then connect an LTC6994 in series to generate The delay is used by CLK3 to send the sampled holding voltage to the voltage comparator for comparison with the zero threshold (reference ground).

[0059] like Figure 4 As shown in the figure, this application embodiment also provides a dynamic calibration method for a resistive-capacitive attenuator, applied to the above-mentioned circuit system. This method utilizes a calibration signal excitation module to apply a step test voltage, acquires the transient response output of the resistive-capacitive attenuator, and sends the sampled holding voltage to a voltage comparator for comparison with a zero threshold. The voltage comparator outputs a high level to drive a MOSFET to conduct, forming a negative edge signal applied to the step trigger input of a digital potentiometer. This causes the digital potentiometer to perform single-step adjustment and output a step compensation voltage, thereby changing the equivalent parameters of the resistive-capacitive attenuator compensation branch and optimizing the gain flatness and phase linearity of the resistive-capacitive attenuator in the target frequency band. Specifically, it includes the following steps:

[0060] Step 1: The timing control and drive module controls the switch network. At the start of calibration, the first switch is switched to the calibration signal excitation module, and the second switch is switched to the input channel of the sample-and-hold circuit to establish the calibration excitation path and sampling path. Simultaneously, an external clock signal is connected to the timing control and drive module, triggering CLK1 to control the analog switch in the calibration signal excitation module to periodically generate a steep-edge step test voltage signal (test voltage set to 0V to 10V, pulse time must be greater than the RC time constant; in the simulation, it is set to 50ms). The step test voltage signal is input to the RC attenuator. At the start of the period, the attenuation time of the step test voltage signal input to the RC attenuator is related to the RC time constant.

[0061] Preferably, the step test voltage signal has a fast rise time and fall time to adapt to high-frequency applications and fully stimulate transient edge response.

[0062] Step 2: The timing control and drive module derives the CLK2 signal to control the sample-and-hold circuit to capture the transient edge response of the RC attenuator output and output the holding voltage.

[0063] Step 3: The CLK3 signal is derived from the timing control and drive module to switch the third switch, changing the default negative voltage to the holding voltage connected to the input of the voltage comparator. This holding voltage is compared with the zero threshold. When the comparison result is positive, the voltage comparator outputs a high level to drive the MOSFET to conduct. The high level then switches to a low level, generating a negative edge signal. This negative edge signal is applied to the step trigger input of the digital potentiometer, causing the digital potentiometer to perform single-step adjustment and output a step compensation voltage, thereby changing the equivalent parameters of the compensation branch. The first compensation cycle ends.

[0064] Step 4: Repeat steps 1-3, continuously reducing the sampling and holding voltage until it converges to zero, and continuously iterating the step output voltage of the digital potentiometer until the voltage comparator no longer generates a comparison output that causes the MOS transistor to conduct within a preset number of consecutive calibration cycles. The digital potentiometer no longer receives step trigger pulses, and the calibration process terminates, thereby achieving dynamic optimization of the gain flatness and phase linearity of the RC attenuator in the target frequency band.

[0065] Step 5: After calibration, switch the first switch to the external AC signal and the second switch to the input channel of the buffer. The AC flatness within the frequency band of the RC attenuator can then be observed using an oscilloscope.

[0066] like Figure 5 As shown in the figure, the green curve represents the step compensation voltage output by the digital potentiometer, and the red curve represents the sample-and-hold voltage generated by the sample-and-hold circuit. As can be seen from the figure, as the step compensation voltage output by the digital potentiometer continuously increases, the sample-and-hold voltage continuously decreases to zero, and the calibration is complete.

[0067] Will Figure 6 and Figure 7 For comparison, the purple curve in the figure represents the input signal, and the blue curve represents the output signal. It can be seen that before calibration, the output signal gain is significantly attenuated in the frequency domain; after calibration, the output signal gain is almost a straight line in the frequency domain, and the AC flatness of the RC attenuator is improved.

[0068] Specific examples have been used to illustrate the principles and implementation methods of this invention. The descriptions of the above embodiments are only for the purpose of helping to understand the method and core ideas of this invention. Furthermore, those skilled in the art will recognize that, based on the ideas of this invention, there will be changes in the specific implementation methods and application scope. Therefore, the content of this specification should not be construed as a limitation of this invention.

Claims

1. A self-calibrating low frequency compensation circuitry for a resistor-capacitor attenuator, characterized by, The application relates to a calibration method and device for a resistance-capacitance attenuator. The application comprises: an external AC signal input module for providing an external input signal to be measured in a normal working mode; a calibration signal excitation module for generating a calibration voltage excitation and applying the calibration voltage excitation to the resistance-capacitance attenuator in a calibration period; a resistance-capacitance attenuator for proportionally attenuating the input signal; a voltage comparator for comparing a holding voltage output by a sample-and-hold circuit with a reference voltage and outputting a comparison result signal; a digital potentiometer for step adjusting according to the comparison result signal and outputting a step compensation voltage; a buffer for impedance transformation and following of an attenuated voltage signal output by the resistance-capacitance attenuator; a switch network for configuring a calibration path and signal switching in a calibration process; 2. The circuitry of claim 1, wherein, a timing control and driving module for generating mutually coordinated timing control signals in a calibration period, coordinating actions of the calibration signal excitation module, the sample-and-hold circuit and the voltage comparator, and controlling the switch network to establish a calibration excitation path and a sampling path in the calibration mode. The resistance-capacitance attenuator comprises: an attenuating network with an input end and a grounding end for proportionally attenuating the input signal and outputting the attenuated signal to the sample-and-hold circuit; 3. The circuitry of claim 2, wherein, a compensation branch for dynamically adjusting equivalent parameters of the resistance-capacitance attenuator to improve frequency response flatness. The switch network comprises: a first switch for selecting to connect the external AC signal input module or the calibration signal excitation module to the resistance-capacitance attenuator; a second switch for switching the resistance-capacitance attenuator output signal to the buffer or the sample-and-hold circuit; a third switch for selecting to connect the negative voltage or the sample-and-hold circuit output to the input end of the voltage comparator; 4. The circuitry of claim 2, wherein, a fourth switch for switching between a reset signal of the digital potentiometer and a negative edge signal for driving the digital potentiometer to output a step voltage. The calibration signal excitation module comprises: a voltage reference chip for providing a stable reference voltage; an operational amplifier for signal amplification and shaping; 5. The circuitry of claim 4, wherein, a CMOS switch for generating a step test voltage signal by high-speed switching of the input signal.

6. The circuitry of claim 5, wherein, The rise time and fall time of the CMOS switch are controlled within 100 ns, and the CMOS switch has a low leakage current of less than 1 nA, so that signal distortion is minimized; and the pulse width of the step test voltage signal is greater than the time constant of the input end of the resistance-capacitance attenuator, so that the edge of the step signal is pure. The working mode of the digital potentiometer comprises:

7. A method of dynamic calibration of a resistor-capacitor attenuator employing the circuitry of any one of claims 1 to 6, characterized by, a comparison result signal output by the voltage comparator drives an electronic switch, and when the comparison result flips, the electronic switch is controlled to be turned on or turned off, thereby generating a required negative edge trigger signal or pulse signal as a step control signal to drive the digital potentiometer to act. The method comprises the following steps: Step 1: the timing control and driving module controls the switch network to switch the input end of the resistance-capacitance attenuator to the calibration signal excitation module and switch the output end to the sample-and-hold circuit; Step 2: the calibration signal excitation module generates a periodic step test voltage signal to excite the resistance-capacitance attenuator; Step 3: the timing control and driving module controls the sample-and-hold circuit to capture a transient edge response output by the resistance-capacitance attenuator and hold the transient edge response as a stable measurement value. Step 4: The measured holding voltage is input into a voltage comparator to compare with a preset reference voltage; Step 5: When the comparison result signal indicates that the holding voltage deviates from the preset reference voltage, the digital potentiometer outputs a compensation voltage to change the equivalent parameters of the compensation branch of the RC attenuator in response to a step control signal generated by a timing control and driving module; Step 6: Steps 2 to 5 are repeatedly executed until the comparison result output by the voltage comparator indicates that the deviation of the holding voltage from the preset reference voltage is within an allowable range, or the digital potentiometer reaches a regulation limit, and the calibration process is terminated.

8. The method of claim 7, wherein, In step 5, the digital potentiometer is configured to step out an action when receiving a negative edge of the step control signal.

9. The method of claim 8, wherein, The step direction of the digital potentiometer is determined by a direction control port: When the direction control port is set to high level, the slider moves upward, and the step output increases; when the direction control port is set to low level, the slider moves downward, and the step output decreases.

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