Method for improving high-speed flow ion implantation energy pollution
By employing a two-stage deceleration mode during ion implantation, the energy pollution problem caused by high-energy ion bombardment is solved, resulting in a more uniform and stable ion implantation effect and reducing the risk of leakage failure in semiconductor silicon wafers.
Patent Information
- Application Number
- CN202411273816.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-11
- Publication Date
- 2026-03-17
AI Technical Summary
In existing technologies, when ion implantation is performed in a single deceleration mode, high-energy ions do not decelerate, resulting in energy pollution and subsequently causing leakage failure of the semiconductor silicon wafer.
A two-stage deceleration mode is adopted. First, the high-energy ion beam is decelerated into a medium-energy ion beam. Then, after adjustment by a correction magnetic field, a second deceleration is performed to form a low-energy ion beam that bombards the semiconductor silicon wafer. This ensures the uniformity and stability of ion implantation and reduces energy pollution.
By employing a dual deceleration mode, energy pollution from the high-energy ion beam is reduced, the risk of leakage failure in the semiconductor silicon wafer is decreased, and the uniformity and stability of ion implantation are improved.
Smart Images
Figure CN121693018A_ABST
Abstract
Description
Technical Field
[0001] This disclosure relates to the field of semiconductor manufacturing, and more specifically, to a method for improving energy contamination during high-speed ion implantation. Background Technology
[0002] In the fabrication of semiconductor devices, to form a conductive structure in an insulating silicon wafer, it is usually necessary to dope different ions at appropriate locations in the silicon wafer to enable it to conduct electricity. This process is commonly known as ion implantation. As the fabrication process of semiconductor devices continues to shrink, the requirements for ion implantation become increasingly stringent, especially as the ion implantation depth becomes shallower, the implantation energy becomes lower, and the implanted ion dose becomes larger.
[0003] Existing ion implanters typically employ a single-deceleration mode for low-energy, high-dose ion implantation. This involves first accelerating the ion beam extracted from the ion source to achieve high energy, then passing it through a 90-degree deflection magnetic field to filter out positive ions that meet energy, mass, and charge requirements. The filtered ions are then passed through a calibration magnetic field to adjust the beam's shape, angle, and parallelism, before being decelerated to reduce the ion beam energy to the required level before bombarding the semiconductor silicon wafer. However, using this single-deceleration mode results in some high-energy ions not being decelerated and penetrating the gate into the channel, causing energy contamination and ultimately leading to leakage failure of the semiconductor silicon wafer. Summary of the Invention
[0004] The purpose of this disclosure is to provide a method for improving energy contamination during high-speed ion implantation, in order to solve the problem in the prior art where energy contamination is caused by high-energy ions bombarding semiconductor silicon wafers, leading to leakage failure of the semiconductor silicon wafers.
[0005] To achieve the above objectives, this disclosure provides a method for improving energy contamination during high-speed ion implantation, the method comprising: The high-energy ion beam is decelerated once to obtain a medium-energy ion beam; The medium-energy ion beam is decelerated twice after being corrected by a correction magnetic field, and the resulting low-energy ion beam is used to bombard the semiconductor silicon wafer to complete the ion implantation process. The energy E of the low-energy ion beam is 1.5~2.5keV, the energy difference V1 between the medium-energy ion beam and the low-energy ion beam is 1.5~4.5keV, and the energy difference V2 between the high-energy ion beam and the low-energy ion beam is 9.5~10.5keV. The semiconductor silicon wafer is manufactured using a process of 40nm or less.
[0006] Optionally, the energy E of the low-energy ion beam is 1.8~2.2 keV, the energy difference V1 between the medium-energy ion beam and the low-energy ion beam is 2.0~4.0 keV, and the energy difference V2 between the high-energy ion beam and the low-energy ion beam is 9.8~10.2 keV.
[0007] Optionally, the ratio of the difference V1 to the difference V2 is (2~3):1.
[0008] Optionally, the number of times the first deceleration occurs is one; the number of times the second deceleration occurs is one.
[0009] Optionally, the low-energy ion beam is implanted into the semiconductor silicon wafer to a depth of 100-800 angstroms.
[0010] Optionally, the implantation quantitation Q of the low-energy ion beam is (1~5)×10⁻⁶. 15 ion / cm -2 .
[0011] Optionally, the method further includes subjecting the ion source to extraction, acceleration, and deflection magnetic field screening to obtain the high-energy ion beam.
[0012] Optionally, the energy of the ion beam before and after the deflection magnetic field is the same; the energy of the ion beam before and after the correction magnetic field is the same.
[0013] Optionally, the ion source includes one or more of BF3 gas, AsH3 gas, and PH3 gas.
[0014] Optionally, the deflection magnetic field is a 90° deflection magnetic field, and the correction magnetic field is a 70° correction magnetic field.
[0015] The above technical solution involves a first deceleration of the high-energy ion beam before it passes through a correction magnetic field, reducing its speed to below a safe level to form a medium-energy ion beam. This beam then undergoes a second deceleration, reducing its energy to the level required for ion implantation. This approach achieves several advantages: firstly, the energy carried by the medium-energy ion beam ensures the uniformity of the overall beam current, resulting in a more uniform implantation effect and guaranteeing stability during the ion implantation process; secondly, even if some ions remain after the second deceleration, they still bombard the semiconductor silicon wafer with their medium-energy energy. Compared to direct bombardment of the semiconductor silicon wafer by high-energy ions, this results in a shallower implantation depth, reducing energy contamination and thus lowering the risk of leakage failure in the semiconductor silicon wafer.
[0016] Other features and advantages of this disclosure will be described in detail in the following detailed description section. Attached Figure Description
[0017] The accompanying drawings are provided to further illustrate the present disclosure and form part of the specification. They are used together with the following detailed description to explain the present disclosure, but do not constitute a limitation thereof. In the drawings: Figure 1 This is a flowchart of a method for improving energy contamination during high-speed ion implantation.
[0018] Figure 2 This is a schematic diagram of the change in electric field voltage during ion implantation, as disclosed in this invention. Detailed Implementation
[0019] The specific embodiments of this disclosure will be described in detail below with reference to the accompanying drawings. It should be understood that the specific embodiments described herein are for illustration and explanation only and are not intended to limit this disclosure.
[0020] The first aspect of this disclosure provides a method for improving energy contamination during high-speed ion implantation, the method comprising: The high-energy ion beam is decelerated once to obtain a medium-energy ion beam; The medium-energy ion beam is decelerated twice after being corrected by a correction magnetic field, and the resulting low-energy ion beam is used to bombard the semiconductor silicon wafer to complete the ion implantation process. The energy E of the low-energy ion beam is 1.5~2.5keV, the energy difference V1 between the medium-energy ion beam and the low-energy ion beam is 1.5~4.5keV, and the energy difference V2 between the high-energy ion beam and the low-energy ion beam is 9.5~10.5keV. The semiconductor silicon wafer is manufactured using a process of 40nm or less.
[0021] The above technical solution involves a first deceleration of the high-energy ion beam before it passes through a correction magnetic field, reducing its speed to below a safe level to form a medium-energy ion beam. This beam then undergoes a second deceleration, reducing its energy to the level required for ion implantation. This approach achieves several advantages: firstly, the energy carried by the medium-energy ion beam ensures the uniformity of the overall beam current, resulting in a more uniform implantation effect and guaranteeing stability during the ion implantation process; secondly, even if some ions remain after the second deceleration, they still bombard the semiconductor silicon wafer with their medium-energy energy. Compared to direct bombardment of the semiconductor silicon wafer by high-energy ions, this results in a shallower implantation depth, reducing energy contamination and thus lowering the risk of leakage failure in the semiconductor silicon wafer.
[0022] In one implementation, such as Figure 1 As shown, the ion implantation method disclosed herein includes: S1. The ion source is subjected to extraction, acceleration, and deflection magnetic field screening to obtain the high-energy ion beam; S2. The high-energy ion beam is decelerated once to obtain a medium-energy ion beam; S3. The medium-energy ion beam is calibrated by a calibration magnetic field to adjust the shape, angle and parallelism of the beam. S4. The medium-energy ion beam obtained in step S3 is decelerated twice to obtain a low-energy ion beam. S5. The low-energy ion beam bombards the semiconductor silicon wafer to complete ion implantation.
[0023] In this embodiment, the ion implantation method described above is used. After the ion source is accelerated by the extraction device and the accelerating voltage to form an ion beam, the ion beam required for ion implantation is screened by the deflection magnetic field. Then, the high-energy ion beam is decelerated into a medium-energy ion beam through a deceleration process. The medium-energy ion beam is then adjusted by the correction magnetic field to adjust the shape, angle, and parallelism of the beam. The adjusted medium-energy ion beam is then accelerated a second time to form a low-energy ion beam. At this point, the ion beam meets the implantation requirements in terms of energy, metering, shape, angle, and parallelism. The low-energy ion beam then bombards the semiconductor silicon wafer to achieve ion implantation.
[0024] In one embodiment, the device for forming the ion source includes any one of a filament ion source device, a radio frequency ion source device, and a microwave ion source device.
[0025] In one embodiment, the ion source includes a gas ion source, a solid ion source, and a liquid ion source, preferably a gas ion source.
[0026] In one embodiment, the gas ion source includes one or more of BF3 gas, AsH3 gas, and PH3 gas.
[0027] In one embodiment, the extraction and acceleration described in this disclosure employ conventional apparatus and methods in the art, and this application does not impose any special requirements. In this embodiment, the extraction apparatus uses a negatively biased extraction electrode, which can extract ions generated by the ion source from the ion source device and accelerate them to a higher energy, so that the generated ions can be selected by the deflection magnetic field to select the correct ions.
[0028] In one embodiment, the deflecting magnetic field described in this disclosure is a 90° deflecting magnetic field. In this embodiment, charged particles within a magnetic field will begin to rotate due to the magnetic field's influence, and the direction of the magnetic field is typically perpendicular to the direction of travel of the charged particles. For a fixed magnetic field strength and ion energy, the helical rotation radius depends only on the charge-to-mass ratio of the charged particles. For example, when the ion source is BF, the combination, decomposition, and ionization collisions will produce many ions. Since boron has two isotopes, respectively... 10 B (19.9%) and 11B (80.1%), therefore possessing several ionization states, further increasing the number of ion species. For P-type trap implantation processes, 11 B + The most common method is to adjust the magnetic field of the 90° deflection electric field to achieve... 11 B + The trajectory of the ion is deflected by 90° through the magnetic field, while the trajectories of other ions cannot reach 90° or are deflected by more than 90°, thus preventing them from passing through the magnetic field. This allows for the [further control / deflection]. 11 B + It was selected from multiple ions with different weights.
[0029] In one embodiment, the ion beams before and after the deflection magnetic field have the same energy. In this embodiment, only the desired ions are selected after passing through the deflection electric field; therefore, the implantation rate decreases, but the energy remains unchanged.
[0030] In one embodiment, the energy and metering of the high-energy ion beam obtained after passing through the deflection magnetic field described in this disclosure need to be flexibly adjusted according to actual production needs. For example, when performing ion implantation on semiconductor silicon wafers below 40nm, this disclosure accelerates the ion beam to 10~15keV, preferably 12keV.
[0031] In a preferred embodiment, the energy difference V2 between the high-energy ion beam and the low-energy ion beam is 9.8~10.2 keV.
[0032] In a further preferred embodiment, the energy difference V2 between the high-energy ion beam and the low-energy ion beam is 10 keV.
[0033] In one embodiment, the quantification Q of the high-energy ion beam is (1~5)×10⁻⁶. 15 ion / cm -2 .
[0034] In a preferred embodiment, the quantification Q of the high-energy ion beam is (2~3)×10⁻⁶. 15 ion / cm -2 .
[0035] In a further preferred embodiment, the quantification Q of the high-energy ion beam is 2.5 × 10⁻⁶. 15 ion / cm -2 .
[0036] In one embodiment, the apparatus and method used for primary deceleration described in this disclosure are conventional choices in the art, and this application does not make any special requirements. For example, the primary deceleration device used in this disclosure is a deceleration electrode. In this embodiment, primary deceleration can reduce the energy of the high-energy ion beam while maintaining the same metering. The extent of the energy reduction needs to be flexibly selected according to production needs.
[0037] In one embodiment, the energy of the medium-energy ion beam is 3~7 keV.
[0038] In a preferred embodiment, the energy of the medium-energy ion beam is 3.5~5keV.
[0039] In a further preferred embodiment, the energy of the medium-energy ion beam is 4 keV.
[0040] In a preferred embodiment, the energy difference V1 between the medium-energy ion beam and the low-energy ion beam is 2.0~4.0 keV.
[0041] In a further preferred embodiment, the energy difference V1 between the medium-energy ion beam and the low-energy ion beam is 2.0 keV.
[0042] In one embodiment, the correction magnetic field described in this disclosure is a 70° deflection magnetic field. In this embodiment, after passing through the correction magnetic field, the shape, angle, and parallelism of the medium-energy ion beam can be adjusted to the desired state. The specific adjustment method is conventionally chosen in the art, and this application does not make any special requirements.
[0043] In one embodiment, the apparatus and method used for secondary deceleration described in this disclosure are conventional choices in the art, and this application does not make any special requirements. For example, the secondary deceleration device used in this disclosure is a deceleration electrode. In this embodiment, secondary deceleration can reduce the energy of the medium-energy ion beam while maintaining the same metering. The extent of the energy reduction needs to be flexibly selected according to production needs.
[0044] In a preferred embodiment, the energy of the low-energy ion beam is 1.8~2.2 keV.
[0045] In a further preferred embodiment, the energy of the medium-energy ion beam is 2keV.
[0046] In one embodiment, the implantation metering Q of the low-energy ion beam is (1~5)×10⁻⁶. 15 ion / cm -2 .
[0047] In a preferred embodiment, the implantation metering Q of the low-energy ion beam is (2~3)×10⁻⁶. 15 ion / cm -2.
[0048] In a further preferred embodiment, the implantation metering Q of the low-energy ion beam is 2.5 × 10⁻⁶. 15 E15ion / cm -2 .
[0049] In one embodiment, the number of deceleration steps in both the primary and secondary deceleration processes described in this disclosure is one. In this embodiment, since the deceleration occurs only once during both the primary and secondary deceleration processes, the energy instability of the ion beam caused by multiple deceleration steps can be avoided.
[0050] In one embodiment, the low-energy ion beam implants the semiconductor silicon wafer to a depth of 100-800 angstroms, preferably 300-400 angstroms. In this embodiment, as the manufacturing process of semiconductor silicon wafers becomes increasingly smaller, the ion beam implantation depth also decreases. For example, a 40nm semiconductor silicon wafer is only 800 angstroms thick. If a 12keV ion beam is used for ion implantation, more than 300 ppm of ions will enter the channel, ultimately leading to leakage failure. Using a low-energy ion beam with appropriate energy and metric can prevent energy pollution during the ion implantation process, thus avoiding leakage failure. Limiting the depth of ion beam implantation into the semiconductor silicon wafer provides sufficient tolerance for errors in the ion implantation process, improving the yield of semiconductor silicon wafer fabrication.
[0051] In one embodiment, the ratio of the difference V1 to the difference V2 is (2~3):1. In this embodiment, the ratio of the difference V1 to the difference V2 is set by comprehensively considering the needs of primary deceleration and secondary deceleration.
[0052] In one implementation, such as Figure 2 As shown, in the entire ion implantation process disclosed herein, ions are accelerated only once and then decelerated twice to achieve ion implantation into the semiconductor silicon wafer. When the ion beam passes through a 90° deflection magnetic field, the energy of the ion beam is E+V2; before the ion beam reaches the 70° correction magnetic field, the ion beam is decelerated once, and the energy of the decelerated ion beam is E+V1; before the ion beam bombards the semiconductor silicon wafer, the ion beam is decelerated a second time, and the energy of the decelerated ion beam is E.
[0053] In this embodiment, compared with the single deceleration mode, the method of this disclosure has the following advantages: First, the energy carried by the medium-energy ion beam can meet the uniformity adjustment of the overall beam current, thereby achieving a relatively uniform implantation effect and ensuring stability during the ion implantation process. Second, even if some of the medium-energy ion beam does not have time to decelerate after the second deceleration, it still bombards the semiconductor silicon wafer with the energy of the medium-energy ion beam. Compared with the direct bombardment of the semiconductor silicon wafer by high-energy ions, the implantation depth is smaller, reducing energy pollution and thus reducing the risk of leakage failure of the semiconductor silicon wafer.
[0054] The preferred embodiments of this disclosure have been described in detail above with reference to the accompanying drawings. However, this disclosure is not limited to the specific details of the above embodiments. Within the scope of the technical concept of this disclosure, various simple modifications can be made to the technical solutions of this disclosure, and these simple modifications all fall within the protection scope of this disclosure.
[0055] It should also be noted that the various specific technical features described in the above embodiments can be combined in any suitable manner without contradiction. To avoid unnecessary repetition, this disclosure will not describe the various possible combinations separately.
[0056] Furthermore, various different embodiments of this disclosure can be combined in any way, as long as they do not violate the spirit of this disclosure, they should also be regarded as the content disclosed in this disclosure.
Claims
1. A method of improving energy contamination in high energy ion implantation, characterized by, The method comprises: making a high-energy ion beam undergo a first deceleration to obtain a medium-energy ion beam; making the medium-energy ion beam undergo a second deceleration after being corrected by a correction magnetic field, and making a low-energy ion beam obtained by the second deceleration bombard a semiconductor silicon wafer to complete an ion implantation process; an energy E of the low-energy ion beam is 1.5-2.5 keV, a difference V1 between the energy of the medium-energy ion beam and the energy of the low-energy ion beam is 1.5-4.5 keV, and a difference V2 between the energy of the high-energy ion beam and the energy of the low-energy ion beam is 9.5-10.5 keV; a process of the semiconductor silicon wafer is below 40 nm.
2. The method of claim 1, wherein, an energy E of the low-energy ion beam is 1.8-2.2 keV, a difference V1 between the energy of the medium-energy ion beam and the energy of the low-energy ion beam is 2.0-4.0 keV, and a difference V2 between the energy of the high-energy ion beam and the energy of the low-energy ion beam is 9.8-10.2 keV.
3. The method of claim 1, wherein, a ratio of the difference V1 to the difference V2 is (2-3):
1.
4. The method of claim 1, wherein, a number of the first deceleration is one, and a number of the second deceleration is one.
5. The method of claim 1, wherein, a depth of the low-energy ion beam implanted into the semiconductor silicon wafer is 100-800 angstrom meters.
6. The method of claim 1, wherein, The injection dose Q of the low-energy ion beam is (1-5) x 10 15 ion / cm -2 .
7. The method of claim 1, wherein, The method further comprises making an ion source undergo extraction, acceleration and deflection magnetic field screening to obtain the high-energy ion beam.
8. The method of claim 7, wherein, energies of ion beams before and after the deflection magnetic field are the same, and energies of ion beams before and after the correction magnetic field are the same.
9. The method of claim 7, wherein, the ion source comprises one or more of BF3 gas, AsH3 gas and PH3 gas.
10. The method of claim 7, wherein, the deflection magnetic field is a 90° deflection magnetic field, and the correction magnetic field is a 70° correction magnetic field.