LED epitaxial wafer, LED chip and preparation method of LED epitaxial wafer

Abstract

The invention provides an LED epitaxial wafer, an LED chip and a preparation method of the LED epitaxial wafer, and belongs to the technical field of light emitting diodes, the LED epitaxial wafer comprises a substrate and an epitaxial layer, the epitaxial layer comprises an n-type electronic layer, an n-type electronic barrier layer, an active layer, a p-type hole barrier layer, a p-type hole layer and a p-type window layer which are sequentially stacked, the p-type window layer comprises two tunnel junction structures and superlattice units which are clamped between the two tunnel junction structures and are periodically distributed in the stacking direction, each tunnel junction structure comprises a p-type doped InP sub-layer, an undoped InP sub-layer and an n-type doped InP sub-layer which are sequentially stacked, and each superlattice unit comprises an Al < x > Ga < 1-x > InP sub-layer and a GaInP sub-layer which are sequentially stacked. The tunnel junction structure and the superlattice structure formed by the superlattice units are introduced into the p-type window layer, so that the injection efficiency of current carriers can be improved, the resistance can be reduced, and the current expansion capability can be improved.

Description

Technical Field

[0001] This invention relates to the field of light-emitting diode technology, and in particular to an LED epitaxial wafer, an LED chip, and a method for preparing the LED epitaxial wafer. Background Technology

[0002] In recent years, AlGaInP quaternary high-brightness light-emitting diodes (LEDs) have been widely used. Compared with traditional GaP, GaAs and GaAlAs materials, this material has advantages such as a wide direct transition bandgap, high luminous efficiency, strong current carrying capacity, good stability and good temperature resistance. It plays an increasingly important role in signal lights, automotive interior and exterior indicator lights, traffic lights, mobile phones, electronic instruments, indoor and outdoor displays, information processing and communications.

[0003] The commonly used structure of AlGaInP quaternary high-brightness light-emitting diodes includes a substrate, a DBR Bragg mirror, an n-type electron layer, an n-type electron blocking layer, an active layer, a p-type hole blocking layer, a p-type electron layer, and a p-type window layer. The main component of the p-type window layer is GaP doped with Mg, which mainly serves as a current spreading layer.

[0004] However, when a light-emitting diode (LED) is operating, the current spreads laterally through the p-type window layer, injecting current into the active layer in the process. Since the current spreading capability of the p-type window layer, which is mainly composed of GaP, is limited, the current density is higher in the region near the p-type electrode and lower in the region farther from the p-type electrode. This results in a lower overall current injection efficiency, reducing the LED's light extraction efficiency. Furthermore, the p-type window layer, which is mainly composed of GaP, is typically quite thick, leading to greater absorption of emitted light and further reducing the LED's light extraction efficiency. Summary of the Invention

[0005] Based on this, the purpose of this invention is to provide an LED epitaxial wafer, an LED chip, and a method for fabricating an LED epitaxial wafer, with the aim of innovatively designing the p-type window layer to improve the current injection efficiency of the p-type window layer and reduce the light absorption of the p-type window layer, thereby improving the light extraction efficiency of the light-emitting diode.

[0006] To achieve the above objectives, the technical solution adopted by the present invention is as follows: In a first aspect, the present invention provides an LED epitaxial wafer, comprising a substrate and an epitaxial layer. The epitaxial layer is disposed on one side of the substrate. The epitaxial layer includes an n-type electron layer, an n-type electron blocking layer, an active layer, a p-type hole blocking layer, a p-type hole layer, and a p-type window layer stacked sequentially. The p-type window layer includes two tunnel junction structures and superlattice units periodically distributed along the stacking direction sandwiched between the two tunnel junction structures. The tunnel junction structures include p-type doped InP sublayers, undoped InP sublayers, and n-type doped InP sublayers stacked sequentially. The superlattice units include Al units stacked sequentially. x Ga 1-x InP sublayer and GaInP sublayer, where the value of x ranges from 0.5 to x < 1.

[0007] Furthermore, the Al x Ga 1-x Both the InP sublayer and the GaInP sublayer are doped with Mg or Zn.

[0008] Furthermore, the Al x Ga 1-x The concentration of the doping source in the InP sublayer and the GaInP sublayer is 5.0 × 10⁻⁶. 18 atoms / cm 3 ~1.0×10 20 atoms / cm 3 .

[0009] Furthermore, the thickness of the superlattice unit is 50nm~100nm.

[0010] Furthermore, the doping source for the p-type doped InP sublayer is Mg, and the doping source for the n-type doped InP sublayer is Si.

[0011] Furthermore, the concentration of the doping source in the p-type doped InP sublayer is 1.0 × 10⁻⁶. 19 atoms / cm 3 ~1.0×10 20 atoms / cm 3 The concentration of the doping source in the n-type doped InP sublayer is 1.0 × 10⁻⁶. 17 atoms / cm 3 ~1.0×10 19 atoms / cm 3 .

[0012] Furthermore, the thickness of the p-type doped InP sublayer is 10 nm to 50 nm, the thickness of the undoped InP sublayer is 10 nm to 50 nm, and the thickness of the n-type doped InP sublayer is 10 nm to 50 nm.

[0013] Furthermore, the number of periods of the superlattice unit is 2 to 10.

[0014] Secondly, the present invention also provides an LED chip, including the aforementioned LED epitaxial wafer and a connection electrode formed on the LED epitaxial wafer.

[0015] Thirdly, the present invention also provides a method for preparing an LED epitaxial wafer, comprising the following steps: Provide a substrate; An n-type electron layer is grown on the substrate; An n-type electron blocking layer is grown on the n-type electron layer; An active layer is grown on the n-type electron blocking layer; A p-type hole-blocking layer is grown on the active layer; A p-type hole layer is grown on the p-type hole blocking layer; A p-type window layer is grown on the p-type hole layer, wherein the p-type window layer includes two tunnel junction structures and superlattice units periodically distributed along the stacking direction sandwiched between the two tunnel junction structures. The tunnel junction structures include p-type doped InP sublayers, undoped InP sublayers, and n-type doped InP sublayers stacked sequentially. The superlattice units include Al... x Ga 1-x InP sublayer and GaInP sublayer, the value of x is in the range of 0.5 ≤ x < 1.

[0016] The beneficial effects of this invention include at least the following: by setting a tunnel junction structure, the tunneling effect of the tunnel junction structure is used to improve the carrier injection efficiency, allowing more carriers to pass through the p-type window layer and enter the device interior. Simultaneously, by setting a superlattice structure formed by superlattice units, the special band structure and carrier transport characteristics of the superlattice structure can further promote the expansion and distribution of carriers in the p-type window layer, thereby helping to reduce carrier accumulation in the p-type window layer and achieving the purpose of reducing resistance and improving current expansion capability. Compared to p-type window layers whose main component is GaP, which typically require a thicker thickness to ensure sufficient current expansion capability and photoelectric conversion efficiency, this application, by introducing a tunnel junction structure that can improve carrier injection efficiency and a superlattice structure formed by superlattice units that can optimize the carrier transport path and distribution state, can achieve the same performance with a thinner p-type window layer, achieving the goal of reducing the thickness of the p-type window layer, thereby reducing the device resistance and cost. Attached Figure Description

[0017] Figure 1 This is a schematic diagram of the structure of an LED epitaxial wafer in one embodiment of the present invention; Figure 2This is a schematic diagram of the structure of a p-type window layer in one embodiment of the present invention; Figure 3 This is a flowchart of a method for preparing an LED epitaxial wafer according to an embodiment of the present invention; Explanation of key component symbols: Substrate 100, buffer layer 110, DBR reflective layer 120, epitaxial layer 200, n-type electron layer 210, n-type electron blocking layer 220, active layer 230, p-type hole blocking layer 240, p-type hole layer 250, p-type window layer 260, p-type contact layer 270; Tunnel junction structure 261, p-type doped InP sublayer 2611, undoped InP sublayer 2612, n-type doped InP sublayer 2613; Superlattice unit 262, Al x Ga 1-x InP sublayer 2621, GaInP sublayer 2622; The following detailed description, in conjunction with the accompanying drawings, will further illustrate the present invention. Detailed Implementation

[0018] To facilitate understanding of the present invention, a more complete description will be given below with reference to the accompanying drawings. Several embodiments of the invention are illustrated in the drawings. However, the invention can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.

[0019] It should be noted that when a component is said to be "fixed to" another component, it can be directly on the other component or there may be an intervening component. When a component is said to be "connected to" another component, it can be directly connected to the other component or there may be an intervening component. The terms "vertical," "horizontal," "left," "right," and similar expressions used in this document are for illustrative purposes only.

[0020] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. The terminology used herein in the description of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.

[0021] AlGaInP materials are wide bandgap materials with direct transition properties, resulting in high recombination luminescence efficiency. Moreover, the bandgap width can be continuously adjusted with changes in the In composition, thereby enabling LEDs to achieve high brightness emission in an ultra-wide wavelength range of 560nm~650nm from red to blue-green light. In addition, it can also transition from the direct bandgap to the indirect bandgap, with an energy level range of 1.9eV~2.3eV.

[0022] Based on the background information, the p-type window layer of traditional AlGaInP-based light-emitting diodes (LEDs) is primarily composed of GaP doped with Mg. During LED operation, current spreads laterally through the p-type window layer, injecting current into the active layer. However, the limited current spreading capability of the GaP-dominant p-type window layer results in a higher current density near the p-type electrode and a lower current density further away, ultimately leading to a lower overall current injection efficiency and reduced LED light extraction efficiency. Furthermore, to provide better current distribution and reduce current accumulation, the GaP-dominant p-type window layer is typically relatively thick, resulting in greater absorption of emitted light and further reducing the LED's light extraction efficiency.

[0023] Based on this, this application provides an LED epitaxial wafer, an LED chip, and a method for fabricating the LED epitaxial wafer. By designing the p-type window layer as a tunnel junction structure with low resistance, high conductivity, and tunneling effect on both sides, and a structure of periodically distributed superlattice units in the middle, the photoelectric conversion efficiency and current expansion effect can be improved. At the same time, the thickness of the p-type window layer can be reduced to decrease the light absorption effect of the p-type window layer, thereby improving the light extraction efficiency of the light-emitting diode.

[0024] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0025] Firstly, please refer to Figure 1 and Figure 2This invention provides an LED epitaxial wafer, comprising a substrate 100 and an epitaxial layer 200. The epitaxial layer 200 is disposed on one side of the substrate 100. The epitaxial layer 200 includes an n-type electron layer 210, an n-type electron blocking layer 220, an active layer 230, a p-type hole blocking layer 240, a p-type hole layer 250, and a p-type window layer 260, which are stacked sequentially. The p-type window layer 260 includes two tunnel junction structures 261 and superlattice units 262 periodically distributed along the stacking direction sandwiched between the two tunnel junction structures 261. The tunnel junction structure 261 includes a p-type doped InP sublayer 2611, an undoped InP sublayer 2612, and an n-type doped InP sublayer 2613, which are stacked sequentially. The superlattice unit 262 includes Al, which are stacked sequentially. x Ga 1-x InP sublayer 2621 and GaInP sublayer 2622.

[0026] In this embodiment, during the growth of the superlattice unit 262, in order to maintain the continuity of the superlattice unit 262 and reduce interface defects, it is necessary to ensure that Al x Ga 1-x The lattice constants between the InP sublayer 2621 and the GaInP sublayer 2622 are matched or similar. Preferably, the range of x is set to 0.5≤x<1, so as to ensure that the lattice mismatch of the entire superlattice structure is minimized.

[0027] It should be noted that the substrate 100 can be any one or any combination of sapphire substrate, silicon substrate, silicon carbide substrate, gallium nitride substrate, gallium oxide substrate, and gallium arsenide substrate. Furthermore, since the AlGaInP lattice perfectly matches the lattice of the gallium arsenide substrate, high-quality LED epitaxial wafers can be fabricated on the gallium arsenide substrate; therefore, the substrate 100 is preferably a gallium arsenide substrate.

[0028] It should also be noted that the n-type electron layer 210 can be any one of Si-doped AlGaInP electron layers, Si-doped AlInP electron layers, or a combination of both. The n-type electron blocking layer 220 can be an undoped AlGaInP electron blocking layer, and the active layer 230 can be a multi-quantum-well structure, for example, an active layer in which GaInP semiconductor layers and AlGaInP semiconductor layers are alternately arranged, wherein the bandgap of the AlGaInP material can be changed by changing the In composition.

[0029] It should also be noted that the p-type hole blocking layer 240 is an undoped hole blocking layer. Optionally, the p-type hole blocking layer 240 can be an undoped AlGaInP hole blocking layer, and the p-type hole layer 250 can be a Mg-doped AlInP hole layer or a Zn-doped AlInP hole layer.

[0030] In this embodiment, the tunnel junction structure 261 improves carrier injection efficiency through the tunneling effect, allowing more carriers to pass through the p-type window layer 260 and enter the device interior. The superlattice structure formed by the superlattice unit 262, with its unique band structure and carrier transport characteristics, further promotes the expansion and distribution of carriers within the p-type window layer 260. This expansion and distribution helps reduce carrier accumulation in the p-type window layer 260, lowering resistance and thus improving current expansion capability. Meanwhile, in conventional structures, the p-type window layer, primarily composed of GaP, typically requires a relatively thick layer to ensure sufficient current expansion capability and photoelectric conversion efficiency. However, a thicker p-type window layer 260 increases device resistance and cost. This application, by introducing the tunnel junction structure 261, which improves carrier injection efficiency, and the superlattice structure formed by the superlattice unit 262, which optimizes carrier transport paths and distribution, achieves the same performance with a thinner p-type window layer 260, thereby reducing the thickness of the p-type window layer 260.

[0031] In some alternative embodiments, Al x Ga 1-x The doping sources for both InP sublayer 2621 and GaInP sublayer 2622 are Mg or Zn.

[0032] Due to Al x Ga 1-x As semiconductor materials, the doping concentration of InP and GaInP directly affects key physical parameters such as conductivity, band gap, and carrier mobility. To ensure that the materials possess suitable electrical and optical properties, and to optimize the doping of Al... x Ga 1-x The superlattice structure formed by InP and GaInP can achieve better optimization of carrier transport paths and distribution. In some optional embodiments, Al... x Ga 1-x The concentration of the doping source for InP sublayer 2621 and GaInP sublayer 2622 was controlled at 5.0 × 10⁻⁶. 18 atoms / cm 3 ~1.0×10 20 atoms / cm 3 Within the range.

[0033] In some alternative embodiments, the thickness of the superlattice unit 262 is 50 nm to 100 nm.

[0034] In some optional embodiments, the doping source for the p-type doped InP sublayer 2611 is Mg, and the doping source for the n-type doped InP sublayer 2613 is Si.

[0035] As part of a semiconductor device, the p-type doped InP sublayer 2611 and n-type doped InP sublayer 2613 need to possess sufficient conductivity to support carrier transport. This requires ensuring that the p-type doped InP sublayer 2611 has appropriate hole concentration and mobility, and that the n-type doped InP sublayer 2613 has sufficient electron concentration and mobility. Simultaneously, the p-type doped InP sublayer 2611 and n-type doped InP sublayer 2613 also need to be compatible with other material layers. During the formation of the epitaxial layer, it is necessary to ensure the interface quality and carrier transport efficiency between different material layers. Therefore, in some optional embodiments, the concentration of the dopant source for the p-type doped InP sublayer 2611 is controlled at 1.0 × 10⁻⁶. 19 atoms / cm 3 ~1.0×10 20 atoms / cm 3 Within the specified range, the concentration of the doping source in the n-type doped InP sublayer 2613 is controlled at 1.0 × 10⁻⁶. 17 atoms / cm 3 ~1.0×10 19 atoms / cm 3 Within the range.

[0036] In some optional embodiments, the thickness of the p-type doped InP sublayer 2611 is 10 nm to 50 nm, the thickness of the undoped InP sublayer 2612 is 10 nm to 50 nm, and the thickness of the n-type doped InP sublayer 2613 is 10 nm to 50 nm.

[0037] In some alternative embodiments, the number of periods of the superlattice unit 262 is 2 to 10.

[0038] Secondly, the present invention also provides an LED chip, including the aforementioned LED epitaxial wafer, and an n-type electrode and a p-type electrode formed on the LED epitaxial wafer.

[0039] For example, the structure of the LED chip is a front-mounted structure, including a GaAs substrate, an epitaxial layer 200 grown on the GaAs substrate, and an n-type electrode and a p-type electrode connected to the epitaxial layer 200.

[0040] Specifically, the epitaxial layer 200 includes an n-type electron layer 210, an n-type electron blocking layer 220, an active layer 230, a p-type hole blocking layer 240, a p-type hole layer 250, and a p-type window layer 260 stacked sequentially. The p-type window layer 260 includes two tunnel junction structures 261 and superlattice units 262 periodically distributed along the stacking direction sandwiched between the two tunnel junction structures 261. The tunnel junction structure 261 includes a p-type doped InP sublayer 2611, an undoped InP sublayer 2612, and an n-type doped InP sublayer 2613 stacked sequentially. The superlattice unit 262 includes Al... x Ga 1-x InP sublayer 2621 and GaInP sublayer 2622, where the value of x is in the range of 0.5 ≤ x < 1.

[0041] In some alternative embodiments, such as Figure 1 As shown, a buffer layer 110 is grown between the GaAs substrate and the n-type electron layer 210. The buffer layer 110 can be a Si-doped GaAs buffer layer, the purpose of which is to improve the lattice defects of the GaAs substrate to facilitate subsequent epitaxial deposition.

[0042] In some alternative embodiments, such as Figure 1 As shown, in order to prevent the light emitted by the active layer 230 from being absorbed by the GaAs substrate, a DBR reflective layer 120 is grown between the buffer layer 110 and the n-type electron layer 210. The DBR reflective layer 120 can be a Si-doped AlAs / AlGaAs reflective layer. By alternating the growth of AlAs and AlGaAs materials, the two materials with different refractive indices reflect the light, thereby effectively improving the brightness of the LED.

[0043] Thirdly, such as Figure 3 As shown, this embodiment of the invention also provides a method for preparing the aforementioned LED epitaxial wafer, specifically including steps S10 to S70: Step S10: Provide a substrate 100, which can be any one or any combination of sapphire substrate, silicon substrate, silicon carbide substrate, gallium nitride substrate, gallium oxide substrate, and gallium arsenide substrate. Since the AlGaInP lattice perfectly matches the lattice of the gallium arsenide substrate, high-quality LED epitaxial wafers can be fabricated on the gallium arsenide substrate. Furthermore, the gallium arsenide substrate fabrication process is mature, highly stable, and offers high cost-effectiveness. Therefore, the substrate 100 is preferably a gallium arsenide substrate.

[0044] Step S20: An n-type electron layer 210 is grown on the substrate 100. The n-type electron layer 210 mainly provides free electrons, which then radiatively recombine with holes in the p-type layer to emit light. Optionally, the n-type electron layer 210 can be any one of Si-doped AlGaInP electron layers or Si-doped AlInP electron layers, or a combination of both.

[0045] For example, the n-type electron layer 210 is a Si-doped AlInP electron layer. The specific deposition process using metal-organic chemical vapor deposition (MOCVD) is as follows: the temperature of the reaction chamber is controlled at 650℃~750℃, TMAl (trimethylaluminum) is used as the aluminum source, TMIn (trimethylindium) as the indium source, PH3 (phosphine) as the phosphorus source, and Si2H6 (disilane) as the dopant. The Si doping concentration is 1.0×10⁻⁶. 17 atoms / cm 3 ~6.0×10 19 atoms / cm 3 .

[0046] Step S30: An n-type electron blocking layer 220 is grown on the n-type electron layer 210. The n-type electron blocking layer 220 is mainly used to confine electrons within the active layer 230, thereby preventing electron leakage and improving carrier injection efficiency and device photoelectric conversion efficiency. The n-type electron blocking layer 220 is undoped. Optionally, the n-type electron blocking layer 220 can be an undoped AlGaInP electron blocking layer.

[0047] For example, the specific deposition process of the undoped AlGaInP electron blocking layer using metal-organic chemical vapor deposition (MOCVD) technology is as follows: the reaction chamber temperature is controlled at 650℃~750℃, TMAl (trimethylaluminum) is used as the aluminum source, TMGa (trimethylgallium) is used as the gallium source, TMIn (trimethylindium) is used as the indium source, and PH3 (phosphine) is used as the phosphorus source, and the growth thickness of the deposited undoped AlGaInP electron blocking layer is controlled at 20nm~200nm.

[0048] Step S40: An active layer 230 is grown on the n-type electron blocking layer 220. The active layer 230 allows electrons and holes to meet and undergo radiative recombination luminescence within a small space. Optionally, the active layer 230 can be an active layer with alternating GaInP / AlGaInP arrangements, wherein the bandgap of the AlGaInP material can be changed by altering the Al composition.

[0049] For example, the specific deposition process of the GaInP / AlGaInP alternating active layer using metal-organic chemical vapor deposition (MOCVD) technology is as follows: the reaction chamber temperature is controlled at 620℃~720℃, the reaction chamber pressure is controlled at 40mbar~60mbar, TMAl (trimethylaluminum) is used as the aluminum source, TMGa (trimethylgallium) is used as the gallium source, TMIn (trimethylindium) is used as the indium source, and PH3 (phosphine) is used as the phosphorus source. First, an AlGaInP barrier layer with a thickness of 30Å-80Å is grown. Then, the Al source is turned off, and a GaInP well layer with a thickness of 60Å-200Å is grown. Then, the preparation process of the AlGaInP barrier layer and the GaInP well layer is repeated to obtain 8 to 15 periodically stacked alternating GaInP / AlGaInP active layers.

[0050] Step S50: A p-type hole blocking layer 240 is grown on the active layer 230. The p-type hole blocking layer 240 is mainly used to restrict the diffusion of holes from the p-type region to the n-type region, while allowing electrons to pass through, thereby improving the carrier injection efficiency and the overall performance of the device. The p-type hole blocking layer 240 is an undoped hole blocking layer. Optionally, the p-type hole blocking layer 240 can be an undoped AlGaInP hole blocking layer.

[0051] For example, the specific deposition process of the undoped AlGaInP hole blocking layer using metal-organic chemical vapor deposition (MOCVD) technology is as follows: the reaction chamber temperature is controlled at 650℃~750℃, TMAl (trimethylaluminum) is used as the aluminum source, TMGa (trimethylgallium) is used as the gallium source, TMIn (trimethylindium) is used as the indium source, and PH3 (phosphine) is used as the phosphorus source. The thickness of the grown undoped AlGaInP hole blocking layer is controlled at 20nm~2000nm.

[0052] Step S60: A p-type hole layer 250 is grown on the p-type hole blocking layer 240. The p-type hole layer 250 mainly provides holes, thereby generating radiative recombination luminescence with free electrons in the n-type layer. Optionally, the p-type hole layer 250 can be a Mg-doped AlInP hole layer or a Zn-doped AlInP hole layer.

[0053] For example, the specific deposition process of the Mg-doped AlInP hole layer using metal-organic chemical vapor deposition (MOCVD) technology is as follows: the reaction chamber temperature is controlled at 650℃~750℃, TMAl (trimethylaluminum) is used as the aluminum source, TMIn (trimethylindium) as the indium source, PH3 (phosphine) as the phosphorus source, and CP2Mg (dipentadienemagnesium) as the dopant, with a Mg doping concentration of 1.0×10⁻⁶. 17 atoms / cm 3 ~1.0×1021 atoms / cm 3 The thickness of the grown Mg-doped AlInP hole layer was controlled between 100 nm and 550 nm.

[0054] Step S70: Grow a p-type window layer 260 on the p-type hole layer 250.

[0055] Specifically, such as Figure 2 As shown, the p-type window layer 260 includes two tunnel junction structures 261 and superlattice units 262 periodically distributed along the stacking direction sandwiched between the two tunnel junction structures 261. The tunnel junction structure 261 includes a p-type doped InP sublayer 2611, an undoped InP sublayer 2612, and an n-type doped InP sublayer 2613 stacked sequentially. The superlattice unit 262 includes Al units stacked sequentially. x Ga 1-x InP sublayer 2621 and GaInP sublayer 2622, where the value of x is in the range of 0.5 ≤ x < 1.

[0056] For example, the specific deposition process of the p-type window layer 260 using metal-organic chemical vapor deposition (MOCVD) technology is as follows: Step S71: Control the reaction chamber temperature at 650℃~800℃ and the reaction chamber pressure at 40mbar~60mbar. Use TMAl (trimethylaluminum) as the aluminum source, TMIn (trimethylindium) as the indium source, PH3 (phosphine) as the phosphorus source, and CP2Mg (dipentadienemagnesium) as the dopant. The Mg doping concentration is 1.0×10⁻⁶. 19 atoms / cm 3 ~1.0×10 20 atoms / cm 3 A p-type doped InP sublayer 2611 of a certain thickness was grown. Step S72: Stop the flow of CP2Mg (dipentadiene magnesium) and grow an undoped InP sublayer 2612 of a certain thickness; Step S73: Introduce Si₂H₆ (silyl ether) as a dopant, wherein the Si doping concentration is 1.0 × 10⁻⁶. 17 atoms / cm 3 ~1.0×10 19 atoms / cm 3 A certain thickness of n-type doped InP sublayer 2613 is grown. Step S74: Using TMAl (trimethylaluminum) as the aluminum source, PH3 (phosphine) as the phosphorus source, TMGa (trimethylgallium) as the gallium source, TMIn (trimethylindium) as the indium source, and CP2Mg (dipentadienemagnesium) as the dopant, the Mg doping concentration is 5.0 × 10⁻⁶. 18atoms / cm 3 ~1.0×10 20 atoms / cm 3 Growing Al to a certain thickness x Ga 1-x InP sublayer 2621; Step S75: Stop the flow of TMAl (trimethylaluminum) and grow a GaInP sublayer 2622 of a certain thickness; Step S76: Repeat steps S74 and S75 until 2 to 10 periodically stacked and alternately grown Al atoms with a total thickness of 50 nm to 100 nm are formed. x Ga 1-x InP sublayer 2621 and GaInP sublayer 2622; Step S77: Repeat steps S71 to S73 once.

[0057] In some optional embodiments, step S11 is further included between step S10 and step S20: Step S11: Grow a buffer layer 110 on the substrate 100. The purpose of the buffer layer 110 is to provide an intermediate layer between two different materials to improve the interface characteristics between them, reduce defects, and improve the stability and performance of the overall structure. Therefore, the buffer layer 110 needs to be determined according to the materials used in the substrate 100 and the n-type electron layer 210.

[0058] For example, substrate 100 is a GaAs substrate, n-type electron layer 210 is a Si-doped AlInP electron layer, and buffer layer 110 is a Si-doped GaAs buffer layer. The specific deposition process using metal-organic chemical vapor deposition (MOCVD) technology is as follows: the reaction chamber temperature is controlled at 650℃~750℃, TMGa (trimethylgallium) is used as the gallium source, AsH3 (arsenic trioxide) as the arsenic source, and Si2H6 (silyl ether) as the dopant, with a Si doping concentration of 2.0×10⁻⁶. 16 atoms / cm 3 ~7.0×10 20 atoms / cm 3 A Si-doped GaAs buffer layer of a certain thickness is grown.

[0059] In some optional embodiments, step S12 is further included between steps S11 and S20: Step S12: A DBR reflective layer 120 is grown on the buffer layer 110. The DBR reflective layer 120 uses two materials with different refractive indices to reflect light, preventing the light emitted by the active layer 230 from being absorbed by the GaAs substrate, thereby effectively improving the brightness of the LED. Optionally, the DBR reflective layer 120 can be a Si-doped AlAs / AlGaAs reflective layer.

[0060] Specifically, the Si-doped AlAs / AlGaAs reflective layer is deposited using metal-organic chemical vapor deposition. The specific deposition process of (MOCVD) technology is as follows: the reaction chamber temperature is controlled at 650℃~750℃, TMAl (trimethylaluminum) is used as the aluminum source, AsH3 (arsenic) is used as the arsenic source, and Si2H6 (disilane) is used as the dopant, with a Si doping concentration of 2.0×10⁻⁶. 16 atoms / cm 3 ~8.0×10 19 atoms / cm 3 A certain thickness of AlAs layer is grown; then, TMGa (trimethylgallium) is introduced as a gallium source to grow a certain thickness of AlGaAs layer; finally, the above steps of growing AlAs layer and AlGaAs layer are repeated until a DBR reflective layer 120 with periodic stacked alternating growth and a total thickness of 2.1 micrometers is grown.

[0061] In some optional embodiments, step S61 is further included between step S60 and step S70: Step S61: Grow a p-type transition layer on the p-type hole layer 250. The p-type transition layer is mainly used to improve the electronic structure and interface characteristics of the LED, thereby improving the LED performance. Optionally, the p-type transition layer can be a Mg-doped AlGaInP transition layer or a Zn-doped AlGaInP transition layer, and the composition gradually transitions from AlInP to GaInP.

[0062] For example, the specific deposition process of the Mg-doped AlGaInP transition layer using metal-organic chemical vapor deposition (MOCVD) technology is as follows: the reaction chamber temperature is controlled at 650℃~750℃, the rotation speed is controlled at 6~10 r / s, TMAl (trimethylaluminum) is used as the aluminum source, TMGa (trimethylgallium) as the gallium source, TMIn (trimethylindium) as the indium source, PH3 (phosphine) as the phosphorus source, and CP2Mg (dipentadienemagnesium) as the dopant, with a Mg doping concentration of 1.0×10⁻⁶. 17 atoms / cm 3 ~1.0×10 21 atoms / cm 3A p-type transition layer with a composition that gradually transitions from AlInP to GaInP was grown, and the thickness of the p-type transition layer was controlled between 10 nm and 80 nm.

[0063] In some optional embodiments, step S80 is further included after step S70: Step S80: A p-type contact layer 270 is grown on the p-type window layer 260. The p-type contact layer 270 is mainly used for ohmic contact to reduce contact resistance, thereby facilitating current conduction from the electrode input. Optionally, the p-type contact layer 270 can be a carbon-doped GaP contact layer.

[0064] For example, the specific deposition process of the carbon-doped GaP contact layer using metal-organic chemical vapor deposition (MOCVD) technology is as follows: the reaction chamber temperature is controlled at 650℃~680℃, TMGa (trimethylgallium) is used as the gallium source, PH3 (phosphine) is used as the phosphorus source, and the carbon doping concentration is 1.0×10⁻⁶. 18 atoms / cm 3 ~1.0×10 20 atoms / cm 3 The thickness of the p-type window layer 260 is controlled between 20nm and 100nm.

[0065] The present invention will be further described below with reference to specific embodiments: Example 1: This embodiment provides an LED epitaxial wafer, which includes a substrate 100 and an epitaxial layer 200. The epitaxial layer 200 is disposed on one side of the substrate 100. The epitaxial layer 200 includes a buffer layer 110, a DBR reflective layer 120, an n-type electron layer 210, an n-type electron blocking layer 220, an active layer 230, a p-type hole blocking layer 240, a p-type hole layer 250, a p-type window layer 260, and a p-type contact layer 270, which are stacked sequentially. The p-type window layer 260 includes two tunnel junction structures 261 and superlattice units 262 periodically distributed along the stacking direction sandwiched between the two tunnel junction structures 261. The tunnel junction structure 261 includes a p-type doped InP sublayer 2611, an undoped InP sublayer 2612, and an n-type doped InP sublayer 2613, which are stacked sequentially. The growth period of the superlattice unit 262 is 10. The superlattice unit 262 includes Al, which are stacked sequentially. x Ga 1-x For InP sublayer 2621 and GaInP sublayer 2622, the value of x ranges from 0.5 to x ≤ 0.9. The concentration of Mg, the dopant source for p-type doped InP sublayer 2611, is 1.0 × 10⁻⁶. 19 atoms / cm 3The thickness of the p-type doped InP sublayer 2611 is 40 nm, the thickness of the undoped InP sublayer 2612 is 40 nm, and the concentration of the Si dopant source for the n-type doped InP sublayer 2613 is 1.0 × 10⁻⁶. 17 atoms / cm 3 The thickness of the n-type doped InP sublayer 2613 is 35 nm, and the Al... x Ga 1-x The concentration of Mg, the dopant source in the InP sublayer 2621, is 5.0 × 10⁻⁶. 18 atoms / cm 3 Al x Ga 1-x The bandgap of the InP sublayer 2621 is 2.15 eV to 2.40 eV, and Al... x Ga 1-x The InP sublayer 2621 has a thickness of 80 nm, and the concentration of Mg, the dopant source for the GaInP sublayer 2622, is 5.0 × 10⁻⁶ nm. 18 atoms / cm 3 The bandgap of the GaInP sublayer 2622 is 1.90 eV to 2.20 eV, and the thickness of the GaInP sublayer 2622 is 85 nm.

[0066] Example 2: This embodiment provides an LED epitaxial wafer. Unlike the LED epitaxial wafer provided in Embodiment 1, in this embodiment, the concentration of the Si dopant source in the n-type doped InP sublayer 2613 is 1.0 × 10⁻⁶. 18 atoms / cm 3 Al x Ga 1-x The concentration of Mg, the dopant source in the InP sublayer 2621, is 7.0 × 10⁻⁶. 18 atoms / cm 3 The concentration of Mg, the dopant source for the GaInP sublayer 2622, is 7.0 × 10⁻⁶. 18 atoms / cm 3 .

[0067] Example 3: This embodiment provides an LED epitaxial wafer. Unlike the LED epitaxial wafer provided in Embodiment 1, in this embodiment, the concentration of the Mg dopant source in the p-type doped InP sublayer 2611 is 5.0 × 10⁻⁶. 19 atoms / cm 3 The concentration of Si, the dopant source in the n-type doped InP sublayer 2613, is 5.0 × 10⁻⁶. 18 atoms / cm 3 Al x Ga 1-xThe concentration of Mg, the dopant source in the InP sublayer 2621, is 1.0 × 10⁻⁶. 19 atoms / cm 3 The concentration of Mg, the dopant source for the GaInP sublayer 2622, is 1.0 × 10⁻⁶. 19 atoms / cm 3 .

[0068] Example 4: This embodiment provides an LED epitaxial wafer. Unlike the LED epitaxial wafer provided in Embodiment 1, in this embodiment, the concentration of the Mg dopant source in the p-type doped InP sublayer 2611 is 5.5 × 10⁻⁶. 19 atoms / cm 3 The concentration of Si, the dopant source in the n-type doped InP sublayer 2613, is 5.5 × 10⁻⁶. 18 atoms / cm 3 Al x Ga 1-x The concentration of Mg, the dopant source in the InP sublayer 2621, is 5.0 × 10⁻⁶. 19 atoms / cm 3 The concentration of Mg, the dopant source for the GaInP sublayer 2622, is 5.0 × 10⁻⁶. 19 atoms / cm 3 .

[0069] Example 5: This embodiment provides an LED epitaxial wafer. Unlike the LED epitaxial wafer provided in Embodiment 1, in this embodiment, the concentration of the Mg dopant source in the p-type doped InP sublayer 2611 is 1.0 × 10⁻⁶. 20 atoms / cm 3 The concentration of Si, the dopant source in the n-type doped InP sublayer 2613, is 1.0 × 10⁻⁶. 19 atoms / cm 3 Al x Ga 1-x The concentration of Mg, the dopant source in the InP sublayer 2621, is 1.0 × 10⁻⁶. 20 atoms / cm 3 The concentration of Mg, the dopant source for the GaInP sublayer 2622, is 1.0 × 10⁻⁶. 20 atoms / cm 3 .

[0070] Example 6: This embodiment provides an LED epitaxial wafer, which differs from the LED epitaxial wafer provided in Embodiment 1 in that, in this embodiment, Al... x Ga 1-xThe InP sublayer 2621 has a thickness of 85 nm, and the GaInP sublayer 2622 has a thickness of 90 nm.

[0071] Example 7: This embodiment provides an LED epitaxial wafer. Unlike the LED epitaxial wafer provided in Embodiment Six, in this embodiment, the concentration of the Si dopant source in the n-type doped InP sublayer 2613 is 1.0 × 10⁻⁶. 18 atoms / cm 3 Al x Ga 1-x The concentration of Mg, the dopant source in the InP sublayer 2621, is 7.0 × 10⁻⁶. 18 atoms / cm 3 The concentration of Mg, the dopant source for the GaInP sublayer 2622, is 7.0 × 10⁻⁶. 18 atoms / cm 3 .

[0072] Example 8: This embodiment provides an LED epitaxial wafer. Unlike the LED epitaxial wafer provided in Embodiment Six, in this embodiment, the concentration of the Mg dopant source in the p-type doped InP sublayer 2611 is 5.0 × 10⁻⁶. 19 atoms / cm 3 The concentration of Si, the dopant source in the n-type doped InP sublayer 2613, is 5.0 × 10⁻⁶. 18 atoms / cm 3 Al x Ga 1-x The concentration of Mg, the dopant source in the InP sublayer 2621, is 1.0 × 10⁻⁶. 19 atoms / cm 3 The concentration of Mg, the dopant source for the GaInP sublayer 2622, is 1.0 × 10⁻⁶. 19 atoms / cm 3 .

[0073] Example 9: This embodiment provides an LED epitaxial wafer. Unlike the LED epitaxial wafer provided in Embodiment Six, in this embodiment, the concentration of the Mg dopant source in the p-type doped InP sublayer 2611 is 5.5 × 10⁻⁶. 19 atoms / cm 3 The concentration of Si, the dopant source in the n-type doped InP sublayer 2613, is 5.5 × 10⁻⁶. 18 atoms / cm 3 Al x Ga 1-x The concentration of Mg, the dopant source in the InP sublayer 2621, is 5.0 × 10⁻⁶. 19 atoms / cm3 The concentration of Mg, the dopant source for the GaInP sublayer 2622, is 5.0 × 10⁻⁶. 19 atoms / cm 3 .

[0074] Example 10: This embodiment provides an LED epitaxial wafer. Unlike the LED epitaxial wafer provided in Embodiment Six, in this embodiment, the concentration of the Mg dopant source in the p-type doped InP sublayer 2611 is 1.0 × 10⁻⁶. 20 atoms / cm 3 The concentration of Si, the dopant source in the n-type doped InP sublayer 2613, is 1.0 × 10⁻⁶. 19 atoms / cm 3 Al x Ga 1-x The concentration of Mg, the dopant source in the InP sublayer 2621, is 1.0 × 10⁻⁶. 20 atoms / cm 3 The concentration of Mg, the dopant source for the GaInP sublayer 2622, is 1.0 × 10⁻⁶. 20 atoms / cm 3 .

[0075] Example 11: This embodiment provides an LED epitaxial wafer. Unlike the LED epitaxial wafer provided in Embodiment 1, in this embodiment, the concentration of the Mg dopant source in the p-type doped InP sublayer 2611 is 1.0 × 10⁻⁶. 20 atoms / cm 3 The thickness of the p-type doped InP sublayer 2611 is 50 nm, the thickness of the undoped InP sublayer 2612 is 50 nm, and the concentration of the Si dopant source for the n-type doped InP sublayer 2613 is 1.0 × 10⁻⁶. 19 atoms / cm 3 The thickness of the n-type doped InP sublayer 2613 is 45 nm, and the Al... x Ga 1-x The concentration of Mg, the dopant source in the InP sublayer 2621, is 1.0 × 10⁻⁶. 20 atoms / cm 3 The concentration of Mg, the dopant source for the GaInP sublayer 2622, is 1.0 × 10⁻⁶. 20 atoms / cm 3 .

[0076] Example 12: This embodiment provides an LED epitaxial wafer. Unlike the LED epitaxial wafer provided in Embodiment Eleven, in this embodiment, the thickness of the p-type doped InP sublayer 2611 is 35 nm, the thickness of the undoped InP sublayer 2612 is 35 nm, and the thickness of the n-type doped InP sublayer 2613 is 30 nm. Al x Ga 1-x The concentration of Mg, the dopant source in the InP sublayer 2621, is 1.0 × 10⁻⁶. 20 atoms / cm 3 The concentration of Mg, the dopant source for the GaInP sublayer 2622, is 1.0 × 10⁻⁶. 20 atoms / cm 3 .

[0077] Example 13: This embodiment provides an LED epitaxial wafer, which differs from the LED epitaxial wafer provided in Embodiment Eleven in that, in this embodiment, Al... x Ga 1-x The InP sublayer 2621 has a thickness of 85 nm, and the GaInP sublayer 2622 has a thickness of 90 nm.

[0078] Example 14: This embodiment provides an LED epitaxial wafer. Unlike the LED epitaxial wafer provided in Embodiment Eleven, in this embodiment, the thickness of the p-type doped InP sublayer 2611 is 35 nm, the thickness of the undoped InP sublayer 2612 is 35 nm, and the thickness of the n-type doped InP sublayer 2613 is 30 nm. Al x Ga 1-x The InP sublayer 2621 has a thickness of 85 nm, and the GaInP sublayer 2622 has a thickness of 90 nm.

[0079] Example 15: This embodiment provides an LED epitaxial wafer. Unlike the LED epitaxial wafer provided in Embodiment Eleven, in this embodiment, the thickness of the p-type doped InP sublayer 2611 is 40 nm, the thickness of the undoped InP sublayer 2612 is 40 nm, and the thickness of the n-type doped InP sublayer 2613 is 35 nm. Al x Ga 1-x The InP sublayer 2621 has a thickness of 90 nm, and the GaInP sublayer 2622 has a thickness of 95 nm.

[0080] Example 16: This embodiment provides an LED epitaxial wafer. Unlike the LED epitaxial wafer provided in Embodiment Eleven, in this embodiment, the thickness of the p-type doped InP sublayer 2611 is 40 nm, the thickness of the undoped InP sublayer 2612 is 40 nm, and the thickness of the n-type doped InP sublayer 2613 is 35 nm. Al x Ga 1-x The InP sublayer 2621 has a thickness of 70 nm, and the GaInP sublayer 2622 has a thickness of 75 nm.

[0081] Comparative Example 1: This embodiment provides an LED epitaxial wafer. Unlike the LED epitaxial wafer provided in Embodiment 1, in this embodiment, the value of x ranges from 0.45, and the concentration of the Mg dopant source in the p-type doped InP sublayer 2611 is 5.0 × 10⁻⁶. 19 atoms / cm 3 The thickness of the p-type doped InP sublayer 2611 is 50 nm, the thickness of the undoped InP sublayer 2612 is 50 nm, and the concentration of the Si dopant source for the n-type doped InP sublayer 2613 is 1.0 × 10⁻⁶. 19 atoms / cm 3 The thickness of the n-type doped InP sublayer 2613 is 45 nm, and the Al... x Ga 1-x The concentration of Mg, the dopant source in the InP sublayer 2621, is 1.0 × 10⁻⁶. 19 atoms / cm 3 Al x The bandgap of the P-sublayer 2621 is 2.10 eV, and Al x Ga 1-x The InP sublayer 2621 has a thickness of 85 nm, and the concentration of Mg, the dopant source for the GaInP sublayer 2622, is 5.0 × 10⁻⁶. 19 atoms / cm 3 The bandgap of the GaInP sublayer 2622 is 1.93 eV, and the thickness of the GaInP sublayer 2622 is 90 nm.

[0082] Comparative Example 2: This embodiment provides an LED epitaxial wafer. Unlike the LED epitaxial wafer provided in Embodiment 1, in this embodiment, the value of x ranges from 1.0. The p-type window layer 260 includes two tunnel junction structures 261 and an Al sandwiched between the two tunnel junction structures 261. x Ga 1-x InP sublayer 2621, tunnel junction structure 261 includes a p-type doped InP sublayer 2611, an undoped InP sublayer 2612, and an n-type doped InP sublayer 2613 stacked sequentially, Al x Ga1-x The bandgap of the InP sublayer 2621 is 2.45 eV, and Al x Ga 1-x The InP sublayer 2621 has a thickness of 3500 nm.

[0083] Comparative Example 3: This embodiment provides an LED epitaxial wafer. Unlike the LED epitaxial wafer provided in Embodiment 1, in this embodiment, the p-type window layer 260 is a p-type window layer whose main component is GaP, and the thickness of the p-type window layer 260 is 3000nm.

[0084] The LED epitaxial wafers provided in Examples 1 to 16 and Comparative Examples 1 to 3 were tested under the same conditions to obtain the luminous intensity results of each example, and the degree of improvement in luminous intensity of Examples 1 to 16 and Comparative Examples 1 to 2 was obtained with reference to the luminous intensity obtained in Comparative Example 3. The specific data are shown in Table 1: Table 1

[0085] As can be seen from Table 1, under the same test conditions, since the p-type window layer 260 in the LED epitaxial wafer provided in Embodiments 1 to 11 and Embodiments 13 to 16 of the present invention is configured as two tunnel junction structures 261 and superlattice units 262 periodically distributed along the stacking direction sandwiched between the two tunnel junction structures 261, the thickness can be made thinner while achieving the same or higher performance as the p-type window layer whose main component is GaP in Comparative Example 3.

[0086] As can be seen from Example Twelve, when the p-type doped InP sublayer 2611, the n-type doped InP sublayer 2613, and Al... x Ga 1-x When the doping concentration of InP sublayer 2621 and GaInP sublayer 2622 is too high, compared with the p-type window layer whose main component is GaP in Comparative Example 3, although the thickness of the p-type window layer 260 can be made thinner, the performance is actually reduced. This may be because the excessively high doping concentration leads to a decrease in process stability and material quality, such as impurity diffusion and increased interface roughness.

[0087] As can be seen from Comparative Example 1, when the value of x is less than 0.5, even p-type doped InP sublayer 2611, n-type doped InP sublayer 2613, and Al... x Ga 1-xWhen the doping concentrations of InP sublayers 2621 and GaInP sublayers 2622 are at optimal values, compared to the p-type window layer in Comparative Example 3 where the main component is GaP, although the thickness of the p-type window layer 260 can be made thinner, the performance degradation is greater. This may be because the superlattice structure formed by the superlattice unit 262 has a larger lattice mismatch, resulting in poor growth quality of the superlattice structure and affecting device performance. As can be seen from Comparative Example 2, when x is 1.0, a superlattice structure cannot be formed. In this case, the thickness of the p-type window layer 260 needs to be set thicker, and the corresponding performance degradation is also greater.

[0088] As can be seen from Examples 10 and 11, when the thickness of the tunnel junction structure 261 is large, the performance decreases significantly. This may be due to the degradation of material quality and the increase in structural resistance caused by the increase in tunnel junction thickness, thereby reducing the overall electro-optical conversion efficiency.

[0089] In summary, this application configures the p-type window layer 260 as two tunnel junction structures 261 and a superlattice unit 262 periodically distributed along the stacking direction sandwiched between the two tunnel junction structures 261. The tunnel junction structure 261 includes a p-type doped InP sublayer 2611, an undoped InP sublayer 2612, and an n-type doped InP sublayer 2613 stacked sequentially. The superlattice unit 262 includes Al... x Ga 1-x InP sublayer 2621 and GaInP sublayer 2622, the value of x is in the range of 0.5≤x<1. The tunnel junction structure 261 can improve the carrier injection efficiency through the tunneling effect, allowing more carriers to pass through the p-type window layer 260 and enter the device. The superlattice structure formed by the superlattice unit 262 can further promote the expansion and distribution of carriers in the p-type window layer 260 through its special band structure and carrier transport characteristics. This expansion and distribution helps to reduce the accumulation of carriers in the p-type window layer 260, reduce resistance, and thus improve the current expansion capability. Meanwhile, p-type window layers with GaP as the main component usually require a relatively thick layer to ensure sufficient current spread capability and photoelectric conversion efficiency, which increases the resistance and cost of the device. However, this application achieves the same performance with a thinner p-type window layer 260 by introducing a tunnel junction structure 261 that can improve carrier injection efficiency and a superlattice structure formed by superlattice units 262 that can optimize the carrier transport path and distribution state. This achieves the goal of reducing the thickness of the p-type window layer 260.

[0090] In the description of this specification, references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0091] The embodiments described above are merely illustrative of several implementations of the present invention, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of protection of the present invention. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these modifications and improvements all fall within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the appended claims.

Claims

1. An LED epitaxial wafer, characterized in that, The LED epitaxial wafer includes: Substrate; An epitaxial layer is disposed on one side of the substrate. The epitaxial layer includes an n-type electron blocking layer, an n-type electron blocking layer, an active layer, a p-type hole blocking layer, a p-type hole layer, and a p-type window layer stacked sequentially. The p-type window layer includes two tunnel junction structures and superlattice units periodically distributed along the stacking direction sandwiched between the two tunnel junction structures. The tunnel junction structures include p-type doped InP sublayers, undoped InP sublayers, and n-type doped InP sublayers stacked sequentially. The superlattice units include Al units stacked sequentially. x Ga 1-x InP sublayer and GaInP sublayer; The range of x is 0.5 ≤ x < 1.

2. The LED epitaxial wafer according to claim 1, characterized in that, The Al x Ga 1-x Both the InP sublayer and the GaInP sublayer are doped with Mg or Zn.

3. The LED epitaxial wafer according to claim 2, characterized in that, The Al x Ga 1-x The concentration of the doping source in the InP sublayer and the GaInP sublayer is 5.0 × 10⁻⁶. 18 atoms / cm 3 ~1.0×10 20 atoms / cm 3 .

4. The LED epitaxial wafer according to claim 1, characterized in that, The thickness of the superlattice unit is 50nm~100nm.

5. The LED epitaxial wafer according to claim 1, characterized in that, The doping source for the p-type doped InP sublayer is Mg, and the doping source for the n-type doped InP sublayer is Si.

6. The LED epitaxial wafer according to claim 5, characterized in that, The concentration of the dopant source in the p-type doped InP sublayer is 1.0 × 10⁻⁶. 19 atoms / cm 3 ~1.0×10 20 atoms / cm 3 The concentration of the doping source in the n-type doped InP sublayer is 1.0 × 10⁻⁶. 17 atoms / cm 3 ~1.0×10 19 atoms / cm 3 .

7. The LED epitaxial wafer according to claim 1, characterized in that, The thickness of the p-type doped InP sublayer is 10 nm to 50 nm, the thickness of the undoped InP sublayer is 10 nm to 50 nm, and the thickness of the n-type doped InP sublayer is 10 nm to 50 nm.

8. The LED epitaxial wafer according to any one of claims 1 to 7, characterized in that, The number of periods of the superlattice unit is 2 to 10.

9. An LED chip, characterized in that, It includes an LED epitaxial wafer as described in any one of claims 1 to 8, and a connection electrode formed on the LED epitaxial wafer.

10. A method for preparing an LED epitaxial wafer, characterized in that, The preparation method includes the following steps: Provide a substrate; An n-type electron layer is grown on the substrate; An n-type electron blocking layer is grown on the n-type electron layer; An active layer is grown on the n-type electron blocking layer; A p-type hole-blocking layer is grown on the active layer; A p-type hole layer is grown on the p-type hole blocking layer; A p-type window layer is grown on the p-type hole layer, wherein the p-type window layer includes two tunnel junction structures and superlattice units periodically distributed along the stacking direction sandwiched between the two tunnel junction structures. The tunnel junction structures include p-type doped InP sublayers, undoped InP sublayers, and n-type doped InP sublayers stacked sequentially. The superlattice units include Al... x Ga 1-x InP sublayer and GaInP sublayer, the value of x is in the range of 0.5 ≤ x < 1.

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