Threshold type memristor device based on niobium oxide nanosheet and preparation method of threshold type memristor device
By optimizing niobium oxide nanosheet memristor devices through hydrothermal synthesis and spin-coating annealing processes, the challenges of oxygen vacancy and valence state regulation were solved, resulting in low-power, high-stability memristor devices suitable for neuromorphic computing and circuit protection.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-12-29
- Publication Date
- 2026-03-24
AI Technical Summary
Existing niobium oxide nanosheet memristor devices are difficult to precisely control oxygen vacancies and valence states at the nanoscale, resulting in high threshold voltage dispersion, which limits their large-scale application in complex spiking neural networks. Furthermore, existing processes are complex and it is difficult to balance low power consumption and high stability.
By employing a full-chain parameter optimization approach, a low-cost fabrication process involving hydrothermal synthesis of nanosheets, single-step spin coating, and 400℃ annealing was developed to achieve precise control of oxygen vacancy concentration and Nb valence state, thereby constructing a niobium oxide nanosheet functional layer. Combined with the synergistic control of the number of spin coating layers and annealing temperature, the device performance was optimized.
It reduces the device threshold voltage fluctuation to within 10%, significantly reduces the limiting current, and improves the device's cycle stability and carrier transport efficiency, making it suitable for scenarios such as neuromorphic computing and circuit protection.
Smart Images

Figure CN121728979A_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The application belongs to the technical field of microelectronic materials and devices, and particularly relates to a threshold type memristor device based on niobium oxide nanosheets and a preparation method thereof. BACKGROUND
[0002] With the development of the field of semiconductor devices, neuromorphic computing as a core technology to break through the "memory wall" and "power wall" of the traditional von Neumann architecture urgently needs the biological neuron-like characteristics of a memristor device. Niobium oxide is an ideal material for constructing a volatile threshold memristor due to its fast resistance state switching (<10 ns) and self-recovery threshold behavior. However, the existing preparation of niobium oxide mainly relies on physical methods such as magnetron sputtering, which is difficult to achieve precise regulation of oxygen vacancies and valence states at the nanoscale, resulting in high threshold voltage dispersion (>20%) of the device and limiting the large-scale application in complex pulse neural networks.
[0003] The existing performance regulation of the niobium oxide-based memristor device focuses on material modification and structure design, such as modulation of heterojunction interface potential barrier or optimization of threshold characteristics through annealing treatment. However, there are significant limitations: the preparation process of the heterostructure is complex, the light control response speed is only at the millisecond level, low-temperature annealing cannot fully activate the diffusion of oxygen atoms to form a uniform oxygen vacancy distribution, and ultra-high temperature annealing easily leads to excessive oxidation of the thin film, destroying the balance of the system, and it is difficult to balance the low power consumption and high stability requirements of the device. SUMMARY
[0004] To solve the above technical problems, the application provides a threshold type memristor device based on niobium oxide nanosheets and a preparation method thereof. The application provides a preparation method of a threshold type memristor device with excellent performance and simple process. The application develops a new low-cost preparation process compatible with large-scale production to replace the high-energy physical deposition method. Through parameter optimization of the whole process chain, the application realizes precise regulation of oxygen vacancy concentration and Nb valence state, reduces the fluctuation of the threshold voltage of the device to below 10%, and makes the prepared threshold type memristor device based on niobium oxide nanosheets have low limit current and high cycle stability. Ultimately, the application can provide high-performance hardware support for neuron simulation, circuit overvoltage protection and other applications of neuromorphic computing.
[0005] To achieve the above purpose, the application provides the following technical solutions: The application provides a threshold type memristor device based on niobium oxide nanosheets, wherein the functional layer is a niobium oxide nanosheet functional layer. The preparation method of the niobium oxide nanosheet functional layer is as follows: a dispersion liquid containing niobium oxide nanosheets is spin-coated on the surface of a bottom electrode layer, and annealing is performed at 400 DEG C to obtain the niobium oxide nanosheet functional layer. The preparation method of the niobium oxide nanosheet comprises the following steps: adding NbCl5 into anhydrous ethanol, stirring until completely dissolved, then adding water under continuous stirring, adjusting the pH to 2-3, adding ammonia water, adding cetyltrimethylammonium bromide (CTAB), continuing to stir to obtain a stable milky white colloid; then the stable milky white colloid is subjected to hydrothermal treatment, and after the end, it is naturally cooled to room temperature; the obtained hydrothermal treatment product is subjected to centrifugation, washing and drying to obtain a loose powder, then the loose powder is subjected to annealing, and the annealing product is ground to obtain the niobium oxide nanosheet.
[0006] The existing threshold type memristor device preparation lacks the whole chain research of "nanosheet synthesis-dispersion liquid regulation-spin coating film annealing optimization", and the synergistic regulation mechanism of the spin coating layer number and the annealing temperature on the film thickness and the oxygen vacancy distribution is unknown, so that the clear correlation of "process-material-performance" cannot be established, which restricts the performance breakthrough of the niobium oxide threshold type memristor device. The present application is based on the core regulation mechanism of oxygen vacancy regulation and Nb 4+ / Nb 5+ valence state balance, wherein the spin coating layer number regulates the film thickness and the uniformity of oxygen vacancies, and the annealing temperature regulates the valence state and the carrier transport path. The device works in accordance with a three-stage mechanism: in the low voltage interval, the space charge limited current (SCLC) mechanism dominates to present a high resistance state, the PF hot electron emission mechanism is started at the threshold voltage to form a conductive filament to switch to a low resistance state, and when the voltage is lower than the holding voltage, the filament breaks to restore the high resistance state to complete the switching cycle. The device preparation process adopts the whole chain process of "hydrothermal synthesis-spin coating" to replace the traditional physical deposition method, and a "3-layer spin coating+400 DEG C annealing" synergistic regulation system is constructed, that is, the oxygen vacancies can realize "global uniformity" distribution through the 3-layer spin coating film, and the 400 DEG C annealing can significantly improve the oxygen vacancy concentration and increase the Nb 4+ proportion, which promotes the carrier path to change from "sparse point shape" to "continuous network shape". Finally, the device performance is optimized by regulating the process parameters and material characteristics, so as to overcome the defects of traditional process and the core bottleneck of existing technology, realize the directional optimization of device threshold behavior and efficient conduction of low limit current.
[0007] Further, the preparation method of the niobium oxide nanosheet includes the following steps: 0.2 g of NbCl5 is accurately weighed, added into 2 mL of anhydrous ethanol, and then transferred into a 50 mL beaker, magnetically stirred at a speed of 300-500 rpm for 30 min at room temperature until completely dissolved, then 8.5 mL of deionized water is added dropwise under continuous stirring (the solution is slightly turbid), 1 mol / L dilute nitric acid or 25wt% ammonia water is used to adjust the pH to 2-3, 1.5 mL of ammonia water is added at a rate of 1 drop / 2 s (to prevent agglomeration), 0.1 g of CTAB (cetyltrimethylammonium bromide) is added for controlling the growth orientation of the nanosheet, and the stirring is continued for 2 h to obtain a stable milky white colloid; then the sealed inner container of the reaction kettle is placed in a stainless steel jacket, and the temperature is raised to 200℃ at a rate of 5℃ / min in an oven and kept for 24 h, and then naturally cooled to room temperature; finally, the product is post-treated: the reaction solution is first transferred into a centrifuge tube and centrifuged at 8000 rpm for 10 min, the supernatant is discarded, and the precipitate is washed with anhydrous ethanol and deionized water alternately for 3 times, then the precipitate is placed in a 60℃ vacuum drying oven for drying for 12 h to obtain a loose powder, then the loose powder is transferred into a quartz crucible, and the temperature is raised to 400℃ at a rate of 5℃ / min in a muffle furnace and kept for 2 h (to decompose CTAB and crystallize), and finally the powder is ground in a agate mortar for 20 min to obtain niobium oxide nanosheets with a horizontal size of 50-200 nm and a thickness of 2-5 nm.
[0008] Further, the threshold-type memristor device based on the niobium oxide nanosheet has a longitudinal layered structure, which is composed of a substrate layer, a bottom electrode layer, a niobium oxide nanosheet functional layer, and a top electrode layer from bottom to top.
[0009] Further, the thickness of the substrate layer is 300 nm ± 20 nm, the thickness of the bottom electrode layer is 90 nm ± 5 nm, the thickness of the niobium oxide nanosheet functional layer is 50 nm ± 5 nm, and the thickness of the top electrode layer is 35 nm ± 3 nm.
[0010] Further, the thickness of the niobium oxide nanosheet functional layer is realized by controlling the number of spin-coating layers, and the number of spin-coating layers is preferably 3.
[0011] Further, the bottom electrode layer is composed of an adhesive Ti layer and a conductive Pt layer, wherein the conductive Pt layer is on the top and the adhesive Ti layer is on the bottom. The top electrode layer is composed of a Ti transition layer and an Au packaging layer, wherein the Au packaging layer is on the top and the Ti transition layer is on the bottom.
[0012] Wherein, the "up" refers to the direction close to the substrate layer, and the "down" refers to the direction away from the substrate layer.
[0013] The application further provides a preparation method of the threshold-type memristor device based on the niobium oxide nanosheet.
[0014] Further, before growing the bottom electrode layer on the substrate layer, the method further comprises the steps of cleaning the silicon wafer substrate and blowing dry with nitrogen.
[0015] Further, the conditions of the magnetron sputtering are as follows: the chamber base vacuum degree is less than 5*10 -4 Pa; the purity of the Ti metal target is 99.99%, and the corresponding sputtering power is 100 W; the purity of the Pt metal target is 99.99%, and the corresponding sputtering power is 150 W.
[0016] Further, the concentration of the dispersion liquid containing the niobium oxide nanosheet is 0.19 mol / L.
[0017] Further, the conditions of the thermal evaporation vacuum evaporation method are as follows: the chamber base vacuum degree is less than 3*10 -4 Pa; the purity of the Ti wire evaporation material is 99.99%, and the corresponding heating current is 160 A; the purity of the Au wire evaporation material is 99.99%, and the corresponding heating current is 90 A.
[0018] The application further provides applications of the threshold-type memristor device based on the niobium oxide nanosheet in a neuron simulation unit in neuromorphic computing, a logic operation unit of a circuit overvoltage protection element, or a logic operation unit of a low-power flexible electronic device.
[0019] Compared with the prior art, the application has the following advantages and technical effects: The innovation of the threshold-type memristor device based on the niobium oxide nanosheet is concentrated in the full-process collaborative optimization of "process-material-performance". Specifically, the innovation is embodied in the following aspects: At the process innovation level, the application discards the complex process of traditional physical deposition and proposes a low-cost preparation method of "hydrothermal synthesis of nanosheet-single-step spin coating-annealing". The spin coating film does not need high-temperature treatment, and the process is simple and suitable for large-scale production. By adjusting the annealing temperature, the oxygen vacancy concentration and the Nb valence state can be accurately controlled, and the defects of poor controllability of traditional processes can be effectively improved.
[0020] At the material innovation level, by virtue of the two-dimensional surface interface characteristics of the niobium oxide nanosheet, the uniform spreading and dense film forming of the nanosheet film are realized through PVP dispersant modification and spin coating process optimization; the film crystallization is promoted by combining with annealing treatment, and the problem of random diffusion of oxygen vacancies in the traditional bulk NbOx(x is 2.0~2.5) is effectively inhibited, which provides a material basis for the stability of the device threshold characteristics.
[0021] At the performance control innovation level, by adjusting the spin coating layer number (film thickness) and different annealing temperatures and other parameters to change the oxygen vacancy content and valence state of the Nb element in the film to indirectly optimize the electrical performance of the device, it is determined that 3 layers of spin coating + 400 DEG C annealing is the optimal preparation process of the device. Finally, the threshold voltage fluctuation of the device is controlled within 10%, and the limiting current is significantly reduced, effectively solving the core problems of high dispersion and high power consumption of the existing threshold type memristor device, providing a high-performance hardware solution for neuromorphic computing, circuit protection and other scenarios. BRIEF DESCRIPTION OF DRAWINGS
[0022] The accompanying drawings, which form a part of the disclosure, are intended to provide further understanding of the disclosure and serve to explain the exemplary embodiments of the disclosure together with their descriptions. The accompanying drawings do not constitute an inappropriate limitation on the disclosure. In the drawings: Figure 1 A cross-sectional structure schematic diagram of the TS memristor device based on the niobium oxide nanosheet prepared by the present application, wherein 100 is a substrate layer, 101 is a bottom electrode layer, 102 is a niobium oxide nanosheet functional layer, and 103 is a top electrode layer; Figure 2 A process flow chart of the TS memristor device based on the niobium oxide nanosheet prepared by the present application; Figure 3 A basic electrical characteristic I-V diagram of the TS memristor device based on the niobium oxide nanosheet prepared by Example 1; Figure 4 Statistical distribution diagrams of the threshold voltage (V th ) and the holding voltage (V hold ) of the TS memristor device based on the niobium oxide nanosheet prepared by Example 1, Comparative Example 1~Comparative Example 5 under different annealing temperature conditions, wherein (a) is the statistical distribution diagram of the threshold voltage (V th ) and the holding voltage (V hold ) of the B1, B2 and B3 devices, and (b) is the statistical distribution diagram of the threshold voltage (V th ) and the holding voltage (V hold ) of the B4, B5 and B6 devices; Figure 5 High and low resistance states (RHRS With R LRS The statistical distribution of devices B1, B2, and B3 is shown in Figure (a), where (a) represents the high and low resistance states (R) of devices B1, B2, and B3. HRS With R LRS (a) is a statistical distribution diagram of devices B4, B5, and B6, and (b) is a high and low resistance state (R) diagram of devices B4, B5, and B6. HRS With R LRS Statistical distribution chart of ) Figure 6 The TS memristor devices based on niobium oxide nanosheets prepared in Example 1 and Comparative Examples 1 to 5 are shown. th / V hold and R HRS / R LRS The relative volatility (σ / μ) comparison analysis diagram, where (a) is the V of the TS memristor device. th / V hold and R HRS / R LRS The relative volatility (σ / μ) values are compared in the graph, and (b) shows the V of the TS memristor device. th / V hold and R HRS / R LRS The trend of relative volatility (σ / μ); Figure 7 The Nb(Nb) in the resistive switching layer of the TS memristor device based on niobium oxide nanosheets prepared in Examples 1 and 5 are shown. 4+ and Nb 5+ A comparison chart of the relative contents of O (lattice oxygen (O)) and O (lattice oxygen (O)). L ) and vacant oxygen (O M The relative content comparison chart of Nb(Nb) is shown, where (a) is the content of Nb(Nb) 4+ and Nb 5+ The relative content comparison chart of O (lattice oxygen (O)) is shown in (b) L ) and vacant oxygen (O M A comparison chart of the relative contents of ()). Figure 8 This is a schematic diagram illustrating the retention characteristics of the TS memristor device based on niobium oxide nanosheets prepared in Example 1. Detailed Implementation
[0023] Various exemplary embodiments of the present invention will now be described in detail. This detailed description should not be considered as a limitation of the present invention, but rather as a more detailed description of certain aspects, features, and embodiments of the present invention.
[0024] It should be understood that the terminology used in this invention is merely for describing particular embodiments and is not intended to limit the invention. Furthermore, with respect to numerical ranges in this invention, it should be understood that each intermediate value between the upper and lower limits of the range is also specifically disclosed. Every smaller range between any stated value or intermediate value within a stated range, and any other stated value or intermediate value within said range, is also included in this invention. The upper and lower limits of these smaller ranges may be independently included or excluded from the range.
[0025] Unless otherwise stated, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art. While only preferred methods and materials have been described herein, any methods and materials similar or equivalent to those described herein may be used in the implementation or testing of this invention. All references to this specification are incorporated by way of citation to disclose and describe methods and / or materials associated with those references. In the event of any conflict with any incorporated reference, the content of this specification shall prevail.
[0026] Various modifications and variations can be made to the specific embodiments described in this specification without departing from the scope or spirit of the invention, as will be apparent to those skilled in the art. Other embodiments derived from this specification will also be apparent to those skilled in the art. This specification and embodiments are merely exemplary.
[0027] The terms “include,” “including,” “have,” “contain,” etc., used in this article are all open-ended terms, meaning that they include but are not limited to.
[0028] An embodiment of the present invention provides a threshold memristor device based on niobium oxide nanosheets, wherein the functional layer is a niobium oxide nanosheet functional layer; The preparation method of the niobium oxide nanosheet functional layer is as follows: a dispersion containing niobium oxide nanosheets is spin-coated onto the surface of the bottom electrode layer and annealed at 400℃ to obtain the niobium oxide nanosheet functional layer. The preparation method of niobium oxide nanosheets includes the following steps: NbCl5 is added to anhydrous ethanol and stirred until completely dissolved. Then, deionized water is added while continuously stirring to adjust the pH to 2-3. Ammonia is added dropwise, followed by cetyltrimethylammonium bromide (CTAB). Stirring continues to obtain a stable milky white colloid. The stable milky white colloid is then subjected to hydrothermal treatment, followed by natural cooling to room temperature. The hydrothermally treated product is centrifuged, washed, and dried to obtain a loose powder. The loose powder is then annealed, and the annealed product is ground to obtain niobium oxide (NbO). x (x takes values of 2.0 to 2.5, the same below) nanosheets.
[0029] In a preferred embodiment of the present invention, in the method for preparing niobium oxide nanosheets, the temperature for hydrothermal treatment of the stable milky white colloid is 200°C, the holding time is 24 h, and the heating rate is 5°C / min.
[0030] In a preferred embodiment of the present invention, in the method for preparing niobium oxide nanosheets, the annealing temperature of the loose powder is 400°C, the holding time is 2h, and the heating rate is 5°C / min. The purpose of annealing is to decompose CTAB and crystallize it.
[0031] In a preferred embodiment of the present invention, a schematic cross-sectional view of the threshold memristor device based on niobium oxide nanosheets is shown below. Figure 1 As shown, from bottom to top, the structure consists of a substrate layer 100 (a silicon substrate layer on which a SiO2 thin film is grown), a bottom electrode layer 101 (a Ti / Pt composite bottom electrode layer), and a niobium oxide nanosheet functional layer 102 (a NbO nanosheet functional layer). x The substrate 100 consists of a resistive switching functional layer and a top electrode layer 103 (which is a Ti / Au composite top electrode layer) (i.e., the niobium oxide nanosheet functional layer 102 is disposed between the bottom electrode layer 101 and the top electrode layer 103); the substrate 100 is composed of a silicon wafer with a pre-grown SiO2 thin film on the surface, and its thickness is 300 nm ± 20 nm; the bottom electrode layer 101 consists of a Ti layer composed of active metal titanium (Ti) (which is the adhesive layer) and a Pt layer composed of inert metal platinum (Pt) (which is the conductive layer) (Pt layer on top, Ti layer on the bottom), the thickness of the bottom electrode layer 101 is 90 nm ± 5 nm, the thickness of the Pt layer is 80 ± 4 nm, and the thickness of the Ti layer is 10 ± 1 nm; the niobium oxide nanosheet functional layer 102 is composed of a transition metal oxide -- NbO x The structure consists of nanosheets with a thickness of 50 nm ± 5 nm. The niobium oxide nanosheet functional layer is a resistive switching functional layer. The top electrode layer 103 consists of a Ti layer (which is a transition layer) composed of active metal Ti and an Au layer (which is an encapsulation layer) composed of inert metal gold (Au) (Au layer on top, Ti layer on the bottom). The thickness of the top electrode layer 103 is 35 nm ± 3 nm, the thickness of the Ti layer is 30 ± 2 nm, and the thickness of the Au layer is 5 ± 1 nm.
[0032] In a preferred embodiment of the present invention, the thickness of the niobium oxide nanosheet functional layer 102 is achieved by controlling the number of spin coating layers, using a single-step spin coating mode, and the preferred number of spin coating layers is 3 layers.
[0033] The process flow diagram for fabricating threshold (TS) memristor devices based on niobium oxide nanosheets in this invention is shown below. Figure 2 As shown.
[0034] In a preferred embodiment of the present invention, the preparation method of niobium oxide nanosheets includes the following steps: Accurately weigh 0.2 g NbCl5, add 2 mL of anhydrous ethanol, and transfer to a 50 mL beaker. Stir magnetically at 300-500 rpm for 30 min at room temperature until completely dissolved. Then, continuously stir and add 8.5 mL of deionized water (the solution will be slightly turbid). Adjust the pH to 2-3 with 1 mol / L dilute nitric acid or 25 wt% ammonia. Add 1.5 mL of ammonia at a rate of 1 drop / 2 s (to prevent aggregation). Add 0.1 g CTAB (to regulate the growth orientation of the nanosheets) and continue stirring for 2 h to obtain a stable milky white colloid. Then, place the sealed reaction vessel inner liner in a stainless steel jacket and heat to 200℃ in an oven at 5℃ / min for 24 h. After the reaction, allow it to cool naturally to room temperature. Finally, perform post-processing of the product: first, transfer the reaction solution to a centrifuge tube and centrifuge at 8000 rpm for 10 minutes. After discarding the supernatant, the precipitate was washed three times alternately with anhydrous ethanol and deionized water. The precipitate was then dried in a vacuum drying oven at 60℃ for 12 hours to obtain a loose powder. The loose powder was then transferred to a quartz crucible and heated to 400℃ in a muffle furnace at 5℃ / min and held for 2 hours (to decompose CTAB and crystallize). Finally, it was ground in an agate mortar for 20 minutes to obtain niobium oxide nanosheets with a transverse diameter of 50-200 nm and a thickness of 2-5 nm. No obvious agglomeration was observed on the surface of the niobium oxide nanosheets.
[0035] The embodiments of the present invention also provide a method for fabricating the above-mentioned threshold memristor device based on niobium oxide nanosheets: First, a bottom electrode layer is grown on a substrate layer by magnetron sputtering; then, a dispersion containing niobium oxide nanosheets is spin-coated onto the bottom electrode layer by spin coating, dried and annealed to obtain a niobium oxide nanosheet functional layer; finally, a top electrode layer is fabricated on the niobium oxide nanosheet functional layer by thermal evaporation vacuum deposition.
[0036] In a preferred embodiment of the present invention, before growing the bottom electrode layer on the substrate layer, the method further includes cleaning the silicon wafer substrate and drying it with nitrogen gas.
[0037] For example, the steps for cleaning a silicon wafer substrate are as follows: the silicon wafer substrate is ultrasonically immersed in acetone, anhydrous ethanol and deionized water for 10 minutes in an ultrasonic cleaner.
[0038] In a preferred embodiment of the present invention, the conditions for magnetron sputtering are: the chamber background vacuum is less than 5 × 10⁻⁶. -4 Pa; Ti metal target purity is 99.99%, corresponding to a sputtering power of 100 W; Pt metal target purity is 99.99%, corresponding to a sputtering power of 150 W.
[0039] In a preferred embodiment of the present invention, when preparing the niobium oxide nanosheet functional layer, the concentration of the dispersion containing niobium oxide nanosheets is 0.19 mol / L; the holding time during annealing is 30 min ± 5 min, and after the holding time, it is naturally cooled to room temperature. The annealing temperature can control the oxygen vacancy concentration and Nb concentration in the niobium oxide nanosheet functional layer. 4+ With Nb 5+ The price ratio.
[0040] In a preferred embodiment of the present invention, the conditions for the thermal evaporation vacuum deposition method are: the chamber background vacuum degree is less than 3 × 10⁻⁶. -4 Pa; the purity of the Ti wire vapor deposition material is 99.99%, corresponding to a heating current of 160 A; the purity of the Au wire vapor deposition material is 99.99%, corresponding to a heating current of 90 A.
[0041] In a preferred embodiment of the present invention, when preparing the top electrode layer, a metal mask is used for masking, and the aperture of the metal mask is 200 μm.
[0042] The present invention also provides the application of the above-mentioned threshold memristor device based on niobium oxide nanosheets in neuromorphic computing, logic operation unit of circuit overvoltage protection element, or logic operation unit of low power flexible electronic device.
[0043] This invention aims to solve the problems of high threshold voltage dispersion and poor cycle stability in existing niobium oxide threshold memristors. This invention utilizes a niobium oxide nanosheet-based threshold memristor device employing an "Au / Ti / NbO" structure. x The " / Pt / Ti / SiO2" vertical stacked structure consists of, from bottom to top, a silicon substrate layer with a SiO2 thin film, a Ti / Pt composite bottom electrode layer, and an NbO layer. x The structure consists of a resistive switching functional layer and a Ti / Au composite top electrode layer. The core innovation lies in achieving NbO through a process chain of "hydrothermal synthesis of niobium oxide nanosheets - preparation of precursor dispersion - room temperature spin coating - gradient annealing". x Oxygen vacancy concentration and Nb in resistive switching functional layers 4+ / Nb 5+ Precise and coordinated control of valence state ratios optimizes the threshold-type memristor performance of the device. Experiments demonstrate that niobium oxide nanosheets prepared using the method of this invention exhibit excellent threshold-type memristor characteristics. The threshold voltage dispersion of the niobium oxide nanosheet-based threshold-type memristor device prepared using this method is significantly reduced, while the cycle stability and carrier transport efficiency are greatly improved. The process is compatible with CMOS technology and requires no complex fabrication. The niobium oxide nanosheet-based threshold-type memristor device of this invention can be efficiently adapted to neuromorphic computing scenarios such as neuron simulation, circuit overvoltage protection, and low-power logic operations, demonstrating significant application value.
[0044] Unless otherwise specified, the room temperature in this invention is 25±2℃.
[0045] All raw materials used in the embodiments of this invention were purchased commercially. As an example, the silicon substrate (which is a silicon wafer with a SiO2 thin film grown on it, denoted as SiO2 / Si layer) was purchased from Kaihua Jingmei Silicon Materials Store, and was a single-sided polished (SSP) P-type. <100> The silicon wafer has the following specific parameters: diameter 100 ± 0.3 mm, thickness 525 ± 25 μm, surface oxide layer thickness 300 nm, and resistivity 1 ~ 100 Ω·cm.
[0046] It should be noted that any aspects not described in detail in this invention are conventional practices in the field and are not the focus of this invention.
[0047] The technical solution of the present invention will be further illustrated by the following embodiments.
[0048] Example 1 This embodiment provides a threshold-type memristor device based on niobium oxide nanosheets, the cross-sectional structure of which is shown in the figure below. Figure 1 As shown, from bottom to top, the structure consists of a substrate layer 100, a bottom electrode layer 101, a niobium oxide nanosheet functional layer 102, and a top electrode layer 103 (i.e., the niobium oxide nanosheet functional layer 102 is disposed between the bottom electrode layer 101 and the top electrode layer 103). The substrate layer 100 is composed of a silicon wafer with a pre-grown SiO2 thin film on its surface, with a thickness of 300 nm ± 20 nm. The bottom electrode layer 101 consists of a Ti layer (which is the adhesive layer) composed of active metal titanium (Ti) and a Pt layer (which is the conductive layer) composed of inert metal platinum (Pt) (Pt layer on top, Ti layer on the bottom). The thickness of the bottom electrode layer 101 is 90 nm ± 5 nm, the thickness of the Pt layer is 80 ± 4 nm, and the thickness of the Ti layer is 10 ± 1 nm. The niobium oxide nanosheet functional layer 102 is composed of transition metal oxide—niobium oxide NbOx nanosheets, with a thickness of 50 nm ± 5 nm. nm, the niobium oxide nanosheet functional layer is a resistive switching functional layer; the top electrode layer 103 is composed of a Ti layer (which is a transition layer) composed of active metal Ti and an Au layer (which is an encapsulation layer) composed of inert metal gold (Au) (Au layer on top, Ti layer on bottom), the thickness of the top electrode layer 103 is 35 nm ± 3 nm, the thickness of the Ti layer is 30 ± 2 nm, and the thickness of the Au layer is 5 ± 1 nm.
[0049] The fabrication method of the threshold-type memristor device based on niobium oxide nanosheets described above includes the following steps: S1. Prepare a niobium oxide nanosheet precursor solution using niobium pentachloride (NbCl5) as the niobium source. The specific steps are as follows: First, accurately weigh 0.2 g of NbCl5 using a balance, add 2 mL of anhydrous ethanol, and transfer to a 50 mL beaker. Stir magnetically at 500 rpm for 30 min at room temperature until completely dissolved. Then, continuously stir and add 8.5 mL of deionized water dropwise (the solution will be slightly turbid). Adjust the pH to 3 with 25 wt% ammonia. Next, add 1.5 mL of ammonia at a rate of 1 drop / 2 s (to prevent aggregation). Add 0.1 g of CTAB (hexadecyltrimethylammonium bromide, used to control the orientation of nanosheet growth) and continue stirring for 2 h to obtain a stable milky white colloid. Then, place the sealed reactor inner liner in a stainless steel jacket and heat in an oven to 200℃ at 5℃ / min and maintain the temperature for 24 hours. After the reaction, the mixture was allowed to cool naturally to room temperature. The final product post-processing was performed: the reaction solution was transferred to a centrifuge tube and centrifuged at 8000 rpm for 10 min. The supernatant was discarded, and the precipitate was washed three times alternately with anhydrous ethanol and deionized water. The precipitate was then dried in a vacuum drying oven at 60℃ for 12 h to obtain a loose powder. The loose powder was then transferred to a quartz crucible and heated to 400℃ in a muffle furnace at 5℃ / min for 2 h (to decompose CTAB and crystallize). Finally, it was ground in an agate mortar for 20 min to obtain niobium oxide nanosheets with a transverse diameter of 50-200 nm and a thickness of 2-5 nm. 1 g of niobium oxide nanosheets was added to 10 mL of a mixed solvent of ethanol and water (volume ratio 8:2), and 1.5 wt% of PVP (polyvinylpyrrolidone) was added. The mixture was stirred until homogeneous, resulting in a dispersion containing niobium oxide nanosheets with a concentration of 0.19 mol / L. S2. Clean the silicon wafer substrate by ultrasonically immersing it in acetone, anhydrous ethanol and deionized water for 10 minutes in an ultrasonic cleaner, and then drying it with nitrogen gas to use it as substrate layer 100. S3. Using magnetron sputtering, a bottom electrode layer 101 with a thickness of 90 nm (composed of a 10 nm thick Ti layer and an 80 nm thick Pt layer, with the Pt layer on top and the Ti layer on the bottom) is grown on the substrate layer 100. The magnetron sputtering conditions are: the chamber background vacuum is less than 5 × 10⁻⁴ Pa; the Ti metal target purity is 99.99%, corresponding to a sputtering power of 100 W; the Pt metal target purity is 99.99%, corresponding to a sputtering power of 150 W. S4. A niobium oxide nanosheet functional layer 102 was prepared on the bottom electrode layer 101 using a spin-coating method: a 0.19 mol / L dispersion containing niobium oxide nanosheets was spin-coated onto the bottom electrode layer 101 at room temperature, and then dried on a hot plate at 80°C for 5 minutes. The spin-coating and drying steps were repeated three times alternately to obtain a wet film with a thickness of 50 ± 5 nm. The substrate with the wet film was then placed in a box furnace (purchased from Hefei Kejing Materials Technology Co., Ltd., model KSL-1100X) under atmospheric conditions and annealed at 400°C for 30 minutes to form a dense and well-crystallized niobium oxide nanosheet functional layer. The unannealed device was used as a blank control group. S5. A top electrode layer 103 with a thickness of 35 nm (composed of a Ti transition layer with a thickness of 30 nm and an Au encapsulation layer with a thickness of 5 nm, with the Au encapsulation layer on top and the Ti transition layer on the bottom) was prepared on the niobium oxide nanosheet functional layer using thermal evaporation vacuum deposition (thermal deposition). The thermal deposition conditions were: the background vacuum degree of the chamber was less than 3 × 10-4 Pa; the purity of the Ti filament deposition material was 99.99%, corresponding to a heating current of 160 A; the purity of the Au filament deposition material was 99.99%, corresponding to a heating current of 90 A. During the preparation of the top electrode layer 103, a metal mask (with an aperture of 200 μm) was used for masking, thereby obtaining a threshold-type memristor device based on niobium oxide nanosheets (TS memristor device based on niobium oxide nanosheets), denoted as B4.
[0050] Electrical tests were performed on the TS memristor device based on niobium oxide nanosheets prepared in this embodiment. The IV characteristic diagram is shown below. Figure 3 As shown, the initial resistance state of the device is a high resistance state (R). HRS A low-resistance state (R) is formed after gradually applying voltage to reach the threshold trigger. LRS When the voltage is gradually reduced to the holding voltage, the device turns off and returns to a high-resistivity state, exhibiting typical bipolar threshold resistive switching behavior. Specifically, when a 5 V voltage is applied across the device, the threshold turn-on voltage (Vth) is approximately 3.3 V. th Under these conditions, the resistor transitions from a high-resistance state to a low-resistance state, and the current limit is set to 10 mA. When the voltage folds back to approximately 2.4 V, the holding voltage (V) is maintained. hold When a negative voltage of the same magnitude is applied, the resistance will spontaneously return from a low resistance state to a high resistance state. When a negative voltage of the same magnitude is applied, the IV diagram exhibits the same symmetry as the positive voltage, also known as the bidirectional threshold characteristic.
[0051] Comparative Example 1 Same as Example 1, except that the annealing temperature in S4 is 100°C, and the resulting TS memristor device based on niobium oxide nanosheets is denoted as B1.
[0052] Comparative Example 2 Same as Example 1, except that the annealing temperature in S4 is 200°C, and the resulting TS memristor device based on niobium oxide nanosheets is denoted as B2.
[0053] Comparative Example 3 Same as Example 1, except that the annealing temperature in S4 is 300°C, and the resulting TS memristor device based on niobium oxide nanosheets is denoted as B3.
[0054] Comparative Example 4 Same as Example 1, except that the annealing temperature in S4 is 500°C, and the resulting TS memristor device based on niobium oxide nanosheets is denoted as B5.
[0055] Comparative Example 5 Same as Example 1, except that the annealing temperature in S4 is 600°C, and the resulting TS memristor device based on niobium oxide nanosheets is denoted as B6.
[0056] Comparative Example 6 To investigate the performance of threshold-type devices prepared by different hydrothermal methods for niobium oxide nanosheets, this comparative example provides another method for preparing threshold-type devices using hydrothermal methods. The substrate cleaning and pretreatment and the preparation method of the top electrode layer are the same as in Example 1. The difference lies in the type of substrate, the preparation method of the bottom electrode layer and the functional layer of the niobium oxide nanosheets. The specific preparation process is as follows: First, the substrate is replaced with FTO conductive glass, and its conductive side is used as the bottom electrode layer. Then, niobium oxide nanosheets are directly grown by hydrothermal method. 1 g of NbCl5 is dissolved in 10 mL of ethanol. Under continuous stirring, 50 mL of 4wt% ammonia solution is added to the niobium pentachloride and ethanol solution. After the mixture is aged at room temperature for 2 h, the precipitate is separated by centrifugation and transferred to a 100 mL high-pressure reactor lined with polytetrafluoroethylene and pre-filled with 50 mL of deionized water. The FTO conductive glass is placed in the reactor as the substrate and subjected to hydrothermal reaction at 180 °C for 12 h. After the hydrothermal reaction was completed, the hydrothermal product was removed and dried at 60°C for 3 hours. It was then placed in a box furnace (purchased from Hefei Kejing Materials Technology Co., Ltd., model KSL-1100X) and annealed at 500°C for 2 hours. Finally, a top electrode layer with a thickness of 35 nm (composed of a 30 nm thick Ti transition layer and a 5 nm thick Au encapsulation layer, with the Au encapsulation layer on top and the Ti transition layer on the bottom) was prepared on the niobium oxide nanosheet functional layer by thermal evaporation, with the same conditions and parameters as in Example 1.
[0057] Compared to the preparation method of Example 1, the device prepared by Comparative Example 1 (direct hydrothermal growth of niobium oxide nanosheets) exhibits decreased performance. The core reason lies in the fact that its hydrothermal synthesis parameters lead to structural defects in the functional layer and deterioration of interfacial bonding performance. Specifically, the hydrothermal reaction time of Comparative Example 1 is only 12 hours, significantly shorter than the 24 hours of Example 1, resulting in insufficient crystallinity of the niobium oxide nanosheets, a high lattice defect density, and a significant reduction in charge transport efficiency. On the other hand, the nanosheets are grown directly on the FTO substrate without the addition of orientation modifiers and dispersants, resulting in anisotropic crystal growth. Due to the inherent characteristics, the nanosheets exhibit disordered orientation and uneven substrate coverage, with weak interfacial bonding between the substrate and the nanosheets. Furthermore, Comparative Example 1 employs high-temperature annealing at 500℃, which can lead to stress accumulation within the film. Coupled with the loose bonding between directly grown nanosheets, this results in poor film flatness and insufficient density after annealing, making it prone to aggregation. The superposition of these structural defects makes the device susceptible to local electric field concentration during electrical stimulation, which in turn causes film cracking, disrupts the continuity of the conductive path, and ultimately leads to a significant decrease in the device's core performance, such as on / off ratio and stability.
[0058] Figure 4 and Figure 5 The threshold voltage (V) of the TS memristor devices based on niobium oxide nanosheets prepared in Examples 1 and 5 of this invention is shown. th ), holding voltage (V) hold ) and high and low resistance states (R HRS With R LRS Statistical distribution chart.
[0059] Figure 6 The TS memristor devices based on niobium oxide nanosheets prepared in Examples 1 and 5 of this invention are shown below. th / V hold and R HRS / R LRS A comparative analysis chart of relative volatility (σ / μ).
[0060] Figure 7 The Nb(Nb) in the resistive switching layer of the TS memristor device based on niobium oxide nanosheets prepared in Examples 1 and 5 of this invention are shown. 4+ and Nb 5+ A comparison chart of the relative contents of O (lattice oxygen (O)) and O (lattice oxygen (O)). L ) and vacant oxygen (O M A comparison chart of the relative contents of ))
[0061] This invention analyzes the electrical performance of a blank control group and six groups of devices (B1 to B6, arranged according to temperature gradients) based on electrical test results. The analysis reveals that the unannealed devices, serving as the blank control group, exhibit significant performance defects. The devices suffer from poor thin-film surface uniformity, requiring a large forming voltage for the pre-activation process. Triggering only occurs when the threshold voltage reaches 16.5 V and the limiting current is approximately 100 mA, and the holding voltage must be maintained at around 10 V. After multiple voltage scans, the device performance becomes unstable, failing to exhibit repeatable bidirectional threshold behavior. Figures 4-7 The results show that in the low-temperature range, device B1, representing the lowest annealing temperature group, exhibits electrical parameters characterized by "high threshold and large dispersion," requiring a high limiting current of 70 mA to trigger the resistive switching. This indicates that NbO at low temperatures... x The amount of oxygen vacancies generated in the thin film is small and their distribution is extremely uneven, requiring a high electric field (high V). th It takes a high current (70 mA) to barely form a conductive channel, and the channel shape is prone to breakage, resulting in large parameter fluctuations.
[0062] As temperature increases, the parameters of device B2 exhibit a trend of "decreasing threshold and shrinking fluctuations," still requiring a 70 mA limiting current, but R... HRS The dispersion is significantly reduced because annealing at 200℃ promotes the desorption of some oxygen atoms to form oxygen vacancies, which reduces the difficulty of channel formation. However, the total amount of oxygen vacancies is still insufficient, and a high limiting current needs to be maintained to ensure channel stability.
[0063] Device B3 is in the medium temperature range, V th V hold The mean continues to decline, but a 70 mA limiting current is still required: Although annealing at 300°C makes the oxygen vacancy distribution more uniform, it is still insufficient to support channel conduction at low currents, and a high limiting current is required to compensate for carrier transport efficiency.
[0064] Device B4, operating in the high-temperature range, exhibits significantly improved performance, with the limiting current decreasing from 70 mA to 10 mA. Annealing at 400°C causes a sharp increase in oxygen vacancy concentration (vacancy oxygen percentage reaches 95.24%). (Nb...) 4+ The proportion reached a peak of 60.61%, with ample oxygen vacancies and Nb. 4+ It provides an efficient carrier path, forming a stable conductive channel without requiring a high confinement current, and V th The standard deviation is only 0.1 V, and the IV curves almost completely overlap.
[0065] Device B5's performance begins to degrade with increasing temperature; although the limiting current remains 10 mA, R... LRSThe average value is double that of B4; annealing at 500℃ causes slight oxidation of the film surface (lattice oxygen content slightly increases to 10.29%), forming an "oxidation barrier layer" in the conductive channels, requiring a higher voltage to trigger conduction, and V hold The rebound indicates that shutting down has become more difficult.
[0066] Device B6 is located in the ultra-high temperature range of 600℃, where degradation is further aggravated: excessive oxidation of the thin film (lattice oxygen content of 11.78%), Nb 4+ The proportion dropped to 59.76%, and the oxidation and consumption of oxygen vacancies led to a decrease in the stability of the conductive channel. LRS The dispersion (standard deviation 26.8 Ω) is significantly increased compared to B1; although it can still operate under a 10 mA limiting current, its overall performance is inferior to B4.
[0067] Based on the combined electrical performance (voltage, current, and fluctuation) and XPS characterization results, the B4 device annealed at 400℃ prepared in Example 1 exhibits the best performance, with its core advantages manifested in three aspects: First, the electrical parameters are optimal, V th (3.3 V), V hold (2.4 V) reaches its minimum value, limiting the current to 10 mA (low power consumption), and all parameters exhibit relative fluctuations of <5% (high stability); secondly, chemical state matching, Nb 4+ Percentage (60.61%), Vacant Oxygen Percentage (95.24%), Valence Band Top E V (5.05 eV) are all within the optimal range, forming a synergistic optimization of "oxygen vacancies-valence states-carriers"; third, the device fabrication process is feasible, requiring no high confinement current, reducing device power consumption, and exhibiting small fluctuations, achieving the expected goal of "low voltage-low current-low fluctuations," meeting the parameter stability requirements of subsequent functions such as signal response and image recognition. This result provides both experimental and theoretical evidence for the optimal process of "3-layer spin coating + 400℃ annealing temperature" for threshold (TS) memristor devices based on niobium oxide nanosheets.
[0068] Figure 8 This is a schematic diagram illustrating the retention characteristics of the TS memristor device based on niobium oxide nanosheets prepared in Example 1, with values ranging from 0 to 10. 4 The settling time is used as the test dimension, with the core being the high-resistivity state (R). HRS ) and low resistance state (R LRS The resistance change is used as the measurement parameter. Before testing, the device is placed in its corresponding resistive state. During the resting process, the resistance change is monitored in real time. It can be seen that the resistance retention rate of the high-resistance state is >96%, and only from 10 4 Ω slightly increased to 1.04×10 4 Ω; Low resistance state resistance retention rate >95%, from 2.40×102 Ω increased slightly to 2.57×10 2 The relative fluctuations of Ω and Ω were both <5%, with no significant decay or jump. This result confirms that the present invention, through synergistic regulation of the annealing process, stably confines oxygen vacancies in the functional layer of niobium oxide nanosheets, avoids resistance degradation, and demonstrates excellent resistance retention performance of the device, making it suitable for scenarios such as data storage and circuit protection that require long-term maintenance of the resistance state.
[0069] The above are merely preferred embodiments of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in the present invention should be included within the scope of protection of the present invention.
Claims
1. A threshold-type memristor device based on niobium oxide nanosheets, characterized in that, The functional layer is a niobium oxide nanosheet functional layer; The preparation process of the niobium oxide nanosheet functional layer is as follows: a dispersion containing niobium oxide nanosheets is spin-coated onto the surface of the bottom electrode layer and annealed at 400°C to obtain the niobium oxide nanosheet functional layer. The method for preparing the niobium oxide nanosheets includes the following steps: NbCl5 is added to anhydrous ethanol and stirred until completely dissolved. Then, water is added while stirring continuously to adjust the pH to 2-3. Ammonia is added dropwise, and hexadecyltrimethylammonium bromide is added. Stirring continues to obtain a stable milky white colloid. The stable milky white colloid is then subjected to hydrothermal treatment, and then naturally cooled to room temperature. The hydrothermally treated product is centrifuged, washed, and dried to obtain a loose powder. The loose powder is then annealed, and the annealed product is ground to obtain the niobium oxide nanosheets.
2. The threshold-type memristor device based on niobium oxide nanosheets according to claim 1, characterized in that, The threshold memristor device based on niobium oxide nanosheets consists of a substrate layer, a bottom electrode layer, a niobium oxide nanosheet functional layer, and a top electrode layer from bottom to top.
3. The threshold-type memristor device based on niobium oxide nanosheets according to claim 2, characterized in that, The thickness of the substrate layer is 300 nm ± 20 nm; the thickness of the bottom electrode layer is 90 nm ± 5 nm; the thickness of the niobium oxide nanosheet functional layer is 50 nm ± 5 nm; and the thickness of the top electrode layer is 35 nm ± 3 nm.
4. The threshold-type memristor device based on niobium oxide nanosheets according to claim 3, characterized in that, The bottom electrode layer is composed of an adhesive layer Ti layer and a conductive layer Pt layer, wherein the conductive layer Pt layer is on top and the adhesive layer Ti layer is on the bottom. And / or, the top electrode layer consists of a Ti transition layer and an Au encapsulation layer, wherein the Au encapsulation layer is on top and the Ti transition layer is on the bottom.
5. A method for fabricating a threshold-type memristor device based on niobium oxide nanosheets as described in any one of claims 1 to 4, characterized in that, First, a bottom electrode layer is grown on a substrate using magnetron sputtering. Then, a dispersion containing niobium oxide nanosheets is spin-coated onto the bottom electrode layer, dried, and annealed to obtain the niobium oxide nanosheet functional layer. Finally, a top electrode layer is prepared on the niobium oxide nanosheet functional layer using thermal evaporation vacuum deposition.
6. The method for fabricating a threshold-type memristor device based on niobium oxide nanosheets according to claim 5, characterized in that, Before growing the bottom electrode layer on the substrate, the process also includes cleaning the silicon substrate and drying it with nitrogen.
7. The method for fabricating a threshold-type memristor device based on niobium oxide nanosheets according to claim 5, characterized in that, The conditions for magnetron sputtering are: the chamber background vacuum is less than 5 × 10⁻⁶. -4 Pa; Ti metal target purity is 99.99%, corresponding to a sputtering power of 100 W; Pt metal target purity is 99.99%, corresponding to a sputtering power of 150 W.
8. The method for fabricating a threshold-type memristor device based on niobium oxide nanosheets according to claim 5, characterized in that, The concentration of the dispersion containing niobium oxide nanosheets is 0.19 mol / L.
9. The method for fabricating a threshold-type memristor device based on niobium oxide nanosheets according to claim 5, characterized in that, The conditions for the thermal evaporation vacuum deposition method are: the background vacuum degree of the chamber is less than 3 × 10⁻⁶. -4 Pa; the purity of the Ti wire vapor deposition material is 99.99%, corresponding to a heating current of 160 A; the purity of the Au wire vapor deposition material is 99.99%, corresponding to a heating current of 90 A.
10. The application of a threshold-type memristor device based on niobium oxide nanosheets as described in any one of claims 1 to 4 in the fabrication of a neuron simulation unit for neuromorphic computing, a logic operation unit for circuit overvoltage protection elements, or a logic operation unit for low-power flexible electronic devices.