Support plate structure, preparation method of support plate structure and mobile terminal

Abstract

The embodiment of the invention provides a carrier plate structure, a preparation method of the carrier plate structure and a mobile terminal. The carrier plate structure comprises a substrate, the substrate comprises a first surface and a second surface which are oppositely arranged in the thickness direction of the carrier plate structure, at least one of the first surface and the second surface is provided with a first groove, and the substrate further comprises at least one through hole penetrating through the first surface and the second surface; the conductive columns are filled in the through holes; the first groove is filled with the conductive part, the conductive part is electrically connected with at least one conductive column, and the surface, away from one side of the bottom of the first groove, of the conductive part is flush with the first surface or the second surface. According to the embodiment of the invention, the processing performance of the support plate structure can be improved.

Description

Technical Field

[0001] This application relates to the field of integrated circuit equipment technology, and in particular to a carrier board structure, a method for preparing the carrier board structure, and a mobile terminal. Background Technology

[0002] The carrier board structure for integrated circuits (ICs), also known as the IC packaging carrier board, is used directly to mount the integrated circuit. It not only provides support and protection for the IC but also enables the connection between the IC and the printed circuit board (PCB). In short, the carrier board structure is a core element for supporting integrated circuits and enabling high-speed communication and effective heat dissipation between the IC and the external environment.

[0003] In current carrier board structures, the mismatch in thermal expansion coefficients between the substrate and conductive materials causes circuit misalignment during processing. Furthermore, with repeated layer-addition processes on the substrate, the number of subsequent processing layers is large, resulting in a thicker carrier board structure that is difficult to meet process performance requirements. Summary of the Invention

[0004] This application provides a carrier plate structure, a method for preparing the carrier plate structure, and a mobile terminal, aiming to improve the process performance of the carrier plate structure.

[0005] An embodiment of the first aspect of this application provides a carrier plate structure, the carrier plate structure comprising: A substrate includes a first surface and a second surface disposed opposite to each other along its thickness direction, at least one of the first surface and the second surface is provided with a first groove, and the substrate further includes at least one through hole penetrating the first surface and the second surface; A conductive post, wherein the conductive post fills the through hole; A conductive portion is filled in the first groove and electrically connected to at least one of the conductive posts, and the surface of the conductive portion on the side opposite to the bottom of the first groove is flush with the first surface or the second surface.

[0006] According to the embodiment described in the first aspect of this application, both the first surface and the second surface have the first groove; The conductive part includes a first conductive part and a second conductive part; The first conductive part is filled in the first groove on the first surface and electrically connected to at least one of the conductive pillars, and the surface of the first conductive part facing away from the bottom of the first groove is flush with the first surface. The second conductive portion fills the first groove on the second surface and is electrically connected to at least one of the conductive pillars, and the surface of the second conductive portion on the side opposite to the bottom of the first groove is flush with the second surface.

[0007] According to any of the foregoing embodiments of the first aspect of this application, the first groove on the first surface and the first groove on the second surface are offset along a direction parallel to the plane where the substrate is located.

[0008] According to any of the foregoing embodiments of the first aspect of this application, the first groove includes a plurality of sub-grooves and a plurality of connecting grooves, the plurality of sub-grooves are spaced apart, and two adjacent sub-grooves are connected through the connecting grooves, wherein the dimension of the connecting groove in the thickness direction of the substrate is smaller than the dimension of the sub-grooves in the thickness direction of the substrate. The conductive part includes multiple main body parts and multiple connecting parts. The main body parts are filled in the sub-groove, and the connecting parts are filled in the connecting groove. Two adjacent main body parts are electrically connected through the connecting parts.

[0009] According to any of the foregoing embodiments of the first aspect of this application, the conductive portion includes a first seed material and a first conductive material, wherein the first seed material covers the wall of the first groove and the first conductive material fills the first groove.

[0010] According to any of the foregoing embodiments of the first aspect of this application, the carrier plate structure further includes a first additional layer. The first added layer includes a first insulating layer and a third conductive portion. The first insulating layer is disposed on the first surface and / or the second surface, and has a second groove, the second groove being located on the side of the first insulating layer opposite to the first surface and / or the second surface. The first insulating layer further has at least one first through-hole disposed through the first insulating layer along the thickness direction of the substrate; The third conductive portion fills the second groove and the first through hole, and is electrically connected to the conductive post.

[0011] According to any of the foregoing embodiments of the first aspect of this application, the first augmentation layer has multiple layers, and the multiple layers of the first augmentation layer are stacked in a direction away from the first surface and / or the second surface, and adjacent two layers of the first augmentation layer are electrically connected through a third conductive portion in the first via.

[0012] According to any of the foregoing embodiments of the first aspect of this application, the third conductive portion includes a second seed material and a second conductive material, the second seed material covering the wall of the second groove and the wall of the first through hole, and the second conductive material filling the second groove and the first through hole.

[0013] A second aspect of this application provides a method for preparing a carrier plate structure, the method comprising: A substrate is provided, the substrate including a first surface and a second surface disposed opposite to each other along its thickness direction; Along the thickness direction of the substrate, at least one through-hole is formed in the substrate, and a first groove is formed on the first surface and / or the second surface of the substrate; wherein the first groove and at least one of the through-holes are in communication. A conductive post is prepared in the through hole, and a conductive part is prepared in the first groove. The conductive part and the conductive post are electrically connected, and the surface of the conductive part on the side away from the bottom of the first groove is flush with the first surface or the second surface.

[0014] According to the embodiment described in the second aspect of this application, the steps of preparing the conductive pillar in the through hole and preparing the conductive portion in the first groove include: A first seed material is formed on the substrate to cover the hole wall, the wall of the first groove, the first surface, and the second surface; A first conductive material is formed in the through hole, the first groove, the first surface, and the second surface. The first seed material and the first conductive material in the through hole form the conductive pillar, and the first seed material and the first conductive material in the first groove form the conductive part. Remove the first seed material and the first conductive material from the first surface and the second surface.

[0015] According to any of the foregoing embodiments of the second aspect of this application, after the steps of preparing a conductive pillar in the through hole and preparing a conductive portion in the first groove, the method further includes: Prepare a first insulating layer on one side of the temporary stage; A second groove and at least one first through hole are formed on the side of the first insulating layer away from the temporary stage. The second groove and the first through hole are connected in a direction parallel to the surface of the substrate. The first through hole is connected to the through hole in the thickness direction of the substrate. A second seed material is formed on the first insulating layer, covering the wall of the second groove, the hole wall of the first through hole, and the surface of the first insulating layer facing away from the temporary platform. A second conductive material is filled into the second groove and the first through hole, and the second seed material and the second conductive material in the second groove and the first through hole form a third conductive part; Remove the temporary platform and adhere the first insulating layer to the first surface and / or the second surface, and use conductive adhesive to connect the third conductive part in the first through hole to the conductive post.

[0016] According to any of the foregoing embodiments of the second aspect of this application, the step of forming a second groove and at least one first through-hole extending through the first insulating layer along the thickness direction of the substrate on the side of the first insulating layer opposite to the temporary stage further includes: A first photoresist is applied to the side of the first insulating layer facing away from the temporary stage; The first photoresist is patterned to form a first photoresist opening and a first photoresist residue surrounding the first photoresist opening, and to form a first blind hole and a second photoresist residue surrounding the first blind hole, wherein the first photoresist opening exposes at least a portion of the first insulating layer. The first insulating layer is patterned through the first photoresist opening to form the first via on the first insulating layer, and the first insulating layer is patterned through the first blind via to form the second groove on the first insulating layer.

[0017] According to any of the foregoing embodiments of the second aspect of this application, the step of filling the second groove and the first through hole with a second conductive material further includes: A second photoresist is applied to the surface of the second seed material on the side opposite to the temporary stage; The second photoresist is patterned to form a second photoresist opening and a third photoresist residue surrounding the second photoresist opening, the second photoresist opening exposing the second seed material in the second groove and the first via. The second conductive material is formed in the second groove and the first through hole; The third photoresist residue and the second seed material on the surface of the first insulating layer away from the temporary stage are removed. The second seed material and the second conductive material in the second groove and the first via form the third conductive portion.

[0018] A third aspect of this application also provides a mobile terminal, including the carrier plate structure described in any embodiment of the first aspect of this application, or a carrier plate structure obtained by a method for preparing the carrier plate structure described in any embodiment of the second aspect of this application.

[0019] In this embodiment, the substrate has a first surface and a second surface disposed opposite to each other along the thickness direction. At least one of the first surface and the second surface is provided with a first groove. The substrate also has at least one through-hole penetrating the first surface and the second surface. A conductive post fills the through-hole, and the through-hole communicates with the first groove to ensure the continuity of the electrical path. A conductive portion fills the corresponding first groove and is electrically connected to at least one conductive post, thereby forming a stable conductive pattern on the first surface and / or the second surface of the substrate. By providing a first groove on the first surface and / or the second surface of the substrate to fill the conductive portion, and the surface of the conductive portion facing away from the bottom of the first groove is flush with the first surface or the second surface, the number of layers in the conventional process is reduced. The portion of the substrate close to the first surface and / or the second surface directly acts as an insulating layer in the layering, which can reduce the thickness of the substrate structure. At the same time, since the conductive portion is embedded inside the substrate, compared with the conventional method of directly patterning metal on the surface of the substrate, the thermal stress displacement caused by the difference in the coefficient of thermal expansion between the conductive portion and the substrate under temperature changes is reduced, which improves the mechanical stability and electrical reliability of the substrate structure when connecting integrated circuits and printed circuit boards, and improves the process performance. Attached Figure Description

[0020] Other features, objects, and advantages of this application will become more apparent from the following detailed description of non-limiting embodiments with reference to the accompanying drawings, wherein the same or similar reference numerals denote the same or similar features.

[0021] Figure 1 This is a partial cross-sectional view of a carrier plate structure provided in an embodiment of this application; Figure 2 This is a schematic flowchart of a method for preparing a carrier plate structure according to a second aspect embodiment of this application; Figure 3 This is one of the illustrations showing the fabrication process of a carrier plate structure provided in the second aspect embodiment of this application; Figure 4 This is a schematic flowchart of a method for preparing a carrier plate structure according to another embodiment of the second aspect of this application; Figure 5 This is the second illustration of the fabrication process of a carrier plate structure provided in the second aspect of this application; Figure 6 This is the third illustration of the fabrication process of a carrier plate structure provided in the second aspect embodiment of this application; Figure 7This is a schematic flowchart of a method for preparing a carrier plate structure according to another embodiment of the second aspect of this application; Figure 8 This is the fourth illustration of the fabrication process of a carrier plate structure provided in the second aspect embodiment of this application; Figure 9 This is the fifth illustration of the fabrication process of a carrier plate structure provided in the second aspect embodiment of this application; Figure 10 This is the sixth illustration of the fabrication process of a carrier plate structure provided in the second aspect embodiment of this application; Figure 11 This is the seventh illustration of the fabrication process of a carrier plate structure provided in the second aspect embodiment of this application; Figure 12 This is the eighth illustration of the fabrication process of a carrier plate structure provided in the second aspect embodiment of this application; Figure 13 This is the ninth illustration of the fabrication process of a carrier plate structure provided in the second aspect embodiment of this application; Figure 14 This is a schematic flowchart of a method for preparing a carrier plate structure according to another embodiment of the second aspect of this application; Figure 15 This is the tenth illustration of the fabrication process of a carrier plate structure provided in the second aspect embodiment of this application; Figure 16 This is Figure eleven illustrating the fabrication process of a carrier plate structure provided in the second aspect of this application. Figure 17 This is a schematic flowchart of a method for preparing a carrier plate structure according to another embodiment of the second aspect of this application; Figure 18 This is the twelfth illustration of the fabrication process of a carrier plate structure provided in the second aspect of this application.

[0022] Explanation of reference numerals in the attached figures: 1. Substrate; 11. First surface; 12. Second surface; 111. First groove; 13. Through hole; 2. Conductive post; 21. First seed material; 22. First conductive material; 3. Conductive part; 31. First conductive part; 32. Second conductive part; 301. Second seed material; 302. Second conductive material; 4. First reinforcement layer; 41. First insulating layer; 42. Third conductive part; 411. Second groove; 412. First via; 5. Solder part; 100 Temporary stage; 200 Support film; 300 First photoresist; 310 First photoresist opening; 320 First photoresist residue; 330 First blind via; 340 Second photoresist residue; 400 Second photoresist; 410 Second photoresist opening; 420 Third photoresist residue. Detailed Implementation

[0023] The features and exemplary embodiments of various aspects of this application will now be described in detail. Numerous specific details are set forth in the following detailed description to provide a comprehensive understanding of this application. However, it will be apparent to those skilled in the art that this application can be implemented without requiring some of these specific details. The following description of embodiments is merely intended to provide a better understanding of this application by illustrating examples. In the accompanying drawings and the following description, at least some well-known structures and techniques are not shown to avoid unnecessarily obscuring the application; and, for clarity, the dimensions of some structures may be exaggerated. Furthermore, the features, structures, or characteristics described below can be combined in any suitable manner in one or more embodiments.

[0024] In the description of this application, it should be noted that, unless otherwise stated, "a plurality of" means two or more; the terms "upper," "lower," "left," "right," "inner," "outer," etc., indicating orientation or positional relationships are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation on this application. Furthermore, the terms "first," "second," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0025] The directional terms appearing in the following description refer to the directions shown in the figures and are not intended to limit the specific structure of the embodiments of this application. It should also be noted in the description of this application that, unless otherwise explicitly specified and limited, the terms "installation" and "connection" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a direct connection or an indirect connection. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.

[0026] The carrier board structure for integrated circuits (ICs), also known as the IC packaging carrier board, is used directly to mount the integrated circuit. It not only provides support and protection for the IC but also enables the connection between the IC and the printed circuit board (PCB). In short, the carrier board structure is a core element for supporting integrated circuits and enabling high-speed communication and effective heat dissipation between the IC and the external environment.

[0027] However, the packaging technology of integrated circuits is not yet mature. The mismatch of thermal expansion coefficients between the substrate and conductive materials causes circuit misalignment during the processing. Furthermore, with repeated layer-addition processes on the substrate, the number of subsequent processing layers is large, making the process difficult. The thickness of the carrier board structure is also relatively thick, which makes it difficult to meet the packaging requirements.

[0028] To better understand this application, the following will be combined with... Figures 1 to 18 The carrier plate structure, the method for preparing the carrier plate structure, and the mobile terminal of the embodiments of this application are described in detail.

[0029] like Figure 1 As shown, this application embodiment provides a carrier plate structure, which includes: a substrate 1 having a first surface 11 and a second surface 12 disposed opposite to each other along its thickness direction, at least one of the first surface 11 and the second surface 12 having a first groove 111, and the substrate 1 further including at least one through hole 13 penetrating the first surface 11 and the second surface 12; a conductive post 2 filling the through hole 13; and a conductive portion 3 filling the first groove and electrically connected to at least one conductive post, wherein the surface of the conductive portion facing away from the bottom of the first groove is flush with the first surface or the second surface.

[0030] In this embodiment, the substrate 1 has a first surface 11 and a second surface 12 disposed opposite to each other along the thickness direction, wherein at least one of the first surface 11 and the second surface 12 is provided with a first groove 111, and the substrate 1 is also provided with at least one through hole 13 penetrating the first surface and the second surface. The conductive post 2 fills the through hole 13, and the through hole 13 communicates with the first groove 111 to ensure the continuity of the electrical path; the conductive part 3 fills the corresponding first groove 111 and is electrically connected to at least one conductive post 2, thereby forming a stable conductive pattern on the first surface 11 and / or the second surface 12 of the substrate. By providing a first groove 111 on the first surface 11 and / or the second surface 12 of the substrate 1 to fill the conductive portion 3, and having the surface of the conductive portion 3 facing away from the bottom of the first groove 111 flush with the first surface 11 or the second surface 12, the number of layers in the conventional process is reduced. The portion of the substrate 1 near the first surface 11 and / or the second surface 12 directly serves as an insulating layer in the process, which can reduce the thickness of the carrier board structure. At the same time, since the conductive portion 3 is embedded inside the substrate 1, compared with the conventional method of directly patterning metal on the surface of the substrate 1, the thermal stress displacement caused by the difference in thermal expansion coefficients between the conductive portion 3 and the substrate 1 under temperature changes is reduced, which improves the mechanical stability and electrical reliability of the carrier board structure when connecting integrated circuits and printed circuit boards, and enhances the process performance.

[0031] Optionally, the first groove 111 can be formed by etching, laser processing or other microfabrication processes.

[0032] Optionally, substrate 1 includes at least one of glass substrate, silicon substrate, ceramic substrate, polymer substrate, etc.

[0033] Optionally, substrate 1 can be a glass substrate. Exemplarily, substrate 1 is at least one of borosilicate glass, aluminoborosilicate glass, quartz glass, alkali-free glass, and alkaline glass. Specifically, glass substrates not only possess advantages in material properties such as high modulus, high flatness, a wide coefficient of thermal expansion, and good chemical and high-temperature resistance, but also optical and mechanical advantages. This not only facilitates the smooth progress of laser processing but also meets the high-precision manufacturing requirements of semiconductor devices, reducing the impact on chip performance and packaging quality caused by dimensional deviations and / or damage to the carrier board during chip stacking and other processes.

[0034] Optionally, when substrate 1 is a glass substrate, via 13 is a through-glass via (TGV). A TGV is a structure that achieves electrical interconnection through holes in the glass substrate 1, similar to a through-silicon via (TSV), and has the capability for three-dimensional interconnection. The glass substrate has a lower dielectric constant, lower dielectric loss, and greater mechanical strength, which can improve the processing performance of the substrate structure.

[0035] Optionally, the conductive post 2 may be made of a metallic material, such as, but not limited to, at least one of copper (Cu), aluminum (Al), nickel (Ni), gold (Au), tin (Sn), silver (Ag).

[0036] Optionally, the conductive part 3 includes a metallic material, such as, but not limited to, at least one of copper (Cu), aluminum (Al), nickel (Ni), gold (Au), tin (Sn), silver (Ag).

[0037] Optionally, the material of the conductive part 3 is the same as that of the conductive post 2 to simplify the manufacturing process.

[0038] The conductive pillar 2 and the conductive part 3 can be formed in the first groove 111 or the through hole 13 by means of electroplating or deposition.

[0039] Optionally, the projection shape of the first groove 111 along the thickness direction of the carrier plate structure is the same as the projection shape of the conductive part 3 along the thickness direction of the carrier plate structure. That is, the conductive part 3 completely fills the first groove 111 to ensure the mechanical stability of the conductive part 3, and the groove wall of the first groove 111 limits the conductive part 3 to reduce the thermal stress displacement caused by the difference in thermal expansion coefficient between the conductive part 3 and the substrate 1 under temperature changes.

[0040] Optionally, the projected shape of the first groove 111 is irregular. For example, the first groove 111 may include multiple deep grooves and shallow grooves connecting the deep grooves. The conductive part 3 includes multiple main parts and connecting parts connecting the main parts. The main parts are embedded in the deep grooves, and the connecting parts are embedded in the shallow grooves. At least a portion of the bottom of the first groove 111 is connected to the wall of the through hole 13, that is, the first groove 111 and the through hole 13 are connected, thereby realizing the electrical signal transmission between the conductive part 3 and the conductive post 2.

[0041] Alternatively, the depth of the shallow groove used for the embedded connector can be the same as the depth of the deep groove used for the embedded main body to simplify the manufacturing process.

[0042] In some alternative embodiments, such as Figure 1 As shown, both the first surface 11 and the second surface 12 have a first groove 111; the conductive part 3 includes a first conductive part 31 and a second conductive part 32, wherein the first conductive part 31 fills the first groove 111 on the first surface 11 and is electrically connected to at least one conductive post 2, and the surface of the first conductive part 31 facing away from the bottom of the first groove 111 is flush with the first surface 11; the second conductive part 32 fills the first groove 111 on the second surface 12 and is electrically connected to at least one conductive post 2, and the surface of the second conductive part 32 facing away from the bottom of the first groove 111 is flush with the second surface 12.

[0043] In these optional embodiments, the first conductive portion 31 is filled in the first groove 111 on the first surface 11, and the surface of the first conductive portion 31 facing away from the bottom of the first groove 111 is flush with the first surface 11. The second conductive portion 32 is filled in the first groove 111 on the second surface 12, and the surface of the second conductive portion 32 facing away from the bottom of the first groove 111 is flush with the second surface 12. This allows the first conductive portion 31 to directly form an augmentation layer on the part of the substrate 1 near the first surface 11, and the second conductive portion to directly form another augmentation layer on the part of the substrate 1 near the second surface 12. This eliminates the need for the preparation of the insulating layer in the two augmentation layers, further reducing the thickness of the entire substrate structure and simplifying the manufacturing process. At the same time, since the first conductive portion 31 and the second conductive portion 32 are respectively embedded inside the substrate 1, compared with the traditional method of directly patterning metal on the two surfaces of the substrate 1, the thermal stress displacement caused by the difference in the coefficient of thermal expansion of the first conductive portion 31 and the second conductive portion 32 on the two surfaces of the substrate 1 under temperature changes is reduced, improving the mechanical stability and electrical reliability of the substrate structure when connecting integrated circuits and printed circuit boards.

[0044] The first conductive part 31 and the second conductive part 32 are located on both sides of the substrate 1, and both are electrically connected to the conductive post 2, thereby realizing the electrical interconnection between the first conductive part 31 and the second conductive part 32 through the conductive post 2.

[0045] In some alternative embodiments, such as Figure 1 As shown, the plurality of first grooves 111 on the first surface 11 and the plurality of first grooves 111 on the second surface 12 are staggered along a direction parallel to the plane where the substrate 1 is located, so as to ensure the mechanical strength and structural stability of the substrate 1. At the same time, it can avoid the phenomenon of electrical short circuit caused by the first grooves 111 on the first surface 11 and the second surface 12 penetrating each other due to manufacturing errors, thereby improving the electrical stability of the carrier board structure.

[0046] In some optional embodiments, the first groove 111 includes a plurality of sub-grooves and a plurality of connecting grooves. The plurality of sub-grooves are spaced apart, and two adjacent sub-grooves are connected through the connecting grooves. The dimension of the connecting groove in the thickness direction of the substrate 1 is smaller than the dimension of the sub-grooves in the thickness direction of the substrate 1. The conductive part 3 includes a plurality of main parts and a plurality of connecting parts. The main parts are filled in the corresponding sub-grooves, and the connecting parts are filled in the corresponding connecting grooves. Two adjacent main parts are electrically connected through the connecting parts.

[0047] In this embodiment, the bottom of the connecting groove can be connected to the wall of the through hole 13, or the bottom of the sub-groove can be connected to the wall of the through hole 13. There is no specific limitation here, as long as it ensures that the conductive part 3 in the first groove 111 can connect to the conductive post 2 in the through hole 13. The connecting groove is made relatively shallow so that the surface of the connecting part is flush with the surface of the main body, ensuring the flatness of the conductive part 3. In this embodiment, the connecting part acts as a conductor electrically connecting the various main body parts. The sub-groove has sufficient depth to allow deposition or electroplating of the main body part, ensuring the electrical connection performance of the main body part.

[0048] Optionally, the conductive part 3 includes a first seed material 21 and a first conductive material 22, wherein the first seed material 21 covers the wall of the first groove 111 and the first conductive material 22 fills the first groove 111.

[0049] The first seed material 21 can be made of copper or titanium. The first conductive material 22 can be made of at least one of copper (Cu), aluminum (Al), nickel (Ni), gold (Au), tin (Sn), and silver (Ag). The first seed material 21 ensures the smooth progress of the electroplating process, and the first conductive material 22 is electroplated on the first seed material 21 and fills the first groove 111.

[0050] In some alternative embodiments, such as Figure 1As shown, the carrier board structure also includes a first extension layer 4, wherein the first extension layer 4 includes a first insulating layer 41 and a third conductive portion 42. The first insulating layer 41 is fixedly disposed on the first surface 11 and / or the second surface 12, and has a second groove 411. The second groove 411 is located on the side of the first insulating layer 41 away from the first surface 11 or the second surface 12. The first insulating layer 41 has at least one first through hole 412 disposed through the first insulating layer 41 along the thickness direction of the substrate 1. The third conductive portion 42 fills the second groove 411 and the first through hole 412, and is electrically connected to the conductive post 2.

[0051] In these optional embodiments, a first reinforcement layer 4 can be formed on the first surface 11 and / or the second surface 12 of the substrate 1. The third conductive portion 42 of the first reinforcement layer 4 further ensures the electrical interconnection between the integrated circuit and the printed circuit board. The substrate 1 can provide good support for the first reinforcement layer 4 to improve the stability of the relative position between the third conductive portion 42 and the first insulating layer 41. The first insulating layer 41 has a first via 412, and the third conductive portion 42 fills the first via 412 to electrically connect with the conductive pillar 2 and the wires of other reinforcement layers through the conductive material in the first via 412. Optionally, the third conductive portion 42 includes a second seed material 301 and a second conductive material 302. The second seed material 301 covers the wall of the second groove 411 and the hole wall of the first via 412, and the second conductive material 302 fills the second groove 411 and the first via 412. The second seed material 301 covers the wall of the second groove 411 and the hole wall of the first via 412 to facilitate the electroplating process. During preparation, an electroplating process can be used to electroplat the second conductive material 302 onto the second seed material 301. The second seed material 301 and the second conductive material 302 form the third conductive part 42.

[0052] Optionally, a second groove 411 can be formed on the surface of one side of the first insulating layer 41 by means of laser etching, photolithography, etc.

[0053] Optionally, the third conductive part 42 may be made of the same material as the first conductive part 31 and / or the second conductive part 32 to simplify the manufacturing process.

[0054] Optionally, the material of the first insulating layer 41 includes a polymer so that the first layer 4 can be well attached to the first surface 11 or the second surface 12 of the substrate 1.

[0055] Optionally, the material of the first insulating layer 41 includes non-photosensitive polyimide.

[0056] In some alternative embodiments, such as Figure 1As shown, the first layer 4 has multiple layers, and the multiple layers of the first layer 4 are stacked in a direction away from the first surface 11 or the second surface 12. The third conductive part 42 of adjacent two layers of the first layer 4 are connected by a via.

[0057] The metal patterns of the third conductive portion 42 of each first augmentation layer 4 can be the same or different, and there is no specific limitation on this. Optionally, after the conductive portion 3 is prepared, the first first augmentation layer 4 can be prepared directly on the first surface 11 or the second surface 12, and then the second first augmentation layer 4 can be prepared on the surface of the first first augmentation layer 4, and so on. Alternatively, each first augmentation layer 4 can be prepared on the temporary stage 100 firstly, and then the first augmentation layers 4 can be bonded together by adhesives. Conductive adhesive is used between the conductive post 2 and the first via 412, and between adjacent first vias 412, to ensure the electrical connection between each first augmentation layer 4 and between the first augmentation layer 4 and the conductive post 2.

[0058] Optionally, the conductive adhesive is a conductive anisotropic adhesive, ensuring electrical conductivity only in the thickness direction of the carrier plate structure, and not in the planar direction.

[0059] Please see Figure 1 and Figure 2 The second aspect of this application also provides a method for preparing a carrier plate structure, such as... Figure 2 As shown, the method includes: Step S01: Provide a substrate 1, which includes a first surface 11 and a second surface 12 disposed opposite to each other along its thickness direction.

[0060] Step S02: Along the thickness direction of substrate 1, at least one through-hole 13 is formed in substrate 1, penetrating substrate 1; simultaneously, a first groove 111 is formed on the first surface 11 and / or the second surface 12 of substrate 1; wherein the first groove 111 communicates with at least one through-hole 13. (See reference...) Figure 3 .

[0061] Step S03: Prepare a conductive post 2 in the through hole 13 and prepare a conductive part 3 in the first groove 111. The conductive part 3 and the conductive post 2 are electrically connected. The surface of the conductive part 3 facing away from the bottom of the first groove 111 is flush with the first surface 11 or the second surface 12.

[0062] In this embodiment, a substrate 1 is first provided in step S01. The substrate 1 includes a first surface 11 and a second surface 12 disposed opposite to each other along its thickness direction. Then, in step S02, at least one through hole 13 is formed in the substrate 1 through the thickness direction of the substrate 1, and a first groove 111 is formed in the first surface 11 and / or the second surface 12. The first groove 111 and at least one through hole 13 are connected to ensure that the conductive pillar 2 and conductive part 3 prepared subsequently can be electrically connected. Next, in step S03, the conductive pillar 2 is prepared in the through hole, and the conductive part 3 is prepared in the first groove 111. The conductive part 3 and the conductive pillar 2 are electrically connected, and the surface of the conductive part 3 facing away from the bottom of the first groove 111 is flush with the first surface 11 or the second surface 12. The carrier board structure prepared by this method has a first groove 111 formed on the first surface 11 and / or the second surface 12 of the substrate 1 to fill the conductive part 3. The surface of the conductive part 3 facing away from the bottom of the first groove 111 is flush with the first surface 11 or the second surface 12. This reduces the number of layers in the traditional process. The part of the substrate 1 near the first surface 11 and / or the second surface 12 directly acts as an insulating layer in the layering, which can reduce the thickness of the carrier board structure. At the same time, since the conductive part 3 is filled inside the substrate 1, compared with the traditional method of directly patterning metal on the surface of the substrate 1, the thermal stress displacement caused by the difference in thermal expansion coefficient between the conductive part 3 and the substrate 1 under temperature changes is reduced. This improves the mechanical stability and electrical reliability of the carrier board structure when connecting integrated circuits and printed circuit boards, and enhances the process performance.

[0063] Optionally, the method for forming the via 13 includes at least one of laser-induced wet etching, laser ablation, focused discharge machining, plasma etching, electrochemical discharge machining, and sandblasting. In this embodiment, laser-induced wet etching is preferably used to form the via 13 on the substrate 1. Optionally, the cross-sectional shape of the via 13 parallel to the direction of the via 13 includes rectangular, trapezoidal, circular, and X-shaped shapes, etc., and is not limited thereto in this application.

[0064] In some alternative embodiments, such as Figure 4 As shown, in step S03: Step S031: Form a first seed material 21 on the substrate 1 covering the hole wall of the through hole 13, the wall of the first groove 111, the first surface 11, and the second surface 12. (See reference...) Figure 5 .

[0065] Step S032: A first conductive material 22 is formed in the through hole 13, the first groove 111, the first surface 11 and the second surface 12. The first seed material 21 and the first conductive material 22 in the through hole 13 form a conductive pillar 2, and the first seed material 21 and the first conductive material 22 in the first groove 111 form a conductive part 3.

[0066] Step S033: Remove the first seed material 21 and the first conductive material 22 from the first surface 11 and the second surface 12. Steps S032 and S033 can be found in [reference needed]. Figure 6 .

[0067] In these optional embodiments, after the first groove 111 and the through hole 13 are prepared, a first seed material 21 covering the hole wall of the through hole 13, the wall of the first groove 111, the first surface 11, and the second surface 12 is first formed on the substrate 1 through step SO31. Specifically, this step can be completed using a magnetron sputtering process. The first seed material 21 is sputtered onto the hole wall of the through hole 13 and the wall of the first groove 111 to facilitate the adhesion of the first conductive material 22. The first seed material 21 of the hole wall of the through hole 13 and the first seed material 21 of the wall of the first groove 111 can be the same so that they can be sputtered simultaneously.

[0068] Next, in step SO32, a first conductive material 22 is formed in the through hole 13, the first groove 111, the first surface 11 and the second surface 12. The first seed material 21 and the first conductive material 22 in the through hole form a conductive pillar 2, and the first seed material 21 and the first conductive material 22 in the first groove 111 form a conductive part 3. Finally, in step S033, the first seed material 21 and the first conductive material 22 on the first surface 11 and the second surface 12 are removed, thereby simultaneously completing the fabrication of the conductive pillar 2 and at least one layered circuit on the substrate 1.

[0069] In step S033, grinding, laser stripping or other methods can be used to remove the first seed material 21 and the first conductive material 22 remaining on the first surface 11 and the second surface 12.

[0070] Optionally, the first seed material 21 is a metallic material, such as titanium or copper.

[0071] Optionally, the methods for preparing the first seed material 21 include, but are not limited to, physical vapor deposition (PVD), vapor deposition, and electroless plating.

[0072] In some alternative embodiments, such as Figure 7 As shown, step S04 is included after step S03: Step S041: Prepare a first insulating layer 41 on one side of the temporary stage 100, such as... Figure 8 As shown.

[0073] Step S042: A second groove 411 and at least one first through-hole 412 are formed on the side of the first insulating layer 41 opposite to the temporary stage 100. The second groove 411 and the first through-hole 412 are connected in a direction parallel to the surface of the substrate 1. The first through-hole 412 is connected to the through-hole 13 in the thickness direction of the substrate 1. Figure 9 As shown.

[0074] Step S043: A second seed material 301 is formed on the first insulating layer 41, covering the wall of the second groove 411, the wall of the first through hole 412, and the surface of the first insulating layer 41 facing away from the temporary stage 100. (See reference...) Figure 10 .

[0075] Step S044: Fill the second groove 411 and the first through hole 412 with a second conductive material 302. The second seed material 301 and the second conductive material 302 in the second groove 411 and the first through hole 412 form the third conductive part 42. (See reference) Figure 11 .

[0076] Step S045: Remove the temporary stage 100 and adhere the first insulating layer 41 to the first surface 11 and / or the second surface 12, and use conductive adhesive to connect the third conductive portion 42 within the first through-hole 412 to the conductive post 2. (See reference...) Figure 12 .

[0077] In these optional embodiments, the steps of forming a first groove 111 and a through hole 13 on the substrate 1, and preparing a conductive part 3 in the first groove 111 and a conductive post 2 in the through hole 13 can be performed simultaneously with steps S041 to S045, without any order, which can improve the preparation efficiency. The first enhancement layer 4 is prepared on the temporary stage 100, which can reduce the risk of substrate 1 cracking compared to preparing it directly on the substrate 1. In this embodiment, the preparation of the first enhancement layer 4 can first prepare a first insulating layer 41 on one side of the temporary stage 100 through step S041, and then form a second seed material 301 on the first insulating layer 41 covering the wall of the second groove 411, the hole wall of the first through hole 412, and the surface of the first insulating layer 41 facing away from the temporary stage 100 through step S042. Next, the third conductive part 42 is prepared. Specifically, in step SO43, the second conductive material 302 is filled into the second groove 411 and the first through hole 412. The second seed material 301 and the second conductive material 302 in the second groove 411 and the first through hole 412 form the third conductive part 42. Finally, in step S044, the temporary stage 100 is removed and the first insulating layer 41 is adhered to the first surface 11 and / or the second surface 12. Conductive adhesive is used to connect the third conductive part 42 in the first through hole 412 to the conductive post 2.

[0078] Optionally, after completing step S044, such as Figure 13 As shown, a support film 200 can be attached to the side of the first augmentation layer 4 away from the temporary stage 100 using methods such as masking or laser lift-off to temporarily support it during the transfer of the first augmentation layer 4. Then, the temporary stage 100 is removed in step S045, and the first augmentation layer 4 is adhered to the first surface 11 or the second surface 12. After the first augmentation layer 4 is attached to the substrate 1, the support film 200 is removed. The support film 200 can be made of polyimide so that it can be removed using methods such as laser lift-off.

[0079] In some alternative embodiments, such as Figure 14 As shown, in step S042: Step S0421: Cover the first insulating layer 41 on the side facing away from the temporary stage 100 with the first photoresist 300, as shown in the reference. Figure 15 .

[0080] Step S0422: Pattern the first photoresist 300 to form a first photoresist opening 310 and a first photoresist residue 320 surrounding the first photoresist opening 310, and to form a first blind via 330 and a second photoresist residue 340 surrounding the first blind via 330. (See reference...) Figure 16 In this step, a halftone mask can be used to pattern the first photoresist 300. The fully transparent area of ​​the halftone mask corresponds to the formation of a through-hole first photoresist opening 310, and the semi-transparent area corresponds to the formation of a non-through-hole first blind via 330. Optionally, the transmittance of the semi-transparent area is 0%~100% (excluding endpoint values), and the transmittance of the semi-transparent area can be adjusted according to the depth requirements of the second groove 411.

[0081] Step S0423: The first insulating layer 41 is patterned through the first photoresist opening 310 to form a first via 412 on the first insulating layer 41, and the first insulating layer 41 is patterned through the first blind via 330 to form a second groove 411 on the first insulating layer 41. In this step, the area of ​​the first photoresist 300 corresponding to the first blind via 330 can form a buffer portion, so that when the same patterning process is used, the first through-hole 412 can be formed on the first insulating layer 41 through the first photoresist opening 310, and the second non-through-hole 411 can be formed on the first insulating layer 41 through the first blind via 330. (See reference...) Figure 16 .

[0082] Next, the first photoresist residue 320 and the second photoresist residue 340 are removed.

[0083] In some alternative embodiments, such as Figure 17 As shown, in step S044: Step S0441: Cover the surface of the second seed material 301 on the side opposite to the temporary stage 100 with the second photoresist 400.

[0084] Step S0442: Pattern the second photoresist 400 to form a second photoresist opening 410 and a third photoresist residue 420 surrounding the second photoresist opening 410. The second photoresist opening 410 exposes the second seed material 301 within the second groove 411 and the first via 412, as shown. Figure 18 As shown.

[0085] Step S0443: Form a second conductive material in the second groove and the first through hole, such as... Figure 18 As shown.

[0086] Step S0444: Remove the third photoresist residue 420 and the second seed material 301 from the surface of the first insulating layer 41 facing away from the temporary stage 100. The second seed material 301 and the second conductive material 302 in the second groove 411 and the first via 412 form the third conductive portion 42, as shown. Figure 11 As shown.

[0087] In some optional embodiments, the first reinforcement layer 4 has multiple layers, which are sequentially stacked in a direction away from the substrate 1 by adhesive bonding. The third conductive portions 42 in the corresponding two first vias 412 of adjacent first reinforcement layers 4 are electrically connected by conductive anisotropic adhesive. In the areas outside the corresponding areas of the first vias 412 and through holes 13, insulating adhesives such as structural adhesives and optical adhesives are used for adhesion.

[0088] Optionally, after completing the fabrication of multiple first add-on layers 4, the method further includes: fabricating a solder portion 5 on the side of the outermost first add-on layer 4 facing away from the substrate 1, with one end of the solder portion 5 connected to a via of the outermost third conductive portion 42, and the other end of the solder portion 5 electrically connected to an integrated circuit or printed circuit board. A schematic diagram of the solder portion 5 can be found in [reference needed]. Figure 1 .

[0089] Optionally, the solder portion 5 may protrude from the outermost first reinforcement layer 4 away from the surface of the substrate 1, so as to facilitate the alignment and connection of the integrated circuit or printed circuit board with the solder portion 5.

[0090] Optionally, after preparing the solder section 5, an integrated circuit is soldered to the solder section 5 corresponding to one side of the substrate 1, and a printed circuit board (not shown in the figure) is soldered to the solder section 5 corresponding to the other side of the substrate 1.

[0091] Optionally, after soldering the integrated circuit, insulating material can be filled into the gap between the integrated circuit and its nearest first reinforcement layer 4 to form a first filling portion, and insulating material can be filled into the gap between the printed circuit board and its nearest first reinforcement layer 4 to form a second filling portion, thereby providing encapsulation protection for the carrier board structure. Finally, the carrier board structure and the encapsulation insulating layer can be cut and shaped as needed.

[0092] A third aspect of this application also provides a mobile terminal, including a carrier board structure according to any embodiment of the first aspect of this application, or a carrier board structure obtained by a method for preparing a carrier board structure according to any embodiment of the second aspect of this application.

[0093] Since the mobile terminal of the third aspect embodiment of this application includes the carrier plate structure of any of the first aspects embodiments or the carrier plate structure prepared by the preparation method of the carrier plate structure of the second aspect embodiment, the mobile terminal of the third aspect embodiment of this application has the beneficial effects of the carrier plate structure of any of the first aspects embodiments or the beneficial effects of the carrier plate structure prepared by the preparation method of the carrier plate structure of any of the second aspects embodiments, which will not be elaborated here.

[0094] Although this application has been described with reference to preferred embodiments, various modifications can be made thereto and components can be replaced with equivalents without departing from the scope of this application. In particular, the technical features mentioned in the various embodiments can be combined in any manner, provided there is no structural conflict. This application is not limited to the specific embodiments disclosed herein, but includes all technical solutions falling within the scope of the claims.

Claims

1. A carrier plate structure, characterized in that, The carrier plate structure includes: A substrate includes a first surface and a second surface disposed opposite to each other along its thickness direction, at least one of the first surface and the second surface is provided with a first groove, and the substrate further includes at least one through hole penetrating the first surface and the second surface; A conductive post, wherein the conductive post fills the through hole; A conductive portion is filled in the first groove and electrically connected to at least one of the conductive posts, and the surface of the conductive portion on the side opposite to the bottom of the first groove is flush with the first surface or the second surface.

2. The carrier plate structure according to claim 1, characterized in that, Both the first surface and the second surface have the first groove; The conductive part includes a first conductive part and a second conductive part; The first conductive part is filled in the first groove on the first surface and electrically connected to at least one of the conductive pillars, and the surface of the first conductive part facing away from the bottom of the first groove is flush with the first surface. The second conductive portion fills the first groove on the second surface and is electrically connected to at least one of the conductive pillars, and the surface of the second conductive portion on the side opposite to the bottom of the first groove is flush with the second surface.

3. The carrier plate structure according to claim 2, characterized in that, The first groove on the first surface and the first groove on the second surface are offset along a direction parallel to the plane of the substrate.

4. The carrier plate structure according to claim 1, characterized in that, The first groove includes multiple sub-grooves and multiple connecting grooves. The multiple sub-grooves are spaced apart, and two adjacent sub-grooves are connected through the connecting grooves. The dimension of the connecting groove in the thickness direction of the substrate is smaller than the dimension of the sub-grooves in the thickness direction of the substrate. The conductive part includes multiple main body parts and multiple connecting parts. The main body parts are filled in the sub-groove, and the connecting parts are filled in the connecting groove. Two adjacent main body parts are electrically connected through the connecting parts. Preferably, the conductive portion includes a first seed material and a first conductive material, wherein the first seed material covers the wall of the first groove and the first conductive material fills the first groove.

5. The carrier plate structure according to claim 1, characterized in that, The carrier plate structure also includes a first additional layer. The first added layer includes a first insulating layer and a third conductive portion. The first insulating layer is disposed on the first surface and / or the second surface, and has a second groove, the second groove being located on the side of the first insulating layer opposite to the first surface and / or the second surface. The first insulating layer further has at least one first through-hole disposed through the first insulating layer along the thickness direction of the substrate; The third conductive portion fills the second groove and the first through hole, and is electrically connected to the conductive post; Preferably, the first augmentation layer has multiple layers, and the multiple layers of the first augmentation layer are stacked in a direction away from the first surface and / or the second surface, and adjacent two layers of the first augmentation layer are electrically connected through a third conductive part in the first via. Preferably, the third conductive part includes a second seed material and a second conductive material, the second seed material covers the wall of the second groove and the wall of the first through hole, and the second conductive material fills the second groove and the first through hole.

6. A method for preparing a carrier plate structure, characterized in that, The method includes: A substrate is provided, the substrate including a first surface and a second surface disposed opposite to each other along its thickness direction; Along the thickness direction of the substrate, at least one through-hole is formed in the substrate, and a first groove is formed on the first surface and / or the second surface of the substrate; wherein the first groove and at least one of the through-holes are in communication. A conductive post is prepared in the through hole, and a conductive part is prepared in the first groove. The conductive part and the conductive post are electrically connected, and the surface of the conductive part on the side away from the bottom of the first groove is flush with the first surface or the second surface.

7. The method for preparing the carrier plate structure according to claim 6, characterized in that, The steps of fabricating a conductive pillar in the through hole and fabricating a conductive portion in the first groove include: A first seed material is formed on the substrate to cover the hole wall, the wall of the first groove, the first surface, and the second surface; A first conductive material is formed in the through hole, the first groove, the first surface, and the second surface. The first seed material and the first conductive material in the through hole form the conductive pillar, and the first seed material and the first conductive material in the first groove form the conductive part. Remove the first seed material and the first conductive material from the first surface and the second surface.

8. The method for preparing the carrier plate structure according to claim 6, characterized in that, After the steps of preparing the conductive pillar in the through hole and preparing the conductive portion in the first groove, the method further includes: Prepare a first insulating layer on one side of the temporary stage; A second groove and at least one first through hole are formed on the side of the first insulating layer away from the temporary stage. The second groove and the first through hole are connected in a direction parallel to the surface of the substrate. The first through hole is connected to the through hole in the thickness direction of the substrate. A second seed material is formed on the first insulating layer, covering the wall of the second groove, the hole wall of the first through hole, and the surface of the first insulating layer facing away from the temporary platform. A second conductive material is filled into the second groove and the first through hole, and the second seed material and the second conductive material in the second groove and the first through hole form a third conductive part; Remove the temporary platform and adhere the first insulating layer to the first surface and / or the second surface, and use conductive adhesive to connect the third conductive part in the first through hole to the conductive post.

9. The method for preparing the carrier plate structure according to claim 8, characterized in that, The step of forming a second groove and at least one first through-hole extending through the first insulating layer along the thickness direction of the substrate on the side of the first insulating layer opposite to the temporary stage further includes: A first photoresist is applied to the side of the first insulating layer facing away from the temporary stage; The first photoresist is patterned to form a first photoresist opening and a first photoresist residue surrounding the first photoresist opening, and to form a first blind hole and a second photoresist residue surrounding the first blind hole, wherein the first photoresist opening exposes at least a portion of the first insulating layer. The first insulating layer is patterned through the first photoresist opening to form the first via on the first insulating layer, and the first insulating layer is patterned through the first blind via to form the second groove on the first insulating layer. Preferably, the step of filling the second groove and the first through hole with a second conductive material further includes: A second photoresist is applied to the surface of the second seed material on the side opposite to the temporary stage; The second photoresist is patterned to form a second photoresist opening and a third photoresist residue surrounding the second photoresist opening, the second photoresist opening exposing the second seed material in the second groove and the first via. The second conductive material is formed in the second groove and the first through hole; The third photoresist residue and the second seed material on the surface of the first insulating layer away from the temporary stage are removed. The second seed material and the second conductive material in the second groove and the first via form the third conductive portion.

10. A mobile terminal, characterized in that, The carrier plate structure includes the carrier plate structure as described in any one of claims 1-5, or the carrier plate structure obtained by the preparation method of the carrier plate structure as described in any one of claims 6-9.

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