Multilayer ceramic capacitor

Abstract

Provided is a multilayer ceramic capacitor having particularly excellent moisture resistance. The laminated ceramic capacitor includes an inner layer portion in which a first internal electrode layer and a second internal electrode layer are alternately laminated with a dielectric layer formed of a ceramic dielectric interposed therebetween. A second main surface that is a surface on the opposite side of the first main surface; and a first side surface that is a surface in the width direction orthogonal to the first main surface and the second main surface and from which the first internal electrode layer and the second internal electrode layer are led out. A second side surface, which is a surface on the opposite side from the first side surface, from which the first internal electrode layer and the second internal electrode layer are led out; a first end surface, which is a surface in the longitudinal direction orthogonal to the first main surface, the second main surface, the first side surface, and the second side surface, from which the first internal electrode layer is led out; and a second end surface, which is a surface in the longitudinal direction orthogonal to the first main surface, the second main surface, the first side surface, and the second side surface, from which the second internal electrode layer is led out. And a second end surface on the opposite side of the first end surface and from which the second internal electrode layer is led out. A first outer layer part which is formed of a ceramic dielectric and covers the first main surface from the lamination direction; a second outer layer part which is formed of a ceramic dielectric and covers the second main surface from the lamination direction; a first side edge portion formed of a ceramic dielectric and covering the inner layer portion, the first outer layer portion, and the second outer layer portion from one side in the width direction; a second side edge portion formed of a ceramic dielectric and covering the inner layer portion, the first outer layer portion, and the second outer layer portion from the other side in the width direction; and a pair of external electrodes provided on the first end surface and the second end surface and connected to the first internal electrode layer and the second internal electrode layer, respectively. The ceramic dielectrics constituting the inner layer section, the first outer layer section, the second outer layer section, the first side edge section, and the second side edge section each have a plurality of dielectric particles having pores therein. The ratio (Ninner) of voids in particles of the ceramic dielectric in the inner layer portion, the ratio (Nouter) of voids in particles of the ceramic dielectric in the first outer layer portion and the second outer layer portion, and the ratio (Nside) of voids in particles of the ceramic dielectric in the first side edge portion and the second side edge portion satisfy formula (1): Nouterlt; the formula (1) is Ninner, and the formula (2) is Nsilult; and the two Ninner parties are used.

Description

Technical Field

[0001] This invention relates to multilayer ceramic capacitors. Background Technology

[0002] With the miniaturization of electronic devices, particularly mobile phones, and the increasing speed of CPUs, the demand for multilayer ceramic capacitors (MLCCs) is growing. MLCCs feature a thin, high-dielectric-constant dielectric layer. Therefore, despite their small size, they exhibit large capacitance. While various materials are known for their use, MLCCs employing ceramic dielectrics such as barium titanate (BaTiO3) in the dielectric layer and base metals such as nickel (Ni) in the internal electrode layer are widely used due to their low cost and high performance.

[0003] A multilayer ceramic capacitor comprises an inner layer consisting of alternating layers of dielectric and internal electrode layers formed of ceramic dielectric, an outer layer covering the top and bottom of the inner layer, and side edge portions covering both the inner and outer layers in the width direction. The inner layer functions as a capacitor element. The outer layer and side edge portions are areas surrounding the inner layer that do not contain the internal electrode layers. They effectively protect the inner layer, which functions as a capacitor element, from external environmental influences.

[0004] Furthermore, the ceramic dielectric of multilayer ceramic capacitors is manufactured by sintering dielectric powders such as BaTiO3 powder. Dielectric powders are synthesized using methods such as solid-state methods, hydrothermal methods, sol-gel methods, alkoxide methods, solvothermal methods, or oxalate methods. Among these, the hydrothermal method (hydrothermal synthesis method) utilizes high-temperature, high-pressure aqueous solutions to synthesize inorganic powders, offering advantages such as uniform particle size and the ability to manufacture fine powders at relatively low cost. Therefore, using dielectric powders synthesized by the hydrothermal method (hydrothermally synthesized dielectric powder) to manufacture multilayer ceramic capacitors allows for thinner dielectric layers and higher capacitance. Moreover, since particle size deviations in the dielectric particles can be suppressed, improvements in dielectric constant and reliability can be achieved.

[0005] Hydroxides are used as raw materials in hydrothermal processes. For example, a Ba source such as barium hydroxide (Ba(OH)₂) and a Ti source such as metatitanate (TiO(OH)₂) or titanium oxide (TiO₂) are reacted in water under high temperature and pressure. The resulting reactants are then heat-treated to obtain BaTiO₃ powder. During heat treatment, the OH groups contained in the hydroxide detach from the raw material, but this creates pores (intragranular pores) within the particles constituting the dielectric powder. Furthermore, if dielectric powder with intragranular pores is used to manufacture multilayer ceramic capacitors, these pores also remain in the resulting capacitors. In contrast, when dielectric powder synthesized by methods other than hydrothermal processes is used, intragranular pores do not form.

[0006] Patent Document 1 discloses the use of hydrothermally synthesized dielectric powder as the dielectric layer in a laminated ceramic capacitor. Specifically, it discloses a method for manufacturing a ceramic capacitor, comprising: a step of preparing a raw material sheet using a ceramic slurry containing a first ceramic powder synthesized by a hydrothermal method and a second ceramic powder synthesized by a method other than hydrothermal method; and a step of firing the obtained raw material sheet (claim 5 of Patent Document 1). Furthermore, Patent Document 1 also describes that piezoelectric strain is mitigated due to the porosity (void) present within the ceramic particles, which relates to crack suppression (

[0031] of Patent Document 1).

[0007] Prior art literature

[0008] Patent documents

[0009] Patent Document 1: Japanese Patent Application Publication No. 2019-102655 Summary of the Invention

[0010] The problem that the invention aims to solve

[0011] As such, it has been proposed to use hydrothermally synthesized dielectric powder to manufacture multilayer ceramic capacitors. However, the inventors of this invention, through investigation, discovered that such multilayer ceramic capacitors have problems with moisture resistance. Moreover, the reason for this is considered to be the presence of intragranular voids. That is, as mentioned above, in multilayer ceramic capacitors using hydrothermally synthesized dielectric powder, intragranular voids sometimes remain in the ceramic dielectric. Furthermore, it is considered that if intragranular voids remain in the ceramic dielectric constituting the outer layer and side edges, it leads to a decrease in moisture resistance. In addition, it is also considered that due to the presence of more intragranular voids, the compactness is also reduced.

[0012] Further research by the inventors of this invention has yielded the following insight: by controlling the ratio of intragranular voids in the inner layer, outer layer, and side edge portion of a multilayer ceramic capacitor to satisfy a given relationship, a multilayer ceramic capacitor with particularly excellent moisture resistance can be obtained.

[0013] This invention was made based on the insight that it aims to provide a multilayer ceramic capacitor with particularly excellent moisture resistance.

[0014] Technical solutions for solving the problem

[0015] This invention includes the following methods. Furthermore, in this specification, the expression "~" includes the numerical values ​​at both ends. That is, "X~Y" is synonymous with "X or more and Y or less".

[0016] According to one aspect of the present invention, a multilayer ceramic capacitor is provided, comprising:

[0017] In the inner layer, a first inner electrode layer and a second inner electrode layer are alternately stacked with a dielectric layer formed of ceramic dielectric as a gap. The inner layer has a first main surface as a surface of the stacking direction, a second main surface as a surface opposite to the first main surface, a first side surface as a surface of the width direction orthogonal to the first main surface and the second main surface and through which the first inner electrode layer and the second inner electrode layer extend, a second side surface as a surface opposite to the first side surface and through which the first inner electrode layer and the second inner electrode layer extend, a first end surface as a surface of the length direction orthogonal to the first main surface, the second main surface, the first side surface and the second side surface and through which the first end surface extends, and a second end surface as a surface opposite to the first end surface and through which the second inner electrode layer extends.

[0018] The first outer layer is formed of a ceramic dielectric and covers the first main surface from the stacking direction;

[0019] The second outer layer is formed of a ceramic dielectric and covers the second main surface from the stacking direction;

[0020] The first side edge portion is formed of a ceramic dielectric and covers the inner layer portion, the first outer layer portion, and the second outer layer portion from one side in the width direction;

[0021] The second side edge portion, formed of a ceramic dielectric, covers the inner layer portion, the first outer layer portion, and the second outer layer portion from the other side in the width direction; and

[0022] A pair of external electrodes are disposed on the first end face and the second end face, and are respectively connected to the first internal electrode layer and the second internal electrode layer.

[0023] The ceramic dielectric constituting the inner layer, the first outer layer, the second outer layer, the first side edge, and the second side edge each has a plurality of dielectric particles with internal pores.

[0024] The intragranular porosity ratio N of the ceramic dielectric in the inner layer inner The intragranular porosity ratio N of the ceramic dielectric in the first outer layer and the second outer layer outer The intragranular porosity ratio N of the ceramic dielectric in the first side edge portion and the second side edge portion side Satisfying equation (1): N outer <N inner and equation (2): N side <N inner both sides.

[0025] Invention Effects

[0026] According to the present invention, a multilayer ceramic capacitor with particularly excellent moisture resistance can be provided. Attached Figure Description

[0027] Figure 1 This is a three-dimensional view showing the shape of a multilayer ceramic capacitor.

[0028] Figure 2 This is a schematic cross-sectional view illustrating the internal structure of a multilayer ceramic capacitor.

[0029] Figure 3 This is a schematic cross-sectional view illustrating the internal structure of a multilayer ceramic capacitor. Detailed Implementation

[0030] Specific embodiments of the present invention (hereinafter referred to as "this embodiment") will be described. However, the present invention is not limited to the following embodiments, and various modifications can be made without changing the spirit of the invention.

[0031] <<1. Multilayer Ceramic Capacitors>>

[0032] The multilayer ceramic capacitor of this embodiment has an inner layer, a first outer layer, a second outer layer, a first side edge, a second side edge, and a pair of external electrodes. The inner layer is a region in which a first inner electrode layer and a second inner electrode layer are alternately stacked with dielectric layers formed of ceramic dielectric. The inner layer has a first main surface, a second main surface, a first side surface, a second side surface, a first end surface, and a second end surface. The first main surface is the surface in the stacking direction of the dielectric layer, the first inner electrode layer, and the second electrode layer. The second main surface is the surface opposite to the first main surface. The first side surface is the surface in the width direction orthogonal to the first main surface and the second main surface. The second side surface is the surface opposite to the first side surface. The first end surface is the surface in the length direction orthogonal to the first main surface, the second main surface, the first side surface, and the second side surface, and is the surface from which the first inner electrode layer is led out. The second end face is the side opposite to the first end face and is the surface from which the second inner electrode layer is led out. Furthermore, the first outer layer is formed of a ceramic dielectric and covers the first main surface from the stacking direction. The second outer layer is formed of a ceramic dielectric and covers the second main surface from the stacking direction. The first side edge is formed of a ceramic dielectric and covers the inner layer, the first outer layer, and the second outer layer from one side in the width direction. The second side edge is formed of a ceramic dielectric and covers the inner layer, the first outer layer, and the second outer layer from the other side in the width direction. A pair of external electrodes are disposed on the first end face and the second end face and connected to either the first inner electrode layer or the second inner electrode layer. The ceramic dielectrics constituting the inner layer, the first outer layer, the second outer layer, the first side edge, and the second side edge each have a plurality of dielectric particles with internal pores. Furthermore, the intraparticle porosity ratio (N) of the ceramic dielectric in the inner layer is... innerThe intragranular porosity ratio (N) of the ceramic dielectric in the first outer layer and the second outer layer. outer The ratio of intragranular porosity (N) of the ceramic dielectric in the first and second side edge portions. side Satisfying equation (1): N outer <N inner and equation (2): N side <N inner both sides.

[0033] use Figures 1-3 This is one way to illustrate multilayer ceramic capacitors. Figure 1 This is a three-dimensional view showing the shape of a multilayer ceramic capacitor. Figure 2 yes Figure 1 The cross-section of the multilayer ceramic capacitor shown is cut along line II-II. Figure 3 yes Figure 1 The cross-sectional view of the multilayer ceramic capacitor shown is taken along line III-III.

[0034] The multilayer ceramic capacitor (100) includes a body portion (6) and a pair of external electrodes (8a, 8b) disposed on the two end faces (14a, 14b) of the body portion (6). The multilayer ceramic capacitor (100) and the body portion (6) have a generally rectangular parallelepiped shape. The term "generally rectangular parallelepiped" includes not only a rectangular parallelepiped but also a rectangular parallelepiped with rounded corners and / or edges.

[0035] The multilayer ceramic capacitor (100) and the body portion (6) have a first outer main surface (10a) and a second outer main surface (10b) facing each other in the thickness direction T, a first outer side surface (12a) and a second outer side surface (12b) facing each other in the width direction W, and a first outer end surface (14a) and a second outer end surface (14b) facing each other in the length direction L. Here, the thickness direction T is the direction in which the dielectric layer (2) and the internal electrode layer (4) contained in the body portion (6) are stacked. The length direction L is the direction orthogonal to the thickness direction T and facing the outer end surfaces (14a, 14b). The width direction W is the direction orthogonal to the thickness direction T and the length direction L. The surface containing the thickness direction T and the width direction W is defined as the WT surface, the surface containing the width direction W and the length direction L is defined as the LW surface, and the surface containing the length direction L and the thickness direction T is defined as the LT surface.

[0036] The main body (6) is composed of an inner layer (16), a first outer layer (18a), a second outer layer (18b), a first side edge (20a), and a second side edge (20b).

[0037] The inner layer (16) is a region in which the inner electrode layers (4) are alternately stacked with dielectric layers (2) in between. The dielectric layer (2) is formed of a ceramic dielectric. The inner electrode layer (4) is composed of a plurality of first inner electrode layers (4a) and a plurality of second inner electrode layers (4b).

[0038] The inner layer (16) has a first main surface, a second main surface, a first side surface, a second side surface, a first end surface, and a second end surface. The first main surface is a surface perpendicular to the stacking direction of the dielectric layer (2) and the internal electrode layers (4a, 4b). The second main surface is a surface opposite to the first main surface (opposite surface). The first side surface is a surface orthogonal to the first main surface and the second main surface, that is, a surface perpendicular to the width direction W. The second side surface is a surface opposite to the first side surface (opposite surface). The first end surface is a surface orthogonal to the first main surface, the second main surface, the first side surface, and the second side surface, that is, a surface perpendicular to the length direction L. The second end surface is a surface opposite to the first end surface (opposite surface). The internal electrode layers (4a, 4b) are extended from the first side surface and the second side surface. That is, the ends of the internal electrode layers are exposed on both the first side surface and the second side surface. The first internal electrode layer (4a) is brought out on the first end face, but the second internal electrode layer (4b) is not brought out. The second internal electrode layer (4b) is brought out on the second end face, but the first internal electrode layer (4a) is not brought out.

[0039] The first outer layer (18a) is the region that covers the first main surface of the inner layer (16) in the stacking direction (thickness direction T). The second outer layer (18b) is the region that covers the second main surface of the inner layer (16) in the stacking direction. The first side edge (20a) is the region that covers the inner layer (16), the first outer layer (18a), and the second outer layer (18b) from one side (first side side) in the width direction. The second side edge (20a) is the region that covers the inner layer (16), the first outer layer (18a), and the second outer layer (18b) from the other side (second side side) in the width direction. The first outer layer (18a), the second outer layer (18b), the first side edge (20a), and the second side edge (20b) are formed of ceramic dielectric.

[0040] The external electrodes (8a, 8b) are composed of a first external electrode (8a) disposed on the first outer end face (14a) of the main body (6) and a second external electrode (8b) disposed on the second outer end face (14b). The first external electrode (8a) and the second external electrode (8b) are not in contact and are electrically isolated.

[0041] The dimensions of the multilayer ceramic capacitor (100) and the body (6) are not particularly limited. For example, the length L dimension is 0.2 mm or more and 3.2 mm or less, the width W dimension is 0.1 mm or more and 2.5 mm or less, and the stacking T dimension is 0.1 mm or more and 2.5 mm or less. Furthermore, in Figures 1-3 The diagram shows that the length dimension L is larger than the width dimension W, but the multilayer ceramic capacitor of this embodiment is not limited to having such a dimension. The length dimension L may also be smaller than the width dimension W.

[0042] <Inner Layer - Dielectric Layer>

[0043] The inner layer is a region in which internal electrode layers (first inner electrode layer, second inner electrode layer) are alternately stacked with dielectric layers formed of ceramic dielectric. The dielectric layers are composed of ceramic dielectrics made by firing an inner layer containing dielectric raw materials using raw material. The ceramic dielectric comprises a sintered polycrystalline (ceramic) material containing numerous dielectric particles bonded together via grain boundaries and triplex grain boundaries. That is, it contains dielectric particles (dielectric grains) as the main component. Furthermore, the term "main component" refers to the component with the highest content in the ceramic dielectric, i.e., a component of 50% or more by mass.

[0044] The dielectric particles are composed of perovskite-type oxides. Perovskite-type oxides have a composition represented by the general formula ABO3 and exhibit near-cubic crystal structures such as cubic, tetragonal, orthorhombic, or rhombohedral crystals at room temperature. Furthermore, atoms of the A-site element (hereinafter, "A-site atoms") and atoms of the B-site element (hereinafter, "B-site atoms") are ionized and occupy the A-site and B-site of the perovskite structure, respectively. Examples of A-site elements include elements with relatively large ion sizes such as barium (Ba), calcium (Ca), and strontium (Sr), while examples of B-site elements include elements with relatively small ion sizes such as titanium (Ti), zirconium (Zr), and hafnium (Hf). The combination of A-site and B-site elements is not particularly limited as long as the perovskite structure is maintained. Each A-site and B-site element may contain only one element, or multiple elements may be combined. Furthermore, as long as the perovskite structure is maintained, the molar ratio of the A-site and B-site elements may deviate from 1:1.

[0045] Specific examples of perovskite oxides include barium titanate (BaTiO3) compounds, calcium titanate (CaTiO3) compounds, strontium titanate (SrTiO3) compounds, and mixed crystals and solid solutions thereof. Preferably, the A-site element comprises barium (Ba), and the B-site element comprises titanium (Ti). That is, preferably, the perovskite oxide is a barium titanate (BaTiO3) compound. In addition, BaTiO3 compounds not only contain BaTiO3, but also compounds in which a portion of the Ba in BaTiO3 is replaced by Sr and / or other A-site elements such as Ca, or compounds in which a portion of the Ti is replaced by Zr and / or other B-site elements such as Hf.

[0046] Ceramic dielectrics can also contain secondary components. While not limited, examples of secondary components include rare earth elements (RE), magnesium (Mg), manganese (Mn), iron (Fe), chromium (Cr), cobalt (Co), nickel (Ni), silicon (Si), aluminum (Al), vanadium (V), and their compounds. These components can be included individually or in combination. The manner in which secondary components exist is not limited; they can be contained within dielectric particles, grain boundaries, or triplet grain boundaries.

[0047] Dielectric particles can also include core-shell particles. A core-shell particle is a particle having a structure in which at least a portion of the surface layer (shell) contains a high concentration of solid-solid components, and the central part (core) contains a low concentration of solid-solid components or no solid-solid components (core-shell structure). Alternatively, dielectric particles can also include homogeneous solid-solid particles.

[0048] The thickness of the dielectric layer occupying the inner layer is preferably 0.3 μm or more and 0.5 μm or less. By setting the thickness of the dielectric layer to a given value or more, insulation breakdown and lifespan degradation during the use of the multilayer ceramic capacitor can be suppressed. Furthermore, by setting the thickness of the dielectric layer to a given value or less, the dielectric layer is made thinner, enabling further increases in capacitance of the multilayer ceramic capacitor. The number of dielectric layers is not particularly limited. Preferably, the number of dielectric layers constituting the outer and inner layers is 100 or more and 2000 or less.

[0049] <Inner Layer - Internal Electrode Layer>

[0050] The internal electrode layers (first internal electrode layer and second internal electrode layer) consist of a counter electrode portion and a lead-out electrode portion, forming the inner layer together with the dielectric layer. The counter electrode portion, sandwiching the dielectric layer, functions as a capacitor element. The lead-out electrode portion electrically connects the counter electrode portion and the external electrode. The internal electrode layers contain a conductive metal. Known electrode materials such as nickel (Ni), copper (Cu), silver (Ag), palladium (Pd), silver (Ag)-palladium (Pd) alloys, and / or gold (Au) can be used as the conductive metal. The internal electrode layers are fabricated by sintering a conductive paste layer printed on the surface of the inner layer raw material sheet.

[0051] The internal electrode layer may also contain components other than conductive metals. Examples of such components include ceramics, which function as a common material. Furthermore, the thickness of the internal electrode layer is preferably 0.30 μm or more and 0.40 μm or less. By setting the internal electrode thickness to a value greater than or equal to a given value, problems such as electrode interruption can be prevented. Furthermore, by setting it to a value less than or equal to a given value, the proportion of the dielectric layer in the capacitor can be prevented from decreasing, which contributes to larger capacitance. Additionally, the number of internal electrode layers is preferably 10 or more and 1000 or less.

[0052] <Outer layer>

[0053] The outer layers (first outer layer and second outer layer) are respectively located above and below the inner layer. The outer layers are made of ceramic dielectric and are regions that do not contain the inner electrode layer. The outer layers are manufactured by firing an outer layer containing dielectric material using a raw material sheet.

[0054] <Side edge>

[0055] Side edge portions (first side edge portion and second side edge portion) are provided along the side surface of the laminated ceramic capacitor, sandwiching the inner layer portion and the outer layer portion. The side edge portions are also called side gap portions or side portions. The side edge portions are made of ceramic dielectric and are areas within them that do not contain the inner electrode layer. By providing side edge portions, moisture can be prevented from penetrating into the inner layer portion from the side.

[0056] In the manufacture of multilayer ceramic capacitors, the side edge portion is formed separately from the inner and outer layers. Specifically, a raw material body for the side edge portion is fabricated by attaching a raw material to the side of the multilayer chip that forms the inner and outer layers, and then firing this raw material body. In this case, the composition and / or microstructure of the ceramic dielectric constituting the side edge portion is discontinuous with the ceramic dielectric constituting the inner and / or outer layers. Therefore, a physical / chemical boundary exists between the side edge portion and the inner and / or outer layers.

[0057] <External Electrode>

[0058] The external electrodes (first external electrode and second external electrode) function as input and output terminals of the multilayer ceramic capacitor. The first and second external electrodes are disposed on both ends of the multilayer ceramic capacitor. The first external electrode is connected to a first internal electrode layer, and the second external electrode is connected to a second internal electrode layer. Known structures can be used as the external electrodes. For example, a base electrode layer and a plating layer disposed thereon may be included. Alternatively, a base electrode layer may be omitted, and the external electrode may consist solely of the plating layer.

[0059] <Intragranular pore ratio>

[0060] In the multilayer ceramic capacitor of this embodiment, the ceramic dielectrics constituting the inner layer, the first outer layer, the second outer layer, the first side edge, and the second side edge each have a plurality of dielectric particles with internal pores. That is, these ceramic dielectrics are made using hydrothermally synthesized dielectric powder.

[0061] Furthermore, in the multilayer ceramic capacitor of this embodiment, the intragranular porosity ratio (N) of the ceramic dielectric (hereinafter, sometimes collectively referred to as "inner ceramic") in the inner layer is... inner The intragranular porosity ratio (N) of the ceramic dielectric (hereinafter, sometimes collectively referred to as "outer ceramic") in the outer layers (the first outer layer and the second outer layer) outer The intragranular porosity ratio (N) of the ceramic dielectric (hereinafter, sometimes collectively referred to as "side edge ceramic") in the side edge portions (first side edge portion and second side edge portion) and the side edge portions (second side edge portion) is as follows: side Satisfying equation (1): N outer <N inner and equation (2): N side <N inner Both sides. Here, the intragranular porosity ratio is the number of intragranular pores per unit area in a cross-section (WT plane) that runs through the central part of the length direction of the multilayer ceramic capacitor. Furthermore, intragranular pores are pores existing within the dielectric particles that constitute the ceramic dielectric. In other words, they are regions existing within the dielectric particles that do not contain the main components of the dielectric particles, intentionally added secondary components, or other solid components. Therefore, they are distinct from the external pores existing at particle interfaces and triple grain boundaries. Particles with internal pores are called porous particles.

[0062] By controlling the ratio of intragranular voids in the inner ceramic layer, outer ceramic layer, and side edge ceramic layer to satisfy the above-mentioned relationship, it is possible to improve moisture resistance while ensuring the effect of intragranular voids in the inner layer.

[0063] To explain this, the inner ceramic layer is the region that functions as a capacitor element. By incorporating intragranular pores in the inner ceramic layer, the various characteristics of the multilayer ceramic capacitor can be improved. As mentioned earlier, intragranular pores are formed by using hydrothermally synthesized dielectric powder as the raw material. On the other hand, by using hydrothermally synthesized dielectric powder, it is possible to achieve thinner layers and higher capacitance in multilayer ceramic capacitors. Furthermore, since particle size deviations of the dielectric particles can be suppressed, improvements in dielectric constant and reliability can be achieved. Moreover, the high crystallinity of the periphery of the pores in particles with intragranular pores (pore-bearing particles) can suppress problems caused by the diffusion of byproduct elements. Therefore, improved characteristics can be achieved. For example, in the case of core-shell dielectric particles, even if grain growth occurs during the sintering process, excessive diffusion and solid solution of byproducts will not occur. Since grain growth can be performed without destroying the core-shell structure, a balance between high dielectric constant, flat temperature characteristics, and excellent reliability can be achieved.

[0064] When the thickness of the dielectric layer is less than 0.5 μm, in order to ensure qualified products and reliability, the intragranular porosity ratio (N0.5) of the inner ceramic layer is... inner The preference level is high enough to reach a certain degree. N inner Preferably 8 per μm 2 Above and 23 / μm 2 Below, 11 cells / μm is more preferred. 2 Above and 23 / μm 2 The following is a further explanation. Additionally, the intragranular porosity ratio was determined by observing a cross-section (WT plane) traversing the central portion of the length direction of the multilayer ceramic capacitor using transmission electron microscopy (TEM). Specifically, a TEM observation sample with a thickness of 80 nm, including the WT plane, was fabricated. The obtained sample was observed using TEM with a field of view of 2 μm square, and the number of intragranular pores was counted. Then, the number was divided by the area of ​​the ceramic portion (dielectric layer) to calculate the porosity per unit area (1 μm). 2 The number of pores is calculated, and the same operation is performed on 3 sites (n=3) to obtain the average number of pores per unit area as the pore ratio. In addition, the average pore diameter is preferably 10 nm or more and 50 nm or less, and particularly preferably 10 nm or more and 30 nm or less.

[0065] In contrast, the outer ceramic layers surrounding the inner ceramic layer and the side edge ceramic layers do not function as capacitor elements. Furthermore, if the outer ceramic layers and side edge ceramic layers have excessive intragranular porosity, their moisture resistance may decrease. That is, the outer ceramic layers and side edge ceramic layers do not have an internal electrode layer. During the firing process in manufacturing multilayer ceramic capacitors, they are not affected by stress from the internal electrode layer; therefore, they tend to have lower sinterability compared to the inner ceramic layers. If the outer ceramic layers and side edge ceramic layers with low sinterability have intragranular porosity, moisture from the external environment can easily penetrate through these pores. This infiltrated moisture may reach the inner ceramic layer, which functions as a capacitor element, causing problems such as reduced insulation resistance.

[0066] Therefore, by suppressing the intragranular void ratio of the outer ceramic layer and the side edge ceramic to be smaller than that of the inner ceramic layer, it is possible to achieve improved moisture resistance while ensuring the effectiveness of the intragranular void ratio in the inner ceramic layer. Therefore, in this embodiment, equation (1) will be satisfied: N outer <N inner and equation (2): N side <N inner Both parties are necessary conditions.

[0067] On the other hand, while assuming that equations (1) and (2) above are satisfied, it is effective to also provide a certain degree of intragranular porosity in the outer ceramic layer and the side edge ceramic layer. That is, in order to make the dielectric layer of the inner layer thinner and to improve reliability, it is necessary to suppress the particle size deviation of the dielectric particles throughout the electrically effective inner ceramic layer. In order to suppress the particle size deviation of the effective part of the inner ceramic layer that is in contact with the outer ceramic layer and the side edge ceramic layer, it is advantageous to include some degree of intragranular porosity in the outer ceramic layer and the side edge ceramic layer.

[0068] From the perspective of maintaining excellent moisture resistance while seeking thinner dielectric layers and improved reliability, and assuming that the above equations (1) and (2) are satisfied, the intragranular porosity ratio (N) in the outer ceramic layer is... outer Preferably 3 per μm 2 More than 13 per μm 2 Below, 3 per μm is preferred. 2 More than 11 per μm 2 Below. For the same reason, the intragranular porosity ratio (N) in the side-edge ceramics... side Preferably 3 per μm 2 More than 13 per μm 2 Below, 3 per μm is preferred. 2 More than 11 per μm 2 the following.

[0069] Furthermore, the outer ceramic layer includes a portion corresponding to the first outer layer and a portion corresponding to the second outer layer. The intragranular porosity ratio of the portion corresponding to the first outer layer and the portion corresponding to the second outer layer can be the same or different. As long as both are less than the intragranular porosity ratio of the inner ceramic layer, their relative sizes are not limited. Similarly, the side edge ceramic layer includes a portion corresponding to the first side edge and a portion corresponding to the second side edge, and the intragranular porosity ratio of the portion corresponding to the first side edge and the portion corresponding to the second side edge can be the same or different.

[0070] According to a preferred embodiment, the zirconium (Zr) concentration (Zr) of the inner ceramic layer... inner ), zirconium (Zr) concentration in the outer ceramic layer (Zr outer ), and the zirconium (Zr) concentration in the side edge ceramics (Zr side ) Satisfies equation (3): Zr inner <Zr outer And equation (4): Zr inner <Zr side Both parties. As will be described later, if, during the manufacture of a multilayer ceramic capacitor, grain growth promoting materials such as Zr are added to the outer layer green sheet and the side edge green body, and the amount of Zr is greater than that of the inner layer green sheet, the intragranular porosity ratio in the outer layer and the side edge portion can be suppressed. Furthermore, in this case, the concentration of grain growth promoting materials (such as Zr) in the outer layer ceramic and the side edge ceramic becomes higher than that in the inner layer ceramic in the final multilayer ceramic capacitor.

[0071] Furthermore, in the preferred embodiment described above, the Zr concentration at the location corresponding to the first outer layer and the Zr concentration at the location corresponding to the second outer layer can be either the same or different, as long as both are higher than the Zr concentration of the inner ceramic layer. Similarly, the Zr concentration at the location corresponding to the first side edge and the Zr concentration at the location corresponding to the second side edge can be either the same or different.

[0072] According to another preferred embodiment, the average particle size (D50) of the dielectric particles in the inner ceramic layer... inner The average particle size (D50) of the dielectric particles in the outer ceramic layer. outer ), and the average particle size (D50) of the dielectric particles in the side-edge ceramics. side Satisfying equation (5): D50 inner <D50 outer And equation (6): D50 inner <D50 side Both parties. In the manufacture of multilayer ceramic capacitors, by promoting the grain growth of the outer ceramic layer and the side edge ceramic, the intragranular porosity ratio can be suppressed.

[0073] Furthermore, in the preferred embodiment described above, the average particle size of the portion corresponding to the first outer layer and the average particle size of the portion corresponding to the second outer layer can be either the same or different, as long as both are larger than the average particle size of the inner ceramic layer. Similarly, the average particle size of the portion corresponding to the first side edge and the average particle size of the portion corresponding to the second side edge can be either the same or different.

[0074] Preferably, the average particle size (D50) of the dielectric particles in the inner ceramic layer is... inner The average particle size is 130 nm or more and 210 nm or less. By setting the average particle size above a given value, the crystallinity of the particles and the associated improved properties can be achieved. Furthermore, by setting the average particle size below a given value, the dielectric layer can be thinned, which helps to increase the capacitance of multilayer ceramic capacitors and improves reliability. Additionally, the average particle size mentioned above refers to the overall average particle size of the dielectric particles, including both porous and non-porous particles.

[0075] As long as the intragranular porosity ratio of the outer ceramic layer (N) outer ) and the intragranular porosity ratio of the side-edge ceramics (N side The ratio of intragranular voids in both sides is less than that in the inner ceramic layer (N). inner ), N outer and N side There are no restrictions on the size relationship of N. inner N outer and N side It can also satisfy equation (7): N outer <N side <N inner In this case, crack suppression of the multilayer ceramic capacitor can be expected. That is, during the mounting of the multilayer ceramic capacitor onto the substrate, sometimes the surface mount machine (assembly machine) collides with the outer layer of the capacitor, causing cracks in the outer layer due to the impact. This cracking can be mitigated by suppressing the intragranular porosity ratio (Nc) of the outer ceramic layer. outer It is expected that this will suppress the formation of cracks in the outer layer.

[0076] Or, N inner N outer and N side It can also satisfy equation (8): N side <N outer <N inner In this case, a reduction in defects in the multilayer ceramic capacitor can be expected. Specifically, during handling, impacts are sometimes applied to the ridge portions of the multilayer ceramic capacitor, causing defects at these locations. This can be mitigated by suppressing the intragranular porosity ratio (N0.05) of the side-edge ceramic. sideIt is expected that this will help suppress defects in the ridge area.

[0077] <<2. Manufacturing Method of Multilayer Ceramic Capacitors>>

[0078] The manufacturing method of the multilayer ceramic capacitor of this embodiment is not limited as long as the above-mentioned necessary conditions are met. However, the preferred manufacturing method includes the following steps: a step of synthesizing the main component powder for ceramic dielectric (synthesis step); a step of mixing the main component powder with secondary component raw materials to obtain dielectric raw materials (mixing step); a step of adding and mixing the dielectric raw materials with binders and solvents to form a slurry, and forming inner layer raw material sheets and outer layer raw material sheets from the obtained slurry (forming step); a step of forming a patterned conductive paste layer on the surface of the inner layer raw material sheet using conductive paste for internal electrodes (printing step); and stacking multiple inner layer raw material sheets with conductive paste layers formed thereon. The process involves: pressing together the outer layers of the stacked ceramic capacitor with raw material sheets to form a laminated block (laminated process); cutting the resulting laminated block into smaller laminated pieces (cutting process); attaching the side edge raw material to the sides of the resulting smaller laminated pieces to form the raw material body (side edge forming process); performing a debinding and firing process on the resulting raw material body to form the body (firing process); and forming an external electrode on the resulting body to form a laminated ceramic capacitor (external electrode forming process). Furthermore, the manufacturing conditions are controlled to ensure that the intragranular porosity ratio (N0) of the inner ceramic layer in the resulting laminated ceramic capacitor is... inner ), the ratio of intragranular voids in the outer ceramic layer (N) outer ) and the intragranular porosity ratio of the side-edge ceramics (N side Satisfying equation (1): N outer <N inner and equation (2): N side <N inner Both parties. The following details each process.

[0079] <Synthesis Process>

[0080] In the synthesis process, the main component powder used to form the ceramic dielectric is synthesized. The main component powder is a dielectric powder with a perovskite-type structure (ABO3), such as a BaTiO3-based compound. Hydrothermal synthesis of the dielectric powder is used as the main component powder. This allows the fabrication of multilayer ceramic capacitors containing dielectric particles with internal pores (porous particles). The main component powder can be hydrothermally synthesized powder alone, or a combination of hydrothermally synthesized dielectric powder and powder synthesized by methods other than hydrothermal synthesis can be used. Furthermore, the synthesized main component powder can be pulverized to adjust the particle size.

[0081] A hydrothermal synthesis of dielectric powder is achieved by subjecting a raw material containing an A-site element constituting the perovskite-type structure (A-site raw material) and a raw material containing a B-site element (B-site raw material) to a hydrothermal reaction under high temperature and pressure. Specifically, the raw materials and water are placed together in a sealed container such as an autoclave, and a hydrothermal reaction is initiated by heating. As the A-site raw material, hydroxides such as barium hydroxide (Ba(OH)₂) are used. As the B-site raw material, oxides such as titanium oxide (TiO₂) and metatitanic acid (TiO(OH)₂), or their hydrates, are used. While not limited, the heating temperature can be above 150°C and below 250°C. The product obtained from the hydrothermal reaction is dried to obtain dielectric powder. Furthermore, to improve the crystallinity of the dielectric powder, the product can be heat-treated. For example, heat treatment can be performed at a temperature above 800°C and below 1000°C.

[0082] <Mixed Processes>

[0083] In the mixing process, secondary component raw materials (Ni, Re, Mg, Mn, Si, Al, V, etc.) are mixed with the main component powder to obtain the dielectric raw material. Known ceramic raw materials such as oxides, carbonates, hydroxides, nitrates, organic acid salts, alkoxides, and / or chelate compounds can be used as secondary component raw materials. In addition to secondary component raw materials, composition control agents for the main component powder may also be added. For example, if the main component powder is barium titanate (BaTiO3) powder, adding Ba raw materials such as barium carbonate (BaCO3) can control the main component composition of the ceramic dielectric contained in the multilayer ceramic capacitor. The mixing method is not particularly limited. For example, a method of wet mixing and pulverizing by using a ball mill with weighed main component powder and secondary component raw materials, pulverizing media, and pure water can be used. In the case of wet mixing, the mixture only needs to be dried.

[0084] <Forming Process>

[0085] In the molding process, dielectric raw materials are added and mixed with binders and solvents to form a slurry. The resulting slurry is then used to form inner and outer layer raw material sheets. As the binder, known organic binders such as polyvinyl butyral binders can be used. Furthermore, as the solvent, known organic solvents such as toluene and ethanol can be used. Additives such as plasticizers may be added as needed. Molding is performed using known methods such as the RIP method. The thickness of the molded sheet is, for example, less than 1 μm.

[0086] <Printing Process>

[0087] In the printing process, conductive paste is used to form a patterned conductive paste layer on the surface of the inner layer, which is made of raw material. After firing, the conductive paste layer becomes the internal electrode layer. Conductive metals included in the conductive paste can be conductive materials such as nickel (Ni), copper (Cu), silver (Ag), palladium (Pd), and alloys containing them. Furthermore, ceramic components that function as common materials can also be added to the conductive paste. The main component powder of the dielectric layer can be used as the ceramic component. There are no particular limitations on the method of forming the conductive paste layer. For example, screen printing and gravure printing can be used.

[0088] <Layering Process>

[0089] In the lamination process, multiple inner layer raw material sheets with conductive paste layers are stacked, and outer layer raw material sheets are stacked on top of them. Then, the entire assembly is pressed together to create a laminated block. The inner layer raw material sheets undergo a firing process to become the ceramic dielectric (inner layer ceramic) constituting the inner layer of the laminated ceramic capacitor. The outer layer raw material sheets become the ceramic dielectric (outer layer ceramic) constituting the outer layer. The number of stacked raw material sheets is adjusted to obtain the desired capacitance.

[0090] <Cutting process>

[0091] In the cutting process, the obtained laminated block is cut to form a laminated piece. Cutting is performed to obtain a piece of a given size, with the conductive paste layer exposed on the end faces and sides of the laminated piece.

[0092] <Side edge forming process>

[0093] In the side edge forming process, the side edge raw material is attached to the side of the stacked small sheet to form the raw material body. The conductive paste layer exposed on the side of the stacked small sheet is covered by the side edge raw material. Furthermore, the side edge raw material becomes the side edge of the stacked ceramic capacitor after firing. As the raw material for the side edge raw material (side edge raw material powder), the main component powder and auxiliary component raw materials used in the production of the inner layer raw material sheet can be used.

[0094] The preparation and attachment of the side edge raw material can be carried out using known methods. For example, a method can be used to prepare a raw material sheet from a dielectric material that serves as the side edge material, and then bond the raw material sheet to the side of a laminated piece. In this case, to ensure reliable bonding of the raw material sheet, an adhesive aid such as an organic solvent can be pre-applied to the side of the laminated piece. Alternatively, a method can be used to prepare a paste from a dielectric material, apply the paste to the side of the laminated piece, and then dry it. The side edge raw material can be a single layer or a laminate containing multiple layers. A side edge raw material containing a laminate can be obtained by repeatedly applying and drying multiple raw material sheets to the side of the laminated piece.

[0095] If necessary, the obtained raw material body can also be subjected to tumbling grinding. This process can give the corners and / or edges of the raw material body a rounded edge.

[0096] <Firing Process>

[0097] In the firing process, the raw material body undergoes debinding and firing treatments to form the body. Through firing, the conductive paste layer and the inner layer are co-fired with raw material sheets to form the internal electrode layer and ceramic dielectric constituting the inner layer. The outer layer is sintered with raw material sheets to form the ceramic dielectric constituting the outer layer. The side edge raw material body is sintered to form the ceramic dielectric constituting the side edge.

[0098] The conditions for the debinding treatment depend on the type of organic binder contained in the raw material sheets and the conductive paste layer. Furthermore, the firing process should be carried out at a temperature that sufficiently densifies the stacked sheets. For example, it can be performed at a temperature of 1200°C to 1300°C for 0 to 10 minutes. Moreover, firing should be carried out in an atmosphere where the main component compounds such as BaTiO3 are not reduced and the oxidation of the conductive material is suppressed. For example, at an oxygen partial pressure of 1.8 × 10⁻⁶. -9 ~8.7×10 -10 The firing process can be carried out using a N2-H2-H2O gas flow at MPa. Furthermore, annealing can also be performed after firing.

[0099] <External Electrode Formation Process>

[0100] In the external electrode formation process, external electrodes are formed on the body portion to create a multilayer ceramic capacitor. The formation of the external electrodes can be performed using known methods. For example, a conductive paste, primarily composed of conductive materials such as Cu or Ni, is applied and fired onto the end faces of the internal electrodes that expose the body portion to form a substrate layer. Alternatively, the substrate layer can be formed by applying conductive paste to both end faces of the raw material body portion before firing. After forming the substrate layer, electroplating is performed to form a Ni, Sn, or other coated film on the surface of the substrate layer. This process produces a multilayer ceramic capacitor.

[0101] <Control of intragranular porosity ratio>

[0102] In the manufacturing method of this embodiment, the intragranular porosity ratio (N) of the inner ceramic layer, outer ceramic layer, and side edge ceramic is controlled. inner N outer N side ) is important. Specifically, controlling the manufacturing conditions so that the intragranular porosity ratio satisfies equation (1): N outer <N inner and equation (2): Nside <N inner both sides.

[0103] There are no limitations on the methods for controlling the intragranular porosity ratio. For example, one method is to add grain growth promoting materials and grain growth inhibiting materials to the main component powder and adjust their amounts. Examples of grain growth promoting materials include zirconium (Zr), silicon (Si), vanadium (V), and / or aluminum (Al). During the sintering process, dielectric particles undergo grain growth. As grain growth progresses, intragranular porosity decreases and eventually disappears. Therefore, if grain growth promoting materials are added to the outer layer green sheet and the side edge green body in greater quantities than to the inner layer green sheet, the intragranular porosity ratio of the outer and side edge ceramics can be suppressed. In this case, the concentration of grain growth promoting materials (Zr, etc.) in the outer and side edge ceramics becomes higher than that in the inner ceramics in the final multilayer ceramic capacitor.

[0104] Alternatively, one could cite adjusting the composition of the main component powder. The main component powder is a perovskite-type oxide, represented by BaTiO3, with a composition expressed as ABO3. For perovskite-type oxides, a smaller molar ratio (A / B ratio) of A-site elements (such as Ba) to B-site elements (such as Ti) promotes grain growth. Therefore, reducing the molar ratio (A / B ratio) of the main component powder in the outer layer green sheet and the side edge green body can suppress the intragranular porosity ratio of the outer layer ceramic and the side edge ceramic.

[0105] Furthermore, methods such as adjusting the particle size of raw material particles, including main component powder, can be cited. The smaller the raw material particles, the more advanced the grain growth. Therefore, when using main component powder with a smaller particle size than the main component powder of the inner layer raw material sheet, it is possible to suppress the intragranular void ratio of the outer layer ceramic and the side edge ceramic.

[0106] Other methods, besides hydrothermal synthesis, include adding dielectric powder synthesized by solid-state synthesis to the main component powder. As mentioned earlier, hydrothermally synthesized dielectric powder has intragranular porosity, while dielectric powder synthesized by methods other than hydrothermal synthesis does not. Therefore, by combining hydrothermally synthesized dielectric powder and dielectric powder synthesized by methods other than hydrothermal synthesis, the intragranular porosity ratio can be controlled. Specifically, methods include using hydrothermally synthesized dielectric powder to produce inner layer raw material sheets, and using a mixture of hydrothermally synthesized dielectric powder and dielectric powder synthesized by solid-state synthesis to produce outer layer raw material sheets and side edge raw material bodies.

[0107] If the ratio of intragranular voids in the inner ceramic layer, outer ceramic layer, and side edge ceramic layer can be controlled to meet a given relationship, then there are no restrictions on the method of controlling the intragranular void ratio.

[0108] Example

[0109] The following examples further illustrate this embodiment. However, the present invention is not limited to the following embodiments.

[0110] (1) Fabrication of multilayer ceramic capacitors

[0111] [Example 1]

[0112] In Example 1, barium titanate (BaTiO3) powder synthesized by hydrothermal method was used as the main component powder to fabricate inner layer green sheet, outer layer green sheet, and side edge green body, which were then used to fabricate a multilayer ceramic capacitor. The specific fabrication process is shown below.

[0113] Synthesis of the main component powder

[0114] Barium titanate (BaTiO3) powder was synthesized using a hydrothermal method. First, titanium oxide (TiO2) powder and barium hydroxide (Ba(OH)2) powder were weighed and mixed with pure water to prepare a slurry. Then, the slurry was placed in a sealed container, and the temperature was raised to 200–250°C while stirring. This temperature was maintained at 200–250°C for 4–24 hours to allow the liquid-phase reaction to proceed. Afterward, the internal pressure of the sealed container was restored to atmospheric pressure, heating was stopped, and the slurry was left to stand. After cooling, the slurry was removed from the sealed container and placed in a dryer to evaporate the moisture. In this way, hydrothermally synthesized BaTiO3 powder with an average particle size of 130 nm was obtained.

[0115] <Making of the inner layer using raw material sheets>

[0116] Barium carbonate (BaCO3) was added to hydrothermally synthesized BaTiO3 powder (average particle size 130 nm). The resulting mixture was wet-milled (blended) in water using a ZrO2 ball mill for 24 hours, then dried and heat-treated to prepare a dielectric raw material. The amount of BaCO3 added was adjusted so that the molar ratio (Ba / Ti ratio) of the ceramic dielectric constituting the inner layer of the final multilayer ceramic capacitor was 1.0025. Next, polyvinyl butyral binder and ethanol as an organic solvent were added to the obtained dielectric raw material, and the mixture was wet-mixed in a ball mill for a given time to prepare a slurry. The slurry was then sheet-formed to produce a raw material sheet for the inner layer.

[0117] <Making of the outer layer using raw material sheets>

[0118] BaCO3 and ZrO2 were added to hydrothermally synthesized BaTiO3 powder (average particle size 130 nm). The resulting mixture was wet-milled in water using a ZrO2 ball mill for 24 hours, then dried and heat-treated to prepare a dielectric raw material. The amount of BaCO3 added was adjusted so that the molar ratio (Ba / Ti ratio) of the ceramic dielectric constituting the outer layer of the final multilayer ceramic capacitor was 1.0025. Furthermore, the amount of ZrO2 added relative to the BaTiO3 powder was set to 0.3% by mass. Next, a polyvinyl butyral binder and ethanol as an organic solvent were added to the obtained dielectric raw material, and the mixture was wet-mixed in a ball mill for a given time to prepare a slurry. This slurry was then sheet-formed to produce a raw material sheet for the outer layer.

[0119] <Preparation of raw material for side edges>

[0120] BaCO3 and ZrO2 were added to hydrothermally synthesized BaTiO3 powder (average particle size 130 nm). The resulting mixture was wet-milled in water using a ZrO2 ball mill for 24 hours, then dried and heat-treated to prepare a dielectric raw material. The amount of BaCO3 added was adjusted so that the molar ratio (Ba / Ti ratio) of the ceramic dielectric constituting the side edge portion of the final multilayer ceramic capacitor was 1.0025. Furthermore, the amount of ZrO2 added relative to the BaTiO3 powder was set to 0.3% by mass. Next, a polyvinyl butyral binder and ethanol as an organic solvent were added to the obtained dielectric raw material, and the mixture was wet-mixed in a ball mill for a given time to prepare a slurry. This slurry was sheet-formed to produce the side edge green body.

[0121] <Creating Layered Objects>

[0122] A Ni-based conductive paste was screen-printed onto the surface of the obtained inner layer raw material sheet, forming a pattern for the conductive paste layer that would become the internal electrode layer. Then, multiple inner layer raw material sheets with conductive paste layers were stacked, and outer layer raw material sheets without conductive paste layers were placed on top and bottom of each other. The entire assembly was then pressed together to create a stacked block. The stacked block was then cut using a cutting saw to create smaller stacked pieces. The stacking process was repeated so that the ends of the conductive paste layers that were led out were different from each other. Furthermore, the pieces were cut so that the conductive paste layers were exposed on the sides and the leads of the conductive paste layers were exposed on the end faces.

[0123] The raw material body is made by pasting the side edges of the exposed conductive paste layer onto the two sides of the cut, stacked pieces.

[0124] The obtained raw material bulk was heat-treated in an N2 stream at a maximum temperature of 270°C, and then further heat-treated in an N2-H2O-H2 stream at a maximum temperature of 800°C. Subsequently, it was calcined in an N2-H2O-H2 stream. The calcination was carried out at a maximum temperature of 1230–1400°C, a heating rate of 20–60 m³ / s, a holding time of 60 min, and an oxygen partial pressure of 5.0 × 10⁻⁶. -13 ~1.7×10 -12 The process was carried out under conditions of MPa. Next, heat treatment was performed in a N2-H2O-H2 gas stream at a maximum temperature of 1050℃ for 60 minutes. This yielded the main body section.

[0125] A conductive paste, primarily composed of copper (Cu), was applied to the end face of the body portion from which the internal electrode layer was drawn, obtained through firing. The applied conductive paste was then fired at 900°C to form the base layer of the external electrode. Furthermore, Ni and Sn plating were sequentially performed on the surface of the base layer using wet plating. In this manner, a multilayer ceramic capacitor was fabricated.

[0126] The fabricated multilayer ceramic capacitor has a length (L) of 1.0 mm, a width (W) of 0.5 mm, and a thickness (T) of 0.5 mm. Furthermore, the inner dielectric layer has a thickness of 0.48 μm, the inner electrode layer has a thickness of 0.38 μm, and the number of dielectric layers is 510.

[0127] [Example 2]

[0128] In Example 2, hydrothermally synthesized BaTiO3 powder (average particle size 80 nm) was used instead of hydrothermally synthesized BaTiO3 powder (average particle size 130 nm) when fabricating the inner layer raw material sheet. Otherwise, a multilayer ceramic capacitor was fabricated in the same manner as in Example 1. Furthermore, the hydrothermally synthesized BaTiO3 powder (average particle size 80 nm) was synthesized using the same process as the hydrothermally synthesized BaTiO3 powder (average particle size 130 nm), except that the slurry temperature during hydrothermal treatment was lowered.

[0129] [Example 3]

[0130] In Example 3, ZrO2 was not added when fabricating the outer ceramic sheet and the side edge raw material. Furthermore, the amount of BaCO3 added was adjusted so that the molar ratio (Ba / Ti ratio) of the outer ceramic and the side edge ceramic was 1.0000. Otherwise, a multilayer ceramic capacitor was fabricated in the same manner as in Example 1.

[0131] [Example 4]

[0132] In Example 4, the amount of ZrO2 added when making the outer ceramic raw material sheet and the side edge raw material was changed from 0.3% by mass to 0.5% by mass. Otherwise, a multilayer ceramic capacitor was made in the same manner as in Example 1.

[0133] [Example 5]

[0134] In Example 5, the pulverization time for producing the outer ceramic raw material sheet and the side edge raw material was changed from 24 hours to 48 hours, and ZrO2 was not added. Otherwise, a multilayer ceramic capacitor was produced in the same manner as in Example 1.

[0135] [Example 6]

[0136] In Example 6, the pulverization time for preparing the side edge raw material was changed from 24 hours to 48 hours, and ZrO2 was not added. Otherwise, a multilayer ceramic capacitor was prepared in the same manner as in Example 1.

[0137] [Example 7]

[0138] In Example 7, the pulverization time for producing the outer ceramic raw material sheet was changed from 24 hours to 48 hours, and ZrO2 was not added. Otherwise, a multilayer ceramic capacitor was produced in the same manner as in Example 1.

[0139] [Example 8]

[0140] In Example 8, ZrO2 was added together with BaCO3 during the fabrication of the inner layer ceramic raw material sheet, and the amount of ZrO2 added was set to 0.1% by mass relative to the BaTiO3 powder. Otherwise, a multilayer ceramic capacitor was fabricated in the same manner as in Example 1.

[0141] [Example 9]

[0142] In Example 9, when fabricating the outer ceramic raw material sheet, a mixed powder comprising 70% by mass of hydrothermally synthesized BaTiO3 powder (average particle size 130 nm) and 30% by mass of solid-phase synthesized BaTiO3 powder (average particle size 130 nm) was used as the main component powder. Furthermore, the amount of BaCO3 added during the fabrication of the outer ceramic raw material sheet and the side edge raw material was adjusted so that the molar ratio (Ba / Ti ratio) of the outer ceramic and the side edge ceramic was 1.0050. Otherwise, a multilayer ceramic capacitor was fabricated in the same manner as in Example 1.

[0143] [Example 10]

[0144] In Example 10, when fabricating the outer ceramic raw material sheet, a mixed powder comprising 85% by mass of hydrothermally synthesized BaTiO3 powder (average particle size 130 nm) and 15% by mass of solid-phase synthesized BaTiO3 powder (average particle size 130 nm) was used as the main component powder. Furthermore, ZrO2 was not added when fabricating the outer ceramic raw material sheet and the side edge raw material body. The amount of BaCO3 added was adjusted so that the molar ratio (Ba / Ti ratio) of the outer ceramic and the side edge ceramic was 1.0050. Otherwise, a multilayer ceramic capacitor was fabricated in the same manner as in Example 1.

[0145] [Example 11]

[0146] In Example 11, ZrO2 was added together with BaCO3 during the fabrication of the inner layer ceramic raw material sheet, and the amount of ZrO2 added was set to 0.1% by mass relative to the BaTiO3 powder. Furthermore, ZrO2 was not added during the fabrication of the outer layer ceramic raw material sheet and the side edge raw material body. The amount of BaCO3 added was adjusted so that the molar ratio (Ba / Ti ratio) of the outer layer ceramic was 1.0000 and the molar ratio (Ba / Ti ratio) of the side edge ceramic was 1.0050. Otherwise, a multilayer ceramic capacitor was fabricated in the same manner as in Example 1.

[0147] [Comparative Example 1]

[0148] In Comparative Example 1, when preparing the inner layer ceramic raw material sheet, a mixed powder containing 10% by mass of hydrothermally synthesized BaTiO3 powder (average particle size 130 nm) and 90% by mass of solid-phase synthesized BaTiO3 powder (average particle size 130 nm) was used as the main component powder. Furthermore, the pulverization time for preparing the outer layer ceramic raw material sheet and the side edge raw material was changed from 24 hours to 12 hours, and ZrO2 was not added. Otherwise, a multilayer ceramic capacitor was prepared in the same manner as in Example 1.

[0149] [Comparative Example 2]

[0150] In Comparative Example 2, the pulverization time for producing the outer ceramic raw material sheet and the side edge raw material was changed from 24 hours to 12 hours, and ZrO2 was not added. Otherwise, a multilayer ceramic capacitor was produced in the same manner as in Example 1.

[0151] [Comparative Example 3]

[0152] In Comparative Example 3, the pulverization time for producing the outer ceramic raw material sheet was changed from 24 hours to 12 hours, and ZrO2 was not added. Otherwise, a multilayer ceramic capacitor was produced in the same manner as in Example 1.

[0153] [Comparative Example 4]

[0154] In Comparative Example 4, the pulverization time when producing the side-edge green body was changed from 24 hours to 12 hours, and ZrO2 was not added. Other than this, a multilayer ceramic capacitor was produced in the same manner as in Example 1.

[0155] (2) Evaluation

[0156] For the multilayer ceramic capacitors produced in Examples 1 to 11 and Comparative Examples 1 to 4, various characteristics were evaluated as follows.

[0157] <TEM Observation>

[0158] The WT surface of the multilayer ceramic capacitor was observed using a transmission electron microscope (TEM) to investigate the intragranular pore ratio. Specifically, the multilayer ceramic capacitor was polished to the center in the length direction to expose the WT surface, and processed to produce a TEM observation sample with a thickness of 80 nm containing the WT surface. Then, TEM observation of the obtained sample was performed. At this time, the cross-section was divided into an inner layer part, an outer layer part, and a side-edge part, and the ceramic dielectric part near the center in the W direction and T direction of the inner layer part, the center in the W direction and T direction of the outer layer part, and the center in the W direction and T direction of the side-edge part were observed respectively. Then, the number of pores present in the dielectric particles was calculated, and the obtained number was divided by the area of the ceramic part to calculate the number per unit area (1 μm 2 )). The same operation was performed at three positions (n = 3) in each of the inner layer part, outer layer part, and side-edge part, and the average value of the number of intragranular pores per unit area was obtained as the intragranular pore ratio.

[0159] <SEM Observation>

[0160] Using a scanning electron microscope (SEM), the WT surface of the multilayer ceramic capacitor was observed to investigate the thickness of the dielectric layer and the particle diameter (D50) of the dielectric particles. Specifically, the multilayer ceramic capacitor was polished to the center in the length (L) direction to expose the cross-section (WT surface). Then, in the exposed cross-section, on a total of five lines including the center line in the width direction W and two lines equally spaced on both sides from this center line toward the width direction W, the thickness of the dielectric layer of the inner layer part near the center in the thickness direction was measured, and its average value was set as the thickness of the dielectric layer.

[0161] In addition, SEM images of dielectric particles in the dielectric layer in the exposed cross-section were taken under the conditions of a magnification of 5000 times, an acceleration voltage of 15 kV, and a field of view of 30 μm × 30 μm. At this time, the dielectric layer portions near the centers in the W direction and the T direction of the inner layer were photographed. Then, an image processing software was used to identify the edges of all dielectric particles, calculate the cross-sectional area of the particles, and calculate the equivalent circle diameter as the diameter of the particles based on this area. Excluding the defective dielectric particles in the photograph, the diameters of all dielectric particles contained in the photographed range were measured, and their average value was obtained, and the average particle diameter (D50 inner of the dielectric particles in the inner layer ceramic was obtained. In addition, photographs were taken near the centers in the W direction and the T direction of the outer layer portion, and near the centers in the W direction and the T direction of the side edge portion, and the average particle diameter (D50 outer of the dielectric particles in the outer layer ceramic, and the average particle diameter (D50 side of the dielectric particles in the side edge ceramic were obtained.

[0162] <Humidity Resistance Load Test>

[0163] For 100 samples, a humidity resistance load test was carried out under the conditions of 85°C - relative humidity 85% - 6.3 V. After 250 hours, 500 hours, or 1000 hours, the samples were taken out of the test tank, and the insulation resistance (IR) when a voltage of 6.3 V was applied for 60 seconds at room temperature was measured. Then, based on the criterion of LogIR > 4, the case where all 100 samples met the criterion was judged as qualified (〇), and the case where there was more than one sample with LogIR ≤ 4 was judged as unqualified (×). And based on the obtained humidity resistance test results, the following criteria were used for judgment.

[0164] ◎: Qualified after 1000 hours

[0165] 〇: Qualified after 250 hours, but unqualified after 500 hours or 1000 hours

[0166] ×: Unqualified after 250 hours

[0167] (3) Evaluation Results

[0168] The evaluation results obtained for the multilayer ceramic capacitors of Examples 1 to 11 and Comparative Examples 1 to 4 are summarized in Table 1.

[0169] In Examples 1 to 11, the intra-granular void ratios (N outer , N side in both the outer layer portion and the side edge portion were smaller than the intra-granular void ratio (N inner). Therefore, the results of the moisture resistance load test were good and passed after 250 hours. In particular, the results of the moisture resistance load test for Examples 1, 2, and 4 to 8 were particularly good and passed even after 1000 hours.

[0170] In addition, among Examples 1 to 11, there were differences in the results of the moisture resistance load test. This is because although the number of intragranular pores has a great influence on moisture resistance, secondly, the dissolution property of the grain boundary components into water also affects moisture resistance. If the grain boundary components are easily dissolved, the moisture resistance decreases. For example, if the molar ratio (Ba / Ti) is increased, the amount of Ba in the ceramic increases and the Ba concentration at the grain boundaries becomes higher. If the Ba concentration at the grain boundaries is high, it becomes easier to cause the dissolution of the grain boundary components into water. Therefore, the moisture resistance decreases. In addition, if the amount of Zr in the ceramic is large, the Zr concentration at the grain boundaries becomes high. The Zr at the grain boundaries inhibits the dissolution of the grain boundary components. On the contrary, if Zr is less, the Zr concentration at the grain boundaries becomes low and the dissolution of the grain boundary components cannot be inhibited. Therefore, the moisture resistance time becomes shorter.

[0171] Therefore, even among Examples 1 to 11, the moisture resistance of Example 9 with a relatively high molar ratio is relatively low, and the result of the moisture resistance load test is "〇". In addition, the moisture resistance of Examples 3 and 11 with a relatively small amount of Zr is also relatively low, and the result of the moisture resistance load test is "〇". Although the result of the moisture resistance load test for Example 10 is "〇", the molar ratio is high and the amount of Zr is low. Therefore, although it passed after 250 hours, it became unqualified after 500 hours.

[0172] The intragranular porosity (N outer 、N side ) of one or both of the outer layer part and the side edge part in Comparative Examples 1 to 4 is greater than the intragranular porosity (N inner ) of the inner layer part. Therefore, the results of the moisture resistance load test were poor and failed after 250 hours.

[0173] [Table 1]

[0174]

[0175] From the above results, it can be understood that according to the present embodiment, a multilayer ceramic capacitor having particularly excellent moisture resistance can be provided.

[0176] As described above, the embodiments of the present invention have been described, but the present invention is not limited to the embodiments and can be implemented in various ways without departing from the gist of the present invention. The present invention includes the following combinations.

[0177] <1>A multilayer ceramic capacitor having:

[0178] In the inner layer, a first inner electrode layer and a second inner electrode layer are alternately stacked with a dielectric layer formed of ceramic dielectric as a gap. The inner layer has a first main surface as a surface of the stacking direction, a second main surface as a surface opposite to the first main surface, a first side surface as a surface of the width direction orthogonal to the first main surface and the second main surface and through which the first inner electrode layer and the second inner electrode layer extend, a second side surface as a surface opposite to the first side surface and through which the first inner electrode layer and the second inner electrode layer extend, a first end surface as a surface of the length direction orthogonal to the first main surface, the second main surface, the first side surface and the second side surface and through which the first end surface extends, and a second end surface as a surface opposite to the first end surface and through which the second inner electrode layer extends.

[0179] The first outer layer is formed of a ceramic dielectric and covers the first main surface from the stacking direction;

[0180] The second outer layer is formed of a ceramic dielectric and covers the second main surface from the stacking direction;

[0181] The first side edge portion is formed of a ceramic dielectric and covers the inner layer portion, the first outer layer portion, and the second outer layer portion from one side in the width direction;

[0182] The second side edge portion, formed of a ceramic dielectric, covers the inner layer portion, the first outer layer portion, and the second outer layer portion from the other side in the width direction; and

[0183] A pair of external electrodes are disposed on the first end face and the second end face, and are respectively connected to the first internal electrode layer and the second internal electrode layer.

[0184] The ceramic dielectric constituting the inner layer, the first outer layer, the second outer layer, the first side edge, and the second side edge each has a plurality of dielectric particles with internal pores.

[0185] The intragranular porosity ratio N of the ceramic dielectric in the inner layer inner The intragranular porosity ratio N of the ceramic dielectric in the first outer layer and the second outer layer outer The intragranular porosity ratio N of the ceramic dielectric in the first side edge portion and the second side edge portion side Satisfying equation (1): N outer <N inner and equation (2): N side <N inner both sides.

[0186] <2> According to the above <1> A multilayer ceramic capacitor, wherein the Zr concentration of the ceramic dielectric in the inner layer is Zr inner The Zr concentration of the ceramic dielectric in the first outer layer and the second outer layer. outer The Zr concentration of the ceramic dielectric in the first side edge and the second side edge. side Satisfying equation (3): Zr inner <Zr outer And equation (4): Zr inner <Zr side both sides.

[0187] <3> According to the above <1> or <2> A multilayer ceramic capacitor, wherein the average particle size D50 of the dielectric particles in the inner layer of the ceramic dielectric is... inner The average particle size D50 of the dielectric particles in the ceramic dielectric in the first outer layer and the second outer layer. outer The average particle size D50 of the dielectric particles of the ceramic in the first side edge portion and the second side edge portion. side Satisfying equation (5): D50 inner <D50 outer And equation (6): D50 inner <D50 side both sides.

[0188] <4> According to the above <3> A multilayer ceramic capacitor, wherein the D50 inner It is between 130nm and 210nm.

[0189] <5> According to the above <1> ~ <4> A multilayer ceramic capacitor of any one of the following, wherein the N inner The N outer and the N side Satisfying equation (7): N outer <N side <N inner .

[0190] <6> According to the above <1> ~ <4> A multilayer ceramic capacitor of any one of the following, wherein the N inner The N outer and the N side Satisfying equation (8): N side <N outer <N inner .

[0191] Explanation of reference numerals in the attached figures

[0192] 2: Dielectric layer

[0193] 4: Internal electrode layer

[0194] 6: Body part

[0195] 8a: First external electrode

[0196] 8b: Second external electrode

[0197] 10a: 1st outer main surface

[0198] 10b: Second Outer Face

[0199] 12a: First outer surface

[0200] 12b: Second outer surface

[0201] 14a: First outer end face

[0202] 14b: Second outer end face

[0203] 16: Inner layer

[0204] 18a: First outer layer

[0205] 18b: Second outer layer

[0206] 20a: First side edge

[0207] 20b: Second side edge

[0208] 22: Internal Area

[0209] 100: Multilayer ceramic capacitor.

Claims

1. A multilayer ceramic capacitor, comprising: In the inner layer, a first inner electrode layer and a second inner electrode layer are alternately stacked with a dielectric layer formed of ceramic dielectric as a gap. The inner layer has a first main surface as a surface of the stacking direction, a second main surface as a surface opposite to the first main surface, a first side surface as a surface of the width direction orthogonal to the first main surface and the second main surface and through which the first inner electrode layer and the second inner electrode layer extend, a second side surface as a surface opposite to the first side surface and through which the first inner electrode layer and the second inner electrode layer extend, a first end surface as a surface of the length direction orthogonal to the first main surface, the second main surface, the first side surface and the second side surface and through which the first end surface extends, and a second end surface as a surface opposite to the first end surface and through which the second inner electrode layer extends. The first outer layer is formed of a ceramic dielectric and covers the first main surface from the stacking direction; The second outer layer is formed of a ceramic dielectric and covers the second main surface from the stacking direction; The first side edge portion is formed of a ceramic dielectric and covers the inner layer portion, the first outer layer portion, and the second outer layer portion from one side in the width direction; The second side edge portion, formed of a ceramic dielectric, covers the inner layer portion, the first outer layer portion, and the second outer layer portion from the other side in the width direction; and A pair of external electrodes are disposed on the first end face and the second end face, and are respectively connected to the first internal electrode layer and the second internal electrode layer. The ceramic dielectric constituting the inner layer, the first outer layer, the second outer layer, the first side edge, and the second side edge each has a plurality of dielectric particles with internal pores. The intragranular porosity ratio N of the ceramic dielectric in the inner layer inner The intragranular porosity ratio N of the ceramic dielectric in the first outer layer and the second outer layer outer The intragranular porosity ratio N of the ceramic dielectric in the first side edge portion and the second side edge portion side Satisfying equation (1): N outer <N inner and equation (2): N side <N inner both sides.

2. The multilayer ceramic capacitor according to claim 1, wherein, The Zr concentration in the ceramic dielectric of the inner layer is Zr inner The Zr concentration of the ceramic dielectric in the first outer layer and the second outer layer. outer The Zr concentration of the ceramic dielectric in the first side edge and the second side edge. side Satisfying equation (3): Zr inner <Zr outer And equation (4): Zr inner <Zr side both sides.

3. The multilayer ceramic capacitor according to claim 1 or 2, wherein, The average particle size D50 of the dielectric particles in the inner layer ceramic dielectric is mentioned. inner The average particle size D50 of the dielectric particles in the ceramic dielectric in the first outer layer and the second outer layer. outer The average particle size D50 of the dielectric particles of the ceramic in the first side edge portion and the second side edge portion. side Satisfying equation (5): D50 inner <D50 outer And equation (6): D50 inner <D50 side both sides.

4. The multilayer ceramic capacitor according to claim 3, wherein, The D50 inner It is between 130nm and 210nm.

5. The multilayer ceramic capacitor according to any one of claims 1 to 4, wherein, The N inner The N outer and the N side Satisfying equation (7): N outer <N side <N inner .

6. The multilayer ceramic capacitor according to any one of claims 1 to 4, wherein, The N inner The N outer and the N side Satisfying equation (8): N side <N outer <N inner .

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