Liquid discharge head and liquid discharge apparatus

Abstract

The present disclosure relates to a liquid discharge head including: a discharge module having a discharge driving element and a discharge heater electrically connectable with the discharge driving element; a circulation module arranged in pairs with the discharge module and having a circulation driving element and a circulation heater electrically connectable to the circulation driving element; and a pulse width controller that differentiates between a discharge pulse width for controlling the discharge drive element to the ON state and a cycle pulse width for controlling the cycle drive element to the ON state. The present disclosure also relates to a liquid discharge apparatus.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to a liquid discharge head that discharges liquid while circulating the liquid, and a liquid discharge apparatus. BACKGROUND

[0002] Conventionally, in a circulating liquid discharge apparatus that circulates liquid (also referred to as ink), a liquid discharge apparatus is known that circulates ink in a circulation flow path that communicates with a discharge hole by a circulation driving element that is different from a discharge driving element for discharging ink. International Publication No. WO 2018 / 190872 (hereinafter referred to as Document 1) discloses a technique of selectively driving the discharge driving element and the circulation driving element.

[0003] However, according to the technique disclosed in Document 1, even if the required driving power of the discharge driving element and the required driving power of the circulation driving element are different, the driving pulse width of each of the discharge driving element and the circulation driving element is the same. Therefore, there is a case where the driving power cannot be appropriately supplied to at least one of the discharge driving element and the circulation driving element. SUMMARY

[0004] An object of the present disclosure is to enable the driving power to be appropriately supplied to each of the discharge driving element and the circulation driving element.

[0005] A liquid discharge head according to one aspect of the present disclosure includes: a discharge module having a discharge driving element and a discharge heater capable of being electrically connected to the discharge driving element; a circulation module for being arranged in pairs with the discharge module and having a circulation driving element and a circulation heater capable of being electrically connected to the circulation driving element; and a pulse width controller for distinguishing a discharge pulse width for controlling the discharge driving element to an on state from a circulation pulse width for controlling the circulation driving element to an on state.

[0006] The features of the present disclosure will become apparent from the following description of the embodiments with reference to the accompanying drawings. The following description of embodiments is described by way of example. BRIEF DESCRIPTION OF DRAWINGS

[0007] FIG. 1A is a perspective view schematically showing a liquid discharge apparatus having a main ink tank as a liquid reservoir provided outside a liquid discharge head;

[0008] FIG. 1B is a perspective view schematically showing a liquid discharge apparatus having a sub ink tank provided directly above a liquid discharge head;

[0009] is a perspective view schematically showing a liquid discharge apparatus having a main ink tank as a liquid reservoir provided outside a liquid discharge head;FIG. 2A is an exploded perspective view of the liquid discharge head in FIG. 1;

[0010] FIG. 2B is a diagram showing an example in which one discharge element substrate is provided for four colors;

[0011] FIG. 2C shows an example in which one discharge element substrate is provided for two colors;

[0012] FIG. 2D is a diagram showing an example in which one discharge element substrate is provided for one color;

[0013] FIG. 3 is a diagram showing FIG. 2A an example of the circuit configuration of the discharge element substrate in

[0014] FIG. 4A is a functional block diagram of the circuit configuration of the control data supply circuit;

[0015] FIG. 4B is a diagram showing FIG. 4A the circuit configuration of the cycle group control circuit in

[0016] FIG. 5 is a diagram showing FIG. 3 an example of the circuit configuration of the pulse width shortening circuit in

[0017] FIG. 6A is a diagram showing FIG. 5 the pulse shape at 6A in

[0018] FIG. 6B is a diagram showing FIG. 5 the pulse shape at 6B in

[0019] FIG. 6C is a diagram showing FIG. 5 the pulse shape at 6C in

[0020] FIG. 7 is a diagram showing FIG. 5 an exemplary circuit configuration of the delay circuit in

[0021] FIG. 8 is a diagram showing FIG. 5 another exemplary circuit configuration of the delay circuit in

[0022] FIG. 9 is a plan view of the discharge element substrate;

[0023] FIG. 10 is a diagram showing an exemplary overall configuration of a liquid discharge apparatus according to a second embodiment;

[0024] FIG. 11 is a diagram showing an example of a circuit configuration of a pulse width extension circuit in FIG. 10

[0025] FIG. 12A is a diagram showing an example of a circuit configuration of a pulse width extension circuit in FIG. 11

[0026] FIG. 12B is a diagram showing an example of a circuit configuration of a pulse width extension circuit in FIG. 11

[0027] FIG. 12C is a diagram showing an example of a circuit configuration of a pulse width extension circuit in FIG. 11

[0028] FIG. 13 is a diagram showing an example of a circuit configuration of a pulse width extension circuit in

[0029] FIG. 14 is a diagram showing an example of a circuit configuration of a pulse width extension circuit in FIG. 13

[0030] FIG. 15 is a diagram showing an example of a circuit configuration of a pulse width extension circuit in FIG. 14 DETAILED DESCRIPTION

[0031] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. The following embodiments are not intended to limit the matters disclosed herein. In addition, all combinations of features described in the following embodiments are not necessarily essential to the solution of the present disclosure. In this document, the same constituent elements will be indicated with the same reference numerals.

[0032] (SUMMARY)

[0033] Conventionally, it has been pointed out that there is a risk that volatile components in ink evaporate from the discharge hole through which the ink is discharged, thereby causing the ink in the discharge hole to thicken. This thickening of the ink can cause the ink discharge speed to change, and can cause discharge defects such as the landing precision of the ink. Specifically, when the ink discharge operation is suspended for a long period of time, the increase in the viscosity of the ink becomes significant. Therefore, solid components in the ink adhere to the inside of the discharge hole, thereby increasing the flow resistance of the ink, and easily causing defective discharge of the ink.

[0034] ​​​​​​One known method for processing this thickening of ink is to flow fresh liquid into the discharge holes in the liquid chamber. One method for flowing liquid is to circulate liquid in the head by a pressure difference using a main pump provided separately from the fluid die that discharges liquid. Alternatively, a method is known in which a circulation element is provided in the fluid die itself to circulate liquid. Alternatively, a method is known in which liquid is circulated by bubbles through a heating element as a circulation element in the fluid die itself.

[0035] Document 1 discloses an arrangement in which a fluid die is provided with a flow energy generating element, and liquid is circulated through an array of discharge holes located between opposite ends of a flow path that extends to intersect the array of discharge holes.

[0036] However, the roles of the discharge heater and the circulation heater are different, and thus different amounts of driving energy are required. Furthermore, the amount of energy required varies with the configuration of the flow path, the size of each heater, and the like. On the other hand, from the viewpoint of energy saving, durability, and the like, it is desirable to apply appropriate driving pulses according to each configuration. In the case of the circuit configuration shown in Document 1, a signal of the same driving pulse width (hereinafter referred to as an on-demand pulse width) is input to both the discharge heater and the circulation heater, and thus one of the discharge heater and the circulation heater can receive insufficient or excessive driving energy. If separate heating enable terminals are provided so as to change the pulse width depending on whether a pulse is applied to the discharge heater or the circulation heater, the number of pads increases, the signal lines outside the recording element substrate increase, and the cost of the liquid discharge head can increase. FIG. 5

[0037] In view of this, the present disclosure is characterized by distinguishing a discharge pulse width for controlling a discharge driving element into an on state from a circulation pulse width for controlling a circulation driving element into an on state. Thus, if the pulse width that needs to be reduced in power consumption is relatively shortened, the balance of the overall power consumption can be adjusted. Thus, power insufficiency and excess power in each of the discharge driving element and the circulation driving element can be addressed.

[0038] (First Embodiment)

[0039] < Liquid discharge apparatus 50 >

[0040] FIG. 1A and FIG. 1B is a diagram showing an exemplary overall configuration of a liquid discharge apparatus 50 according to the first embodiment. FIG. 1A is a diagram schematically showing a perspective view of the liquid discharge apparatus 50 having an ink tank 2 as a liquid reservoir provided outside the liquid discharge head 1. FIG. 1B ​is a perspective view schematically showing a liquid discharge apparatus 50 having a sub-ink tank 54 disposed directly above the liquid discharge head 1. First, the portions common to FIG. 1A and FIG. 1B will be described.

[0041] The liquid discharge apparatus 50 includes the liquid discharge head 1 and convey rollers 55, 56, 57, and 58. The liquid discharge head 1 is capable of scanning the discharge medium P in a direction X intersecting (in this embodiment, orthogonal to) a convey direction Y of the discharge medium P. The liquid discharge head 1 is mounted on a carriage 60. The carriage 60 reciprocates along a guide shaft 51 in a main scanning direction (also referred to as the direction X). The convey rollers 55, 56, 57, and 58 convey the discharge medium P in a sub-scanning direction (also referred to as the convey direction Y) intersecting (in this embodiment, orthogonal to) the main scanning direction. That is, the liquid discharge apparatus 50 constitutes a serial type inkjet discharge apparatus that forms an image by discharging liquid from the liquid discharge head 1 onto the discharge medium P conveyed in the convey direction Y while moving the liquid discharge head 1 in the direction X. Note that the application of the present disclosure is not limited to the serial type inkjet discharge apparatus. The present disclosure can also be applied to a page-wide type inkjet discharge apparatus that forms an image by discharging liquid onto the discharge medium P conveyed in the convey direction Y using a line head (page-wide type head) longer in the page width direction of the discharge medium P. Note that in FIG. 1A and FIG. 1B , the direction Z is a vertical direction. That is, the direction Z is a direction intersecting (in this embodiment, orthogonal to) the X-Y plane defined by the direction X and the convey direction Y.

[0042] The liquid discharge head 1 is capable of discharging four types of ink, i.e., black (K), cyan C, magenta (M), and yellow (Y). The liquid discharge head 1 can form a full-color image by these four types of ink. Note that the ink dischargeable from the liquid discharge head 1 is not limited to the above-described four types of ink. For example, the present disclosure can also be applied to a liquid discharge head 1 for discharging other types of ink, such as spot color ink. That is, the types and number of ink discharged from the liquid discharge head are not limited.

[0043] Next, the differences between FIG. 1A and FIG. 1B will be described. In FIG. 1A , the sub-ink tank 54 is mounted on the liquid discharge head 1. Four ink supply tubes (liquid communication paths) 59 are attached to the sub-ink tank 54. The liquid discharge apparatus 50 further includes the ink tank 2 and the external pump 21. The ink tank 2 stores ink. The ink stored in the ink tank 2 is supplied to the sub-ink tank 54 under the driving force of the external pump 21 through the four ink supply tubes 59. On the other hand, in FIG. 1B , the sub-ink tank 54 is disposed directly above the liquid discharge head 1. FIG. 1B and FIG. 1AThe difference is that the ink tank 2 is not provided outside the liquid discharge head 1, and therefore the four ink supply tubes 59 are not attached, and the external pump 21 is not provided. Note that in both FIG. 1A and FIG. 1B , the liquid discharge head 1 can be provided integrally with the sub-ink tank 54, and can be configured so that the liquid discharge head 1 can be removably attached to the carriage 60. Alternatively, the sub-ink tank 54 can be provided integrally with the carriage 60, and the sub-ink tank 54 can be removably attached to the carriage 60 separately. The following description will be made with reference to the configuration in FIG. 1A .

[0044] <LIQUID DISCHARGE HEAD 1>

[0045] FIG. 2A , FIG. 2B , FIG. 2C and FIG. 2D are diagrams showing an exemplary basic configuration of the liquid discharge head 1 in FIG. 1. FIG. 2A is an exploded perspective view of the liquid discharge head 1 in FIG. 1.

[0046] FIG. 2B , FIG. 2C and FIG. 2D are overall views of the discharge element substrate a0. The liquid discharge head 1 includes a housing portion 53, a sub-ink tank 54, an electrical contact substrate 61, and a discharge element unit 100. The sub-ink tank 54 is housed within the housing portion 53. The discharge element unit 100 is provided in a bottom portion of the housing portion 53. On a face of the housing portion 53, four joints 53a to be connected to the four ink supply tubes 59 corresponding to the four types of ink are provided. In other words, separate ink supply paths are provided for different types of ink. The electrical contact substrate 61 is fixed to a face opposite to the face on which the four joints 53a are provided. In a state in which the liquid discharge head 1 is mounted on the carriage 60, the electrical contact substrate 61 is electrically connected with an electrical connection portion of the carriage 60. This connection allows the electrical contact substrate 61 to receive electrical signals from a main unit of the liquid discharge apparatus. The electrical signals received by the electrical contact substrate 61 are transmitted to the discharge element substrate a0 via the electrical wiring member 501.

[0047] The discharge element unit 100 includes a first support member 504, a second support member 503, a discharge element substrate α0, and an electric wiring member 501. An ink supply port and an ink collection port are provided in the first support member 504. An opening 503a is provided in the second support member 503. The discharge element substrate α0 is adhered and fixed to the first support member 504. The first support member 504 is adhered and fixed to the second support member 503. The second support member 503 holds the electric wiring member 501 in a manner such that the electric wiring member 501 is electrically connected with the discharge element substrate α0. The electric wiring member 501 applies an electric signal for discharging ink or an electric signal for circulating ink to the discharge element substrate α0. The electric signal for discharging ink or the electric signal for circulating ink will be described later in detail.

[0048] FIG. 2B An example in which one discharge element substrate α0 is provided for four colors is shown. The four colors are, for example, black, cyan, magenta, and yellow, and the discharge element substrates α0 are divided into arrays on the basis of the colors. The arrays each extend along the conveyance direction Y and are spaced apart from one another in the direction X. Each array includes a plurality of discharge holes arranged at regular intervals in the Y direction. Note that the discharge holes in each array can be arranged in rows along the Y direction instead of being spaced apart from one another in the direction X. Alternatively, the discharge holes for the four colors can be arranged in a total of five rows, in which only the discharge holes for black are arranged in two rows, and the discharge holes for the other three colors are each arranged in one row. FIG. 2C An example in which one discharge element substrate α0 is provided for two colors is shown. That is, one liquid discharge head 1 can be provided with two discharge element substrates α0. Alternatively, two liquid discharge heads 1 each provided with one such discharge element substrate α0 can be prepared. FIG. 2D An example in which one discharge element substrate α0 is provided for one color is shown. That is, one liquid discharge head 1 can be provided with four discharge element substrates α0. Alternatively, four liquid discharge heads 1 each provided with one such discharge element substrate α0 can be prepared. In the case where a plurality of separate discharge element substrates α0 are used (as in the case shown in FIG. 2C and FIG. 2D As shown in the case, all of the discharge element substrates α0 need not have the same length. Furthermore, the discharge element substrates α0 can be provided for various other numbers and combinations of colors, and the same applies to the case where the total number of colors is greater than four. In the following, the electric signal for discharging ink and the electric signal for circulating ink will be described in detail with reference to an example of use of a circuit configuration and the like.

[0049] (discharge element substrate α0)

[0050] FIG. 3 is shownFIG. 2A A diagram showing an example of the circuit configuration of the discharge element substrate α0. FIG. 4A and FIG. 4B It is shown FIG. 3 A diagram showing an example of the circuit configuration of the control data supply circuit α3. FIG. 4A This is a functional block diagram of the circuit configuration for controlling the data supply circuit α3. FIG. 4B It is shown FIG. 4A The circuit configuration diagram of the loop control circuit α12 in the diagram. FIG. 5 This is a diagram illustrating an example of the circuit configuration of the pulse width shortening circuit γ1. FIG. 6A to FIG. 6C It is shown FIG. 5 A diagram illustrating an exemplary change in the pulse width shortening circuit γ1. Various signals are supplied from the main substrate β0 to the discharge element substrate α0. The main substrate β0 includes a controller β1 and a power supply circuit β2. The controller β1 mainly includes a ROM, RAM, and CPU, and supplies various electrical signals to the discharge element substrate α0 to control the liquid discharge head 1. The controller β1 supplies the discharge element substrate α0 with a heating enable signal HE, a latch signal LT, a data signal DATA, and a clock signal CLK. These signals will be described in detail later. The power supply circuit β2 applies a power supply voltage VH to the discharge element substrate α0. The power supply circuit β2 and the discharge element substrate α0...

[0051] The zeros are connected to each other at GNDH. GNDH is used as the ground potential.

[0052] (Overview of wiring)

[0053] FIG. 3 The discharge element substrate α0 includes multiple discharge modules α1, multiple circulation modules α2, a control data supply circuit α3, and a pulse width shortening circuit γ1. Circulation modules α2 are arranged in pairs with discharge modules α1. Therefore, the number of circulation modules α2 is equal to the number of discharge modules α1. Between the multiple discharge modules α1 and the control data supply circuit α3, a discharge group selection signal wiring α6, a common time division selection signal wiring α8, and a transmission wiring for the discharge heating enable signal tHE are provided. Between the multiple circulation modules α2 and the control data supply circuit α3, a circulation group selection signal wiring α7, a common time division selection signal wiring α8, and a transmission wiring for the cyclic heating enable signal pHE are provided.

[0054] It should be noted that the discharge heating enable signal tHE is the heating enable signal HE transmitted without change. On the other hand, the circulation heating enable signal pHE is the heating enable signal HE passed through the pulse width shortening circuit γl. As described in detail later, the pulse width shortening circuit γl is a circuit that reduces the pulse width of an input signal and outputs a signal having a reduced pulse width. Therefore, the pulse width of the circulation heating enable signal pHE is shorter than the pulse width of the discharge heating enable signal tHE. Further, the common time division selection signal line α8 is shared by the discharge module al and the circulation module a2, and this contributes to shortening the transmission amount of serial data described later, and reducing the layout area of the signal lines on the discharge element substrate aO.

[0055] (discharge module al)

[0056] FIG. 3The discharge module α1 in the α1 includes a discharge heater RhA, a discharge drive element MD1, and a discharge logic circuit AND1. The discharge heater RhA is formed of, for example, an electrothermal conversion element. The discharge heater RhA is in a state in which a power supply voltage VH is applied to the discharge heater RhA, and a current flows through the discharge heater RhA when the discharge drive element MD1 is turned on. The discharge drive element MD1 is formed of, for example, a metal oxide semiconductor field effect transistor (MOSFET). Note that the discharge drive element MD1 need not be formed of a MOSFET. For example, the discharge drive element MD1 can be formed of a bipolar transistor. Alternatively, the discharge drive element MD1 can be formed of an insulated gate bipolar transistor (IGBT). The discharge logic circuit AND1 selectively drives the discharge drive element MD1. A discharge heating enable signal tHE, a discharge group selection signal, and a common time division selection signal are input to an input side of the discharge logic circuit AND1. The discharge heating enable signal tHE is a heating enable signal HE emitted from the controller β1 and transmitted without change. The discharge heating enable signal tHE controls a current pulse width of the discharge drive element MD1, that is, a period in which a drain and a source of the discharge drive element MD1 are turned on and a current keeps flowing between the drain and the source of the discharge drive element MD1. The discharge heating enable signal tHE is a signal for adjusting the current pulse width by taking various manufacturing deviations into consideration so that a desired amount of heat energy can be generated. The various manufacturing deviations include, for example, a manufacturing deviation of a resistance value of the discharge heater RhA mounted on the discharge element substrate α0 and a manufacturing deviation of the power supply circuit β2. The various manufacturing deviations also include a voltage drop on a power supply side wiring when a plurality of heaters such as the discharge heater RhA and the circulation heater RhB are simultaneously driven. Note that the heaters simultaneously driven here are the discharge heater RhA and the circulation heater RhB not arranged in pair with the discharge heater RhA. The heating enable signal HE can be emitted from the controller β1 through an external input terminal (not shown) provided on the discharge element substrate α0. The discharge group selection signal is supplied on a discharge group selection signal wiring α6. The discharge time division selection signal is supplied on a common time division selection signal wiring α8. An output side of the discharge logic circuit AND1 is connected to a gate of the discharge drive element MD1. Thus, when all the signals input to the input side of the discharge logic circuit AND1 are 1, a voltage is applied to the gate of the discharge drive element MD1, and the drain and the source of the discharge drive element MD1 are turned on. When the drain and the source of the discharge drive element MD1 are turned on, a current flows through the discharge heater RhA so that the discharge heater RhA generates heat. Through this series of operations, ink can be bubbled and discharged onto the discharge medium P. Although an example in which the discharge heater RhA is formed of an electrothermal conversion element has been described, this is not intended to be limiting. For example, the discharge heater RhA can be formed of a piezoelectric element.

[0057] (circulation module α2)

[0058] FIG. 3 The circulation module α2 in the circulation module α2 includes a circulation heater RhB, a circulation drive element MD2, and a circulation logic circuit AND2. The circulation heater RhB is formed of, for example, an electrothermal conversion element. The circulation heater RhB is in a state in which a power supply voltage VH is applied to the circulation heater RhB, and a current flows through the circulation heater RhB when the circulation drive element MD2 is turned on. The circulation drive element MD2 is formed of, for example, a metal oxide semiconductor field effect transistor (MOSFET). Note that the circulation drive element MD2 does not necessarily have to be formed of a MOSFET. For example, the circulation drive element MD2 can be formed of a bipolar transistor. Alternatively, the circulation drive element MD2 can be formed of an insulated gate bipolar transistor (IGBT). The circulation logic circuit AND2 selectively drives the circulation drive element MD2. A circulation heating enable signal pHE, a circulation group selection signal, and a common time division selection signal are input to an input side of the circulation logic circuit AND2. The circulation heating enable signal pHE is transmitted from the controller β1 via a pulse width shortening circuit γ1. The pulse width shortening circuit γ1 will be described later in detail. The circulation heating enable signal pHE controls a current pulse width of the circulation drive element MD2, that is, a period in which a drain and a source of the circulation drive element MD2 are turned on and a current keeps flowing between the drain and the source of the circulation drive element MD2. The circulation heating enable signal pHE is a signal for adjusting the current pulse width by taking various manufacturing deviations into consideration so that a desired amount of heat energy can be generated. The various manufacturing deviations include, for example, a manufacturing deviation of a resistance value of the circulation heater RhB mounted on the discharge element substrate α0 and a manufacturing deviation of the power supply circuit β2. The various manufacturing deviations also include a voltage drop on a power supply side wiring when a plurality of heaters such as the circulation heater RhB and the discharge heater RhA are simultaneously driven. Note that the circulation heating enable signal pHE can be transmitted from the controller β1 through an external input terminal (not shown) provided on the discharge element substrate α0. The circulation group selection signal is supplied on a circulation group selection signal wiring α7. An output side of the circulation logic circuit AND2 is connected to a gate of the circulation drive element MD2. Thus, when all the signals input to the input side of the circulation logic circuit AND2 are 1, a voltage is applied to the gate of the circulation drive element MD2, and the drain and the source of the circulation drive element MD2 are turned on. When the drain and the source of the circulation drive element MD2 are turned on, a current flows through the circulation heater RhB so that the circulation heater RhB generates heat. Through this series of operations, a bubble in the ink can develop, and a circulation flow can be generated in the ink circulation flow path. Although an example in which the circulation heater RhB is formed of an electrothermal conversion element has been described, this is not intended to be limiting. For example, the circulation heater RhB can be formed of a piezoelectric element.

[0059] (Control data supply circuit α3)

[0060] FIG. 4A The control data supply circuit α3 includes shift registers α20a and α20b, latch circuits α21a and α21b, decoder circuit α22, and loop group control circuit α12. The control data supply circuit α3 also has external input terminals. Clock signal CLK, data signal DATA, and latch signal LT are supplied from controller β1 to control data supply circuit α3 via the external input terminals. Clock signal CLK is used for serial data transmission of data signal DATA to shift registers α20a and α20b. Data signal DATA contains selection information about the eject module α1 and selection information about the loop module α2. Latch signal LT acquires and holds the information stored in each shift register α20a and α20b in each latch cycle. Decoder circuit α22 and loop group control circuit α12 will be described in detail later.

[0061] (Pulse width shortening circuit γ1)

[0062] like FIG. 5 As shown, the pulse width shortening circuit γ1 includes a delay circuit and an AND gate circuit. FIG. 6A It is shown FIG. 5 A diagram showing the pulse shape at position 6A. FIG. 6B It is shown FIG. 5 The diagram shows the pulse shape at position 6B. FIG. 6C It is shown FIG. 5 The diagram shows the pulse shape at position 6C. Here, it is assumed that the pulse width of the heating enable signal HE is 0.8 μs. Furthermore, when the heating enable signal HE is input to the pulse width shortening circuit γ1, the heating enable signal HE is splittered before being input to the delay circuit. One splitter is input to the delay circuit, and the other splitter bypasses the delay circuit and is input to an AND gate. The AND gate receives the signal input to it that bypasses the delay circuit and the signal output from the delay circuit. FIG. 6A compared to, FIG. 6BThe rising edge of the heating enable signal HE is delayed by, for example, 0.2 μs by the delay circuit. Therefore, the pulse width of the signal output from the AND circuit is 0.6 μs. That is, the pulse width of the cycle heating enable signal pHE is 0.6 μs, and the pulse width of the discharge heating enable signal tHE is 0.8 μs. Therefore, when the delay amount of the delay circuit is 0.2 μs, the difference between the discharge heating enable signal tHE and the cycle heating enable signal pHE is 0.2 μs. That is, when the delay amount of the delay circuit is 0.2 μs or less, the difference between the pulse width of the discharge heating enable signal tHE and the pulse width of the cycle heating enable signal pHE is 0.2 μs or less. Therefore, the difference between the pulse width of the discharge heating enable signal tHE and the pulse width of the cycle heating enable signal pHE can be set to be equal to or less than the delay amount of the delay circuit. Therefore, the difference between the pulse width of the discharge heating enable signal tHE and the pulse width of the cycle heating enable signal pHE can be controlled to be equal to or less than 0.2 μs, which is the delay amount of the delay circuit.

[0063] (delay circuit)

[0064] FIG. 7 is a diagram illustrating an exemplary circuit configuration of the delay circuit in FIG. 5 . As illustrated in FIG. 7 , the delay circuit includes a plurality of inverter circuits. The inverter circuits are connected in series. It is assumed that the delay amount of one inverter circuit is 10 ns. Based on this assumption, when twenty inverter circuits are connected in series, the pulse of the signal is delayed by 0.2 μs compared to the original pulse. Note that the number of inverter circuits connected to each other is not limited to twenty. For example, the delay amount of one inverter circuit can be 20 ns, and ten inverter circuits can be connected in series. Alternatively, the number of inverter circuits connected to each other can be individually controlled in the discharge element substrate by an external signal, and the required number of inverter circuits to be connected to each other can be specified for each drive, so that the amount of reduction in the pulse width can be adjusted. Alternatively, the delay circuit can be implemented by a field programmable gate array (FPGA). Alternatively, the signal can be delayed by an RC circuit instead of connecting a plurality of inverter circuits in series. FIG. 8 is a diagram illustrating another exemplary circuit configuration of the delay circuit in FIG. 5 . As illustrated in FIG. 8As shown, the pulse of the signal can be delayed by an RC circuit including a resistor R and a capacitor C connected in series with each other. Specifically, the resistor R is connected between the input terminal and the output terminal, and the capacitor C is connected between the output terminal and GND. The delay time is determined by the product of the resistance R and the capacitance C, and an arbitrary delay time can be set according to resistance R x capacitance C. For example, when a resistor R of 10 Kohm and a capacitor C of 20 pF are used, the delay time is 0.2 μs. Thus, the pulse can be delayed by about 0.2 μs compared to the original pulse. Therefore, a plurality of types of resistors R and a plurality of types of capacitors C can be pre-set in the delay circuit, and the required resistor R and the required capacitor can be selected for each driving by an external signal, so that the amount of delay and the amount of reduction in pulse width of the pulse can be adjusted.

[0065] As can be seen from the above description, the pulse width of the circulating heating enable signal pHE that has passed through the pulse width shortening circuit γ1 is shorter than the pulse width of the discharge heating enable signal tHE that has not passed through the pulse width shortening circuit γ1, and these signals can have different pulse widths. Although the present embodiment has been described with reference to an example in which the pulse width of the circulating heating enable signal pHE is reduced by the pulse width shortening circuit γ1, this is not intended to be limiting. A wiring arrangement in which the discharge heating enable signal tHE passes through the pulse width shortening circuit γ1 and the circulating heating enable signal pHE does not pass through the pulse width shortening circuit γ1 is also possible. Furthermore, as described in detail later with respect to the second embodiment, a pulse width expansion circuit γ2 that increases the pulse width can be included in the wiring arrangement. For example, the pulse width of the discharge heating enable signal tHE can be increased by the pulse width expansion circuit. That is, if the pulse width of a signal for which it is desired to reduce the power consumption is reduced relatively, the balance of the total power consumption of the discharge element substrate α0 can be adjusted, and thus the problem of insufficient power and excessive power for driving the discharge elements and the circulating elements can be solved.

[0066] (Drive and control of the discharge heater RhA)

[0067] The drive and control of the discharge heater RhA in the discharge heater array α9 in the FIG. 3 The drive and control of the discharge heater RhA in the discharge heater array α9 in the

[0068] (Time division control in one group)

[0069] As described above, the discharge heater RhA is included in each discharge module al. One group includes n discharge heaters RhA. Therefore, one group includes n discharge modules al. Since n = 16 is assumed, sixteen discharge modules al are driven in a time-division manner by a common time-division selection signal. The time-division drive is a control that divides a period of one discharge cycle into n (= 16) unit times and sequentially selects one discharge module al for each unit time. Here, in the same group, a plurality of discharge modules al are not simultaneously selected. Each discharge module al included in the same group must be selected once within one discharge cycle. In this time-division drive, only one of the common time-division selection signal wirings a8 is selected. Therefore, by including the decoder circuit a22 in the control data supply circuit a3, the amount of data serially transmitted from the main substrate β0 can be further reduced.

[0070] (Decoder circuit a22: time-division control)

[0071] Referring again to FIG. 4A . FIG. 4A The decoder circuit a22 in the control data supply circuit a3 is a circuit that expands the number of bits of output data from the number of bits q of input data to 2 raised to the power of q. Specifically, when 4-bit input data is input to the decoder circuit a22, the decoder circuit a22 converts the 4-bit input data into 16-bit (16 is 2 raised to the power of 4) output data. In this process, the output data from the decoder circuit a22 is output as information in which only 1 bit of 16 bits is valid. This allows time-division drive. Here, from the viewpoint of the utilization rate of input data, unless the common time-division selection signal wiring a8 is used for a special purpose, all wirings of the common time-division selection signal wiring a8 output from the decoder circuit a22 are preferably used for discharge time-division selection signals.

[0072] As the amount of serially transmitted data increases, faster serial transmission is required. Therefore, the cost and size of the signal transmission circuit, the signal reception circuit, and the transmission lines of the main substrate β0 and the discharge element substrate a0 increase. Therefore, the amount of data is preferably minimized.

[0073] (Group selection control)

[0074] In order to selectively drive any one of the m groups, a group selection signal is supplied from the control data supply circuit a3 to the group selection circuit a21. The group selection circuit a21 is a circuit that selects one group from the m groups in accordance with the group selection signal. The group selection circuit a21 is connected to the group selection signal wirings a9. The group selection circuit a21 is connected to the discharge time-division selection signal wirings a8.

[0075] 3 An m-bit discharge group selection signal is output. When one of the m groups is selected, the n discharge modules al included in the one group can be simultaneously selected. An m-bit information same as the number of groups is serially transmitted from the main substrate β0. As described above, the heating enable signal HE, the discharge group selection signal, and the discharge time division selection signal are input to the discharge logic circuit AND1 of the discharge module al, thereby selectively controlling the discharge module al so that a current flows through the discharge heater RhA at the corresponding position. Although an example in which n = 16 and m = 40 is assumed in the present embodiment, this is not intended to be limiting. For example, n = 8 and m = 80 are also possible. Alternatively, for example, a nozzle length n = 32 and m = 40 different from the present embodiment are also possible. However, since n is the number of time division, n is preferably a value expressed as a power of 2 (n = 2, 4, 8, 16, 32,...) so as to use the output signal of the decoder circuit a22 as a selection signal.

[0076] (Driving and control of the circulation module a2)

[0077] Referring again to FIG. 3 The driving and control of the circulation heater RhB in the circulation heater array a 10 will be described. As with the discharge heater array a 9, the circulation heater array a 10 is formed of m groups. As with the discharge heater array a 9, each group contains n circulation heaters RhB. The circulation heater RhB is arranged in pairs with the discharge heater RhA and close to the discharge heater. When one group is selected, the n circulation heaters RhB in the one group are sequentially activated in a time-division manner. The driving and control of the n (= 16) x m (= 40 groups) circulation heaters RhB will be described.

[0078] (Time division control in one group)

[0079] As described above, the circulation heater RhB is included in each circulation module a2. One group includes n circulation heaters RhB. Therefore, one group includes n circulation modules a2. Since n = 16 is assumed, sixteen circulation modules a2 are driven in a time-division manner by a common time division selection signal. In the present embodiment, the number of time divisions for the circulation module a2 is the same as that for the discharge module al (n = 16).

[0080] (Selection control of the group)

[0081] In order to selectively drive any one of the m groups, an m-bit group selection signal is output from the control data supply circuit a

[0082] 3The m-bit cycle group selection signal is output. When one of the m groups is selected, the n cycle modules α2 included in the one group can be simultaneously selected. The same number of m-bit information as the number of groups is serially transmitted from the main substrate β0. As described above, the heating enable signal HE, the cycle group selection signal, and the common time division selection signal are input to the cycle logic circuit AND2 of the cycle module α2, thereby selectively controlling the cycle module α2 so that the current flows through the cycle heater RhB at the corresponding position. However, the cycle group selection signal is transmitted from the cycle group control circuit α12 in the main substrate β0 via the cycle group selection signal wiring α7. FIG. 4A to 4B The cycle group control circuit α12 in the main substrate β0 includes the control data supply circuit α3. FIG. 4A to 4B The cycle group control circuit α12 in the main substrate β0 includes the control data supply circuit α3.

[0083] (Cycle group control circuit α12)

[0084] FIG. 4A to 4B The cycle group control circuit α12 in the main substrate β0 includes an AND gate circuit and a NOT gate circuit. The NOT gate circuit outputs a signal (hereinafter referred to as a logic inversion signal) obtained by inverting the logic of the discharge group selection signal from the discharge group selection signal wiring α6. The logic inversion signal and the cycle flag signal α13 are input to the AND gate circuit. The cycle flag signal α13 is included in the data signal DATA serially transmitted from the controller β1. The cycle flag signal α13 functions as a flag for setting the cycle group selection signal output via the cycle group selection signal wiring α7 to be active or inactive. In a normal discharge operation in which the circulation of ink is not required, the cycle flag signal α13 can be set to 0 to prohibit the selection of the cycle module α2. That is, the cycle group control circuit α12 generates the cycle group selection signal in accordance with the selection information of the discharge group selection signal and the cycle flag signal α13. Therefore, when the discharge module α1 is in the selected state, the cycle module α2 is not in the selected state. However, even when the discharge module α1 is not in the selected state, if the cycle flag signal α13 is 0, the cycle group selection signal is inactive, and the cycle module α2 is not in the selected state. That is, when the discharge module α1 is not in the selected state and the cycle flag signal α13 is 1, the cycle group selection signal is active and the cycle module α2 is in the selected state. Note that, in the time division control, when a pair of the discharge module α1 and the cycle module α2 is not selected, neither of the discharge module α1 and the cycle module α2 is selected.

[0085] In the present embodiment, a common power supply voltage VH (for example, 24 V) is used as the power supply voltage for the discharge module al and the circulation module a2, and a common GNDH is used as the ground potential. However, in order to reduce variations in the discharge energy caused by voltage drops generated when the discharge heater RhA and the circulation heater RhB are driven, the following described process is possible. That is, in the discharge element substrate aO, separate supply wiring and external connection terminals for the power supply voltage and the ground potential can be provided for the discharge module al and the circulation module a2. That is, the discharge module al and the circulation module a2 can be supplied with the power supply voltage from the power supply circuit β2 mounted in the main substrate βO, respectively.

[0086] Generally, the drive elements are operated at a higher voltage than the logic circuit, and thus, a substrate containing both high-voltage resistant drive elements and ordinary drive elements is used. In the present embodiment, the discharge drive element MD1 and the circulation drive element MD2 can be formed of DMOS transistors (double-diffused MOSFETs), which are high-voltage resistant MOS transistors. The discharge logic circuit AND1, the circulation logic circuit AND2, the circulation group control circuit a

[0087] 12, and other logic circuits including the shift registers a20a and a20b, the latch circuits a21a and a21b, and the decoder circuit a22 can be formed of low-voltage resistant MOS transistors.

[0088] (Circuit footprint)

[0089] Next, differences resulting from the circuit arrangement will be described. The drive current for the circulation heater RhB generates heat energy for circulating the ink in a separate flow path. When the drive current for the circulation heater RhB is smaller than the drive current for the discharge heater RhA for discharging the ink onto the discharge medium, the current drive capability of the DMOS transistor can be lower. Therefore, the footprint of the discharge drive element MD1 need not be larger than the footprint of the circulation drive element MD2, and thus the footprint of the circulation drive element MD2 is preferably smaller than the footprint of the discharge drive element MD1.

[0090] (First example of circuit arrangement)

[0091] FIG. 9 is a plan view of the discharge element substrate a30. In the example of FIG. 9 two mechanism systems to be selectively controlled are arranged symmetrically with respect to the center point of the discharge element substrate a30, each system including mechanisms from the control data supply circuit a3 to the discharge heater array a9 and the circulation heater array a10. In the example of FIG. 9In the present embodiment, three ink supply port arrays a 14 extending in the conveyance direction Y are arranged at intervals in the direction X. Between the adjacent ink supply port arrays a 14, one discharge heater array a 9 and one circulation heater array a 10 are arranged in the conveyance direction Y. In each of a left side area of the left side ink supply port array a 14 among the three ink supply port arrays a 14 and a right side area of the right side ink supply port array a 14, the following components are arranged. That is, a discharge drive element MD1, a circulation drive element MD2, a discharge logic circuit AND1, a circulation logic circuit AND2, a discharge group selection signal wiring a 6, a circulation group selection signal wiring a 7, and a common time division selection signal wiring a 8 are arranged. In each of the area to the left of the left side ink supply port array a 14 and the area to the right of the right side ink supply port array a 14, a transmission wiring for a discharge heating enable signal tHE and a transmission wiring for a circulation heating enable signal pHE are also arranged.

[0092] The external connection terminals are arranged at both ends of the discharge element substrate a 30 in the conveyance direction Y in the direction X. In each of the areas between the external connection terminals and the ink supply port arrays a 14, a control data supply circuit a 3 is arranged. Since there are two areas between the external connection terminals and the ink supply port arrays a 14 in the conveyance direction Y, two control data supply circuits a 3 and two pulse width shortening circuits γ1 are arranged in two independent areas in the conveyance direction Y.

[0093] As described above with reference to FIG. 9 The discharge element substrate a 30 is configured with constituent elements arranged in the conveyance direction Y, and thus the size of the discharge element substrate a 30 in the direction X can be reduced. Although not shown, by taking the arrangement of the discharge element substrate a 30 as one unit, if a plurality of discharge element substrates a 30 are arranged in the direction X, one liquid discharge head 1 can accommodate a plurality of types of ink.

[0094] The elements on the discharge element substrate a 30 can be finely manufactured as a whole by semiconductor process technology, and this is also applicable to other embodiments. The pulse width shortening circuit γ1 can also be manufactured by semiconductor process technology. Since the pulse width shortening circuit γ1 has a simple configuration formed of a delay circuit and an AND gate circuit, the size of the pulse width shortening circuit γ1 can be easily reduced. Therefore, the pulse width shortening circuit γ1 can also be easily arranged in the discharge element substrate a 30. Thus, an increase in the size of the discharge element substrate a 30 can be prevented, and the manufacturing cost of the discharge element substrate a 30 can be reduced.

[0095] Compared with a case where a separate external terminal for receiving a heating enable signal is provided in order to change the pulse width for discharging each of the heater RhA and the circulation heater RhB, the number of pads can be reduced. Further, a wiring for a heating enable signal HE outside the discharging element substrate α30 can also be reduced, and thus an increase in cost of the liquid discharging head 1 can be suppressed. Further, by shortening the wiring for the heating enable signal HE outside the discharging element substrate α30, crosstalk between signals can be reduced.

[0096] (Second Embodiment)

[0097] FIG. 10 is a diagram illustrating an exemplary overall configuration of a liquid discharging apparatus according to a second embodiment. The second embodiment differs from the first embodiment in that a pulse width expansion circuit γ2 is arranged instead of the pulse width shortening circuit γ1. Hereinafter, differences from the first embodiment will be described, and description of components and functions identical to those in the first embodiment will be omitted.

[0098] (Pulse Width Expansion Circuit γ2)

[0099] FIG. 11 is a diagram illustrating an example of a circuit configuration of the pulse width expansion circuit γ2 in FIG. 10 FIG. 12A to FIG. 12C is a diagram illustrating an exemplary change of a pulse in the pulse width expansion circuit. As FIG. 11 indicated, the pulse width expansion circuit γ2 includes a delay circuit and an OR gate circuit. FIG. 12A is a diagram illustrating a pulse shape at 12A in FIG. 11 FIG. 12B is a diagram illustrating a pulse shape at 12B in FIG. 11 FIG. 12C is a diagram illustrating a pulse shape at 12C in FIG. 11 Here, it is assumed that the pulse width of the heating enable signal HE is 0.8 μs. Further, when the heating enable signal HE is input to the pulse width expansion circuit γ2, the heating enable signal HE is split before being input to the delay circuit. One of the split signals is input to the delay circuit, and the other split signal bypasses the delay circuit and is input to the OR gate circuit. The OR gate circuit receives a signal input to the OR gate circuit by bypassing the delay circuit and a signal output from the delay circuit. Compared with FIG. 12A , the rising edge of the heating enable signal HE passing through the delay circuit is delayed by, for example, 0.2 μs in FIG. 12B . Therefore, the pulse width of the signal output from the OR gate circuit is 1.0 μs. That is, the pulse width of the discharging heating enable signal tHE is 1.0 μs, and the pulse width of the circulation heating enable signal pHE is 0.8 μs. ​​​

[0100] (delay circuit)

[0101] As with the delay circuit in the first embodiment shown in FIG. 1, FIG. 7 The delay circuit in FIG. 2 includes a plurality of inverter circuits. Assume that the pulse width of the heating enable signal HE is 0.8 μs, and the delay amount of one inverter circuit is 10 ns. Based on this assumption, when twenty inverter circuits are connected in series, the pulse of the signal is delayed by 0.2 μs compared with the original pulse. That is, FIG. 11 the signal at position 12B in FIG. 2 is delayed by 0.2 μs compared with the signal at position 12A in FIG. 1. Therefore, FIG. 11 the pulse width of the signal at position 12C in FIG. 2 (i.e. FIG. 11 the signal at position 12A in FIG. 2 is delayed by 0.2 μs compared with the signal at position 12B in FIG. 1. Therefore, FIG. 11 the pulse width of the signal at position 12C in FIG. 2 (i.e. FIG. 11 the signal at position 12A in FIG. 2 is delayed by 0.2 μs compared with the signal at position 12B in FIG. 1. Therefore, FIG. 11 the pulse width of the signal at position 12C in FIG. 2 (i.e.

[0102] As can be seen from the above description, the discharge heating enable signal tHE that has passed through the pulse width expansion circuit γ2 has a pulse width longer than the pulse width of the circulation heating enable signal pHE that has not passed through the pulse width expansion circuit γ2, and these signals can have different pulse widths. Although the present embodiment has been described with reference to an example in which the pulse width of the discharge heating enable signal tHE is increased by the pulse width expansion circuit γ2, this is not intended to be limiting. A wiring arrangement in which the circulation heating enable signal pHE passes through the pulse width expansion circuit γ2 and the discharge heating enable signal tHE does not pass through the pulse width expansion circuit γ2 is also possible. Furthermore, not only can the pulse width expansion circuit γ2 be included in the wiring arrangement, but the pulse width shortening circuit γ1 in the above-described first embodiment can also be included in the wiring arrangement. That is, if it is desired to relatively shorten the pulse width of the signal in which power consumption is reduced, it is possible to adjust the balance of the overall power consumption of the discharge element substrate α0. Therefore, it is possible to solve the insufficient power and excess power of each of the discharge driving element and the circulation driving element.

[0103] (third embodiment)

[0104] FIG. 13is a diagram showing an exemplary overall configuration of a liquid discharge apparatus according to a third embodiment. The third embodiment differs from the first and second embodiments in that, since the heating enable signal HE is not emitted from the main substrate β0, an external input terminal for receiving the heating enable signal HE is not provided. The third embodiment also differs from the first and second embodiments in that, since the heating enable signal HE is not emitted from the main substrate β0, the discharge element substrate α0 includes a pulse width generation circuit γ4 that generates the heating enable signal HE. In the following, differences from the first and second embodiments will be described, and the description of components and functions that are the same as those in the first and second embodiments will be omitted.

[0105] (Pulse width generation circuit γ4)

[0106] FIG. 13 The discharge element substrate α0 in includes the pulse width generation circuit γ4. The clock signal CLK, the data signal DATA, and the latch signal LT are emitted from the controller β1 to the pulse width generation circuit γ4 through the control data supply circuit α3. The pulse width generation circuit γ4 generates the heating enable signal HE. The heating enable signal HE generated by the pulse width generation circuit γ4 is split. One of the split signals resulting from the splitting of the heating enable signal HE is emitted as the discharge heating enable signal tHE. The other signal resulting from the splitting of the heating enable signal HE passes through the pulse width shortening circuit γ1 and is then emitted as the cycle heating enable signal pHE. FIG. 14 is a diagram showing a circuit configuration of the pulse width generation circuit γ4 in FIG. 13 . FIG. 15 is a diagram showing a circuit configuration of the pulse width generation circuit γ4 in FIG. 14FIG. 6 is a diagram of an exemplary change of a pulse in the pulse width generation circuit γ4. The pulse width generation circuit γ4 includes an edge counter circuit, a logic circuit, and a gate circuit. A data signal DATA is input as timing data of a heating enable signal HE to the edge counter circuit. In the data signal DATA, a rising timing and a falling timing of a PT signal are defined. Further, the data signal DATA is set in the edge counter circuit at a rising timing of an LT signal. The edge counter circuit counts edges of a clock signal CLK. For example, the edge counter circuit starts counting based on the data signal DATA in synchronization with the edges of the clock signal CLK. When the edge counter circuit ends counting, the edge counter circuit outputs a carry signal 302 and a carry signal 303 and stops operation. A result of a logical NOT of the carry signal 302 and the carry signal 303 is input to the logic circuit. The logic circuit outputs the PT signal. The gate circuit outputs a result of an AND operation of the input PT signal and an LT signal as the heating enable signal HE. The output heating enable signal HE is branched. One of the branched signals is output as an ejection heating enable signal tHE without change. The other branched signal is input to the pulse width shortening circuit γ1, the pulse width is reduced and then output as a cycle heating enable signal pHE. In this way, the pulse width of the ejection heating enable signal tHE and the pulse width of the cycle heating enable signal pHE can be different. The pulse width shortening circuit γ1 for the cycle heating enable signal pHE is not intended to be limiting. For example, a pulse width extension circuit γ2 can be used for the ejection heating enable signal tHE. Alternatively, the pulse width shortening circuit γ1 can be used for the ejection heating enable signal tHE.

[0107] As can be seen from the above description, according to the present embodiment, as compared with the first and second embodiments, the pad of the external input terminal for the heating enable signal HE and the wiring for the heating enable signal HE outside the ejection element substrate α0 can be reduced. Thus, the increase in the cost of the liquid ejection head 1 can be further reduced. Further, since the wiring for the heating enable signal HE is not required outside the ejection element substrate α0, crosstalk between signals can be reduced.

[0108] It should be noted that although in any one of the first to third embodiments, different pulse widths are used for the setting of the ejection heater RhA and the cycle heater RhB, this is not intended to be limiting. For example, different pulse widths can be used for different sizes of ejection heaters, such as a large ejection heater and a small ejection heater.

[0109] Alternatively, different pulse widths can be used for the heating element (sub-heater) for maintaining the discharge element substrate a0 at a certain temperature and the discharge heater RhA. Alternatively, different pulse widths can be used for the temperature detecting element (temperature sensor) capable of detecting the temperature in the bubble generating chamber and the discharge heater RhA. The pulse width can be adjusted for any other possible combination of heating elements.

[0110] The first embodiment has been described with reference to an example using the pulse width shortening circuit γ1, the second embodiment has been described with reference to an example using the pulse width extension circuit γ2, and the third embodiment has been described with reference to an example using the pulse width generation circuit γ4 and the pulse width shortening circuit γ1. These adjustments of the pulse width can be used in combination, or an entity having one of these pulse width adjustment functions can be referred to as a pulse width adjustment circuit. For example, in the first embodiment, an entity containing the pulse width shortening circuit γ1 can be referred to as a pulse width adjustment circuit. In the second embodiment, an entity containing the pulse width extension circuit γ2 can be referred to as a pulse width adjustment circuit. In the third embodiment, an entity including the pulse width generation circuit γ4 and the pulse width shortening circuit γ1 can be referred to as a pulse width adjustment circuit.

[0111] <Other Embodiments>

[0112] Although various examples and embodiments of the present disclosure have been described above, the spirit and scope of the present disclosure are not limited to the specific description in this specification. The present disclosure is not limited to the above-described embodiments, and various modifications can be made. Furthermore, part of the above-described embodiments of the present disclosure can be combined as needed.

[0113] (Variation 1)

[0114] For example, although the pulse width shortening circuit γ1 has been described in the first embodiment, the pulse width extending circuit γ2 has been described in the second embodiment, and the exemplary combination of the pulse width shortening circuit γ1 and the pulse width generating circuit γ4 has been described in the third embodiment, this is not intended to be limiting. For example, at least two of the pulse width shortening circuit γ1, the pulse width extending circuit γ2, and the pulse width generating circuit γ4 can be combined. Alternatively, the liquid discharge head 1 can include at least one pulse width adjustment circuit having all the functions of the pulse width shortening circuit γ1, the pulse width extending circuit γ2, and the pulse width generating circuit γ4. For example, a dual in-line package (DIP) switch can be provided for the pulse width adjustment circuit to switch whether to use the functions of the pulse width shortening circuit γ1, the pulse width extending circuit γ2, and the pulse width generating circuit γ4. In this case, by appropriately setting the DIP switch to set the combination of the functions of the pulse width adjustment circuit, arbitrary pulse width adjustment can be achieved. Alternatively, different numbers of the pulse width shortening circuit γ1, the pulse width extending circuit γ2, and the pulse width generating circuit γ4 can be combined, such as a plurality of pulse width shortening circuits γ1 and one pulse width generating circuit γ4.

[0115] Embodiments of the present disclosure can also be realized by a computer of a system or apparatus that reads out and executes computer executable instructions (e.g., one or more programs) recorded on a storage medium (which can also be referred to more fully as a 'non-transitory computer-readable storage medium') to perform the functions of one or more of the above-described embodiments and / or that includes one or more circuits (e.g., application specific integrated circuits (ASICs)) for performing the functions of one or more of the above-described embodiments, and by a method performed by the computer of the system or apparatus by, for example, reading out and executing the computer executable instructions from the storage medium to perform the functions of one or more of the above-described embodiments and / or controlling the one or more circuits to perform the functions of one or more of the above-described embodiments. The computer can comprise one or more processors (e.g., central processing units (CPUs), micro processing units (MPUs)) and can include a network of separate computers or separate processors to read out and execute the computer executable instructions. The computer executable instructions can be provided to the computer, for example, from a network or the storage medium. The storage medium can include, for example, one or both of a hard disk, a random access memory (RAM), a read only memory (ROM), a storage of distributed computing systems, an optical disk (such as a compact disc (CD), digital versatile disc (DVD), or Blu-ray Disc (BD)TM), a flash memory device, a memory card, and the like.

[0116] Other Embodiments

[0117] Embodiments of the present application can also be implemented by a method for providing software (computer program product including a computer program) that performs the functions of the above-described embodiments through a network or various storage media, which a computer (central processing unit (CPU), micro processing unit (MPU)) of a system or an apparatus reads and executes.

[0118] While the present disclosure has been described with reference to embodiments, it is to be understood that the present disclosure is not limited to the disclosed embodiments. The scope of the appended claims is to be given the broadest interpretation to encompass all such modifications and equivalents.

[0119] According to the present disclosure, driving power can be appropriately supplied to each of the discharge driving element and the circulation driving element.

Claims

1. A liquid discharge head, comprising: A discharge module having a discharge drive element and a discharge heater electrically connected to the discharge drive element; A circulation module, the circulation module being arranged in pair with the discharge module, and having a circulation drive element and a circulation heater capable of being electrically connected to the circulation drive element; as well as A pulse width controller is provided, wherein the pulse width controller is used to distinguish between the discharge pulse width and the cycle pulse width, the discharge pulse width is used to control the discharge driving element to be in a conducting state, and the cycle pulse width is used to control the cycle driving element to be in a conducting state.

2. The liquid discharge head according to claim 1, wherein the pulse width controller controls at least one of the discharge pulse width and the cycle pulse width.

3. The liquid discharge head according to claim 1, wherein the pulse width controller controls either the discharge pulse width or the cycle pulse width.

4. The liquid discharge head according to claim 3, wherein the pulse width controller includes a pulse width shortening circuit, the pulse width shortening circuit sets the pulse width obtained by shortening the heating enable signal as the cyclic pulse width, and the heating enable signal determines a reference drive pulse width shared by the discharge drive element and the cyclic drive element.

5. The liquid discharge head according to claim 3, wherein the pulse width controller includes a pulse width extension circuit, the pulse width extension circuit sets the pulse width obtained by extending the heating enable signal as the discharge pulse width, and the heating enable signal determines a reference drive pulse width shared by the discharge drive element and the circulation drive element.

6. The liquid discharge head according to claim 3, wherein the pulse width controller comprises: A pulse width generation circuit is used to generate a heating enable signal for determining a reference drive pulse width shared by the discharge drive element and the circulation drive element. as well as A pulse width shortening circuit is used to set the pulse width obtained by shortening the heating enable signal generated by the pulse width generation circuit as the cyclic pulse width.

7. The liquid discharge head according to claim 4, wherein the pulse width shortening circuit comprises: Delay circuit, the delay circuit being used to delay the heating enable signal; as well as A logic AND operation circuit, which is used to output the logical product of the signal delayed by the delay circuit and the heating enable signal.

8. The liquid discharge head according to claim 5, wherein the pulse width extension circuit comprises: Delay circuit, the delay circuit being used to delay the heating enable signal; as well as A logic OR operation circuit, which is used to output the logical sum of the signal delayed by the delay circuit and the heating enable signal.

9. The liquid discharge head according to claim 7, wherein the delay circuit comprises a plurality of inverter circuits, and each of the plurality of inverter circuits is connected in series.

10. The liquid discharge head according to claim 7, wherein the delay circuit comprises a resistor and a capacitor, and the resistor and the capacitor are connected in series.

11. The liquid discharge head according to claim 9, wherein the delay amount of the delay circuit is 0.2 μs or less, and the difference between the discharge pulse width and the cycle pulse width is 0.2 μs or less.

12. The liquid discharge head of claim 10, wherein the delay amount of the delay circuit is 0.2 μs or less, and the difference between the discharge pulse width and the cycle pulse width is 0.2 μs or less.

13. The liquid discharge head of claim 6, wherein the pulse width generation circuit determines the drive pulse width based on a count value obtained by counting the edges of the input clock signal.

14. The liquid discharge head according to claim 1, wherein a plurality of discharge modules and a plurality of circulation modules are provided, the number of discharge modules being equal to the number of circulation modules, and The liquid discharge head also includes a control data supplier for exclusively selecting a circulation group or a discharge group. The circulation group is formed by dividing the plurality of circulation modules into circulation groups, each containing a predetermined number of circulation modules, and the discharge group is formed by dividing the plurality of discharge modules into discharge groups, each containing the predetermined number of discharge modules.

15. The liquid discharge head according to claim 1, wherein a common power supply voltage and a common ground potential are connected to the discharge heater and the circulation heater.

16. The liquid discharge head of claim 1, wherein the discharge heater and the circulation heater are manufactured in the same semiconductor process.

17. The liquid discharge head according to claim 1, wherein the discharge heater and the circulation heater are made of the same material.

18. A liquid discharge device, comprising: Liquid discharge head; A carriage for mounting the liquid discharge head and for reciprocating motion along the main scanning direction; as well as A conveyor roller, disposed below the carriage and used to convey the discharged target medium along the sub-scanning direction. The liquid discharge head includes: A discharge module having a discharge drive element and a discharge heater electrically connected to the discharge drive element; A circulation module, arranged in pair with the discharge module, and having a circulation drive element and a circulation heater electrically connected to the circulation drive element; and A pulse width controller distinguishes between discharge pulse width and cyclic pulse width. The discharge pulse width is used to control the discharge driving element to be in a conducting state, and the cyclic pulse width is used to control the cyclic driving element to be in a conducting state.

Images