Method and apparatus for terminating transmission line in voltage-controlled oscillator

Abstract

The invention relates to a method and apparatus for terminating a transmission line in a voltage-controlled oscillator. An example apparatus includes: a power supply terminal; a first inductor (285) having a first terminal and a second terminal; a second inductor (295) having a first terminal and a second terminal, the first terminal of the second inductor coupled to the power supply terminal and the first terminal of the first inductor; a first resistor (280) having a first terminal and a second terminal, the first terminal of the first resistor being coupled to the second terminal of the first inductor; a second resistor (290) having a first terminal and a second terminal, the first terminal of the second resistor being coupled to the second terminal of the second inductor; a first transmission line (215) having a first terminal and a second terminal, the first terminal of the first transmission line being coupled to the second terminal of the first resistor; and a second transmission line (220) having a first terminal and a second terminal.

Description

TECHNICAL FIELD

[0001] This specification generally relates to oscillators, and more specifically, to methods and apparatus for terminating transmission lines in voltage-controlled oscillators. BACKGROUND

[0002] Oscillator circuitry generates clock signals that can drive circuitry to perform various possible operations. Digital devices use clock signals for operations such as latching, sampling, and the like. Analog devices use clock signals for operations such as signal modulation, synchronous operations, delay, and the like. Some oscillator circuitry utilizes standing waves propagating along transmission lines to generate clock signals at an output. Such oscillator circuitry can be referred to as standing wave oscillators or transmission line oscillators. SUMMARY

[0003] For methods and apparatus for terminating transmission lines in voltage-controlled oscillators, one example apparatus includes a power supply terminal; a first inductor having a first terminal and a second terminal; a second inductor having a first terminal and a second terminal, the first terminal of the second inductor coupled to the power supply terminal and the first terminal of the first inductor; a first resistor having a first terminal and a second terminal, the first terminal of the first resistor coupled to the second terminal of the first inductor; a second resistor having a first terminal and a second terminal, the first terminal of the second resistor coupled to the second terminal of the second inductor; a first transmission line having a first terminal and a second terminal, the first terminal of the first transmission line coupled to the second terminal of the first resistor; a second transmission line having a first terminal and a second terminal, the first terminal of the second transmission line coupled to the second terminal of the second resistor; a first transistor having a first terminal and a control terminal; and a second transistor having a first terminal and a control terminal, the first terminal of the second transistor coupled to the second terminal of the second transmission line and the control terminal of the first transistor, the control terminal of the second transistor coupled to the second terminal of the first transmission line and the first terminal of the first transistor. Other examples are described.

[0004] For methods and apparatus for terminating transmission lines in voltage controlled oscillators, one example apparatus includes a power supply terminal; a bias network circuitry having a first terminal, a second terminal, and a third terminal, the first terminal of the bias network circuitry coupled to the power supply terminal; a first transmission line having a first terminal and a second terminal; a second transmission line having a first terminal and a second terminal; a capacitor having a first terminal and a second terminal, the first terminal of the capacitor coupled to the second terminal of the bias network circuitry and the first terminal of the first transmission line, the second terminal of the capacitor coupled to the third terminal of the bias network circuitry and the first terminal of the second transmission line; a first transistor having a first terminal and a control terminal; and a second transistor having a first terminal and a control terminal, the first terminal of the second transistor coupled to the second terminal of the second transmission line and the control terminal of the first transistor, the control terminal of the second transistor coupled to the second terminal of the first transmission line and the first terminal of the first transistor. Other examples are described.

[0005] For methods and apparatus for terminating transmission lines in voltage controlled oscillators, one example apparatus includes a power supply terminal; a first inductor coupled to the power supply terminal; a second inductor coupled to the power supply terminal; a first transmission line coupled to the first inductor, the first transmission line having a first resonant frequency, the first transmission line configured to generate an output signal, the output signal having a frequency based on the first resonant frequency; a second transmission line coupled to the second inductor, the second transmission line having a second resonant frequency; a first transistor coupled to the first transmission line and the second transmission line; a second transistor coupled to the first transmission line and the second transmission line, the second transistor configured to control the first transistor based on the second resonant frequency of the second transmission line; and the first transistor configured to control the second transistor based on the first resonant frequency of the second transmission line. Other examples are described. BRIEF DESCRIPTION OF DRAWINGS

[0006] Figure 1 is a block diagram of an example frequency synthesizer including an example voltage controlled oscillator.

[0007] Figure 2 is an example bias network circuitry for terminating an example transmission line Figure 1 is a schematic diagram of an example of a voltage controlled oscillator of

[0008] Figure 3 is an example bias network circuitry for terminating an example transmission line Figure 2 is a diagram of an example implementation of a bias network circuitry of Figure 2 is a diagram of an example implementation of a transmission line of

[0009] Figure 4 is a flow diagram representing example machine readable instructions or example operations that can be performed, instantiated, or executed using example implementations of the voltage controlled oscillator of Figure 1 and 2

[0010] Figure 5 is a schematic diagram of an example of the voltage controlled oscillator of Figure 1 and 2 further including an example termination capacitor coupled to the cross-coupled transistors.

[0011] Figure 6 is a flow diagram representing example machine readable instructions or example operations that can be performed, instantiated, or executed using example implementations of the voltage controlled oscillator of Figure 5 and

[0012] Figure 7 is a schematic diagram of an example of the voltage controlled oscillator of Figure 1 further including an example termination capacitor coupled to the example transmission line.

[0013] Figure 8 is a flow diagram representing example machine readable instructions or example operations that can be performed, instantiated, or executed using example implementations of the voltage controlled oscillator of Figure 7 and

[0014] Figure 9 is a schematic diagram of an example of the voltage controlled oscillator of Figure 1 and 7 further including Figure 7 an example of the termination capacitor of and example voltage sensing circuitry.

[0015] Figure 10 is a schematic diagram of an example of the voltage sensing circuitry of Figure 9

[0016] is a flow diagram representing example machine readable instructions or example operations that can be performed, instantiated, or executed using example implementations of the voltage controlled oscillator of Figure 11 and Figure 9 and example voltage sensing circuitry of and 10 Figure 9

[0017] Figure 12 is a schematic diagram of an example of the voltage controlled oscillator of Figure 7 and 9 ​​​schematic diagram of an example of a voltage-controlled oscillator further including an example termination capacitor coupled to the cross-coupled transistors.

[0018] Figure 13 is a flowchart representing example machine-readable instructions or example operations that can be at least one of performed, instantiated, or executed using Figure 12 example implementations of voltage-controlled oscillators of FIGS.

[0019] Figure 14 is a plot of example frequency responses of voltage-controlled oscillators of FIGS. Figure 1 , 2

[0020] Figure 15 is a schematic diagram of an example multi-frequency voltage-controlled oscillator.

[0021] The figures are not necessarily drawn to scale. Generally, the same reference numbers in different drawings designate the same elements or parts. Although the drawings depict zones with clear lines and boundaries, some or all of these lines and boundaries can be idealized. In actuality, the boundaries or lines can be invisible, blended, or irregular. DETAILED DESCRIPTION

[0022] Oscillator circuitry generates clock signals that can drive circuitry to perform various possible operations. Digital devices use clock signals for operations such as latching, sampling, and the like. Analog devices use clock signals for operations such as signal modulation, synchronization operations, delay, and the like. Some oscillator circuitry utilizes standing waves propagating along a transmission line to generate clock signals at an output. Such oscillator circuitry can be referred to as a standing wave oscillator or a transmission line oscillator.

[0023] A transmission line oscillator is a type of oscillator circuitry that uses the propagation of a standing wave through a transmission line to generate a clock signal. Some transmission line oscillators include a first transmission line, a second transmission line, a first transistor, and a second transistor. The first transmission line and the second transmission line include inductive components and capacitive components that form an inductor-capacitor (LC) tank (also referred to as an LC circuit, an LC oscillator, a resonator, and the like). The inductive components and the capacitive components of the first transmission line and the second transmission line resonate charge at a frequency based on the inductance and the capacitance of the transmission lines. This frequency can be referred to as a resonant frequency. The first transmission line powers the first transistor, which controls the second transistor. Similarly, the second transmission line powers the second transistor, which controls the first transistor. This structure of the first transistor and the second transistor can be referred to as cross-coupling.

[0024] ​In a shorted configuration, the first transmission line and the second transmission line are coupled together at a power terminal that supplies a power supply voltage, such as Vdd. This shorting terminates the resonant charge of the first transmission line and the second transmission line at the power terminal by biasing the first transmission line and the second transmission line. In the shorted configuration, the lengths of the first transmission line and the second transmission line are one of a half or a quarter of a wavelength of a target output frequency. The charge in the first transmission line and the second transmission line resonates to produce a standing wave in response to having a length that is a fraction of the wavelength of the target output frequency. However, to implement the connection of the transmission lines and the power terminal, the size of the electrical traces is increased to short the transmission lines. This electrical trace size increase raises the parasitic resistance and the parasitic inductance between the transmission lines and the power terminal. The resulting parasitic inductance resonates with a capacitive component of the transmission lines to produce a parasitic resonance frequency and cause a deviation of the output signal from the target frequency. Some oscillators have begun to use voltage control to compensate, such as correct, for the deviation of the output signal from the target frequency.

[0025] A voltage-controlled oscillator (VCO) is a type of oscillator circuitry configured to generate an output signal having a frequency set in response to a control voltage. For example, the frequency of the output signal increases in response to an increase in the control voltage. In such examples, the frequency of the output signal decreases in response to a decrease in the control voltage. A transmission line VCO uses the control voltage to bias a varactor, which has a capacitance that varies based on the bias voltage. Adjusting the bias of the varactor modifies the resonant frequency of the transmission line to account for the frequency drop caused by the parasitic inductance. Although implementing a transmission line oscillator as a VCO allows the oscillator to correct for the frequency drop, the parasitic effects of the shorting reduce the maximum target frequency, reduce the quality factor, and increase the phase noise of the output signal. As electronics continue to evolve, designers are motivated to use oscillator circuitry that is capable of producing an output signal having an optical frequency, a high quality factor, and low phase noise.

[0026] Examples described herein include methods and apparatuses that use bias network circuitry to terminate transmission lines in a VCO to increase the quality factor of an output signal and reduce the phase noise of the output signal. In some descriptions, the VCO includes a first transmission line, a second transmission line, a first transistor, a second transistor, and bias network circuitry. The first transmission line has a first terminal coupled to the bias network circuitry and a second terminal coupled to the first transistor and the second transistor. The second transmission line has a first terminal coupled to the bias network circuitry and a second terminal coupled to the first transistor and the second transistor. The first transmission line powers the first transistor, which controls the second transistor, and the second transmission line powers the second transistor, which controls the first transistor.

[0027] In the shorted configuration, the VCO further includes a capacitor coupled between the first terminal of the first transmission line and the first terminal of the second transmission line. The capacitor is structured to compensate for the parasitic inductance of the first transmission line and the second transmission line and the parasitic resistance of the short through the capacitor. Advantageously, the capacitor increases the possible output frequency for a given wavelength by reducing the frequency drop caused by the parasitic inductance. Advantageously, the capacitor increases the quality factor and reduces the phase noise of the output signal by restoring the operation of the target wavelength.

[0028] In the described examples, the bias network circuitry includes a first resistor, a first inductor, a second resistor, and a second inductor. The first resistor and the first inductor are coupled in series between the first terminal of the first transmission line and the power supply terminal. The second resistor and the second inductor are coupled in series between the first terminal of the second transmission line and the power supply terminal. The first inductor and the second inductor are structured to have a large enough inductance to resist the propagation of the resonant charge of the transmission lines. This termination using the first inductor and the second inductor allows the bias network circuitry to accurately bias the first terminals of the first transmission line and the second transmission line to terminate the standing wave of the transmission lines. Advantageously, terminating the resonant charge of the first transmission line and the second transmission line increases the quality factor and reduces the phase noise of the output signal. The first resistor and the second resistor are structured to create a power loss between the transmission lines and the first inductor and the second inductor. Advantageously, the power loss of the first resistor and the second resistor reduces the magnitude of the parasitic resonance between the capacitive components of the transmission lines and the first inductor and the second inductor. Advantageously, the bias network circuitry improves the performance of both the shorted and open VCOs.

[0029] Figure 1 is a block diagram of an example frequency synthesizer 100. In Figure 1 the example, the frequency synthesizer 100 includes phase frequency detector circuitry 110, charge pump 120, filter circuitry 130, transmission line VCO 140, and frequency divider circuitry 150. The frequency synthesizer 100 has a first input, a second input, and an output. The frequency synthesizer 100 is structured to receive an input clock signal having an input frequency (F IN ) at the first input. The frequency synthesizer 100 is structured to receive a modulus selection input (MOD) at the second input. The frequency synthesizer 100 is structured to produce an output clock signal having an output frequency (F OUT ) at the output of the frequency synthesizer 100.

[0030] The phase frequency detector circuitry 110 has a first terminal, a second terminal, a third terminal, and a fourth terminal. The first terminal of the phase frequency detector circuitry 110 is coupled to the first input of the frequency synthesizer 100, which supplies the input clock signal. The second and third terminals of the phase frequency detector are coupled to the charge pump 120. The fourth terminal of the phase frequency detector circuitry 110 is coupled to the frequency divider circuitry 150.

[0031] The charge pump 120 has a first terminal, a second terminal, and a third terminal. The first and second terminals of the charge pump circuitry are coupled to the phase frequency detector circuitry 110. The third terminal of the charge pump 120 is coupled to the filter circuitry 130.

[0032] The filter circuitry 130 has a first terminal and a second terminal. The first terminal of the filter circuitry 130 is coupled to the charge pump circuitry 120. The second terminal of the filter circuitry 130 is coupled to the transmission line VCO 140.

[0033] The transmission line VCO 140 has a first terminal and a second terminal. The first terminal of the transmission line VCO 140 is coupled to the filter circuitry 130. The second terminal of the transmission line VCO 140 is coupled to the frequency divider circuitry 150 and to the output of the frequency synthesizer 100, which supplies the output clock signal.

[0034] The frequency divider circuitry 150 has a first terminal, a second terminal, and a third terminal. The first terminal of the frequency divider circuitry 150 is coupled to the second input of the frequency synthesizer 100, which supplies the modulus select input. The second terminal of the frequency divider circuitry 150 is coupled to the transmission line VCO 140 and to the output of the frequency synthesizer 100, which supplies the output clock signal.

[0035] Figure 2 is a schematic diagram of an example voltage controlled oscillator (VCO) 200, which is an example of the transmission line VCO 140 of Figure 1 In the example of the transmission line VCO 140 of Figure 2 In the example of the transmission line VCO 140 of Figure 2 The example transmission line 215 of the transmission line VCO 140 includes a first example resistor 230, an example inductor 235, a second example resistor 240, a first example capacitor 245, and a second example capacitor 250. Figure 2 The example transmission line 220 of the transmission line VCO 140 includes a first example resistor 255, an example inductor 260, a second example resistor 265, a first example capacitor 270, and a second example capacitor 275. Figure 2The example bias network circuitry 225 includes a first example resistor 280, a first example inductor 285, a second example resistor 290, and a second example inductor 295.

[0036] The VCO 200 has an input, a first output, and a second output. The input of the VCO 200 is configured to be coupled to the filter circuitry 130, which supplies a control voltage (V CNTRL ) to the input of the VCO 200. The VCO 200 is configured to supply a first output clock signal at the first output having an output frequency (F OUT ). The VCO 200 is configured to supply a second output clock signal that is a phase-shifted version of the first output clock signal (F OUT_180 ).

[0037] The transistor 205 has a first terminal, a second terminal, and a control terminal. The first terminal of the transistor 205 is coupled to the transistor 210, the transmission line 215, and the first output of the VCO 200. The second terminal of the transistor 205 is coupled to a common terminal that supplies a common potential (e.g., ground). The control terminal of the transistor 205 is coupled to the transistor 210 and the transmission line 220.

[0038] The transistor 210 has a first terminal, a second terminal, and a control terminal. The first terminal of the transistor 210 is coupled to the transistor 205 and the transmission line 220. The second terminal of the transistor 210 is coupled to a common terminal that supplies a common potential. The control terminal of the transistor 210 is coupled to the transistor 205 and the transmission line 215.

[0039] The transmission line 215 has a first terminal, a second terminal, and a third terminal. The first terminal of the transmission line 215 is coupled to the transistors 205, 210. The second terminal of the transmission line 215 is coupled to the bias network circuitry 225. The third terminal of the transmission line 215 is coupled to the transmission line 220 and the input of the VCO 200, which receives the control voltage from the filter circuitry 130.

[0040] The transmission line 220 has a first terminal, a second terminal, and a third terminal. The first terminal of the transmission line 220 is coupled to the transistors 205, 210. The second terminal of the transmission line 220 is coupled to the bias network circuitry 225. The third terminal of the transmission line 220 is coupled to the transmission line 215 and the input of the VCO 200, which receives the control voltage from the filter circuitry 130.

[0041] The bias network circuitry 225 has a first terminal, a second terminal, and a third terminal. The first terminal of the bias network circuitry 225 is coupled to the transmission line 215. The second terminal of the bias network circuitry 225 is coupled to the transmission line 220. The third terminal of the bias network circuitry 225 is coupled to a power supply terminal that receives a power supply voltage (Vdd).

[0042] The resistor 230 has a first terminal and a second terminal. The first terminal of the resistor 230 is coupled to the transistors 205, 210. The second terminal of the resistor 230 is coupled to the inductor 235.

[0043] The inductor 235 has a first terminal and a second terminal. The first terminal of the inductor 235 is coupled to the resistor 230. The second terminal of the inductor 235 is coupled to the bias network circuitry 225, the resistor 240, and the capacitors 245, 250.

[0044] The resistor 240 has a first terminal and a second terminal. The first terminal of the resistor 240 is coupled to the bias network circuitry 225, the inductor 235, and the capacitors 245, 250. The second terminal of the resistor 240 is coupled to a common terminal that supplies a common potential.

[0045] The capacitor 245 has a first terminal and a second terminal. The first terminal of the capacitor 245 is coupled to the bias network circuitry 225, the inductor 235, the resistor 240, and the capacitor 250. The second terminal of the capacitor 245 is coupled to the common terminal that supplies the common potential.

[0046] The capacitor 250 has a first terminal and a second terminal. The first terminal of the capacitor 250 is coupled to the bias network circuitry 225, the inductor 235, the resistor 240, and the capacitor 245. The second terminal of the capacitor 250 is coupled to the transmission line 220 and to an input of the VCO 200 that supplies a control voltage. In some examples, the capacitor 250 is referred to as a varactor, which has a capacitance that varies with respect to a bias voltage. In Figure 2 In examples, the control voltage at the input of the VCO 200 controls the capacitance of the capacitor 250.

[0047] The resistor 255 has a first terminal and a second terminal. The first terminal of the resistor 255 is coupled to the transistors 205, 210. The second terminal of the resistor 255 is coupled to the inductor 260.

[0048] The inductor 260 has a first terminal and a second terminal. The first terminal of the inductor 260 is coupled to the resistor 255. The second terminal of the inductor 260 is coupled to the bias network circuitry 225, the resistor 265, and the capacitors 270, 275.

[0049] The resistor 265 has a first terminal and a second terminal. The first terminal of the resistor 265 is coupled to the bias network circuitry 225, the inductor 260, and the capacitors 270, 275. The second terminal of the resistor 265 is coupled to the common terminal that supplies the common potential.

[0050] The capacitor 270 has a first terminal and a second terminal. The first terminal of the capacitor 270 is coupled to the bias network circuitry 225, the inductor 260, the resistor 265, and the capacitor 275. The second terminal of the capacitor 270 is coupled to the common terminal that supplies the common potential.

[0051] The capacitor 275 has a first terminal and a second terminal. The first terminal of the capacitor 270 is coupled to the bias network circuitry 225, the inductor 260, the resistor 265, and the capacitor 270. The second terminal of the capacitor 275 is coupled to the transmission line 215 and to an input of the VCO 200 that supplies a control voltage. In some examples, the capacitor 275 is referred to as a varactor, which has a capacitance that varies with respect to a bias voltage. In Figure 2 In examples, the control voltage at the input of the VCO 200 controls the capacitance of the capacitor 275.

[0052] The resistor 280 has a first terminal and a second terminal. The first terminal of the resistor 280 is coupled to the transmission line 215. The second terminal of the resistor 280 is coupled to the inductor 285.

[0053] The inductor 285 has a first terminal and a second terminal. The first terminal of the inductor 285 is coupled to the resistor 280. The second terminal of the inductor 285 is coupled to a power terminal that supplies a power supply voltage.

[0054] The resistor 290 has a first terminal and a second terminal. The first terminal of the resistor 290 is coupled to the transmission line 220. The second terminal of the resistor 290 is coupled to the inductor 295.

[0055] The inductor 295 has a first terminal and a second terminal. The first terminal of the inductor 295 is coupled to the resistor 290. The second terminal of the inductor 295 is coupled to a power terminal that supplies a power supply voltage.

[0056] In Figure 2In the examples, transistors 205 and 210 are NPN bipolar junction transistors (BJTs). Alternatively, transistors 205 and 210 can be n-channel field-effect transistors (FETs), n-channel insulated-gate bipolar transistors (IGBTs), n-channel junction field-effect transistors (JFETs), n-channel metal-oxide-semiconductor field-effect transistors (MOSFETs), or slightly modified p-type equivalents. Furthermore, transistors 205 and 210 can be implemented on / above a silicon substrate (Si), a silicon carbide substrate (SiC), a gallium nitride substrate (GaN), or a gallium arsenide substrate (GaAs).

[0057] Figure 3 yes Figure 2 Transmission lines 215, 220 and Figure 2 Figure 300 shows an example implementation of the bias network circuit system 225. Figure 3 The example bias network circuit system 225 includes a first example trace 305 and a second example trace 310. Figure 3 The example transmission line 215 includes an example equivalent circuit system 315. The example equivalent circuit system 315 of the transmission line 215 further includes a first example inductor 320, a first example capacitor circuit system 325, a first example resistor 330, a second example inductor 335, a second example capacitor circuit system 340, and a second example resistor 345. Figure 3 The example capacitor circuit system 325 includes a first example capacitor 350 and a second example capacitor 355. Figure 3 The example capacitor circuit system 340 includes a first example capacitor 360 and a second example capacitor 365.

[0058] Transmission line 215 is coupled to trace 305, or more generally to bias network circuitry 225. Transmission line 220 is coupled to trace 310, or more generally to bias network circuitry 225. Transmission lines 215 and 220 are configured to couple to... Figure 2 Transistors 205 and 210. Bias network circuitry 225 is coupled to transmission lines 215 and 220 and power supply terminals for supplying power voltage.

[0059] The trace 305 has a first terminal and a second terminal. The first terminal of the trace 305 is coupled to a power supply terminal supplying the power supply voltage. The second terminal of the trace 305 is coupled to the transmission line 215. Figure 3 In the example, trace 305 is formed Figure 2 280 resistors and Figure 2inductor 285. In some examples, modifying the length of the electrical trace 305 adjusts the resistance of the resistor 280, and modifying the winding (e.g., twisting) of the electrical trace 305 adjusts the inductance of the inductor 285. Advantageously, the electrical trace 305 reduces the package size of the VCO 200 in response to implementing the resistor 280 and the inductor 285 using an electrical trace 305 having a relatively small depth.

[0060] The electrical trace 310 has a first terminal and a second terminal. The first terminal of the electrical trace 310 is coupled to a power terminal that supplies a power supply voltage. The second terminal of the electrical trace 310 is coupled to the transmission line 220. In Figure 3 In examples where the electrical trace 310 forms Figure 2 the resistor 290 and Figure 2 the inductor 295. In some examples, modifying the length of the electrical trace 310 adjusts the resistance of the resistor 290, and modifying the winding of the electrical trace 310 adjusts the inductance of the inductor 295. Advantageously, the electrical trace 310 reduces the package size of the VCO 200 in response to implementing the resistor 290 and the inductor 295 using an electrical trace 310 having a relatively small depth.

[0061] The equivalent circuitry 315 is an illustrative representation of the equivalent circuitry that forms the transmission line 215. In Figure 3 In examples where the equivalent circuitry 315 shows the equivalent components of a portion of the transmission line 215. In other examples, one or more instances of the equivalent circuitry 315 are coupled in series to form the transmission line 215. For example, in Figure 2 In examples where the transmission lines 215, 220 show relatively short transmission lines, one or more additional instances of the circuitry of the transmission lines 215, 220 can be coupled in series with the transmission lines 215, 220 to support different lengths.

[0062] The inductor 320 has a first terminal and a second terminal. The first terminal of the inductor 320 is configured to be coupled to a subsequent portion of the transmission line 215. The second terminal of the inductor 320 is coupled to the capacitor circuitry 325 and the resistor 330. In Figure 3 In examples where the inductor 320 is an equivalent representation of the inductance of the conductive layer that supports the capacitor circuitry 325, 340.

[0063] Capacitor circuitry 325 has a first terminal, a second terminal, and a third terminal. The first terminal of capacitor circuitry 325 is coupled to inductor 320 and resistor 330. The second terminal of capacitor circuitry 325 is coupled to a common terminal that supplies a common potential. The third terminal of capacitor circuitry 325 is coupled to an input of VCO 200 that supplies a control voltage. In some examples, capacitor circuitry 325 is an equivalent representation of a capacitor formed using a series of stacked parallel plates. In Figure 3 In examples, a stack of parallel conductive plates is illustrated by a top view of a top plate of the parallel plates.

[0064] Resistor 330 has a first terminal and a second terminal. The first terminal of resistor 330 is coupled to inductor 320 and capacitor circuitry 325. The second terminal of resistor 330 is coupled to inductor 335. In Figure 3 In examples, resistor 330 is an equivalent representation of a resistance of a conductive layer that supports capacitor circuitry 325, 340. Resistor 330 is an example of Figure 2 resistor 230.

[0065] Inductor 335 has a first terminal and a second terminal. The first terminal of inductor 335 is coupled to resistor 330. The second terminal of inductor 335 is coupled to capacitor circuitry 340 and resistor 345. In Figure 3 In examples, inductor 335 is an equivalent representation of an inductance of a conductive layer that supports capacitor circuitry 325, 340. Inductor 335 is an example of Figure 2 inductor 235.

[0066] Capacitor circuitry 340 has a first terminal, a second terminal, and a third terminal. The first terminal of capacitor circuitry 340 is coupled to inductor 335 and resistor 345. The second terminal of capacitor circuitry 340 is coupled to a common terminal that supplies a common potential. The third terminal of capacitor circuitry 340 is coupled to an input of VCO 200 that supplies a control voltage. In some examples, capacitor circuitry 340 is an equivalent representation of a capacitor formed using a series of stacked parallel plates. In Figure 3 In examples, a stack of parallel conductive plates is illustrated by a top view.

[0067] Resistor 345 has a first terminal and a second terminal. The first terminal of resistor 345 is coupled to inductor 335 and capacitor circuitry 340. The second terminal of resistor 345 is configured to be coupled to a subsequent portion of transmission line 215. In Figure 3 In examples, resistor 345 is an equivalent representation of a resistance of a conductive layer that supports capacitor circuitry 325, 340.

[0068] Capacitor 350 has a first terminal and a second terminal. The first terminal of capacitor 350 is coupled to inductor 320, resistor 330, and capacitor 355. The second terminal of capacitor 350 is coupled to a common terminal that supplies a common potential. Capacitor 350 is an example of capacitor 245. Figure 2

[0069] Capacitor 355 has a first terminal and a second terminal. The first terminal of capacitor 355 is coupled to inductor 320, resistor 330, and capacitor 350. The second terminal of capacitor 355 is coupled to an input of VCO 200 that supplies a control voltage. Capacitor 355 is an example of capacitor 250. In some examples, capacitor 355 is referred to as a varactor, which has a capacitance that varies with respect to a bias voltage. In examples where VCO 200 is an example of VCO 140, the control voltage at the input of VCO 200 controls the capacitance of capacitor 355. Figure 2 Figure 3

[0070] Capacitor 360 has a first terminal and a second terminal. The first terminal of capacitor 360 is coupled to inductor 335, resistor 345, and capacitor 365. The second terminal of capacitor 360 is coupled to a common terminal that supplies a common potential.

[0071] Capacitor 365 has a first terminal and a second terminal. The first terminal of capacitor 365 is coupled to inductor 335, resistor 345, and capacitor 360. The second terminal of capacitor 365 is coupled to an input of VCO 200 that supplies a control voltage. In some examples, capacitor 365 is referred to as a varactor, which has a capacitance that varies with respect to a bias voltage. In examples where VCO 200 is an example of VCO 140, the control voltage at the input of VCO 200 controls the capacitance of capacitor 365. Figure 3

[0072] Figure 4 is a flowchart representative of example machine readable instructions or example operations 400 that can be at least one of performed, instantiated, or executed using example implementations of VCO 140, 200 of Figure 1 and 2 Figure 4 Example operations 400 begin at block 405, where Figure 2 inductor 285 biases the first transmission line with a first inductance. In some examples, inductor 285 is an intentional inductance, such as by winding wire in series with Figure 2 and 3 Figure 3 ​​​​​​an inductance formed by the electrical trace 305. In such examples, at the termination location between the transmission line 215 and the bias network circuitry 225, the inductor 285 biases the transmission line 215 with a constant voltage (e.g., the supply voltage) by preventing further propagation of alternating current through the transmission line 215 to the supply terminal. In some examples, the inductor 285 is referred to as a choke inductor.

[0073] Figure 2 the first resistance reduces a magnitude of the first resonant frequency (block 410). In some examples, the resistor 280 is an intentional resistance, such as a resistance formed by physical characteristics of the electrical trace 305 coupled in series between the transmission line 215 and the inductor 285. In example operations, the addition of the inductor 285 adds a parasitic resonant frequency in response to the inductor 285 resonating with a capacitive component (e.g., the capacitors 245, 250, 350, 355, 360, 365) of the transmission line 215. Figure 2 and 3 the first resistance reduces a magnitude of the first resonant frequency (block 410). In some examples, the resistor 280 is an intentional resistance, such as a resistance formed by physical characteristics of the electrical trace 305 coupled in series between the transmission line 215 and the inductor 285. In example operations, the addition of the inductor 285 adds a parasitic resonant frequency in response to the inductor 285 resonating with a capacitive component (e.g., the capacitors 245, 250, 350, 355, 360, 365) of the transmission line 215. Figure 14 This example reduction is shown and described in more detail below in connection with

[0074] The resistor 280 and the inductor 285 power the first transistor using the first transmission line (block 415). In example operations, the resistor 280 and the inductor 285 power the transistor 205 of the VCO 200 through the transmission line 215. In some examples (e.g., examples of the VCO 200), the resistor 280 and the inductor 285 power the first transistor using the first transmission line 215 and the second transmission line 220. Figure 2 Figure 2 and 3 In some examples (e.g., examples of the VCO 200), the VCO 200 terminates the transmission line 215 using an open circuit configuration. In the open circuit configuration, the length of the transmission line 215 is one-half of a wavelength (λ) of the target operating frequency.

[0075] Advantageously, the transmission lines 215, 220 support a standing wave VCO, such as the VCO 200, with a resonant frequency that is twice the resonant frequency (f O ) of the transmission lines 215, 220 compared to a transmission line with a length equal to one-quarter of a wavelength of the target operating frequency. This shortened length transmission line is shown and described in connection with Figure 7 , 8 , 9, 10, 11, 12, and 13. Advantageously, the open circuit configuration of the transmission lines 215, 220 improves a quality factor (Q) of an output of the VCO 200 compared to a quality factor of a transmission line with a length equal to one-quarter of a wavelength of the target operating frequency. However, the length of the transmission lines 215, 220 has an attenuation constant (a) that is higher than examples with a length equal to one-half of a wavelength of the target operating frequency, which degrades the quality factor. ​

[0076] Figure 2 The inductor 295 biases the second transmission line with a second inductance (block 420). In some examples, the inductor 295 is an intentional inductance, such as an inductance formed by winding an electrical trace 310 coupled in series with the transmission line 220. In such examples, at the termination location between the transmission line 220 and the bias network circuitry 225, the inductor 295 biases the transmission line 220 with a constant voltage (such as the supply voltage) by impeding further propagation of alternating current through the transmission line 220 to the supply terminal. In some examples, the inductor 295 is referred to as a choke inductor. Figure 3

[0077] Figure 2 The resistor 290 reduces a magnitude of the parasitic resonant frequency with a second resistance (block 425). In some examples, the resistor 290 is an intentional resistance, such as a resistance formed by physical characteristics of the electrical trace 310 coupled in series between the transmission line 220 and the inductor 295. In example operations, the addition of the inductor 295 adds a parasitic resonant frequency in response to the inductor 295 resonating with capacitive components (such as the capacitors 270, 275) of the transmission line 220. Advantageously, the resistor 280 introduces power loss to reduce the magnitude of the parasitic resonant frequency of the inductor 285. Such example reductions are shown and described in greater detail below in connection with Figure 2 Figure 14

[0078] The resistor 290 and the inductor 295 power the second transistor using the second transmission line (block 430). In example operations, the resistor 290 and the inductor 295 power the transistor 210 through the transmission line 220. In some examples (such as Figure 2 Figure 2 and 3 In open-circuit configurations, the length of the transmission line 220 is one-half of the wavelength (λ) of the target operating frequency. Advantageously, setting the lengths of the transmission lines 215, 220 to one-half of the wavelength (λ) of the target operating frequency improves the quality factor of the output signal compared to transmission lines having a quarter wavelength.

[0079] The transmission line 215 adjusts the power to the second transistor based on the power to the first transistor (block 435). In example operations, an inductive component (such as the inductor 295) of the transmission line 215 adjusts the power to the second transistor based on the power to the first transistor. In some examples, a capacitive component (such as the capacitors 270, 275) of the transmission line 215 adjusts the power to the second transistor based on the power to the first transistor. Figure 2 3 ​​​​​The inductors 235, 320, 335 and the capacitor assembly (e.g., capacitors 245, 250, 350, 355, 360, 365) of the transmission line 215 form an inductor-capacitor (LC) slot. The LC slot has a frequency based on the inductance and capacitance of the transmission line 215. In this example operation, the control voltage adjusts the resonant frequency of the transmission line 215 by modifying the capacitance of capacitor 250, which is a voltage-dependent variable capacitor. Advantageously, the LC slot generates alternating current. Figure 2 Resistor 230 converts the alternating current into voltage to control transistor 210.

[0080] Transmission line 220 regulates the power supply to the first transistor based on the power supply to the second transistor (block 440). In example operation, the inductor component of transmission line 220 (e.g., Figure 2 The inductor 260 and the capacitor assembly (e.g., capacitors 270, 275) of the transmission line 220 form an inductor-capacitor (LC) slot. The LC slot has a frequency based on the inductance and capacitance of the transmission line 220. In this example operation, the control voltage adjusts the resonant frequency of the transmission line 220 by modifying the capacitance of capacitor 275, which is a voltage-dependent variable capacitor. Advantageously, the LC slot generates alternating current. Figure 2 Resistor 255 converts the alternating current into voltage to control transistor 205.

[0081] Transistors 205 and 210 generate output signals with oscillation frequencies (block 445). In example operation, transistor 205 generates a first output clock signal in response to the LC slot of transmission line 220, and transistor 210 generates a second output clock signal in response to the LC slot of transmission line 215. In this example operation, the second clock signal is a 180-degree phase-shifted version of the first clock signal in response to the cross-coupling of transistor 205. Advantageously, the bias network circuitry 225 improves the generation of the output signal of the VCO 200 using standing waves by using inductors 285 and 295 to power transmission lines 215 and 220 and reducing AC current propagation at the terminations of transmission lines 215 and 220. Control proceeds back to block 405.

[0082] refer to Figure 4 The flowchart shown illustrates the example method. However, implementations may also be used in this specification. Figure 1 and 2 Many other methods exist for VCO 140, 200. For example, the execution order of the boxes can be changed, or some of the described boxes can be changed, eliminated, or combined. Similarly, additional operations may be included before, between, or after the boxes shown in the illustrated examples during the manufacturing process.

[0083] Figure 5is a schematic diagram of an example VCO 500, which is a VCO Figure 1 and 2 another example of the VCO 140, 200 of Figure 5 In the example of Figure 2 transistors 205, 210, Figure 2 and 3 transmission lines 215, 220, Figure 2 and 3 bias network circuitry 225, a first resistor 510, a capacitor 520, and a second resistor 530 of

[0084] The resistor 510 has a first terminal and a second terminal. The first terminal of the resistor 510 is coupled to the transistor 205 and the capacitor 520. The second terminal of the resistor 510 is coupled to a common terminal that supplies a common potential.

[0085] The capacitor 520 has a first terminal and a second terminal. The first terminal of the capacitor 520 is coupled to the transistor 205 and the resistor 510. The second terminal of the capacitor 520 is coupled to the transistor 210 and the resistor 530.

[0086] The resistor 530 has a first terminal and a second terminal. The first terminal of the resistor 530 is coupled to the transistor 210 and the capacitor 520. The second terminal of the resistor 530 is coupled to a common terminal that supplies a common potential.

[0087] Figure 6 is a flowchart representing example machine-readable instructions or example operations 600 that can be at least one of performed, instantiated, or executed using example implementations of the VCO 500 of Figure 5 The example operations 600 begin with the operations of the blocks 405, 410, 415, 420, 425, 430, 435, 440, 445 of the above Figure 4 However, unlike the example operations 400 of Figure 4 In the example of Figure 6 The resistor 510, 530 of Figure 5 The capacitor 520 of Figure 5 connects the first transistor and the second transistor with the termination capacitance and the bias current (block 610). In some examples, Figure 2The resistors 280 and 290 are designed with relatively large values ​​to prevent the parasitic resonant frequency from having a relatively large amplitude across all possible process and temperature conditions. In this example, increasing the resistance of resistors 280 and 290 would increase the power dissipation of VCO 200 and 500. However, adding resistors 510 and 530 and capacitor 520 to filter frequencies below the target operating frequency allows the designer to reduce the resistance of resistors 280 and 290. In example operation, resistors 510 and 530 and capacitor 520 generate frequency-dependent bias currents to reduce the output signal magnitude at frequencies below the target resonant frequency. In this example, the capacitance of capacitor 520 is chosen such that the parasitic resonant frequency is omega (ω) parasitic Less than Figure 2 The transconductance (g) of transistors 205 and 210 m Divide by the capacitance of capacitor 520 (C) T It is twice the capacitance of 1 / 2. This capacitance can be obtained using the following equation (1).

[0088]

[0089] Advantageously, resistors 510, 530 and capacitor 520 reduce the power consumption of VCO500 by reducing the size of resistors 280, 290. Control proceeds back to box 405.

[0090] refer to Figure 6 The flowchart shown illustrates the example method. However, implementations may also be used in this specification. Figure 5 Many other methods exist for the VCO 500. For example, the execution order of the boxes can be changed, or some of the described boxes can be altered, eliminated, or combined. Similarly, additional operations may be included before, between, or after the boxes shown in the illustrated example during the manufacturing process.

[0091] Figure 7 This is a schematic diagram of an example VCO 700, where the VCO is... Figure 1 , 2 Another example of VCO 140, 200, and 500. Figure 7 In one example, VCO 700 includes a first transistor 705, a second transistor 710, a first transmission line 715, a second transmission line 720, a bias network circuit system 725, an inductor 730, a resistor 735, and a capacitor 740. Figure 7 The example bias network circuit system 725 includes a first example resistor 745, a first example inductor 750, a second example resistor 755, and a second example inductor 760. Figure 2 and 5 The VCO 200 and 500 are different. Figure 7The VCO 700 uses the inductor 730, the resistor 735, and the capacitor 740 to form a shorted current path between the transmission lines 715, 720. Advantageously, shorting the transmission lines 715, 720 allows the VCO 700 to use transmission lines 715, 720 that are approximately half the length of the transmission lines 215, 220 of Figure 2 , 3 and 5. Advantageously, the capacitor 740 can be configured to reduce unintended effects of the inductor 730 and the resistor 735 in response to shorting the transmission lines 715, 720.

[0092] The VCO 700 has an input, a first output, and a second output. The input of the VCO 700 is configured to be coupled to the filter circuitry 130 of Figure 1 , which supplies a control voltage (V CNTRL ). The VCO 700 is configured to supply a first output clock signal at the first output having an output frequency (F OUT ). The VCO 700 is configured to supply a second output clock signal that is a phase-shifted version of the first output clock signal (F OUT_180 ).

[0093] The transistor 705 has a first terminal, a second terminal, and a control terminal. The first terminal of the transistor 705 is coupled to the transistor 710, the transmission line 715, and the first output of the VCO 700. The second terminal of the transistor 705 is coupled to a common terminal that supplies a common potential (e.g., ground). The control terminal of the transistor 705 is coupled to the transistor 710 and the transmission line 720. The transistor 705 is an example of the transistor 205 of Figure 2 .

[0094] The transistor 710 has a first terminal, a second terminal, and a control terminal. The first terminal of the transistor 710 is coupled to the transistor 705 and the transmission line 720. The second terminal of the transistor 710 is coupled to a common terminal that supplies a common potential. The control terminal of the transistor 710 is coupled to the transistor 705 and the transmission line 715. The transistor 710 is an example of the transistor 210 of Figure 2 .

[0095] The transmission line 715 has a first terminal, a second terminal, and a third terminal. The first terminal of the transmission line 715 is coupled to the transistors 705, 710. The second terminal of the transmission line 715 is coupled to the bias network circuitry 725 and the transmission line 720 through the inductor 730, the resistor 735, and the capacitor 740. The third terminal of the transmission line 715 is coupled to the transmission line 720 and the input of the VCO 700, which receives the control voltage from the filter circuitry 130. The transmission line 715 is an example of the transmission line 215 of Figure 2 .

[0096] Transmission line 720 has a first terminal, a second terminal, and a third terminal. The first terminal of transmission line 720 is coupled to transistors 705, 710. The second terminal of transmission line 720 is coupled to bias network circuitry 725 and transmission line 715 through inductor 730, resistor 735, and capacitor 740. The third terminal of transmission line 720 is coupled to transmission line 715 and an input of VCO 700 that receives a control voltage from filter circuitry 130. Transmission line 720 is an example of transmission line 220. Figure 2

[0097] Bias network circuitry 725 has a first terminal, a second terminal, and a third terminal. The first terminal of bias network circuitry 725 is coupled to transmission line 715 and inductor 730. The second terminal of bias network circuitry 725 is coupled to transmission line 720 and capacitor 740. The third terminal of bias network circuitry 725 is coupled to a power supply terminal that receives a power supply voltage (Vdd). Bias network circuitry 725 is an example of bias network circuitry 225. Figure 2

[0098] Inductor 730 has a first terminal and a second terminal. The first terminal of inductor 730 is coupled to transmission line 715 and bias network circuitry 725. The second terminal of inductor 730 is coupled to resistor 735.

[0099] Resistor 735 has a first terminal and a second terminal. The first terminal of resistor 735 is coupled to inductor 730. The second terminal of resistor 735 is coupled to capacitor 740. In examples where inductor 730 and resistor 735 are illustrative representations of equivalent components formed by implementing VCO 700 with a die, inductor 730 and resistor 735 represent the inductance and resistance of a current path connecting transmission lines 715, 720. In some examples, one or both of inductor 730 and resistor 735 can not be shown. In such examples, inductor 730 and resistor 735 are characteristics of the connection between transmission lines 715, 720 through capacitor 740. Figure 7 Capacitor 740 has a first terminal and a second terminal. The first terminal of capacitor 740 is coupled to resistor 735. The second terminal of capacitor 740 is coupled to transmission line 720 and bias network circuitry 725. In some examples, such as when inductor 730 and resistor 735 are not shown, capacitor 740 forms a shorted current path between transmission lines 715, 720. In such examples, inductor 730 and resistor 735 are considered characteristics of the traces connecting capacitor 740 to transmission lines 715, 720.

[0100]

[0101] ​​​Resistor 745 has a first terminal and a second terminal. The first terminal of resistor 745 is coupled to transmission line 715 and inductor 730. The second terminal of resistor 745 is coupled to inductor 750. Resistor 745 is Figure 2 An example of a 280 resistor.

[0102] Inductor 750 has a first terminal and a second terminal. The first terminal of inductor 750 is coupled to resistor 745. The second terminal of inductor 750 is coupled to a power supply terminal supplying the power supply voltage. Inductor 750 is Figure 2 An example of the inductor 285.

[0103] Resistor 755 has a first terminal and a second terminal. The first terminal of resistor 755 is coupled to transmission line 720 and capacitor 740. The second terminal of resistor 755 is coupled to inductor 760. Resistor 755 is Figure 2 An example of resistor 290.

[0104] Inductor 760 has a first terminal and a second terminal. The first terminal of inductor 760 is coupled to resistor 755. The second terminal of inductor 760 is coupled to a power supply terminal supplying the power supply voltage. Inductor 760 is Figure 2 An example of inductor 295.

[0105] exist Figure 7 In the examples, transistors 705 and 710 are NPN BJTs. Alternatively, transistors 705 and 710 can be n-channel FETs, n-channel IGBTs, n-channel JFETs, n-channel MOSFETs, or slightly modified p-type equivalents. Furthermore, transistors 705 and 710 can be implemented on / above a silicon (Si) substrate, a silicon carbide (SiC) substrate, a gallium nitride (GaN) substrate, or a gallium arsenide (GaAs) substrate.

[0106] Figure 8 This is a flowchart illustrating example machine-readable instructions or example operations 800, which can be used... Figure 7 The example implementation of VCO 700 is used to carry out, instantiate, or execute at least one of the following. Example operation 800 begins above. Figure 4 The operations of boxes 405, 410, 415, 420, 425, 430, 435, 440, and 445. In Figure 8 In example operation 800, Figure 7 Resistors 745, 755 and Figure 7 Inductors 750, 760 and Figure 2 and 5 Resistors 280, 290 and Figure 2 and 5The inductors 285 and 295 are interchangeable. Figure 8 In the examples, resistors 745 and 755 are related to Figure 7 The transmission lines 715 and 720 operate in blocks 410, 415, 425, and 430, and the inductors 750 and 760 operate in blocks 405, 415, 420, and 430 with respect to the transmission lines 715 and 720. Similarly, the transmission lines 715 and 720 operate in blocks 435 and 440, and Figure 7 Transistors 705 and 710 perform the operation of block 445.

[0107] However, with Figure 2 and 5 Unlike the VCO 200 and 500, the VCO 700 is configured for short-circuit termination of transmission lines 715 and 720. In the short-circuit configuration, the length of the transmission line is approximately one-quarter of the wavelength of the desired resonant frequency. Advantageously, with... Figure 2 , 3 Compared to the VCO 200 and 500 with their longer transmission lines 215 and 220, reducing the length of transmission lines 715 and 720 will reduce the on-chip size of the VCO700.

[0108] After box 445, control proceeds to box 810, at which point... Figure 7 Capacitor 740 connects the first and second transmission lines to the terminating capacitor. In some instances, and as further described above, Figure 7 Inductor 730 and Figure 7 Resistor 735 represents the parasitic component generated by shorting transmission lines 715 and 720 using capacitor 740. This method of terminating transmission lines 715 and 720 using capacitor 740 can be referred to as series resonant termination. In the example operation, the capacitance of capacitor 740 is configured to reduce the series resonance caused by the inductance represented by inductor 730 and resistor 735. The capacitance of capacitor 740 (C) term ) is set to be the inductance (L) of inductor 730 term ) for the target resonant frequency (f O The effect is proportional. The capacitance of capacitor 740 can be determined using the following equation (2).

[0109]

[0110] In some instances, the capacitance of capacitor 740 is further manipulated by intentionally adding at least one of inductor 730 or resistor 735. In such instances, the intentional addition of resistance results in an equivalent resistance (R0). eqThe output signal quantity at the resonant frequency (Zo), the attenuation constant (α), the current path length (l), and the resistance (R) of resistor 735 are also considered. term The equivalent resistance is proportional to the resistance. This equivalent resistance can be determined using the following equation (3).

[0111]

[0112] In some such instances, a capacitor (C) is added to capacitor 740. term Proportional inductance (L) in This reduces the complexity of adjusting the quality factor (Q) of the VCO 700. For example, the intentional inductance can be equal to the capacitance of capacitor 740 multiplied by the square of the output signal value at the target frequency, as shown in equation (4) below. In such an example, the intentional inductance is proportional to the capacitance of capacitor 740. In example operation, the quality factor is related to the equivalent resistance, the target resonant frequency, the intentional inductance, and the equivalent inductance (L). eq Proportional.

[0113] L in =C term Z o 2 Equation (4)

[0114]

[0115] Advantageously, reducing the capacitance of capacitor 740 and increasing the intentional inductance of inductor 730 will improve the quality factor and reduce the phase noise of VCO 700. Control proceeds to return to box 405.

[0116] refer to Figure 8 The flowchart shown illustrates the example method. However, implementations may also be used in this specification. Figure 7 Many other methods exist for the VCO 700. For example, the execution order of the boxes can be changed, or some of the described boxes can be altered, eliminated, or combined. Similarly, additional operations may be included before, between, or after the boxes shown in the illustrated example during the manufacturing process.

[0117] Figure 9 This is a schematic diagram of an example VCO 900, where the VCO is... Figure 7 Another example of the VCO 700. In Figure 9 In one example, VCO 900 contains Figure 7 Transistors 705, 710, Figure 7 Transmission lines 715, 720, Figure 7 Bias network circuit system 725, Figure 7 Inductor 730, Figure 7resistor 735, capacitor 910, and voltage sensing circuitry 920. Unlike Figure 7 Unlike examples of the VCO 900, the VCO 900 uses the voltage sensing circuitry 920 to dynamically adjust the capacitance of the capacitor 910. Advantageously, the VCO 900 dynamically corrects the termination capacitance of the capacitor 910 to account for unintentional variations in the VCO 900.

[0118] The capacitor 910 has a first terminal, a second terminal, and a control terminal. The first terminal of the capacitor 910 is coupled to the resistor 735. The second terminal of the capacitor 910 is coupled to the transmission line 720, the bias network circuitry 725, and the voltage sensing circuitry 920. The control terminal of the capacitor 910 is coupled to the voltage sensing circuitry 920. In some examples, the capacitor 910 is referred to as a varactor, which has a capacitance that varies with respect to a bias voltage. In Figure 9 In examples of the VCO 900, the voltage sensing circuitry 920 controls the capacitance of the capacitor 910 in response to the bias capacitor 910.

[0119] The voltage sensing circuitry 920 has a first terminal, a second terminal, and a third terminal. The first terminal of the voltage sensing circuitry 920 is coupled to the transmission line 715, the bias network circuitry 725, and the inductor 730. The second terminal of the voltage sensing circuitry 920 is coupled to the transmission line 720, the bias network circuitry 725, and the capacitor 910. The third terminal of the voltage sensing circuitry 920 is coupled to the capacitor 910.

[0120] Figure 10 is a schematic diagram of example voltage sensing circuitry 1000 that is an example of the voltage sensing circuitry 920 of Figure 9 In examples of the VCO 900, the voltage sensing circuitry 920 controls the capacitance of the capacitor 910 in response to the bias capacitor 910. Figure 10 In examples of the VCO 900, the voltage sensing circuitry 920 controls the capacitance of the capacitor 910 in response to the bias capacitor 910. Figure 10 The example peak detector circuitry 1005 includes a first example capacitor 1020, a resistor 1025, an example transistor 1030, a second example capacitor 1035, and an example current source circuitry 1040. Figure 10 The example peak detector circuitry 1010 includes an example diode 1045 and an example capacitor 1050. Figure 10 The example correction circuitry 1015 includes a first example comparator circuitry 1055, a second example comparator circuitry 1060, and an example trim circuitry 1065.

[0121] The voltage sensing circuitry 1000 has a first input, a second input, and an output. The first input of the voltage sensing circuitry 1000 is structured to be coupled toFigure 7 Transmission line 715, Figure 7 The bias network circuit system 725 and Figure 7 The inductor 730. The second input of the voltage sensing circuit system 1000 is configured to be coupled to... Figure 7 The transmission line 720, the bias network circuit system 725 and Figure 9 The output of the voltage sensing circuit system 1000 is coupled to capacitor 910.

[0122] The peak detector circuit system 1005 has a first terminal and a second terminal. The first terminal of the peak detector circuit system 1005 is coupled to a first input of the voltage sensing circuit system 1000. The second terminal of the peak detector circuit system 1005 is coupled to a correction circuit system 1015.

[0123] The peak detector circuit system 1010 has a first terminal and a second terminal. The first terminal of the peak detector circuit system 1010 is coupled to the second input of the voltage sensing circuit system 1000. The second terminal of the peak detector circuit system 1010 is coupled to the comparator circuit system 1055. Figure 10 In this example, peak detector circuit system 1010 is an alternative to peak detector circuit system 1005. Advantageously, peak detector circuit system 1010 has lower integration complexity compared to peak detector circuit system 1005.

[0124] The calibration circuit system 1015 has a first terminal, a second terminal, and a third terminal. The first terminal of the calibration circuit system 1015 is coupled to the peak detector circuit system 1005. The second terminal of the calibration circuit system 1015 is coupled to the peak detector circuit system 1010. The third terminal of the calibration circuit system 1015 is coupled to the capacitor 910.

[0125] Capacitor 1020 has a first terminal and a second terminal. The first terminal of capacitor 1020 is coupled to a first input of voltage sensing circuit system 1000. The second terminal of capacitor 1020 is coupled to resistor 1025 and transistor 1030.

[0126] Resistor 1025 has a first terminal and a second terminal. The first terminal of resistor 1025 is coupled to capacitor 1020 and transistor 1030. The second terminal of resistor 1025 is coupled to a common terminal supplying a common potential.

[0127] The transistor 1030 has a first terminal, a second terminal, and a control terminal. The first terminal of the transistor 1030 is coupled to a power terminal that supplies a power supply voltage. The second terminal of the transistor 1030 is coupled to the correction circuitry 1015, the capacitor 1035, and the current source circuitry 1040. The control terminal of the transistor 1030 is coupled to the capacitor 1020 and the resistor 1025.

[0128] The capacitor 1035 has a first terminal and a second terminal. The first terminal of the capacitor 1035 is coupled to the correction circuitry 1015, the transistor 1030, and the current source circuitry 1040. The second terminal of the capacitor 1035 is coupled to a common terminal that supplies a common potential.

[0129] The current source circuitry 1040 has a first terminal and a second terminal. The first terminal of the current source circuitry 1040 is coupled to the correction circuitry 1015, the transistor 1030, and the capacitor 1035. The second terminal of the current source circuitry 1040 is coupled to a common terminal that supplies a common potential.

[0130] The diode 1045 has a first terminal and a second terminal. The first terminal of the diode 1045 is coupled to the second input of the voltage sense circuitry 1000. The second terminal of the diode 1045 is coupled to the correction circuitry 1015 and the capacitor 1050.

[0131] The capacitor 1050 has a first terminal and a second terminal. The first terminal of the capacitor 1050 is coupled to the correction circuitry 1015 and the diode 1045. The second terminal of the capacitor 1050 is coupled to a common terminal that supplies a common potential.

[0132] The comparator circuitry 1055 has a first terminal and a second terminal. The first terminal of the comparator circuitry 1055 is coupled to the transistor 1030, the capacitor 1035, and the current source circuitry 1040. The second terminal of the comparator circuitry 1055 is coupled to the trim circuitry 1065.

[0133] The comparator circuitry 1060 has a first terminal and a second terminal. The first terminal of the comparator circuitry 1060 is coupled to the diode 1045 and the capacitor 1050. The second terminal of the comparator circuitry 1060 is coupled to the trim circuitry 1065.

[0134] The trim circuitry 1065 has a first terminal, a second terminal, and a third terminal. The first terminal of the trim circuitry 1065 is coupled to the comparator circuitry 1055. The second terminal of the trim circuitry 1065 is coupled to the comparator circuitry 1060.

[0135] Figure 11is a flow diagram representing example machine-readable instructions or example operations 1100 that can be carried out, instantiated, or executed using Figure 9 and 10 voltage sensing circuitry 920, 1000 or more generally Figure 9 of VCO 900. The example operations 1100 begin with the operations of block 405, 410, 415, 420, 425, 430, 435, 440, 445, 810 of the above Figure 4 and 8 In the example operations 1100 of the above Figure 11 In the example operations 1100 of the above Figure 7 resistors 745, 755 of the above Figure 7 inductors 750, 760 of the above Figure 2 and 5 resistors 280, 290 of the above Figure 2 and 5 inductors 285, 295 of the above Figure 11 In the example of the above Figure 7 and 9 transmission lines 715, 720 perform the operations of block 410, 415, 425, 430, and inductors 750, 760 perform the operations of block 405, 415, 420, 430 with respect to transmission lines 715, 720. Similarly, transmission lines 715, 720 perform the operations of block 435, 440, and Figure 7 and 9 transistors 705, 710 perform the operations of block 445.

[0136] Unlike VCO 200, 500 of the above Figure 2 and 5 VCO 700, 900 is configured for shorted termination of transmission lines 715, 720. In a shorted configuration, the length of the transmission line is about a quarter of the wavelength of the desired resonant frequency. Advantageously, reducing the length of transmission lines 715, 720 reduces the system-on-chip size of VCO 700, 900 compared to VCO 200, 500 with longer transmission lines 215, 220 of Figure 2 , 3 and 5.

[0137] After block 810, control proceeds to block 1110, at which voltage sensing circuitry 920, 1000 determines whether a peak is present at the termination of the first transmission line or the second transmission line. In the example of peak detector circuitry 1005 of the above Figure 10 In the example of peak detector circuitry 1005 of the above Figure 10 capacitor 1020 of the above Figure 10the resistor 1025 filters the voltage at the termination of the transmission line 715 to control Figure 10 the transistor 1030. In this example, Figure 10 the current source circuitry 1040 sinks bias current to set the voltage across Figure 10 the capacitor 1035. In Figure 10 the example of the peak detector circuitry 1010, Figure 10 the diode 1045 rectifies the voltage at the termination of the transmission line 720 to set the voltage across Figure 10 the capacitor 1050. In such example operations, the capacitor 1050 filters relatively high frequency noise.

[0138] If the voltage sensing circuitry 920, 1000 determines that there is no peak at the termination of the first transmission line or the second transmission line (e.g., block 1110 returns a result of NO), then control proceeds to return to block 405. In the example of the peak detector circuitry 1005, the current source circuitry 1040 pulls down the output of the peak detector circuitry 1005 in response to the lack of current from the transistor 1030. In the example of the peak detector circuitry 1010, the voltage of the capacitor 1050 remains fixed at the bias voltage set by the bias network circuitry 725 in response to the lack of change in current from the diode 1045.

[0139] If the voltage sensing circuitry 920, 1000 determines that there is a peak at the termination of the first transmission line or the second transmission line (e.g., block 1110 returns a result of YES), then the voltage sensing circuitry 920, 1000 adjusts the termination capacitance (block 1120). In the example of the peak detector circuitry 1005, the transistor 1030 begins conducting current in response to a change in voltage at the termination of the transmission line 715. This current from the transistor 1030 adjusts the voltage of the capacitor 1035, which sets the output of the peak detector circuitry 1005. In the example of the peak detector circuitry 1010, a change in voltage (e.g., a voltage peak) at the termination of the transmission line 720 forward biases the diode 1045, which increases the voltage across the capacitor 1050. In such example operations, Figure 10 the comparator circuitry 1055, 1060 adjusts the trim value of the trim circuitry 1065 in response to sensing a change in the output of the peak detector circuitry 1005, 1010. In some such examples, the trim circuitry 1065 controls Figure 10 the termination capacitance based on the trim value. In some such examples, the trim circuitry 1065 controls Figure 9 and 10capacitor 910 in response to the comparator circuitry 1055 increasing the trim value and decreases the capacitance of the capacitor 910 in response to the comparator decreasing the trim value. Control proceeds to return to block 405.

[0140] Reference is made to Figure 11 The flowchart shown describes an example method. However, many other methods of implementing the voltage sensing circuitry 920, 1000 or more generally the VCO 900 can also be used in this description. For example, the order of execution of the blocks can be changed, or some of the described blocks can be changed, eliminated, or combined. Similarly, additional operations can be included in the process in the example shown, before, between, or after the blocks shown. Figure 9

[0141] Figure 12 is a schematic diagram of an example VCO 1200, which is a VCO 700, 900 Figure 7 and 9 In the example of the VCO 700, 900, the VCO 1200 includes Figure 12 and Figure 7 and 9 the transistors 705, 710, Figure 7 and 9 the transmission lines 715, 720, Figure 7 and 9 the bias network circuitry 725, Figure 7 and 9 the inductor 730, Figure 7 and 9 the resistor 735, Figure 7 the capacitor 740, a first resistor 1210, a capacitor 1220, and a second resistor 1230.

[0142] The resistor 1210 has a first terminal and a second terminal. The first terminal of the resistor 1210 is coupled to the transistor 705 and the capacitor 1220. The second terminal of the resistor 1210 is coupled to a common terminal that supplies a common potential.

[0143] The capacitor 1220 has a first terminal and a second terminal. The first terminal of the capacitor 1220 is coupled to the transistor 705 and the resistor 1210. The second terminal of the capacitor 1220 is coupled to the transistor 710 and the resistor 1230.

[0144] The resistor 1230 has a first terminal and a second terminal. The first terminal of the resistor 1230 is coupled to the transistor 710 and the capacitor 1220. The second terminal of the resistor 1230 is coupled to a common terminal that supplies a common potential.

[0145] ​Figure 13 This is a flowchart illustrating example machine-readable instructions or example operations 1300, which can be used... Figure 12 The example implementation of VCO 1200 is used to carry out, instantiate, or execute at least one of the following. Example operation 1300 begins above. Figure 4 , 6 The operations of boxes 405, 410, 415, 420, 425, 430, 435, 440, 445, 610, and 810. In Figure 11 In example operation 1100, Figure 7 Resistors 745, 755 and Figure 7 Inductors 750, 760 and Figure 2 and 5 Resistors 280, 290 and Figure 2 and 5 The inductors 285 and 295 are interchangeable. Figure 11 In the examples, resistors 745 and 755 are related to Figure 7 and 9 The transmission lines 715 and 720 operate in blocks 410, 415, 425, and 430, and the inductors 750 and 760 operate in blocks 405, 415, 420, and 430 with respect to the transmission lines 715 and 720. Similarly, the transmission lines 715 and 720 operate in blocks 435 and 440, and Figure 7 and 9 Transistors 705 and 710 perform the operation of block 445. Furthermore, Figure 12 Resistors 1210, 1230 and capacitor 1220 perform the operation of block 610.

[0146] However, with Figure 2 and 5 Unlike VCOs 200 and 500, VCOs 700 and 900 are configured for short-circuit termination of transmission lines 715 and 720. In this short-circuit configuration, the length of the transmission line is approximately one-quarter of the wavelength of the desired resonant frequency. Advantageously, with... Figure 2 , 3 Compared to the longer transmission lines 215 and 220 of VCO 200 and 500, reducing the length of transmission lines 715 and 720 will reduce the on-chip system size of VCO 700 and 900. Control proceeds to return to box 405.

[0147] refer to Figure 13 The flowchart shown illustrates the example method. However, implementations may also be used in this specification. Figure 12Many other methods of operating the VCO 1200 are possible. For example, the order of execution of the blocks can be changed, or some of the described blocks can be changed, eliminated, or combined. Similarly, additional operations can be included in the process before, between, or after the blocks shown in the illustrated examples.

[0148] Figure 14 is Figure 1 , 2 , 5, 7, 9, and 12. In Figure 14 the plot 1400 includes an example undamped frequency response 1410 and an example damped frequency response 1420.

[0149] The undamped frequency response 1410 represents the output magnitude of the VCO 140, 200, 500, 700, 900, 1200 across the output frequency range without Figure 2 and 7 the resistors 280, 290, 745, 755 and with the inductors 285, 295, 750, 760. In example operations, the inductors 285, 295, 750, 760 resonate with the capacitive portions of the transmission lines 215, 220, 715, 720 (e.g., the capacitors 245, 270, 350, 360) to generate a first example resonance at an undesirable first frequency 1430 with a first example magnitude 1440. Figure 2 and 7 Figure 2 and 3

[0150] The damped frequency response 1420 represents the output magnitude of the VCO 140, 200, 500, 700, 900, 1200 across the output frequency range with the resistors 280, 290, 745, 755 and the inductors 285, 295, 750, 760. In example operations, the resistors 280, 290, 745, 755 create power loss, which reduces the ability of the inductors 285, 295, 750, 760 to resonate with the capacitive portions of the transmission lines 215, 220, 715, 720 (e.g., the capacitors 245, 270, 350, 360). The damped frequency response 1420 has a first example resonance at the undesirable first frequency 1430 with a second example magnitude 1450.

[0151] ​​At a second frequency 1460 representing a target resonant frequency of the VCO 140, 200, 500, 700, 900, 1200, the undamped frequency response 1410 has a third magnitude 1470 and the damped frequency response 1420 has a fourth magnitude 1480. In an example operation, the VCO corresponding to the undamped frequency response 1410 stabilizes at the first frequency 1430 in response to the magnitude 1440 being greater than the magnitude 1470. Advantageously, in an example operation of the VCO 140, 200, 500, 700, 900, 1200 corresponding to the damped frequency response 1420, the output frequency of the clock signal stabilizes at the second frequency 1460 in response to the magnitude 1450 being less than the magnitude 1480.

[0152] At a third frequency 1490 representing a frequency greater than the target frequency at the second frequency 1460, the undamped frequency response 1410 and the damped frequency response 1420 have magnitudes less than the magnitudes 1470, 1480. Further, at resonant frequencies greater than the third frequency 1490, the magnitudes of the undamped frequency response 1410 and the damped frequency response 1420 continue to decrease. Advantageously, the power consumption of the resistors 280, 290, 745, 755 is reduced at resonant frequencies less than the target resonant frequency.

[0153] Figure 15 is a schematic diagram of an example multi-frequency VCO 1500. In an example, the multi-frequency VCO 1500 includes a first transistor 1505, a second transistor 1510, a first transmission line 1515, a second transmission line 1520, a first bias network 1525, a third transistor 1530, a fourth transistor 1535, a third transmission line 1540, a fourth transmission line 1545, a second bias network 1550, a fifth transistor 1555, a sixth transistor 1560, a fifth transmission line 1565, a sixth transmission line 1570, and a third bias network 1575. Figure 15

[0154] The transistors 1505, 1510, the transmission lines 1515, 1520, and the bias network 1525 form a first VCO having a first output frequency (F OUT1 , F OUT1_180 ). The transistors 1530, 1535, the transmission lines 1540, 1545, and the bias network 1550 form a second VCO having a second output frequency (F OUT2 , F OUT2_180 ). The transistors 1555, 1560, the transmission lines 1565, 1570, and the bias network 1575 form a third VCO having a third output frequency (F OUTN , F OUTN_180 ​The third VCO of the multi-frequency VCO 1500 responds to different output frequencies for each set of transmission lines 1515, 1520, 1540, 1545, 1565, and 1570 with different lengths. In such instances, the different lengths of transmission lines 1515, 1520, 1540, 1545, 1565, and 1570 correspond to different wavelengths for different target frequencies. In some instances, the multi-frequency VCO 1500 further includes a multiplexer circuitry for selecting one or more output signals from one or more of transistors 1505, 1510, 1530, 1535, 1555, and 1560. Alternatively, the multi-frequency VCO 1500 can use a series of switches to implement transmission lines of different lengths 1515, 1520, 1540, 1545, 1565, 1570, said series of switches being configured to couple one or more portions of the transmission line to another portion (e.g., Figure 3 The equivalent circuit system 315). Advantageously, including multiple instances of the VCO described herein in a single package increases the efficiency of the circuit system. Figure 1 The number of possible output frequencies of the transmission line VCO 140.

[0155] exist Figure 15 In the examples, transistors 1505, 1510, 1530, 1535, 1555, and 1560 are NPN BJTs. Alternatively, transistors 1505, 1510, 1530, 1535, 1555, and 1560 can be n-channel FETs, n-channel IGBTs, n-channel JFETs, n-channel MOSFETs, or slightly modified p-type equivalents. Furthermore, transistors 1505, 1510, 1530, 1535, 1555, and 1560 can be implemented on / above a silicon substrate (Si), a silicon carbide substrate (SiC), a gallium nitride substrate (GaN), or a gallium arsenide substrate (GaAs).

[0156] "Including" and "comprises" (and all their forms and tenses) are used herein as open-ended terms. Therefore, whenever a technical solution uses any form of "including" or "comprises" (e.g., including, encompassing, including, having, etc.) as a preposition or in any kind of technical solution citation, additional elements, terms, etc., may exist without exceeding the scope of the corresponding technical solution or citation. As used herein, the phrase "at least" is open-ended when used as a transitional term in, for example, a technical solution preposition, in the same way as the terms "including" and "comprises". The term "and / or" when used, for example, in the form of, for example, A, B, and / or C, refers to any combination or subset of A, B, C, such as (1) only A, (2) only B, (3) only C, (4) A and B, (5) A and C, (6) B and C, or (7) A and B and C. As used herein in the context of describing structures, components, projects, objects, and things, the phrase “at least one of A and B” means an implementation that includes any of the following: (1) at least one A, (2) at least one B, or (3) at least one A and at least one B. Similarly, as used herein in the context of describing structures, components, projects, objects, and things, the phrase “at least one of A or B” means an implementation that includes any of the following: (1) at least one A, (2) at least one B, or (3) at least one A and at least one B. As used herein in the context of describing the execution or implementation of processes, instructions, actions, activities, etc., the phrase “at least one of A or B” means an implementation that includes any of the following: (1) at least one A, (2) at least one B, or (3) at least one A and at least one B. Similarly, as used herein in the context of describing the execution or implementation of processes, instructions, actions, activities, etc., the phrase “at least one of A or B” means an implementation scheme that includes any of the following: (1) at least one A, (2) at least one B, or (3) at least one A and at least one B.

[0157] As used herein, singular references (e.g., “a(a)”, “an”, “first”, “second”, etc.) do not exclude plurals. As used herein, the term “a(a)” or “an” refers to one or more of the objects mentioned. The terms “a(a)” (or “an”), “one or more”, and “at least one” are used interchangeably herein. Furthermore, although listed separately, multiple components, elements, or actions may be implemented by, for example, the same entity or object. Moreover, while individual features may be contained in different instances or technical solutions, these features may be combined, and their inclusion in different instances or technical solutions does not imply that the combination of features is infeasible and / or disadvantageous.

[0158] As used herein, unless otherwise stated, the term“over” describes a relative position of one portion with respect to another portion, with both portions being positioned above ground. If a second portion has at least one portion between ground and a first portion, the first portion is over the second portion. Likewise, as used herein, when a first portion is closer to ground than a second portion, the first portion is“under” the second portion. As noted above, a first portion can be over or under a second portion with one or more of the following: having other portions therebetween, having no other portions therebetween, the first and second portions touching, or the first and second portions not directly contacting each other.

[0159] As used in this patent, stating that any portion (e.g., layer, film, region, zone, or plate) is on (e.g., positioned on, located on, disposed on, or formed on, etc.) another portion in any manner indicates that the referenced portion is in contact with the other portion, or that the referenced portion is over the other portion with one or more intervening portions positioned therebetween.

[0160] As used herein, unless otherwise indicated, a connection reference (e.g., attached, coupled, connected, and joined) can include intervening members between the elements referenced by the connection reference or relative movement therebetween. As such, a connection reference does not necessarily infer that two elements are directly connected or in fixed relation to one another. As used herein, stating that any portion is“in contact” with another portion is defined to mean that there are no intervening portions between the two portions.

[0161] Unless specifically stated otherwise, as used herein, descriptive terms such as“first,”“second,”“third,” etc., are used as a label to identify whether an element has been discussed previously but does not necessarily indicate a priority or order of importance, a physical order, a meaning of a sequence, or a ranking in any way, nor does it necessarily indicate a sequence in any way, but are merely used as a label to more readily identify the element in the discussion. In some examples, a descriptive term“first” can be used to refer to an element in a particular implementation, while the same element can be referred to using a different descriptive term such as“second” or“third” in a claim. In such cases, such descriptive terms are used only to clearly identify those elements within the context of the discussion, e.g., within a technical solution, in which the elements can otherwise share the same name.

[0162] As used herein,“approximately” and“about” modify the meaning of concomitant / values to recognize the potential existence of variations that occur in real-world applications. For example,“approximately” and“about” can modify a dimension that can not be exact due to at least one of manufacturing tolerances or other real-world imperfections. For example, unless otherwise specified herein,“approximately” and“about” can indicate that such dimensions can be within a + / - 10% tolerance range.

[0163] As used herein, the phrase “communication,” including variations thereof, encompasses one or a combination of direct communication or indirect communication through one or more intermediary components, and does not require direct physical (e.g., wired) communication or constant communication, but also includes selective communication at least one of periodic intervals, predetermined intervals, aperiodic intervals, or one-time events.

[0164] As used herein, “programmable circuitry” is defined to include at least one of (i) one or more special-purpose circuits (e.g., application-specific circuits (ASICs)) structured to perform particular operations and including one or more semiconductor-based logic devices (e.g., electrical hardware implemented by one or more transistors), or (ii) one or more general-purpose semiconductor-based circuits that are programmable with instructions to perform one or more particular functions or operations and including one or more semiconductor-based logic devices (e.g., electrical hardware implemented by one or more transistors). Examples of programmable circuitry include programmable microprocessors, such as: central processing unit (CPU) that can execute first instructions to perform one or more operations or functions; field programmable gate array (FPGA) that can be programmed with second instructions to at least one of configure or structure the FPGA to instantiate one or more operations or functions corresponding to the first instructions; graphics processing unit (GPU) that can execute first instructions to perform one or more operations or functions; digital signal processor (DSP) that can execute first instructions to perform one or more operations or functions; XPU; network processing unit (NPU); one or more microcontrollers that can execute first instructions to perform one or more operations or functions; or integrated circuit, such as an application-specific integrated circuit (ASIC). For example, an XPU can be implemented by a heterogeneous computing system that includes multiple types of programmable circuitry (e.g., one or more FPGAs, one or more CPUs, one or more GPUs, one or more NPUs, one or more DSPs, etc., and any combination thereof) and orchestration technology (e.g., application programming interface (API)) that can allocate computing tasks to any one or more of the multiple types of programmable circuitry that are suitable and available to perform the computing tasks.

[0165] As used herein, integrated circuit / circuitry is defined to be one or more semiconductor packages containing one or more circuit elements, such as transistors, capacitors, inductors, resistors, current paths, diodes, etc. For example, an integrated circuit can be implemented as one or more of an ASIC, an FPGA, a chip, a microchip, programmable circuitry, a semiconductor substrate coupling multiple circuit elements, a system on a chip (SoC), etc.

[0166] In this specification, the term "coupled" can encompass a connection, communication, or signal path that enables a functional relationship consistent with this specification. For example, if device A generates a signal to control device B to perform some action, then: (a) in a first instance, device A is coupled to device B by a direct connection; or (b) in a second instance, device A is coupled to device B through intermediate component C, provided that intermediate component C does not alter the functional relationship between device A and device B such that device B is controlled by device A via the control signal generated by device A.

[0167] A device "configured to" perform a task or function can be configured (e.g., programmed or hardwired), at a manufacturing or assembly facility, to perform at least one of: perform the function, or can be configured (or reconfigured) by a user after manufacturing to perform the function and / or other additional or alternative functions. The configuration can be performed by at least one of firmware or software programming of the device, by at least one of construction or layout of hardware components and interconnects of the device, or by a combination thereof.

[0168] As used herein, the terms "terminal," "node," "interconnect," "pin," and "lead" can be used interchangeably. Unless specifically stated to the contrary, these terms generally refer to an interconnection or end of a device element, circuit element, integrated circuit, device, or other electronic device or semiconductor component.

[0169] In this specification and in the claims, "circuitry" described as comprising certain components can alternatively be adapted to couple to those components to form the described circuitry or device. For example, structures described as comprising one or more semiconductor elements (such as transistors), one or more passive elements (such as one or a combination of resistors, capacitors, or inductors), or one or more sources (such as voltage and / or current sources) can alternatively comprise only the semiconductor elements within a single physical device (such as at least one of a semiconductor die or an integrated circuit (IC) package), and can be adapted to be coupled to at least some of the passive elements or sources, either at manufacturing or after manufacturing, such as by at least one of an end user or a third party, to form the described structure.

[0170] The circuits described herein can be reconfigurable to include replaced components, providing functionality at least partially similar to that available prior to component replacement. Unless otherwise stated, components shown as resistors generally represent any one or more elements coupled in at least one of series or parallel to provide an amount of impedance represented by the shown resistor. For example, a resistor or capacitor shown and described herein as a single component can alternatively be multiple resistors or capacitors respectively coupled in parallel between the same nodes. For example, a resistor or capacitor shown and described herein as a single component can alternatively be multiple resistors or capacitors respectively coupled in series between the same two nodes as the single resistor or capacitor. While certain elements of the described examples are included in an integrated circuit and others are external to the integrated circuit, in other example embodiments additional or fewer features can be incorporated into the integrated circuit. In addition, some or all features shown as external to the integrated circuit can be included in the integrated circuit, and some features shown as internal to the integrated circuit can be incorporated external to the integrated circuit. As used herein, the term "integrated circuit" means one or more circuits that are at least one of: (i) incorporated in / onto a semiconductor substrate; (ii) incorporated in a single semiconductor package; (iii) incorporated into a same module; or (iv) incorporated in / on a same printed circuit board.

[0171] Use of the phrase "ground" in the foregoing description includes at least one of a chassis ground, an earth ground, a floating ground, a virtual ground, a digital ground, a common ground, or any other form of ground connection applicable to or suitable for the teachings of the present specification. Unless otherwise stated, "about," "approximately," or "substantially" preceding a value indicates + / - 10% of the value, or a reasonable range of values around zero if the value is zero.

[0172] Modifications are possible in the described embodiments, and other embodiments are possible within the scope of the claims.

Claims

1. An apparatus comprising: a power supply terminal; a first inductor having a first terminal and a second terminal; a second inductor having a first terminal and a second terminal, the first terminal of the second inductor coupled to the power supply terminal; a first resistor having a first terminal and a second terminal, the first terminal of the first resistor coupled to the second terminal of the first inductor; a second resistor having a first terminal and a second terminal, the first terminal of the second resistor coupled to the second terminal of the second inductor; a first transmission line having a first terminal and a second terminal, the first terminal of the first transmission line coupled to the second terminal of the first resistor; a second transmission line having a first terminal and a second terminal, the first terminal of the second transmission line coupled to the second terminal of the second resistor; a first transistor having a first terminal and a control terminal; and a second transistor having a first terminal and a control terminal, the first terminal of the second transistor coupled to the second terminal of the second transmission line and the control terminal of the first transistor, the control terminal of the second transistor coupled to the second terminal of the first transmission line and the first terminal of the first transistor.

2. The apparatus of claim 1, wherein the first transistor further has a second terminal, the second transistor further has a second terminal, and the apparatus further comprises: a capacitor having a first terminal and a second terminal; a third resistor having a terminal coupled to the second terminal of the first transistor and the first terminal of the capacitor; and a fourth resistor having a terminal coupled to the second terminal of the second transistor and the second terminal of the capacitor.

3. The apparatus of claim 1, further comprising a capacitor having a first terminal and a second terminal, the first terminal of the capacitor coupled to the second terminal of the first resistor and the first terminal of the first transmission line, the second terminal of the capacitor coupled to the second terminal of the second resistor and the first terminal of the second transmission line.

4. The apparatus of claim 3, wherein the capacitor further has a third terminal, and the apparatus further comprises: first peak detector circuitry having a first terminal and a second terminal, the first terminal of the first peak detector circuitry coupled to the second terminal of the first resistor, the first terminal of the first transmission line, and the first terminal of the capacitor; second peak detector circuitry having a first terminal and a second terminal, the first terminal of the second peak detector circuitry coupled to the second terminal of the second resistor, the first terminal of the second transmission line, and the second terminal of the capacitor; and a third peak detector circuitry having a first terminal and a second terminal, the first terminal of the third peak detector circuitry coupled to the third terminal of the capacitor, the second terminal of the first peak detector circuitry, and the second terminal of the second peak detector circuitry. correction circuitry having a first terminal, a second terminal, and a third terminal, the first terminal of the correction circuitry coupled to the second terminal of the first peak detector circuitry, the second terminal of the correction circuitry coupled to the second terminal of the second peak detector circuitry, the third terminal of the correction circuitry coupled to the third terminal of the capacitor.

5. The apparatus of claim 1, wherein the first transmission line includes: a third inductor having a first terminal and a second terminal; a capacitor having a terminal coupled to the second terminal of the first resistor and the first terminal of the third inductor; and a third resistor having a first terminal and a second terminal, the first terminal of the third resistor coupled to the second terminal of the third inductor, the second terminal of the third resistor coupled to the first terminal of the first transistor and the control terminal of the second transistor.

6. The apparatus of claim 1, wherein lengths of the first transmission line and the second transmission line equal one quarter of a wavelength of a frequency of an output signal.

7. The apparatus of claim 1, wherein the first transmission line further has a third terminal, the second transmission line further has a third terminal, and the apparatus further comprises: phase frequency detector circuitry having an input and an output; charge pump circuitry having an input and an output, the input of the charge pump circuitry coupled to the output of the phase frequency detector circuitry; filter circuitry having an input and an output, the input of the filter circuitry coupled to the output of the charge pump circuitry, the output of the filter circuitry coupled to the third terminal of the first transmission line and the third terminal of the second transmission line; and divider circuitry having an input and an output, the input of the divider circuitry coupled to the second terminal of the first transmission line, the first terminal of the first transistor, and the control terminal of the second transistor, the output of the divider circuitry coupled to the input of the phase frequency detector circuitry.

8. An apparatus comprising: a power supply terminal; bias network circuitry having a first terminal, a second terminal, and a third terminal, the first terminal of the bias network circuitry coupled to the power supply terminal; a first transmission line having a first terminal and a second terminal; a second transmission line having a first terminal and a second terminal; a capacitor having a first terminal and a second terminal, the first terminal of the capacitor coupled to the second terminal of the bias network circuitry and the first terminal of the first transmission line, the second terminal of the capacitor coupled to the third terminal of the bias network circuitry and the first terminal of the second transmission line; a first transistor having a first terminal and a control terminal; and a second transistor having a first terminal and a control terminal, the first terminal of the second transistor coupled to the second terminal of the first transmission line and the first terminal of the first transistor, the control terminal of the second transistor coupled to the second terminal of the first transmission line and the control terminal of the first transistor. a second transistor having a first terminal and a control terminal, the first terminal of the second transistor coupled to the second terminal of the second transmission line and the control terminal of the first transistor, the control terminal of the second transistor coupled to the second terminal of the first transmission line and the first terminal of the first transistor.

9. The apparatus of claim 8, wherein the bias circuitry includes: a first inductor having a first terminal and a second terminal; a second inductor having a first terminal and a second terminal, the first terminal of the second inductor coupled to the power supply terminal and the first terminal of the first inductor; a first resistor having a first terminal and a second terminal, the first terminal of the first resistor coupled to the second terminal of the first inductor, the second terminal of the first resistor coupled to the first terminal of the first transmission line and the first terminal of the capacitor; and a second resistor having a first terminal and a second terminal, the first terminal of the second resistor coupled to the second terminal of the second inductor, the second terminal of the second resistor coupled to the first terminal of the second transmission line and the second terminal of the capacitor.

10. The apparatus of claim 8, wherein the capacitor is a first capacitor, the first transistor further has a second terminal, the second transistor further has a second terminal, and the apparatus further comprises: a second capacitor having a first terminal and a second terminal; a first resistor having a terminal coupled to the second terminal of the first transistor and the first terminal of the second capacitor; and a second resistor having a terminal coupled to the second terminal of the second transistor and the second terminal of the second capacitor.

11. The apparatus of claim 8, wherein the capacitor further has a third terminal, and the apparatus further comprises: first peak detector circuitry having a first terminal and a second terminal, the first terminal of the first peak detector circuitry coupled to the second terminal of the bias network circuitry, the first terminal of the first transmission line, and the first terminal of the capacitor; second peak detector circuitry having a first terminal and a second terminal, the first terminal of the second peak detector circuitry coupled to the third terminal of the bias network circuitry, the first terminal of the second transmission line, and the second terminal of the capacitor; and correction circuitry having a first terminal, a second terminal, and a third terminal, the first terminal of the correction circuitry coupled to the second terminal of the first peak detector circuitry, the second terminal of the correction circuitry coupled to the second terminal of the second peak detector circuitry, the third terminal of the correction circuitry coupled to the third terminal of the capacitor.

12. The apparatus of claim 8, wherein the capacitor is a first capacitor, and the first transmission line includes: an inductor having a first terminal and a second terminal; a second capacitor having a terminal coupled to the second terminal of the bias network circuitry and the first terminal of the inductor; and a resistor having a first terminal and a second terminal, the first terminal of the resistor coupled to the second terminal of the inductor, the second terminal of the resistor coupled to the first terminal of the first transistor and the control terminal of the second transistor.

13. The apparatus of claim 8, wherein lengths of the first transmission line and the second transmission line are one quarter of a wavelength of a frequency.

14. The apparatus of claim 8, wherein the first transmission line further has a third terminal, the second transmission line further has a third terminal, and the apparatus further comprises: phase frequency detector circuitry having an input and an output; charge pump circuitry having an input and an output, the input of the charge pump circuitry coupled to the output of the phase frequency detector circuitry; filter circuitry having an input and an output, the input of the filter circuitry coupled to the output of the charge pump circuitry, the output of the filter circuitry coupled to the third terminal of the first transmission line and the third terminal of the second transmission line; and divider circuitry having an input and an output, the input of the divider circuitry coupled to the second terminal of the first transmission line, the first terminal of the first transistor, and the control terminal of the second transistor, the output of the divider circuitry coupled to the input of the phase frequency detector circuitry.

15. An apparatus comprising: a power supply terminal; a first inductor coupled to the power supply terminal; a second inductor coupled to the power supply terminal; a first transmission line coupled to the first inductor, the first transmission line having a first resonant frequency, the first transmission line configured to generate an output signal having a frequency based on the first resonant frequency; a second transmission line coupled to the second inductor, the second transmission line having a second resonant frequency; a first transistor coupled to the first transmission line and the second transmission line; a second transistor coupled to the first transmission line and the second transmission line, the second transistor configured to control the first transistor based on the second resonant frequency of the second transmission line; and the first transistor configured to control the second transistor based on the first resonant frequency of the second transmission line.

16. The apparatus of claim 15, further comprising a resistor coupled to the first inductor and the first transmission line, the resistor configured to reduce a magnitude of the first resonant frequency of the first transmission line.

17. The apparatus of claim 16, wherein the resistor is a first resistor, the apparatus further comprising: ​ a second resistor coupled to the first transistor; and a capacitor coupled to the first transistor, the second transistor, and the second resistor, the capacitor configured to reduce a resistance of the first resistor.

18. The apparatus of claim 15, further comprising a capacitor coupled to the first inductor, the second inductor, the first transmission line, and the second transmission line, the capacitor configured to terminate a series resonance of the first transmission line and the second transmission line.

19. The apparatus of claim 18, further comprising voltage sensing circuitry coupled to the first inductor, the second inductor, the first transmission line, the second transmission line, and the capacitor, the voltage sensing circuitry configured to adjust a capacitance of the capacitor in response to detecting a voltage peak from one of the first transmission line or the second transmission line.

20. The apparatus of claim 15, wherein the first transmission line and the second transmission line have one of a first length or a second length, the first length being one quarter of a first wavelength of a first frequency, the second length being one half of a second wavelength of a second frequency.

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