A bulk acoustic resonator with a double-layer piezoelectric film and its fabrication method

Abstract

This invention relates to the field of microelectronics and MEMS manufacturing technology, and in particular to a bulk acoustic wave resonator with a double-layer piezoelectric film and its fabrication method. This method utilizes a first and a second piezoelectric layer deposited on either side of a central electrode layer to form a heterogeneous integrated key structure, overcoming the physical and technological limitations of single-layer piezoelectric thin film FBARs. This results in improved bandwidth at higher frequencies. The tuning of the central electrode layer, combined with back-side through-silicon vias, eliminates wire bonding inductance on the front side, ensuring low-loss characteristics of the filter at high frequencies. Integrated heat dissipation packaging effectively suppresses self-heating issues under high bandwidth and high power, improving power handling capability. This method is compatible with CMOS processes and can be directly embedded into existing production lines. This allows the double-layer piezoelectric film bulk acoustic wave resonator to effectively cover frequencies above 3GHz while further reducing its size, solving the problem that single-layer piezoelectric films and their supporting processes cannot meet the requirements of next-generation RF front-ends for high frequency, high bandwidth, high power, and wafer-level packaging.

Description

Technical Field

[0001] This invention relates to the field of micro-electro-mechanical systems (MEMS) manufacturing technology, specifically to a bulk acoustic resonator with a double-layer piezoelectric film and its fabrication method. Background Technology

[0002] With the continuous iteration of global communication technologies, mobile communication systems are rapidly evolving from 5G to 6G, a process characterized by the deep development of spectrum resources and the utilization of high-frequency bands. Currently, mainstream frequency bands are gradually expanding to above 7GHz, with instantaneous bandwidth of ≥1GHz and higher transmit power, aiming to achieve ultra-high speeds, ultra-low latency, and ultra-large-scale connections. This trend places higher demands on the performance of radio frequency front-end devices.

[0003] As a core component of the RF front-end, the radio frequency (RF) filter's role is to accurately filter signals in the target frequency band and suppress interference. Its performance directly determines the channel capacity, anti-interference capability, and energy efficiency of the communication system. In traditional communication frequency bands, surface acoustic wave (SAW) filters and bulk acoustic wave (BAW) filters dominate due to their mature technology and cost advantages. However, as frequency bands evolve towards higher frequencies (>7GHz) and larger bandwidths (≥1GHz), SAW filters, limited by acoustic wave propagation modes, struggle to meet the demands in terms of high-frequency loss and power capacity. BAW filters, with their superior high-frequency performance, strong temperature stability, compact structure, and support for high power capacity, are expected to replace SAW filters in high-frequency (>7GHz) and large-bandwidth (≥1GHz) communication scenarios.

[0004] However, as 5G / 6G mobile communication evolves towards frequencies above 7GHz, larger bandwidths, and higher transmit power, bulk acoustic wave filters are required to simultaneously possess a high effective electromechanical coupling coefficient. ), high quality factor ( Q High power tolerance is a key feature. While existing single-layer piezoelectric bulk acoustic resonators (FBARs) perform excellently at high frequencies, their structure is approaching physical limits, constrained by the piezoelectric constant of c-axis oriented AlN. d 33With dielectric constant ε , With only about 6.5% bandwidth, it cannot cover the continuous 160MHz+ channels required for n79, n104, Wi-Fi 7, and Ku and K bands. To compensate for insufficient bandwidth, existing technologies typically employ solutions such as series inductors, parallel capacitors, or stacked filter units. However, these solutions significantly increase insertion loss, area, and process layers, and introduce additional parasitics at high frequencies, leading to slower roll-off and worsened out-of-band rejection. Simultaneously, increased power density under high bandwidth operation makes devices prone to self-heating and temperature rise, easily inducing stress voids at the metal-piezoelectric interface, limiting filter reliability and power capacity. Furthermore, the 0.5-1nH bonding wire inductance introduced by traditional front-side wire bonding can generate several ohms of equivalent impedance above 7GHz, further deteriorating the filter's passband insertion loss. Therefore, relying solely on a single piezoelectric thin film and its associated processes is insufficient to meet the demands of next-generation RF front-ends for high frequency, high bandwidth, high power, and wafer-level packaging. Summary of the Invention

[0005] To address the problem that existing technologies relying on a single piezoelectric thin film layer and its associated processes can no longer meet the demands of next-generation RF front-ends for high frequency, large bandwidth, high power, and wafer-level packaging, this invention provides a bulk acoustic resonator with a double-layer piezoelectric film and its fabrication method.

[0006] To achieve the above objectives, the present invention employs the following technical solution:

[0007] This invention provides a method for fabricating a bulk acoustic resonator with a double-layer piezoelectric film, comprising:

[0008] SiO2 buffer layers are thermally oxidized to grow on both sides of the low-resistivity silicon, and an AlN seed layer, an intermediate electrode layer, a first piezoelectric layer and a bottom electrode layer are sequentially grown on the SiO2 buffer layer on one side to obtain the first assembly.

[0009] The bottom electrode layer of the first assembly is patterned to form the required electrode frame structure, and a silicon dioxide layer is deposited on the surface of the bottom electrode layer. The silicon dioxide layer is then etched to form a working cavity, resulting in the second assembly. The patterned bottom electrode layer is partially exposed in the working cavity.

[0010] The etched silicon dioxide layer of the second assembly is bonded to a high-resistivity silicon wafer, and the low-resistivity silicon, SiO2 buffer layer and AlN seed layer are removed to expose the intermediate electrode layer. The intermediate electrode layer is then patterned to obtain the third assembly.

[0011] A second piezoelectric layer and a top electrode layer are deposited on the intermediate electrode layer after the patterning of the third assembly, and the top electrode layer is patterned to obtain the fourth assembly.

[0012] Two vias are etched on the fourth assembly, and RDL metal is deposited in the vias to form solderable pads, connecting the bottom electrode layer and the top electrode layer to obtain the fifth assembly; wherein the vias extend from the top electrode layer to the bottom electrode layer.

[0013] A passivation layer is deposited on the top electrode layer of the fifth assembly and bonded to a capped wafer covered with a dry film to obtain a sixth assembly; wherein, a dry film cavity is etched on the dry film; the multilayer piezoelectric / electrode structure in the fifth assembly is placed in the dry film cavity, and the multilayer piezoelectric / electrode structure in the fifth assembly includes a first piezoelectric layer, a second piezoelectric layer, a top electrode layer, an intermediate electrode layer and a bottom electrode layer;

[0014] The high-resistivity silicon wafer of the sixth assembly is thinned and TSV holes are etched to expose the bottom electrode layer. Electrode leads are then electroplated on the bottom electrode layer through the TSV holes to obtain the seventh assembly.

[0015] Metal balls are attached to the pins of the bottom electrode layer of the seventh assembly to obtain the two end electrodes of the resonator, thus obtaining a bulk acoustic resonator with a double-layer piezoelectric film.

[0016] Optionally, the thickness of the low-resistivity silicon is 700-750 μm; the thickness of the SiO2 buffer layer is 500-700 nm; and the thickness of the AlN seed layer is 25-40 nm.

[0017] Optionally, the intermediate electrode layer is made of Mo, Al, Pt, W or Au; the first piezoelectric layer and the second piezoelectric layer are both AlN piezoelectric layers or both AlScN piezoelectric layers, with a thickness of 0.3-2 μm; the bottom electrode layer and the top electrode layer are made of Mo, Al, Pt, W or Au.

[0018] Optionally, the thickness of the silicon dioxide layer is 2-4 μm.

[0019] Optionally, the method for bonding the etched silicon dioxide layer of the second assembly to the high-resistivity silicon wafer is as follows: first, the etched silicon dioxide layer of the second assembly and the high-resistivity silicon wafer are pre-bonded at 140-160℃, and then annealed at 280-320℃ to achieve bonding between the etched silicon dioxide layer of the second assembly and the high-resistivity silicon wafer.

[0020] Optionally, the second piezoelectric layer is deposited on the side of the intermediate electrode layer opposite to the first piezoelectric layer.

[0021] Optionally, the solderable pad is made of an Al / Cu alloy.

[0022] Optionally, the passivation layer is a Si3N4 passivation layer with a thickness of 200-400 nm.

[0023] A bulk acoustic wave resonator with a double piezoelectric film, prepared by the above-mentioned method for preparing a bulk acoustic wave resonator with a double piezoelectric film, includes a capped wafer, on which a dry film, a passivation layer, a silicon dioxide layer and a high-resistivity silicon wafer are sequentially disposed.

[0024] A dry film cavity is etched on the dry film. A passivation layer located above the dry film cavity extends into the dry film cavity. A top electrode layer, a second piezoelectric layer, an intermediate electrode layer, a first piezoelectric layer, and a bottom electrode layer are sequentially disposed on the passivation layer extending into the dry film cavity. The bottom electrode layer and the top electrode layer are connected by solderable pads. The pins of the bottom electrode layer are led out through TSV holes and connected to metal ball bearings, which respectively constitute the two end electrodes of the resonator.

[0025] Optionally, the pins of the bottom electrode layer are connected to metal balls via a redistribution layer.

[0026] Compared with the prior art, the present invention has the following beneficial effects:

[0027] This invention provides a method for fabricating a bulk acoustic wave resonator with a double-layer piezoelectric film. The method involves thermally oxidizing and growing SiO2 buffer layers on both sides of a low-resistivity silicon substrate. A seed layer and an intermediate electrode layer are disposed on one side of the SiO2 buffer layer as electrode layers to guide the directional growth of a first and second piezoelectric layer. An AlN seed layer is grown on the SiO2 buffer layer, and an intermediate electrode layer is grown on the AlN seed layer. The directional growth of the first piezoelectric layer and the growth of the bottom electrode layer are achieved on the intermediate electrode layer, resulting in a first assembly. The bottom electrode layer of the first assembly is then patterned and framed. After treatment, a silicon dioxide layer is deposited and etched to form a working cavity, resulting in a second assembly. The etched silicon dioxide layer of the second assembly is bonded to a high-resistivity silicon wafer, and the low-resistivity silicon, SiO2 buffer layer, and AlN seed layer are removed to expose the intermediate electrode layer. The intermediate electrode layer is then patterned, and a second piezoelectric layer and a top electrode layer are grown on the intermediate electrode layer. This results in a heterogeneous integrated key structure consisting of a second piezoelectric layer, a first piezoelectric layer, and multiple electrodes grown on both sides of the intermediate electrode layer. Based on this structure, a second-order mode of anti-phase vibration excitation driven by the upper and lower electrodes is achieved, obtaining a structure comparable to a single-layer structure. This method enables a wider bandwidth coverage for a single stage of the resonator unit. Combined with the intermediate electrode layer, which also functions as a frequency tuning layer, clutter suppression is achieved only at the bottom electrode level through frame structure adjustments. This avoids the series resistance introduced by the patterning of the top electrode layer, ensuring a high Q value for the filter unit at high frequencies. Finally, the bulk acoustic wave resonator with a double-layer piezoelectric film is fabricated using standard wafer packaging and RDL electrode lead-out processes. This method utilizes a heterogeneous integrated key structure formed by the directional growth of a first piezoelectric layer, a second piezoelectric layer, and multiple electrodes on both sides of the intermediate electrode layer, overcoming the physical and technological limitations of single-layer piezoelectric FBAR and improving performance at high frequencies. A single resonator unit can achieve a wider bandwidth; the tuning of the middle electrode layer combined with the TSV hole on the back eliminates the wire bonding inductance on the front, ensuring the low-loss characteristics of the filter at high frequencies; the integrated heat dissipation package effectively suppresses the self-heating problem under high bandwidth and high power; the entire fabrication process is compatible with complementary metal-oxide-semiconductor (CMOS) technology, requiring no high temperature or precious metals, and can be directly embedded into existing production lines, significantly reducing process complexity and cost. This method is simple, and the fabricated double-layer piezoelectric film bulk acoustic wave resonator breaks through the physical limits of the traditional FBAR structure. It can effectively cover the continuous channels above 160MHz required by n79, n104, Wi-Fi7, and Ku and K bands, while overcoming the limitations of traditional processes that increase insertion loss, area, and process levels. It ensures the high quality factor and lifespan of the fabricated double-layer piezoelectric film bulk acoustic wave resonator, while further reducing size and cost, thus improving market competitiveness.

[0028] This invention also provides a bulk acoustic wave resonator with a double piezoelectric film fabricated using the above-described method for fabricating a bulk acoustic wave resonator with a double piezoelectric film. The resonator includes a capped wafer on which a dry film, a passivation layer, a silicon dioxide layer, and a high-resistivity silicon wafer are sequentially disposed. A dry film cavity is etched on the dry film. A passivation layer located above the dry film cavity extends into the dry film cavity, and a top electrode layer, a second piezoelectric layer, an intermediate electrode layer, a first piezoelectric layer, and a bottom electrode layer are sequentially disposed on the passivation layer extending into the dry film cavity. The bottom electrode layer and the top electrode layer are connected by solderable pads, and the pins of the bottom electrode layer are connected to metal balls, serving as the signal output terminal of the resonator. This bulk acoustic wave resonator with a double piezoelectric film adopts a stacked structure of "top electrode layer - first piezoelectric layer - intermediate electrode layer - second piezoelectric layer - bottom electrode layer". The two piezoelectric films vibrate in opposite phase under electrode drive, exciting a second-order mode, achieving a second-order mode frequency comparable to a single-layer structure. This design enables the resonator unit to cover a wider bandwidth per stage. The middle electrode layer also serves as the frequency tuning layer. Clutter suppression is achieved only at the bottom electrode level through frame structure adjustment, avoiding the series resistance introduced by the top electrode layer patterning. This ensures the high Q value of the filter unit at high frequencies. The structure is simple and breaks through the limitations of traditional processes, such as increased insertion loss, area, and process levels. It provides strong support for the miniaturization and high performance of high-frequency communication equipment. Attached Figure Description

[0029] Figure 1 This is a schematic diagram of the fabrication process of a bulk acoustic resonator with a double-layer piezoelectric film according to the present invention.

[0030] Figure 2 This is a process state structure diagram of a method for fabricating a bulk acoustic resonator with a double-layer piezoelectric film according to the present invention.

[0031] Figure 3 This is a structural diagram of a bulk acoustic resonator with a double-layer piezoelectric film according to the present invention.

[0032] Among them, 1-low resistivity silicon, 2-SiO2 buffer layer, 3-AlN seed layer, 4-intermediate electrode layer, 5-first piezoelectric layer, 6-bottom electrode layer, 7-silicon dioxide layer, 8-high resistivity silicon wafer, 9-second piezoelectric layer, 10-top electrode layer, 11-solderable pad, 12-passivation layer, 13-dry film, 14-capping wafer, 15-redistribution layer, 16-metal ball, 17-dry film cavity, 18-working cavity. Detailed Implementation

[0033] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.

[0034] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0035] The present invention will be further described in detail below with reference to specific embodiments. These descriptions are for explanation purposes only and are not intended to limit the scope of the invention.

[0036] See Figure 1 This invention discloses a method for fabricating a bulk acoustic resonator with a double-layer piezoelectric film, comprising:

[0037] S1: A SiO2 buffer layer 2 is thermally oxidized and grown on both sides of the low-resistivity silicon 1. An AlN seed layer 3, an intermediate electrode layer 4, a first piezoelectric layer 5, and a bottom electrode layer 6 are sequentially grown on one side of the SiO2 buffer layer 2 to obtain a first assembly. Preferably, the thickness of the low-resistivity silicon 1 is 700-750 μm; the thickness of the SiO2 buffer layer 2 is 500-700 nm; the thickness of the AlN seed layer 3 is 25-40 nm; and the material of the intermediate electrode layer 4 is Mo, Al, Pt, W, or Al. u, more preferably Mo; the first piezoelectric layer 5 is an AlN piezoelectric layer with a thickness of 0.3-2μm; the bottom electrode layer 6 is made of Mo, Al, Pt, W or Au, more preferably Mo; further preferably, the AlN seed layer 3 is grown on the SiO2 buffer layer 2 by physical vapor deposition sputtering; the intermediate electrode layer 4 and the bottom electrode layer 6 are both grown by physical vapor deposition, and the patterning is done by photolithography; the first piezoelectric layer 5 is grown on the intermediate electrode layer 4 by reactive sputtering.

[0038] S2: The bottom electrode layer 6 of the first assembly is patterned to form the required electrode frame structure, and a silicon dioxide layer 7 is deposited on the surface of the bottom electrode layer 6. The silicon dioxide layer 7 is etched to form a working cavity 18, thus obtaining the second assembly; wherein, the patterned bottom electrode layer 6 is partially exposed in the working cavity 18; preferably, the thickness of the silicon dioxide layer 7 is 2-4 μm, and the silicon dioxide layer 7 is deposited by plasma-enhanced chemical vapor deposition multiple deposition plus chemical mechanical polishing technology, and the silicon dioxide layer 7 is etched to form the working cavity 18;

[0039] S3: The etched silicon dioxide layer 7 of the second assembly is bonded to the high-resistivity silicon wafer 8, and the low-resistivity silicon 1, SiO2 buffer layer 2 and AlN seed layer 3 are removed to expose the intermediate electrode layer 4 and pattern the intermediate electrode layer 4 to obtain the third assembly; wherein, the method of bonding the etched silicon dioxide layer 7 of the second assembly to the high-resistivity silicon wafer 8 is as follows: the etched silicon dioxide layer 7 of the second assembly and the high-resistivity silicon wafer 8 are pre-bonded at 140-160℃, and then annealed at 280-320℃ to achieve the bonding of the etched silicon dioxide layer 7 of the second assembly to the high-resistivity silicon wafer 8;

[0040] S4: Deposit a second piezoelectric layer 9 and a top electrode layer 10 on the intermediate electrode layer 4 after patterning the third assembly, and pattern the top electrode layer 10 to obtain a fourth assembly; wherein, the second piezoelectric layer 9 is an AlN piezoelectric layer with a thickness of 0.3-2μm; the material of the top electrode layer 10 is Mo, Al, Pt, W or Au, preferably Mo;

[0041] S5: Two through holes are etched on the fourth assembly, and RDL metal is deposited in the through holes to form solderable pads 11, so that the bottom electrode layer 6 and the top electrode layer 10 are connected to obtain the fifth assembly; wherein, the through holes extend from the top electrode layer 10 to the bottom electrode layer 6; wherein, the solderable pads 11 are made of Al / Cu alloy, and two through holes are etched on the fourth assembly using photolithography, and RDL metal is deposited in the through holes;

[0042] S6: A passivation layer 12 is deposited on the top electrode layer 10 of the fifth assembly and bonded to a capping wafer 14 covered with a dry film 13 to obtain a sixth assembly; wherein, a dry film cavity 17 is etched on the dry film 13; the passivation layer 12 is a Si3N4 passivation layer with a thickness of 200-400nm, and the passivation layer 12 is deposited on the top electrode layer 10 of the fifth assembly using a PECVD process.

[0043] S7: Thin the high-resistivity silicon wafer 8 of the sixth assembly and etch TSV vias to expose the bottom electrode layer 6. Electroplat the redistribution pins to obtain the seventh assembly. The RDL layer 15, which is led out by the TSV via electroplating, extends through the bottom electrode layer to the pad 11 and forms a standardized packaging interface.

[0044] S8: Connect metal ball 16 to the pin of the bottom electrode layer 6 of the seventh assembly to obtain a bulk acoustic resonator with a double piezoelectric film.

[0045] The fabrication method of a bulk acoustic resonator with a double piezoelectric film is used as an example for further explanation. (See [link to documentation]). Figure 2A 725μm low-resistivity silicon 1 was selected as the device wafer substrate. A 6000Å SiO2 buffer layer 2 was thermally oxidized and grown on the low-resistivity silicon 1. A 300Å AlN seed layer 3 was deposited on the SiO2 buffer layer 2 to ensure the preferred c-axis orientation of the subsequent piezoelectric layer. An intermediate electrode layer 4 and a first piezoelectric layer 5 were deposited on the AlN seed layer 3 to establish the piezoelectric performance of the filter unit. A bottom electrode layer 6 was deposited on the first piezoelectric layer 5, and the bottom electrode layer 6 was patterned. The required electrode framework structure was formed. SiO2 was repeatedly deposited on the patterned bottom electrode layer 6, and chemical mechanical polishing was repeated multiple times to form a thickness of 3μm. The silicon dioxide layer 7 is CMP polished to ensure flatness. The silicon dioxide layer 7 is then etched to form a working cavity 18, providing acoustic working space for the resonator unit. A high-resistivity silicon wafer 8 is used as a support wafer and bonded to the etched silicon dioxide layer 7. The bonding conditions are 150℃ pre-bonding followed by 300℃ annealing. The bottom SiO2 of the low-resistivity silicon 1 is removed using HF or BOE wafers, followed by CMP thinning of the low-resistivity silicon 1, and then KOH / TMAH wet removal of the low-resistivity silicon 1. The top SiO2 buffer layer 2 is then removed using HF or BOE wafers, and the AlN seed layer 3 is simultaneously stripped to expose the intermediate electrode layer 4, facilitating subsequent electrode etching and interconnection. The intermediate electrode layer 4 is patterned and etched. A second piezoelectric layer 9 and a top electrode layer 10 are deposited on the etched intermediate electrode layer 4, and the top electrode layer 10 is etched to form the top electrode layer pattern. Two through holes are etched using plasma etching to penetrate the top electrode layer 10, the second piezoelectric layer 9, the intermediate electrode layer 4, and the first piezoelectric layer 5, exposing the bottom electrode layer 6 pads for subsequent electrical connections. A thick Al / Cu metal is deposited in the through holes to simultaneously form RDL and solderable pads 11, leading out the electrodes. A Si3N4 passivation layer 12 is deposited to improve the reliability and stability of the filter unit. If necessary, a window can be opened in the passivation layer above the solderable pads 11 to expose the solderable pads 11. 1. Frequency correction can also be performed on the passivation layer; a 750μm silicon wafer is used as the cover wafer 14, a 15μm dry film 13 is first bonded, and then the dry film 13 is patterned by photolithography to form a dry film cavity 17, resulting in a cover wafer 14 covered with the dry film 13; the cover wafer 14 covered with the dry film 13 is bonded to the passivation layer 12, with the dry film 13 avoiding the electrode edge; the high-resistivity silicon wafer 8 is thinned to reduce the overall thickness to meet the requirements of subsequent processes and packaging; the high-resistivity silicon wafer 8 and the silicon dioxide layer 7 are photolithographically etched and etched to form TSV, exposing the bottom electrode layer pins for subsequent metal filling to achieve top and bottom interconnection; 50nm is deposited on the back of the entire wafer using PVD process. Ti or 300nm Cu is used as the adhesion seed layer; after photolithography with thick resist, 5-10μm Cu is electroplated to form the back RDL-2, realizing the planar extension of TSV to solderable pad 11. After electroplating, the resist is removed to remove the adhesion seed layer in the non-RDL-2 area, preventing short circuits and reducing parasites.Subsequently, PI is spin-coated and photolithography is used to expose the RDL-2 where the ball-planting position needs to be. Ti or Cu is deposited again as an adhesion seed layer, and photolithography is used to expose the bump window where the ball-planting point (BUMP) needs to be. Cu pillars and SnAg solder are electroplated to form the electrical connection BUMP, i.e., metal ball 16. Then the adhesive is removed and the seed layer is cleared. At this point, the back-side wiring-passivation-bump process is completed. The resonator unit can achieve low resistance, low parasitics and high reliability interconnection with the printed circuit board substrate through the BUMP.

[0046] See Figure 3 The present invention also provides a bulk acoustic wave resonator with a double piezoelectric film prepared by the above-mentioned method for preparing a bulk acoustic wave resonator with a double piezoelectric film, comprising a capping wafer 14, wherein a dry film 13, a passivation layer 12, a silicon dioxide layer 7 and a high-resistivity silicon wafer 8 are sequentially disposed on the capping wafer 14.

[0047] A dry film cavity 17 is etched on the dry film 13. A passivation layer 12 located above the dry film cavity 17 extends into the dry film cavity 17. A top electrode layer 10, a second piezoelectric layer 9, an intermediate electrode layer 4, a first piezoelectric layer 5, and a bottom electrode layer 6 are sequentially disposed on the passivation layer 12 extending into the dry film cavity 17. The bottom electrode layer 6 is connected to the top electrode layer 10 through a solderable pad 11. The pins of the bottom electrode layer 6 are connected to metal ball bearings 16 through a redistribution layer 15, serving as the signal output terminals of the resonator.

[0048] This bulk acoustic resonator with a double-layer piezoelectric film adopts a stacked structure of "top electrode layer 10 - first piezoelectric layer 5 - middle electrode layer 4 - second piezoelectric layer 9 - bottom electrode layer 6"; the two piezoelectric films vibrate in opposite phase under electrode drive to excite the second-order mode, and can achieve a second-order modal frequency comparable to that of a single-layer structure. This allows the resonator unit to cover a wider bandwidth per stage, and the intermediate electrode layer 4 also serves as a frequency tuning layer, ensuring the high performance of the filter unit at high frequencies. Q This simple structure breaks through the limitations of traditional processes, such as increased insertion loss, area, and process hierarchy, providing strong support for the miniaturization and high performance of high-frequency communication equipment.

[0049] The above description is merely a preferred embodiment of the present invention and is not intended to limit the technical solution of the present invention in any way. Those skilled in the art should understand that, without departing from the spirit and principles of the present invention, the technical solution can be modified and replaced in several simple ways, and these modifications and replacements are all within the scope of protection covered by the claims.

Claims

1. A method of fabricating a bulk acoustic wave resonator having a dual layer piezoelectric film, characterized by, include: SiO2 buffer layers (2) are thermally oxidized on both sides of a low-resistivity silicon (1), and an AlN seed layer (3), an intermediate electrode layer (4), a first piezoelectric layer (5) and a bottom electrode layer (6) are sequentially grown on the SiO2 buffer layer (2) on one side to obtain a first assembly. The bottom electrode layer (6) of the first assembly is patterned, and a silicon dioxide layer (7) is deposited on the surface of the bottom electrode layer (6). The silicon dioxide layer (7) is etched to form a working cavity (18) to obtain the second assembly; wherein, the patterned bottom electrode layer (6) is partially exposed in the working cavity (18). The etched silicon dioxide layer (7) of the second assembly is bonded to the high-resistivity silicon wafer (8), and the low-resistivity silicon (1), SiO2 buffer layer (2) and AlN seed layer (3) are removed to expose the intermediate electrode layer (4) and pattern the intermediate electrode layer (4) to obtain the third assembly. A second piezoelectric layer (9) and a top electrode layer (10) are deposited on the intermediate electrode layer (4) after the patterning of the third assembly, and the top electrode layer (10) is patterned to obtain the fourth assembly; Two vias are etched on the fourth assembly, and redistribution (RDL) metal is deposited in the vias to form solderable pads (11), thereby connecting the bottom electrode layer (6) and the top electrode layer (10) to obtain the fifth assembly; wherein the vias extend from the top electrode layer (10) to the bottom electrode layer (6). A passivation layer (12) is deposited on the top electrode layer (10) of the fifth assembly and bonded to a capping wafer (14) covered with a dry film (13) to obtain a sixth assembly; wherein a dry film cavity (17) is etched on the dry film (13). The high-resistivity silicon wafer (8) of the sixth assembly is thinned and etched with through-silicon vias (TSVs) to expose the bottom electrode layer (6). Electrode leads are then electroplated on the bottom electrode layer (6) through the TSVs to obtain the seventh assembly. Metal ball (16) is connected to the pin of the bottom electrode layer (6) of the seventh assembly to obtain the two end electrodes of the resonator and obtain a bulk acoustic resonator with a double piezoelectric film.

2. The method of claim 1, wherein the method further comprises: The thickness of the low-resistivity silicon (1) is 700-750 μm; the thickness of the SiO2 buffer layer (2) is 500-700 nm; and the thickness of the AlN seed layer (3) is 25-40 nm.

3. The method for fabricating a bulk acoustic resonator with a double-layer piezoelectric film according to claim 1, characterized in that, The intermediate electrode layer (4) is made of Mo, Al, Pt, W or Au; the first piezoelectric layer (5) and the second piezoelectric layer (9) are both AlN piezoelectric layers or both AlScN piezoelectric layers, with a thickness of 0.3-2μm; the bottom electrode layer (6) and the top electrode layer (10) are made of Mo, Al, Pt, W or Au.

4. The method for fabricating a bulk acoustic resonator with a double-layer piezoelectric film according to claim 1, characterized in that, The thickness of the silicon dioxide layer (7) is 2-4 μm.

5. The method for fabricating a bulk acoustic resonator with a double-layer piezoelectric film according to claim 1, characterized in that, The method for bonding the etched silicon dioxide layer (7) of the second assembly to the high-resistivity silicon wafer (8) is as follows: first, the etched silicon dioxide layer (7) of the second assembly and the high-resistivity silicon wafer (8) are pre-bonded at 140-160℃, and then annealed at 280-320℃ to achieve bonding between the etched silicon dioxide layer (7) of the second assembly and the high-resistivity silicon wafer (8).

6. The method for fabricating a bulk acoustic resonator with a double-layer piezoelectric film according to claim 1, characterized in that, The second piezoelectric layer (9) is deposited on the side of the intermediate electrode layer (4) opposite to the first piezoelectric layer.

7. The method for fabricating a bulk acoustic resonator with a double-layer piezoelectric film according to claim 1, characterized in that, The solderable pad (11) is made of Al / Cu alloy.

8. The method for fabricating a bulk acoustic resonator with a double-layer piezoelectric film according to claim 1, characterized in that, The passivation layer (12) is a Si3N4 passivation layer with a thickness of 200-400nm.

9. A bulk acoustic wave resonator with a double piezoelectric film prepared by the method for preparing a bulk acoustic wave resonator with a double piezoelectric film according to any one of claims 1-8, characterized in that, The package includes a capped wafer (14), on which a dry film (13), a passivation layer (12), a silicon dioxide layer (7) and a high-resistivity silicon wafer (8) are sequentially disposed. The dry film (13) has a dry film cavity (17) etched on it. The passivation layer (12) above the dry film cavity (17) extends into the dry film cavity (17). The passivation layer (12) extending into the dry film cavity (17) is provided with a top electrode layer (10), a second piezoelectric layer (9), an intermediate electrode layer (4), a first piezoelectric layer (5), and a bottom electrode layer (6) in sequence. The bottom electrode layer (6) is connected to the top electrode layer (10) through a solderable pad (11). The pins of the bottom electrode layer (6) are led out through TSV holes and connected to metal ball (16) to form the two end electrodes of the resonator.

10. The bulk acoustic resonator with a double-layer piezoelectric film according to claim 9, characterized in that, The pins of the bottom electrode layer (6) are connected to the metal ball (16) through the redistribution layer (15).

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