Josephson junction preparation method and device and electronic equipment

Abstract

The invention discloses a Josephson junction preparation method and device and electronic equipment, and belongs to the technical field of chip preparation. The method comprises the following steps: forming a first insulating layer on a first surface of a substrate by using a direct evaporation process; preparing a first superconducting layer along the first direction, wherein a barrier layer is formed on the surface of the first superconducting layer; and preparing a second superconducting layer which is partially overlapped with the first superconducting layer along a second direction. In the method, the projection of the laminated part comprises the projection of the first insulating layer along the direction vertical to the first surface, so that the first superconducting layer, the barrier layer and the second superconducting layer which are laminated completely exist on the upper surface of the first insulating layer; when the first superconducting layer, the barrier layer and the second superconducting layer which are stacked above the first insulating layer jointly form the Josephson junction, the size of the Josephson junction is equal to that of the first insulating layer, the area of the Josephson junction can be controlled by regulating and controlling the size of the first insulating layer, and the controllability of the area of the Josephson junction is improved.

Description

Technical Field

[0001] This invention belongs to the field of chip fabrication technology, and in particular to a method, apparatus and electronic device for fabricating Josephson junctions. Background Technology

[0002] A Josephson junction, also known as a superconducting tunnel junction, is primarily composed of two superconductors sandwiched by a very thin barrier layer. This barrier layer can be an insulator, a semiconductor, or a normal conductor, and its thickness is typically less than or equal to the coherence length of a Cooper pair to ensure weak coupling between the superconductors.

[0003] The critical current is an important indicator of the performance of a Josephson junction. When the total current passing through the barrier layer of the Josephson junction exceeds the critical current, the Josephson junction will lose quench and exhibit resistivity. The size of the junction area of ​​the Josephson junction determines the level of the critical current. However, when fabricating Josephson junctions using the oblique evaporation process, it is often encountered that the junction area of ​​the Josephson junction varies greatly at different locations on the quantum chip.

[0004] Therefore, improving the controllability of the Josephson junction area is an urgent problem to be solved during the preparation of Josephson junctions. Summary of the Invention

[0005] The purpose of this invention is to provide a method, apparatus, and electronic device for preparing Josephson junctions to overcome the shortcomings of the prior art, thereby improving the controllability of the Josephson junction area.

[0006] The solution presented in this application is implemented through the following steps.

[0007] In a first aspect, examples of this application present a method for preparing a Josephson junction, the method comprising:

[0008] A first insulating layer is formed on the first surface of the substrate using a direct evaporation process;

[0009] A first superconducting layer is prepared by evaporation along a first direction, and a barrier layer is formed on the surface of the first superconducting layer. A second superconducting layer is prepared by evaporation along a second direction, which has a stacked portion with the first superconducting layer. The projection area of ​​the stacked portion includes the projection area of ​​the first insulating layer in a direction perpendicular to the first surface. The first superconducting layer, the barrier layer and the second superconducting layer stacked above the first insulating layer together constitute a Josephson junction.

[0010] The angle between the first direction and the second direction is greater than 90 degrees, and the sum of the thicknesses of the first superconducting layer, the barrier layer, and the second superconducting layer is less than the thickness of the first insulating layer.

[0011] According to some examples of this application, the preparation method further includes:

[0012] Using the direct evaporation process, a second insulating layer is formed on the substrate. The second insulating layer covers the area on the substrate other than the first insulating layer, and the upper surface of the second insulating layer and the upper surface of the first insulating layer are located on the same horizontal plane.

[0013] According to some examples of this application, the formation of a first insulating layer on a first surface of a substrate using a direct evaporation process includes:

[0014] Obtain a first mask formed on the first surface and having a first through hole;

[0015] An insulating material is deposited onto the substrate through the first via along a direction perpendicular to the substrate.

[0016] Separate the first mask and the substrate to obtain a substrate having the first insulating layer.

[0017] According to some examples of this application, obtaining the first mask formed on the first surface and having a first through hole includes:

[0018] Photoresist is applied to the first surface to form a photoresist layer;

[0019] Based on the position and size information corresponding to the first insulating layer, the photoresist layer is developed and exposed to form the first mask having the first through hole.

[0020] According to some examples of this application, the evaporation along the first direction to prepare the first superconducting layer includes:

[0021] Based on the position and size information of the first insulating layer, determine the position and size information of the first superconducting layer that meets the conditions for covering the first insulating layer;

[0022] A second mask with an undercut structure is formed on the first surface;

[0023] Based on the position and size information of the first superconducting layer and the parameters of the second mask, the angle parameter information of the first direction is determined;

[0024] Based on the angle parameter information of the first direction, the superconducting metal material is evaporated to generate the first superconducting layer.

[0025] According to some examples of this application, the step of evaporating along the second direction to prepare a second superconducting layer having a stacked portion with the first superconducting layer includes:

[0026] Based on the position and size information of the first insulating layer and the position and size information of the first superconducting layer, the position and size information of the second superconducting layer are determined;

[0027] Based on the position and size information of the second superconducting layer, and the parameters of the second mask formed on the first surface, the angle parameter information of the second direction is determined;

[0028] Based on the angle parameter information of the second direction, the superconducting metal material is evaporated to generate the second superconducting layer.

[0029] According to some examples of this application, the shape of the first insulating layer includes a cross shape, a square shape, and a rectangle.

[0030] According to some examples of this application, the material of the first insulating layer includes silicon dioxide.

[0031] Secondly, examples of this application provide an apparatus for preparing a Josephson junction, the apparatus comprising:

[0032] The first insulating layer generation module is used to form a first insulating layer on the first surface of the substrate using a direct evaporation process.

[0033] The preparation module is used to evaporate along a first direction to prepare a first superconducting layer, on which a barrier layer is formed. It then evaporates along a second direction to prepare a second superconducting layer that overlaps with the first superconducting layer. Along a direction perpendicular to the first surface, the projected region of the overlapping region includes the projected region of the first insulating layer. The first superconducting layer, the barrier layer, and the second superconducting layer, stacked above the first insulating layer, together constitute a Josephson junction. The angle between the first direction and the second direction is greater than 90 degrees, and the sum of the thicknesses of the first superconducting layer, the barrier layer, and the second superconducting layer is less than the thickness of the first insulating layer.

[0034] According to some examples of this application, the preparation apparatus further includes:

[0035] The second insulating layer generation module is used to form a second insulating layer on the substrate using the direct evaporation process. The second insulating layer covers the area on the substrate other than the first insulating layer, and the upper surface of the second insulating layer and the upper surface of the first insulating layer are located on the same horizontal plane.

[0036] According to some examples of this application, the first insulating layer generation module is specifically used for:

[0037] Obtain a first mask formed on the first surface and having a first through hole;

[0038] An insulating material is deposited onto the substrate through the first via along a direction perpendicular to the substrate.

[0039] Separate the first mask and the substrate to obtain a substrate having the first insulating layer.

[0040] According to some examples of this application, the first insulating layer generation module is specifically used for:

[0041] Photoresist is applied to the first surface to form a photoresist layer;

[0042] Based on the position and size information corresponding to the first insulating layer, the photoresist layer is developed and exposed to form the first mask having the first through hole.

[0043] According to some examples of this application, the preparation module is specifically used for:

[0044] Based on the position and size information of the first insulating layer, determine the position and size information of the first superconducting layer that meets the conditions for covering the first insulating layer;

[0045] A second mask with an undercut structure is formed on the first surface;

[0046] Based on the position and size information of the first superconducting layer and the parameters of the second mask, the angle parameter information of the first direction is determined;

[0047] Based on the angle parameter information of the first direction, the superconducting metal material is evaporated to generate the first superconducting layer.

[0048] According to some examples of this application, the preparation module is specifically used for:

[0049] Based on the position and size information of the first insulating layer and the position and size information of the first superconducting layer, the position and size information of the second superconducting layer are determined;

[0050] Based on the position and size information of the second superconducting layer, and the parameters of the second mask formed on the first surface, the angle parameter information of the second direction is determined;

[0051] Based on the angle parameter information of the second direction, the superconducting metal material is evaporated to generate the second superconducting layer.

[0052] According to some examples of this application, the shape of the first insulating layer includes a cross shape, a square shape, and a rectangle.

[0053] According to some examples of this application, the material of the first insulating layer includes silicon dioxide.

[0054] Thirdly, examples of this application provide an electronic device, including: a processor;

[0055] Memory used to store processor-executable instructions;

[0056] The processor executes the executable instructions to implement the Josephson junction fabrication method as described in the first aspect above.

[0057] In the Josephson junction fabrication method described in the foregoing example of this application, a first insulating layer is first formed on a first surface of a substrate using a direct evaporation process. Next, a first superconducting layer is fabricated along a first direction, and a barrier layer is formed on the surface of the first superconducting layer. Finally, a second superconducting layer, overlapping with the first superconducting layer, is fabricated along a second direction. Since the projection of the stacked portion along the direction perpendicular to the first surface includes the projection of the first insulating layer, the entire upper surface of the first insulating layer contains the stacked first superconducting layer, barrier layer, and second superconducting layer. Therefore, when the first superconducting layer, barrier layer, and second superconducting layer stacked above the first insulating layer together constitute a Josephson junction, the size of the Josephson junction is equal to the size of the first insulating layer. Based on the above method, the area of ​​the Josephson junction can be controlled by adjusting the size of the first insulating layer, thereby improving the controllability of the Josephson junction area. Attached Figure Description

[0058] To illustrate this more clearly, the accompanying drawings used in the description will be briefly introduced below.

[0059] Figure 1 Here is a flowchart illustrating a method for preparing a Josephson junction, as shown in one example of this application.

[0060] Figure 2 This is a schematic diagram illustrating the preparation process of the Josephson junction in another example of this application;

[0061] Figure 3 Here is a flowchart of a method for preparing a Josephson knot, as shown in another example of this application;

[0062] Figure 4 Here is a flowchart of a method for preparing a Josephson knot, as shown in another example of this application;

[0063] Figure 5 This is a structural diagram of the apparatus for preparing a Josephson junction in one example of this application;

[0064] Figure 6 This is a structural diagram of an electronic device in one example of this application. Detailed Implementation

[0065] To enable those skilled in the art to better understand the technical solutions in this application, the technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments in this application, all other embodiments obtained by those of ordinary skill in the art without creative effort should fall within the scope of protection of this application. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain this application, and should not be construed as limiting this application.

[0066] In the description of this invention, it should be understood that the terms "center", "upper", "lower", "left", "right", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this invention.

[0067] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this invention, "a plurality of" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0068] A Josephson junction, also known as a superconducting tunnel junction, is primarily composed of two superconductors sandwiched by a very thin barrier layer. This barrier layer can be an insulator, a semiconductor, or a normal conductor, and its thickness is typically less than or equal to the coherence length of a Cooper pair to ensure weak coupling between the superconductors.

[0069] The critical current is a crucial indicator of Josephson junction performance. When the total current flowing through the Josephson junction barrier layer exceeds the critical current, the junction will lose quench and exhibit resistivity. The size of the junction area determines the level of the critical current. In current Josephson junction fabrication processes using biclinic evaporation, the distance and angle between the Josephson junction at different locations on the chip and the target material are inconsistent, and the aluminum thickness on the photoresist sidewalls is uneven, leading to variations in the junction area of ​​the Josephson junction.

[0070] Based on this, such as Figure 1 As shown in the illustration, one embodiment of the present invention provides a method for preparing a Josephson junction. The method includes, for example, the following steps:

[0071] Step S110: A first insulating layer is formed on the first surface of the substrate using a direct evaporation process;

[0072] Step S120: Evaporate along the first direction to prepare a first superconducting layer. A barrier layer is formed on the surface of the first superconducting layer. Evaporate along the second direction to prepare a second superconducting layer with a stacked portion. The projection area of ​​the stacked portion includes the projection area of ​​the first insulating layer along the direction perpendicular to the first surface. The first superconducting layer, the barrier layer, and the second superconducting layer stacked above the first insulating layer together constitute a Josephson junction. The angle between the first direction and the second direction is greater than 90 degrees. The sum of the thicknesses of the first superconducting layer, the barrier layer, and the second superconducting layer is less than the thickness of the first insulating layer.

[0073] The dimensions (length and width) of the first insulating layer are smaller than the dimensions (length and width) of the first surface. For example... Figure 2 As shown (the barrier layer is not shown in the figure), both the first and second directions are oblique evaporation directions. The first and second directions can be projected onto the same plane (i.e., the first plane). On the first plane, the angle A between the first and second directions is greater than 90 degrees. Evaporation along the first direction forms an initial superconducting layer on the first surface of the substrate. Oxidation of the initial superconducting layer can form a barrier layer on the surface of the initial superconducting layer. The superconducting layer located below the barrier layer in the initial superconducting layer is the first superconducting layer. The thickness of the barrier layer is determined by the oxidation time, and the thickness of the first superconducting layer is determined by the oblique evaporation time along the first direction.

[0074] Because the thickness change caused by oblique evaporation is small, the thickness of the obliquely evaporated deposited material is considered equal in this application. The region on the first surface other than the first insulating layer (i.e., the second region) may contain a stacked first superconducting layer, a barrier layer, and a second superconducting layer. When the thickness of the stacked first superconducting layer, barrier layer, and second superconducting layer in the second region is greater than the thickness of the first insulating layer, the Josephson junction located on the first insulating layer may form an electrical connection with the stacked first superconducting layer, barrier layer, and second superconducting layer in the second region. Based on this, this application limits the sum of the thicknesses of the first superconducting layer, barrier layer, and second superconducting layer to be less than the thickness of the first insulating layer, thus preventing the Josephson junction from forming an electrical connection with other stacked regions. The thicknesses of the first insulating layer, the first superconducting layer, and the second superconducting layer can be controlled by controlling the evaporation deposition time, and the thickness of the barrier layer can be controlled by controlling the oxidation time.

[0075] Specifically, a substrate is obtained; a fixing device is used to fix the substrate to the vacuum chamber to ensure the stability of the substrate position during the evaporation process; the vacuum chamber is closed and a vacuum pump is used to extract the air in the chamber to achieve the required vacuum level; an appropriate insulating material is selected as the evaporation source, which may include alumina, silicon dioxide, silicon nitride, etc.; the insulating material is placed in a crucible or evaporation boat, and a heating device is started to heat the insulating material to the evaporation temperature, and according to the preset position of the first insulating layer, the gaseous evaporation material is controlled to deposit on the first surface in a direction perpendicular to the first surface to form the first insulating layer.

[0076] Furthermore, a first superconducting layer is prepared by oblique evaporation of superconducting material along a first direction. Along a direction perpendicular to the first surface, the projected region of the first superconducting layer includes the projected region of the first insulating layer. A barrier layer is prepared on the surface of the first superconducting layer according to a predetermined processing technique. This predetermined processing technique may include: forming an oxide barrier layer on the surface of the first superconducting layer through natural oxidation or artificially controlled oxidation; implanting barrier material elements into the first superconducting layer using a high-energy ion beam, forming a barrier layer on or inside the superconducting layer through the interaction between ions and the material; bombarding a barrier material target with high-energy particles (such as ions or electrons), causing atoms or molecules on the target surface to be sputtered and deposited on the surface of the first superconducting layer to form a thin film, etc. A second superconducting layer with an overlapping portion to the first superconducting layer is prepared by oblique evaporation of superconducting material along a second direction. Since a barrier layer is formed on the surface of the first superconducting layer, the stacked portion is always a structure of first superconducting layer-barrier layer-second superconducting layer. Along the direction perpendicular to the first surface, the projection region of the second superconducting layer also includes the projection region of the first insulating layer. This means that the overlapping part must include the projection region of the first insulating layer. Therefore, when the first superconducting layer, the barrier layer and the second superconducting layer stacked above the first insulating layer together form a Josephson junction, the size of the Josephson junction is equal to the size of the first insulating layer.

[0077] This application proposes a method for fabricating a Josephson junction, in which a first insulating layer is formed on a first surface of a substrate using a direct evaporation process; a first superconducting layer is fabricated along a first direction, and a barrier layer is formed on the surface of the first superconducting layer; a second superconducting layer with an overlapping portion is fabricated along a second direction. Since the projection of the stacked portion along the direction perpendicular to the first surface includes the projection of the first insulating layer, the entire upper surface of the first insulating layer contains the stacked first superconducting layer, barrier layer, and second superconducting layer. Therefore, when the first superconducting layer, barrier layer, and second superconducting layer stacked above the first insulating layer together constitute a Josephson junction, the size of the Josephson junction is equal to the size of the first insulating layer. The area of ​​the Josephson junction can be controlled by adjusting the size of the first insulating layer, thereby improving the controllability of the Josephson junction area.

[0078] In existing methods for fabricating Josephson junctions using a double-oblique evaporation process, the distance and angle at which the Josephson junctions at different locations on the chip reach the target are inconsistent, and the aluminum thickness on the photoresist sidewalls is uneven, resulting in differences in the junction area of ​​the Josephson junctions. However, the implementation scheme provided in this application can effectively control the size of the Josephson junctions located in different regions of the quantum chip to be equal to the size of the first insulating layer, thus solving the problem of large differences in the junction area of ​​the Josephson junctions at different locations on the quantum chip during the oblique evaporation process.

[0079] The Josephson junction fabrication method proposed in this application can be applied to the fabrication of quantum chips. Multiple first insulating layers of the same size are fabricated at different positions on the first surface of the substrate, and then a first superconducting layer is fabricated sequentially along a first direction and a second superconducting layer is fabricated along a second direction. In this way, a Josephson junction with the same size as the first insulating layer can be fabricated at the position corresponding to the first insulating layer, which effectively improves the uniformity of the Josephson junction area on the quantum chip.

[0080] In one embodiment of this application, the method for preparing a Josephson junction further includes:

[0081] A second insulating layer is formed on a substrate using a direct evaporation process. The second insulating layer covers the area on the substrate other than the first insulating layer, and the upper surface of the second insulating layer and the upper surface of the first insulating layer are located on the same horizontal plane.

[0082] Specifically, in addition to the region where the first insulating layer is located, on the first surface of the substrate, there are also a second superconducting layer that is not stacked with the first superconducting layer, a partial structure of first superconducting layer-barrier layer-second superconducting layer, and a first superconducting layer with a barrier layer formed on its surface that is not stacked with the second superconducting layer. The sum of the thicknesses of the first superconducting layer, the barrier layer, and the second superconducting layer is less than the thickness of the first insulating layer. To facilitate the subsequent fabrication of the Josephson junction control signal lines, insulating material is deposited in the region outside the first insulating layer to form a second insulating layer whose upper surface is at the same level as the upper surface of the first insulating layer. The fabrication of the control signal lines can be performed on the upper surface of the second insulating layer. Furthermore, since the second insulating layer covers the region excluding the region where the first insulating layer is located, the interference that the superconducting layer located on the first surface of the substrate may cause to the Josephson junction can be reduced.

[0083] like Figure 3 As shown, in one embodiment of this application, step S110, which involves forming a first insulating layer on the first surface of the substrate using a direct evaporation process, includes:

[0084] Step S310: Obtain a first mask formed on the first surface and having a first through hole;

[0085] Step S320: Deposit insulating material into the substrate through the first via along a direction perpendicular to the substrate;

[0086] Step S330: Separate the first mask and the substrate to obtain a substrate with a first insulating layer.

[0087] The dimensions of the first mask are the same as those of the first surface of the substrate. There can be one or more first vias, and the location and size of the first vias define the position and size of the first insulating layer on the substrate. The first mask can be a hard mask or a photoresist mask.

[0088] Specifically, based on the selected insulating material and deposition method (such as chemical vapor deposition (CVD), physical vapor deposition (PVD), spin coating, etc.), the corresponding deposition equipment and process parameters are set; the substrate with the first mask is placed in the deposition chamber, the deposition equipment is started, and the insulating material is deposited onto the substrate through the first via in a direction perpendicular to the substrate to form the first insulating layer. During the deposition process, the material flow rate, deposition rate, and deposition time need to be precisely controlled to ensure that the insulating material can completely fill the via; after the first insulating layer is formed, the first mask and the substrate are separated to obtain the substrate with the first insulating layer.

[0089] In one embodiment of this application, step S310, obtaining a first mask formed on the first surface and having a first through hole, includes:

[0090] Photoresist is applied to the first surface to form a photoresist layer;

[0091] Based on the position and size information corresponding to the first insulating layer, the photoresist layer is developed and exposed to form a first mask with a first through hole.

[0092] Specifically, the substrate (such as a silicon wafer or glass substrate) is cleaned and pre-treated to ensure a clean, impurity-free surface with the required flatness and cleanliness. Photoresist is dropped onto the first surface of the substrate, and then the substrate is rotated to evenly coat the entire surface, forming a photoresist layer. The photoresist-coated substrate is then placed in an oven for baking to remove the solvent from the photoresist and solidify it on the substrate surface, improving the adhesion between the photoresist and the substrate and reducing deformation in subsequent steps. A photolithography machine is then used to create the desired pattern (in this case, the first through-hole). A photomask (with a pattern) is placed on a substrate with a photoresist layer and exposed to ultraviolet light or other light sources to transfer the pattern on the photoresist layer. The exposed substrate is then immersed in a developing solution, which selectively dissolves the unexposed (or poorly exposed) portions of the photoresist, thereby exposing the surface of the substrate. After development, the first via corresponding to the pattern on the photoresist layer is formed. To enhance the adhesion between the photoresist layer and the substrate and reduce deformation during subsequent etching or deposition processes, the developed photoresist is post-baked.

[0093] like Figure 4 As shown, in one embodiment of this application, step S120, evaporation along a first direction to prepare a first superconducting layer, includes:

[0094] Step S410: Based on the position and size information of the first insulating layer, determine the position and size information of the first superconducting layer that meets the conditions for covering the first insulating layer;

[0095] Step S420: A second mask with an undercut structure is formed on the first surface;

[0096] Step S430: Determine the angle parameter information of the first direction based on the position and size information of the first superconducting layer and the parameters of the second mask;

[0097] Step S440: Evaporate the superconducting metal material according to the angle parameter information of the first direction to generate the first superconducting layer.

[0098] The position information of the first insulating layer includes its coordinates on the substrate. This position information can be determined through design drawings or positioning marks during manufacturing, or by detecting the actual coordinates of the first insulating layer using image inspection equipment (such as an optical microscope). The position of the first superconducting layer on the first surface must satisfy the condition of covering the first insulating layer. Therefore, along the direction perpendicular to the first surface, the projected size of the first superconducting layer should be larger than the size of the first insulating layer, and the projected area of ​​the first superconducting layer should encompass the projected area of ​​the first insulating layer.

[0099] The second mask has a window exposing the first insulating layer, the size (length and width) of which is larger than the size (length and width) of the first insulating layer. The thickness of the second mask is greater than the sum of the thicknesses of the first superconducting layer, the barrier layer, the second superconducting layer, and the first insulating layer. The parameters of the second mask include the thickness of the second mask, the position information and size information of the window on the second mask.

[0100] Specifically, based on the position and size information of the first superconducting layer and the parameters of the second mask, the angle parameter information of the first direction (i.e. the direction of evaporating the superconducting material) is determined; based on the determined angle parameter information of the first direction, the superconducting material is deposited on the first surface using an evaporation process, ensuring that the evaporated superconducting material can be deposited at the position of the first superconducting layer along a predetermined path to form the first superconducting layer covering the first insulating layer.

[0101] In one embodiment of this application, step S120, which involves evaporation along a second direction to prepare a second superconducting layer that overlaps with the first superconducting layer, includes:

[0102] Based on the position and size information of the first insulating layer and the first superconducting layer, the position and size information of the second superconducting layer are determined.

[0103] Based on the position and size information of the second superconducting layer, and the parameters of the second mask formed on the first surface, the angle parameter information of the second direction is determined;

[0104] Based on the angular parameter information of the second direction, the superconducting metallic material is evaporated to generate a second superconducting layer.

[0105] The positional information of the first insulating layer includes its coordinates on the substrate. This positional information can be determined through design drawings or positioning marks during manufacturing, or by detecting the actual coordinates of the first insulating layer using image inspection equipment (such as an optical microscope). The positional information of the first superconducting layer includes the coordinates of its projected area on the substrate along a direction perpendicular to the first surface. This positional information can be determined by image inspection equipment (such as an optical microscope). The second superconducting layer must satisfy the following requirement: along a direction perpendicular to the first surface, the projected size of the second superconducting layer should be larger than the size of the first insulating layer, and the projected area of ​​the second superconducting layer should encompass the projected area of ​​the first insulating layer, to ensure that the projected area of ​​the stacked portion of the first and second superconducting layers includes the projected area of ​​the first insulating layer.

[0106] The second mask has a window exposing the first insulating layer, the size (length and width) of which is larger than the size (length and width) of the first insulating layer. The thickness of the second mask is greater than the sum of the thicknesses of the first superconducting layer, the barrier layer, the second superconducting layer, and the first insulating layer. The parameters of the second mask include the thickness of the second mask, the position information and size information of the window on the second mask.

[0107] Specifically, based on the position and size information of the first superconducting layer and the parameters of the second mask, the angle parameter information of the second direction (i.e., the direction of evaporating the superconducting material) is determined; based on the determined angle parameter information of the second direction, the superconducting material is deposited on the first surface using an evaporation process, ensuring that the evaporated superconducting material can be deposited at the position of the second superconducting layer along a predetermined path, forming a second superconducting layer that includes a first insulating layer in the portion stacked with the first superconducting layer.

[0108] In one embodiment of this application, the shape of the first insulating layer includes a cross shape, a square shape, and a rectangle.

[0109] It should be noted that the Josephson junction fabrication method provided in this application controls the size of the Josephson junction by controlling the size of the first insulating layer, thus solving the problem of large differences in the junction area of ​​Josephson junctions at different positions on the quantum chip during the oblique evaporation process. The size and shape of the first insulating layer can be set according to actual needs. The shape of the first insulating layer includes, but is not limited to, a cross shape, a square shape, and a rectangle.

[0110] In one embodiment of this application, the material of the first insulating layer includes silicon dioxide.

[0111] It should be noted that the first insulating layer is made of the same material as the second insulating layer. The insulating material can be selected according to actual needs. The insulating material of the insulating layer includes, but is not limited to, silicon dioxide.

[0112] It should be understood that although the steps in the flowcharts of the above embodiments are shown sequentially according to the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless explicitly stated herein, there is no strict order restriction on the execution of these steps, and they can be executed in other orders. Moreover, at least some steps in the flowcharts of the above embodiments may include multiple steps or multiple stages. These steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these steps or stages is not necessarily sequential, but can be performed alternately or in turn with other steps or at least some of the steps or stages of other steps.

[0113] Based on the same inventive concept, this application also provides an apparatus for preparing the Josephson junction as described above. The solution provided by this apparatus is similar to the solution described in the above method; therefore, the specific limitations of one or more Josephson junction preparation apparatus embodiments provided below can be found in the limitations of the Josephson junction preparation method described above, and will not be repeated here.

[0114] like Figure 5 As shown, this application also provides a Josephson junction preparation apparatus 500, which includes:

[0115] The first insulating layer generation module 510 is used to form a first insulating layer on the first surface of the substrate using a direct evaporation process.

[0116] The preparation module 520 is used to evaporate along a first direction to prepare a first superconducting layer, a barrier layer is formed on the surface of the first superconducting layer, and evaporate along a second direction to prepare a second superconducting layer with a stacked portion to the first superconducting layer. Along the direction perpendicular to the first surface, the projection area of ​​the stacked portion includes the projection area of ​​the first insulating layer. The first superconducting layer, the barrier layer and the second superconducting layer stacked above the first insulating layer together constitute a Josephson junction. The angle between the first direction and the second direction is greater than 90 degrees, and the sum of the thicknesses of the first superconducting layer, the barrier layer and the second superconducting layer is less than the thickness of the first insulating layer.

[0117] In one embodiment of this application, the preparation apparatus further includes:

[0118] The second insulating layer generation module is used to form a second insulating layer on a substrate using a direct evaporation process. The second insulating layer covers the area on the substrate other than the first insulating layer, and the upper surface of the second insulating layer and the upper surface of the first insulating layer are located on the same horizontal plane.

[0119] In one embodiment of this application, the first insulating layer generation module 510 is specifically used for:

[0120] Obtain a first mask formed on a first surface and having a first through hole;

[0121] An insulating material is deposited onto the substrate through a first via along a direction perpendicular to the substrate.

[0122] Separate the first mask and the substrate to obtain a substrate with a first insulating layer.

[0123] In one embodiment of this application, the first insulating layer generation module 510 is specifically used for:

[0124] Photoresist is applied to the first surface to form a photoresist layer;

[0125] Based on the position and size information corresponding to the first insulating layer, the photoresist layer is developed and exposed to form a first mask with a first through hole.

[0126] In one embodiment of this application, the preparation module 520 is specifically used for:

[0127] Based on the position and size information of the first insulating layer, determine the position and size information of the first superconducting layer that meets the conditions for covering the first insulating layer;

[0128] A second mask with an undercut structure is formed on the first surface;

[0129] Based on the position and size information of the first superconducting layer and the parameters of the second mask, the angle parameter information of the first direction is determined;

[0130] Based on the angular parameter information of the first direction, the superconducting metal material is evaporated to generate the first superconducting layer.

[0131] In one embodiment of this application, the preparation module 520 is specifically used for:

[0132] Based on the position and size information of the first insulating layer and the first superconducting layer, the position and size information of the second superconducting layer are determined.

[0133] Based on the position and size information of the second superconducting layer, and the parameters of the second mask formed on the first surface, the angle parameter information of the second direction is determined;

[0134] Based on the angular parameter information of the second direction, the superconducting metallic material is evaporated to generate a second superconducting layer.

[0135] In one embodiment of this application, the shape of the first insulating layer includes a cross shape, a square shape, and a rectangle.

[0136] In one embodiment of this application, the material of the first insulating layer includes silicon dioxide.

[0137] Based on the same inventive concept, such as Figure 6 As shown, an embodiment of the present invention also proposes an electronic device, comprising:

[0138] Processor; memory used to store processor-executable instructions.

[0139] The processor executes executable instructions to implement the Josephson junction fabrication method described above.

[0140] In the description of this specification, references to terms such as "some embodiments" or "example" indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments. In addition, those skilled in the art can combine and integrate the different embodiments or examples described in this specification.

[0141] The above are merely preferred embodiments of the present invention and do not constitute any limitation on the present invention. Any equivalent substitutions or modifications made by those skilled in the art to the technical solutions and content disclosed in the present invention without departing from the scope of the present invention shall be deemed to have remained within the protection scope of the present invention.

Claims

1. A method for preparing a Josephson knot, characterized in that, The method includes: A first insulating layer is formed on the first surface of the substrate using a direct evaporation process; A first superconducting layer is prepared by evaporation along a first direction, and a barrier layer is formed on the surface of the first superconducting layer. A second superconducting layer is prepared by evaporation along a second direction, which has a stacked portion with the first superconducting layer. The projection area of ​​the stacked portion includes the projection area of ​​the first insulating layer in a direction perpendicular to the first surface. The first superconducting layer, the barrier layer and the second superconducting layer stacked above the first insulating layer together constitute a Josephson junction. The angle between the first direction and the second direction is greater than 90 degrees, and the sum of the thicknesses of the first superconducting layer, the barrier layer, and the second superconducting layer is less than the thickness of the first insulating layer.

2. The method for preparing a Josephson knot according to claim 1, characterized in that, The preparation method further includes: Using the direct evaporation process, a second insulating layer is formed on the substrate. The second insulating layer covers the area on the substrate other than the first insulating layer, and the upper surface of the second insulating layer and the upper surface of the first insulating layer are located on the same horizontal plane.

3. The method for preparing a Josephson knot according to claim 1, characterized in that, The method of forming a first insulating layer on a first surface of a substrate using a direct evaporation process includes: Obtain a first mask formed on the first surface and having a first through hole; An insulating material is deposited onto the substrate through the first via along a direction perpendicular to the substrate. Separate the first mask and the substrate to obtain a substrate having the first insulating layer.

4. The method for preparing a Josephson knot according to claim 3, characterized in that, The process of obtaining the first mask formed on the first surface and having a first through hole includes: Photoresist is applied to the first surface to form a photoresist layer; Based on the position and size information corresponding to the first insulating layer, the photoresist layer is developed and exposed to form the first mask having the first through hole.

5. The method for preparing a Josephson knot according to claim 1, characterized in that, The process of evaporating along the first direction to prepare the first superconducting layer includes: Based on the position and size information of the first insulating layer, determine the position and size information of the first superconducting layer that meets the conditions for covering the first insulating layer; A second mask with an undercut structure is formed on the first surface; Based on the position and size information of the first superconducting layer and the parameters of the second mask, the angle parameter information of the first direction is determined; Based on the angle parameter information of the first direction, the superconducting metal material is evaporated to generate the first superconducting layer.

6. The method for preparing a Josephson knot according to claim 1, characterized in that, The process of evaporating along the second direction to prepare a second superconducting layer that overlaps with the first superconducting layer includes: Based on the position and size information of the first insulating layer and the position and size information of the first superconducting layer, the position and size information of the second superconducting layer are determined; Based on the position and size information of the second superconducting layer, and the parameters of the second mask formed on the first surface, the angle parameter information of the second direction is determined; Based on the angle parameter information of the second direction, the superconducting metal material is evaporated to generate the second superconducting layer.

7. The method for preparing a Josephson knot according to claim 1, characterized in that, The shape of the first insulating layer includes a cross, a square, and a rectangle.

8. The method for preparing a Josephson knot according to claim 1, characterized in that, The material of the first insulating layer includes silicon dioxide.

9. An apparatus for preparing a Josephson junction, characterized in that, The device includes: The first insulating layer generation module is used to form a first insulating layer on the first surface of the substrate using a direct evaporation process. The preparation module is used to evaporate along a first direction to prepare a first superconducting layer, on which a barrier layer is formed. It then evaporates along a second direction to prepare a second superconducting layer that overlaps with the first superconducting layer. Along a direction perpendicular to the first surface, the projected region of the overlapping region includes the projected region of the first insulating layer. The first superconducting layer, the barrier layer, and the second superconducting layer, stacked above the first insulating layer, together constitute a Josephson junction. The angle between the first direction and the second direction is greater than 90 degrees, and the sum of the thicknesses of the first superconducting layer, the barrier layer, and the second superconducting layer is less than the thickness of the first insulating layer.

10. An electronic device, comprising: processor; Memory used to store processor-executable instructions; The processor executes the executable instructions to implement the method for preparing a Josephson junction as described in any one of claims 1-8.

Images