Substrate surface treatment method and polycrystalline silicon deposition method
By employing a substrate surface treatment method involving thermal oxidation, BOE etching, and inert gas ionization during the polycrystalline silicon thin film fabrication process, the problem of polycrystalline silicon thin film deposition fogging was solved, resulting in a flat and bright polycrystalline silicon layer, which improves device performance and production reliability.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-12-10
- Publication Date
- 2026-03-27
AI Technical Summary
During the preparation of polycrystalline silicon thin films, changes in process conditions or damage and contamination on the silicon wafer surface can cause polycrystalline silicon particles to coarsen, resulting in fogging, which seriously affects device performance and reliability.
A silicon oxide layer is formed by thermal oxidation, and then the silicon oxide layer is removed by etching with BOE solution. The substrate surface is then treated with vacuum heating and inert gas ionization to remove residual moisture and oxygen-containing groups, thus forming a flat polycrystalline silicon layer.
It eliminates the fogging problem in polycrystalline silicon thin film deposition, achieves flatness and brightness of the polycrystalline silicon layer, improves the reliability and stability of the chip, and is suitable for mass production.
Smart Images

Figure CN121751980A_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application belongs to the technical field of semiconductor manufacturing, and particularly relates to a substrate surface treatment method and a polysilicon deposition method. BACKGROUND
[0002] The polysilicon thin film can be used as the gate material of the MOS transistor due to its adjustable electrical properties, excellent thermal stability and high compatibility with the silicon-based process, and can realize the automatic alignment of the source, the drain and the gate, thereby greatly improving the performance and integration of the device. In addition, the polysilicon thin film can also be used as the active layer for absorbing light energy and generating photo-generated carriers in the thin-film solar cell, and plays an irreplaceable role in the semiconductor industry. However, in the preparation process of the polysilicon thin film, the deposited polysilicon particles become coarse due to the change of the process conditions or the damage or contamination of the silicon wafer surface in the process operation, and the fogging phenomenon occurs, which may cause the device pattern on the silicon wafer to be unclear and the entire device to be scrapped.
[0003] Therefore, it is necessary to carry out research on eliminating the fogging of the polysilicon thin film deposition to solve the above problems. SUMMARY
[0004] The present application aims at providing a substrate surface treatment method to eliminate the fogging problem in the deposition of the polysilicon thin film, and another object of the present application is to provide a polysilicon thin film deposition method.
[0005] The technical scheme of the present application is as follows:
[0006] (1) providing a silicon-containing substrate, and forming a silicon oxide layer on the surface of the substrate by using a thermal oxidation process;
[0007] (2) removing the silicon oxide layer by using a BOE solution for etching;
[0008] (3) placing the substrate in a vacuum environment, heating and removing the residual water vapor on the surface of the substrate;
[0009] (4) treating the substrate prepared in step (3) by using the plasma formed by the inert gas.
[0010] Preferably, the substrate is a silicon substrate or an SOI wafer.
[0011] Preferably, in step (1), the thermal oxidation temperature is 1000-1200℃, and the duration is 1-5h.
[0012] Preferably, in step (1), the thickness of the silicon oxide layer is 0.3-2μm. The thickness of the silicon oxide layer increases with the increase of the thickness of the substrate.
[0013] Preferably, in step (2), a 30%~80% BOE solution is used to etch and remove the silicon oxide layer for a duration of 10~35 minutes. In the BOE solution, the volume ratio of NH4F to HF is 6~20:1. The wet etching duration varies with the thickness of the silicon oxide layer. The silicon oxide layer needs to be completely removed so that the subsequent polycrystalline silicon can be directly grown on the planarized substrate. Increasing the concentration of the BOE solution can shorten the etching time and avoid excessive etching that could damage the substrate.
[0014] Preferably, in step (3), the heating temperature is 100℃~300℃, and the heating duration is 1~10min. The processing time can be shortened as the temperature increases. More preferably, in step (3), the surface degassing temperature is 100~180℃.
[0015] Preferably, in step (4), the inert gas flow rate is 10~100 sccm, the plasma source power is 100~800W, and the bias power is 10~100W.
[0016] Preferably, in order to improve the yield, in step (4), the inert gas flow rate is 30~50 sccm, the plasma source power is 320~570W, and the bias power is 50~70W.
[0017] Preferably, in step (4), the plasma treatment lasts for 3 to 10 minutes.
[0018] Preferably, in step (4), the inert gas is at least one of nitrogen, helium, neon, argon, krypton, xenon, and radon.
[0019] The polycrystalline silicon deposition method of the present invention includes a substrate treated by the aforementioned surface treatment method, and a polycrystalline silicon layer deposited on the surface of the substrate. The deposition parameters are silane flow rate of 10~100 sccm, temperature of 500~700℃, and pressure of 100~500 mTorr.
[0020] Compared with the prior art, the beneficial effects of the present invention are as follows: 1. Eliminating the fogging problem during polycrystalline silicon thin film deposition: The substrate is treated by BOE solution etching combined with vacuum heating and plasma gas bombardment, and polycrystalline silicon is subsequently deposited on the substrate surface. The resulting polycrystalline silicon layer is flat, bright, and free from fogging; 2. The method of the present invention can be applied to the deposition of polycrystalline silicon thin films on various substrates. The production process is simple and can achieve mass production; 3. Avoiding damage to the substrate and improving the reliability and stability of the chip. Attached Figure Description
[0021] Figure 1 This is a schematic flowchart of a method for eliminating atomization during polycrystalline silicon thin film deposition according to the present invention.
[0022] Figure 2 The image shows the microstructure of the sample obtained in the first embodiment of the present invention: the upper part is characterized by microscopy, and the lower part is characterized by SEM.
[0023] Figure 3 The image shows the microstructure of the sample obtained in the first comparative example of this invention: the upper part is characterized by microscopy, and the lower part is characterized by SEM. Detailed Implementation
[0024] This invention employs a combination of BOE solution etching, vacuum heating, and plasma gas bombardment to treat the substrate. Polycrystalline silicon is then deposited on the substrate surface, resulting in a flat, bright polycrystalline silicon layer without haze. The mechanism may be as follows: during thermal oxidation, protruding silicon atoms, due to their smaller radius of curvature and higher surface energy, oxidize faster than silicon atoms in recessed areas. Simultaneously, the oxide layer itself exhibits fluidity at high temperatures, aiding in filling microscopic depressions. After the BOE solution completely etches away the silicon oxide layer, the exposed new silicon surface is essentially the interface between the original oxide layer and silicon; this interface is flatter than the original surface. Tantalum can effectively "smooth out" nanoscale surface undulations, scratches, and defects, significantly reducing surface roughness and laying the foundation for subsequent vacuum heating and ion bombardment. Subsequent vacuum heating removes water vapor introduced by the BOE solution from the substrate surface, and inert gas bombardment removes oxygen-containing groups, such as -OH and -COOH, introduced by the BOE solution from the substrate surface, preventing these groups from reacting with the gaseous raw material silane during the subsequent polycrystalline silicon deposition process to generate oxygen-containing silicon clusters (macroscopically manifested as atomization on the silicon wafer surface). Re-depositing polycrystalline silicon on the treated surface can form a bright polycrystalline silicon layer.
[0025] The present invention will now be described in detail with reference to the accompanying drawings and specific embodiments.
[0026] Example 1: The substrate surface treatment steps are as follows:
[0027] (1) The substrate used in this embodiment is a bare wafer made of Si. A 1.5 μm silicon oxide layer is generated on the substrate surface by thermal oxidation process. The thermal oxidation temperature is 1100℃ and the time is 3.5h.
[0028] (2) The substrate was wet-etched with 80% BOE solution for 25 min to remove the silicon oxide layer;
[0029] (3) The substrate obtained in step (2) is sent into the ICP CVD device, vacuumed, heated and degassed on the surface at a temperature of 140°C for 3 minutes.
[0030] (4) Perform ion bombardment treatment with a source power of 400W, a bias power of 60W, an argon flow rate of 40sccm, and a treatment time of 5min.
[0031] (5) A polycrystalline silicon thin film is deposited on the substrate surface obtained in step (3) by chemical vapor deposition technology, with a silane flow rate of 80 sccm, a temperature of 580℃, and a pressure of 220 mT.
[0032] The sample obtained in step (5) was characterized by optical microscopy and SEM. The surface state of the sample is as follows: Figure 3 As shown, the surface of the polycrystalline silicon thin film is bright and free of fogging particles.
[0033] Example 2: This example is similar to Example 1, except that the source power used during ion bombardment was 580 W, the bias power was 100 W, the argon flow rate was 100 sccm, and the treatment time was 3 min. The resulting sample had a bright surface and no atomized particles.
[0034] Example 3: This example is similar to Example 1, except that the source power used during ion bombardment was 320W, the bias power was 40W, the argon flow rate was 30 sccm, and the treatment time was 8 minutes. The resulting sample had a bright surface and no atomized particles.
[0035] Example 4: This example is similar to Example 1, except that in step (4), the silane flow rate is 50 sccm, the temperature is 580℃, and the pressure is 100 mT. The resulting sample has a bright surface and no atomized particles.
[0036] Example 5: This example is similar to Example 1, except that in step (4), the silane flow rate is 100 sccm, the temperature is 600℃, and the pressure is 300 mT. The resulting sample has a bright surface and no atomized particles.
[0037] Example 6: This example is similar to Example 4, except that in step (1), the thermal oxidation temperature is 1100℃, the duration is 2h, and the silicon oxide layer thickness is 1μm. In step (2), the substrate is etched with 80% BOE solution for 15min to remove the silicon oxide layer. The resulting sample has a bright surface and no atomized particles.
[0038] Example 7: This example is similar to Example 5, except that in step (1), the thermal oxidation temperature is 1100℃, the duration is 5h, and the silicon oxide layer thickness is 2μm. In step (2), the substrate is etched with 80% BOE solution for 35min to remove the silicon oxide layer. The resulting sample has a bright surface and no atomized particles.
[0039] Comparative Example 1 This comparative example is similar to Example 1, except that steps (3) and (4) are omitted. Figure 2 The image shows the characterization of the sample prepared for this comparative example. The polycrystalline silicon layer is mottled and exhibits a fogging phenomenon.
[0040] Comparative Example 2: This comparative example is similar to Example 6, except that in step (3), the surface degassing temperature is 100°C and the time is 2 min; in step (4), the source power is 200 W, the bias power is 40 W, the argon flow rate is 20 sccm, and the processing time is 1 min. The sample prepared in this comparative example shows uneven atomization, which may be due to incomplete removal of surface water vapor and oxygen-containing groups.
[0041] Comparative Example 3: This comparative example is similar to Comparative Example 2, except that the ion bombardment treatment time in step (3) is extended to 10 min. The sample prepared in this comparative example still shows uneven atomization, indicating that a bright sample cannot be obtained when the ion bombardment energy is too low.
[0042] Comparative Example 4: This comparative example is similar to Example 7, except that in step (3), the surface degassing temperature is 200°C and the time is 5 min; in step (4), the source power is 600 W, the bias power is 80 W, the argon flow rate is 60 sccm, and the processing time is 8 min. In this comparative example, the excessively high ion processing power makes the substrate surface rough after processing, which subsequently increases the dielectric insertion loss.
[0043] Comparative Example 5: This comparative example is similar to Example 1, except that steps (1) and (2) are replaced with RCA cleaning. The steps are as follows: The substrate is first cleaned with a solution of H2SO4:H2O2:H2O in a volume ratio of 5:1:1 for 15 min, and then cleaned with a solution of NH4OH:H2O2:H2O in a volume ratio of 1:1:5 for 15 min. In the sample prepared in this comparative example, the polycrystalline silicon layer shows a hazy appearance under a microscope. The reason why a bright surface cannot be obtained by using RCA cleaning followed by ion bombardment is that RCA cleaning focuses on removing organic matter, metal ions, and particles, and cannot actively improve the surface morphology.
Claims
1. A substrate surface treatment method, characterized in that, Includes the following steps: (1) Provide a silicon-containing substrate and form a silicon oxide layer on the substrate surface using a thermal oxidation process; (2) Remove the silicon oxide layer by etching with BOE solution; (3) The substrate is placed in a vacuum environment and heated to remove residual moisture from the substrate surface; (4) The substrate obtained in step (3) is treated with an ionizer formed by an inert gas.
2. The substrate surface treatment method according to claim 1, characterized in that, The substrate is a silicon substrate or an SOI wafer.
3. The substrate surface treatment method according to claim 1, characterized in that, In step (1), the thickness of the silicon oxide layer is 0.3~2μm.
4. The substrate surface treatment method according to claim 1, characterized in that, In step (2), a 30%~80% BOE solution is used, and the corrosion duration is 10~35 min.
5. The substrate surface treatment method according to claim 1, characterized in that, In step (3), the heating temperature is 100℃~300℃ and the duration is 1min~10min.
6. The substrate surface treatment method according to claim 1, characterized in that, In step (4), the inert gas is at least one of nitrogen, helium, neon, argon, krypton, xenon, and radon.
7. The substrate surface treatment method according to claim 1, characterized in that, In step (4), the inert gas flow rate is 10~100 sccm, the plasma source power is 100~800W, and the bias power is 10~100W.
8. The substrate surface treatment method according to claim 7, characterized in that, In step (4), the inert gas flow rate is 30~50 sccm, the plasma source power is 320~570W, and the bias power is 50~70W.
9. The substrate surface treatment method according to claim 7, characterized in that, In step (4), the plasma treatment lasts for 3 to 10 minutes.
10. A method for depositing polycrystalline silicon, characterized in that, The substrate includes a substrate treated by any one of the substrate surface treatment methods according to claims 1 to 9, wherein a polycrystalline silicon layer is deposited on the substrate surface, and the deposition parameters are silane flow rate of 10~100 sccm, temperature of 500~700℃, and pressure of 100~500 mTorr.