Memristive quantum random number generator

Abstract

An apparatus for generating a random number, the apparatus comprising one or more bitstream generators, where each bitstream generator comprises: a memristor; a pulse generator configured to: generate a plurality of pulses and apply the plurality of pulses through the memristor to generate an output comprising a plurality of output pulses; and a comparison device configured to compare a first sample of the pulse output with a second sample of the pulse output, and output information indicating randomly generated bits in the random bit stream based on the first comparison.

Description

Technical Field

[0001] This disclosure relates to random number generation, and more particularly to systems and methods for generating random numbers using one or more bitstream generators (each bitstream generator including a memristor). Background Technology

[0002] Random number generation methods provide random numbers that are advantageous in applications such as machine learning, statistical sampling, computer simulation, cryptography, security, financial services, and video games. Applications that benefit from random number generation are typically those that require unpredictable results.

[0003] Currently, systems for generating random numbers can be divided into two categories: deterministic random number generators and non-deterministic random number generators. Pseudorandom number generators (PRNGs) are deterministic, while true random number generators (TRNGs) are non-deterministic. Random numbers generated using PRNGs are not truly random because they are generated from an initial "seed" value through the algorithm's output. On the other hand, random numbers generated using TRNGs are truly random because this method uses physical processes or hardware to generate random numbers from noisy signals. Generating truly random numbers is advantageous for a wide range of applications. However, existing methods are difficult to scale due to circuit complexity or reliance on post-processing to eliminate biases in the generated bits.

[0004] Typically, current-generating devices, including counters and other digital timing devices, can be quite large, increasing manufacturing complexity. These methods are suboptimal because they fail over time and require excessive costs. While uncommon, some known techniques for generating random numbers may utilize memristors. These known techniques extract randomness from memristors by using an intrusive input signal (e.g., a high-voltage scan) to determine if the memristor is switching states due to the input signal. This approach limits potential memristor applications and may reduce the reliability of the memristor over time, causing it to fail after multiple cycles. Other known examples of random number generators rely on nanoscale memristors that are fabricated to exhibit exaggerated diffusion behavior. This again limits potential memristor applications due to several drawbacks, such as in memory storage applications.

[0005] In summary, existing random number generation techniques either suffer from a significant decrease in reliability over time, involve complex circuitry, or require post-processing methods to eliminate biases in the generated bits.

[0006] The present invention aims to address these and other drawbacks encountered in the prior art by providing an improved system and method for generating random numbers using one or more bitstream generators. Summary of the Invention

[0007] According to one aspect, a random number generator for generating random numbers is provided, the random number generator comprising one or more bitstream generators, wherein each bitstream generator includes a memristor; a pulse generator configured to generate pulses and apply at least a first pulse and a second pulse to the memristor; a passive element configured and positioned to store a first analog signal based on the first pulse; and a comparator configured and positioned to compare the first analog signal with a second analog signal based on the second pulse and output information indicating randomly generated bits in the random bitstream.

[0008] The disclosed methods and systems can convert analog signals into corresponding random binary sequences for generating random numbers by leveraging the stochastic properties of nanoscale devices such as memristors, without exhibiting significant diffusion characteristics. Memristors can be used to efficiently implement key building blocks for random computing applications. Such methods and systems offer advantages in multi-bit memory applications, cryptography, dithering, image processing, and machine learning. Attached Figure Description

[0009] Specific embodiments will now be described by way of example only, with reference to the accompanying drawings, in which:

[0010] Figure 1A This is an example circuit diagram for generating random numbers using a memristor, for use on a printed circuit board (PCB) or integrated circuit (IC).

[0011] Figure 1B This is an example diagram showing the response of a memristor to multiple stress pulses and sensing pulses applied to it.

[0012] Figure 2A This is an example diagram of the sensing pulse and stress pulse applied to the memristor.

[0013] Figure 2B yes Figure 2A An enlarged version of the example diagram.

[0014] Figure 3 This is an example processing diagram for generating random numbers using a memristor.

[0015] Figure 4 This is an example block diagram for generating random numbers using a memristor.

[0016] Figure 5 This is an example flowchart of a method for generating random numbers using a memristor.

[0017] Figure 6 This is a system-level example view of the device and method, in which the memristor distribution generator (MDG) is capable of Monte Carlo sampling of the desired distribution.

[0018] Figure 7 This is an example diagram of the measurement input and output of a feedback circuit, such as... Figure 1A As shown, this occurred during an application in which 250k pulses were applied to the memristor.

[0019] Figure 8 These are the decoration outputs under three different parameters. Example diagram of the distribution.

[0020] Figure 9 An example histogram (AD) of a 1D regression is shown, where 250K hardware-generated samples result in a set of secondary priority tests ( Figure 9 A and Figure 9 C), after tuning, yields an optimized set of priors ( Figure 9 B and Figure 9 D). Detailed Implementation

[0021] In general, but not limited thereto, this application discloses an apparatus for generating random numbers. The apparatus includes one or more bitstream generators, wherein each bitstream generator includes a memristor device, more specifically, a memristor.

[0022] A memristor is an electronic component that limits or regulates the flow of current in a circuit and remembers the amount of charge that previously flowed through it. When subjected to electrical stress, a memristor device develops defects and / or its internal physical and chemical structure is modified, thus transforming the device into a resistor. Resistors typically function by limiting or reducing the flow of current by restricting or reducing the flow of electrons, making them sensitive to any current flow. The resistance of a memristor changes when a signal is applied.

[0023] A memristor is a two-terminal device that can conduct electricity in both directions. If the higher polarity terminal of the memristor is connected to the positive terminal of an applied voltage source (i.e., applying multiple signals of the first polarity to the memristor), the conductivity increases; and if the lower polarity terminal of the memristor is connected to the positive terminal of an applied input voltage source (i.e., applying multiple signals of the second polarity, opposite to the first polarity), the conductivity decreases. Conductivity measures how easily current flows, while resistivity measures how much a material impedes the flow of current. Therefore, conductivity and resistivity are inversely proportional. Consequently, in the long run, and on average, applying a signal of the first polarity to a memristor will increase its resistance, while applying a signal of the second polarity (opposite polarity) will decrease its resistance. However, on shorter timescales, such as 1 microsecond to 100 microseconds or even shorter timescales (i.e., on the order of nanoseconds or microseconds), the resistance changes of a memristor are unpredictable and unreproducible. A short timescale refers to a timescale much smaller than the rate at which multiple pulses are applied to a memristor. After a short period of time, the resistance of the memristor may increase or decrease unpredictably.

[0024] The non-repeatability of memristor responses has long been considered a drawback and an obstacle in many applications. However, the inventors have developed a method to utilize this non-repeatability to generate truly random numbers. Computers use limited memory to represent real numbers, which is equivalent to values ​​with a fixed number of decimal places. Generally, most represented values ​​approximate the closest real number that can be represented within memory constraints. The distance between the actual real number and its representation can be called precision, usually measured in bits. This method can average values ​​with arbitrary precision.

[0025] In summary, at a very high level: random bits can be generated by comparing the resistance of a memristor before and shortly after a pulse is applied (i.e., the pulse response of the memristor). Comparing the pulse responses to each other leads to improvements over existing techniques: a more stable random analog signal can be generated over time, or, if an ADC is used, a more stable bit stream can be generated over time.

[0026] The disclosed device is capable of generating random bits at extremely low hardware cost and has many applications in the field, including as an efficient jitter generator to enhance analog-to-digital conversion, a data classifier for machine learning, an array jitter generator for image processing, an instant encryption key generator, and many other applications.

[0027] The random numbers generated by this device meet the testing requirements of the National Institute of Standards and Technology (NIST) for random and pseudo-random number generators used in cryptographic applications.

[0028] Switch to 1A. Figure 1A This is a circuit diagram depicting device 100 according to the present disclosure. Device 100 is suitable for and configured to generate random numbers, for example, for use in a PCB or IC. Device 100 includes a pulse generator 110, a memristor 120, a sensing device 130, a delay device 150, a comparator 140, an analog-to-digital converter (ADC) 160, a feedback loop 170, and a tuning device 180. Several components of device 100 are optional, and these components, including the ADC 160, the feedback loop 170, and the tuning device 180, will be readily apparent to those skilled in the art from the following disclosure.

[0029] Apparatus 100 includes components of a bitstream generator. The bitstream generator generates a bitstream. This disclosure may include one or more bitstream generators. Each bitstream generator may output information indicating a plurality of randomly generated bits to form a random bitstream.

[0030] Device 100 includes a pulse generator 110. The pulse generator 110 is configured to generate multiple pulses. The pulse generator 110 includes a voltage or current source 111 and a pulse switch 112. The pulse generator 110 is configured to generate multiple pulses, for example, using a voltage (Vpulse) or current (Ipulse) source 111. The multiple pulses can be voltage pulses or current pulses. The multiple pulses can be referred to as a sequence of voltage pulses or current pulses. The pulse generator 110 is configured to apply the multiple pulses through a memristor 120 to generate an output including multiple output pulses. The pulse generator 110 is also configured to apply the multiple pulses to the memristor 120 when the pulse switch 112 is closed, i.e., when the voltage or current source 111 is connected to the memristor 120 via the pulse switch 112. When the pulse switch 112 is open, i.e., when the voltage or current source 111 is not connected to the memristor 120, the pulse generator 110 does not apply voltage or current pulses to the memristor 120.

[0031] When multiple pulses are applied to memristor 120 within a short period, the resistance of memristor 120 will unpredictably increase or decrease, generating multiple output pulses. Therefore, the multiple output pulses can be considered as multiple sensing pulses. The multiple output pulses include a first sample of the pulse output and a second sample of the pulse output. The first sample and the second sample can be different. Thus, the first sample and the second sample can be regarded as sensing pulses.

[0032] To change the resistance of memristor 120, pulse generator 110 can generate large pulses or electric fields to apply electrical stress to memristor 120, altering its internal (physical and chemical) structure and / or deforming it so that memristor 120 becomes sensitive to any subsequent current or voltage flowing through it. Short pulses can be generated to relieve stress on the memristor and improve the reliability of random number generation. The pulse generator can also be configured to generate multiple stress pulses, with a stress pulse preceding each sensing pulse. The multiple stress pulses can be multiple large current or voltage (electric field) pulses. The multiple stress pulses apply a large electric field to the memristor, thereby creating stress and causing the next pulse (i.e., the multiple pulses responsible for generating multiple output pulses) to produce information indicating randomly generated bits in the random bit stream.

[0033] Multiple stress pulses are preferably narrow voltage pulses. Multiple stress pulses can also be wide voltage pulses. Multiple stress pulses can be shifted voltage pulses. Multiple stress pulses can be scaled voltage pulses. In this way, the output noise of the device can be transformed, for example, including outputs indicating information about randomly generated bits in a random bitstream. This transformation can be widening, narrowing, shifting, or scaling, i.e., controlling the amplitude of the multiple stress pulses. The transformation can also be based on the statistical characteristics of the generated multiple output pulses or output random signals, where the statistical characteristics can include at least one or more of the following: average value; offset; variance; distribution; and bias. For example, larger and wider pulses will generate a larger amplitude output random signal and will also change the relationship between the tuning voltage / capacity and the statistical characteristics of the output bitstream. Applying narrow voltage pulses leads to a better understanding of the behavior of memristor 120 and makes its behavior more reliable compared to existing methods.

[0034] Multiple pulses can be referred to as the stimulation source of memristor 120. The stimulation source can have controllable parameters, such as an adjustable voltage source or an adjustable current source. Pulse switch 112 can be referred to as a device for applying stimulation to memristor 120. Pulse generator 110 can allow control over the pulse sequence characteristics of the multiple pulses. This is because pulse generator 110 can be configured to switch pulse switch 112. For example, longer pulses may cause pulse switch 112 to be closed for a longer period of time. Shorter pulses may cause pulse switch 112 to be closed for a shorter period of time. Larger amplitudes of multiple pulses may be due to a larger voltage (Vpulse) source 111. Smaller amplitudes of multiple pulses may be due to a smaller voltage (Vpulse) source 111. Furthermore, the switching rate of pulse switch 112 can be set to the time between multiple stress pulses and multiple sensing pulses. The pulse sequence characteristics may be one or more of the following: the pulse amplitude of multiple stress pulses and / or multiple sensing pulses; the relative amplitude between multiple stress pulses and multiple sensing pulses; the relative position of multiple stress pulses and multiple sensing pulses spaced apart between multiple stress pulses and multiple sensing pulses; the polarity of multiple stress pulses and / or multiple sensing pulses; the duration of multiple stress pulses and / or multiple sensing pulses; the (average) frequency of multiple stress pulses and / or multiple sensing pulses; the bandwidth of multiple stress pulses and / or multiple sensing pulses; the shape of multiple stress pulses and / or multiple sensing pulses; and the duty cycle (i.e., the integral or low-pass filter output).

[0035] Device 100 includes memristor 120. Memristor 120 is a nanoscale device and may be referred to as a nonlinear two-terminal electronic element relating charge and magnetic flux, a nanolayer of metal oxide (e.g., Al, Ti, Sr, Hf), multiple or a series of metal oxide layers between two conductors, a solid-state microscale device, a solid-state nanoscale device, an oxide memristor, a phase-change resistor, a spintronic logic gate, a ferromagnetic gate, a ferroelectric gate, a single quantum dot, or multiple quantum dots.

[0036] The resistance of memristor 120 depends on the charge flowing through it, i.e., the stimulus. Memristor 120 does not store energy, but it generates a random response based on the charge flowing through it. The random response generated by memristor 120 exhibits long-term and short-term plasticity. Plasticity can be described as the ability of a solid material to undergo permanent deformation, i.e., the ability of memristor 120 to undergo permanent deformation.

[0037] When subjected to electrical stress, such as a large pulse or electric field from pulse generator 110, the internal (physical and chemical) structure of memristor 120 changes and / or deforms, making it sensitive to any subsequent current or voltage. Therefore, when multiple pulses are applied to memristor 120, its resistance changes, generating a random response, i.e., multiple output pulses. Over a long period, if a signal or charge of one polarity is applied, the resistance of memristor 120 increases; if a signal or charge of the opposite polarity is applied, the resistance decreases. The change in resistance after multiple pulses have been applied over a short period is unpredictable and non-repeatable, so the resistance of memristor 120 may increase or decrease. The random response (e.g., random bits) can be extracted by comparing the resistance of memristor 120 before and shortly after a charge or pulse flows through it.

[0038] Multiple pulses can include large, controllable pulses to transform the output noise. The output noise may be wider or narrower, shifted left or right, or scaled proportionally. The transformation can also be based on the statistical properties of the generated multiple output pulses or the output random signal, where the statistical properties may include at least one or more of the following: average; offset; variance; distribution; and bias. For example, larger and wider pulses will produce a larger amplitude output random signal and will also change the relationship between the tuning voltage / capability and the statistical properties of the output bitstream.

[0039] As previously described, memristor 120 generates a random response to multiple pulses applied to pulse generator 110. The multiple output pulses can be based on the response of the memristor as multiple pulses are applied. The response can be current or voltage. The multiple output pulses can be voltage signals or current signals. Because the random response of memristor 120 is slightly different each time one or more pulses are applied by pulse generator 110, the device can extract truly random numbers from memristor 120 using, for example, sensing device 130.

[0040] Each bitstream generator can include only one memristor 120. This is advantageous because using a single memristor 120 results in a more reliable and simpler circuit. Using two or more memristors in series may not work reliably and increases circuit complexity.

[0041] The device 100 includes a sensing device 130. Figure 1AThe sensing device 130 includes a sensing resistor 131. In other embodiments, the sensing device 130 may include, but is not limited to, a current-to-voltage converter, a resistor, a transistor, or a metal-oxide-semiconductor field-effect transistor (MOSFET). Each bitstream generator may also include a sensing resistor 131 configured to detect a change in current in the memristor 120 as a voltage. The sensing device 130 is configured to extract a random response, i.e., a stimulus, from the memristor 120 caused by a plurality of pulses applied by the pulse generator 110. The random response of the sensing device 130 may be a voltage, current, or other measurable device characteristic. The change in current or voltage across the memristor 120, or the random response of the memristor 120, is detected by the sensing device 130 as a voltage, current, or other measurable device characteristic. Figure 1A In the sensor 130, the sensing device 130 includes a sensing resistor 131, so the random response of the memristor 120 is detected as current by the sensing resistor 131.

[0042] Apparatus 100 includes a comparison device 140. The comparison device 140 may include a comparator 141. The comparison device 140 may include a clock comparator. The comparison device 140 is capable of comparing a stable random signal with an adjustable or controllable threshold via the comparator 141. The comparison device 140 is configured to compare a first sample of pulse outputs with a second sample of pulse outputs and to indicate information about randomly generated bits in a random bit stream based on the first comparison output. The first sample may include a plurality of sampled output pulses. Comparing the pulse responses of the first and second samples to each other results in an improvement over the prior art: a more stable random analog signal over time can be generated, or, if an ADC is used, a more stable bit stream over time can be generated.

[0043] This apparatus and method have advantages because they suppress the natural drift of memristor characteristics, which makes it difficult to generate bits using existing techniques. The comparison device 140 may be further configured to: compare information indicating randomly generated bits in the random bit stream with a comparison threshold or an input threshold; and indicate tuning information (or tuning distribution) of the randomly generated bits in the random bit stream based on a second comparison output. The information indicating randomly generated bits in the random bit stream is tuned because it has been compared with the comparison threshold or the input threshold.

[0044] Comparator 141 can be an analog voltage-mode comparator or an analog current-mode comparator. An adjustable threshold can be introduced with more 1s or 0s to information indicating randomly generated bits in a random bit stream using a comparison operation (or, for example, using a comparator). In this way, the randomness of the bit stream can be tuned.

[0045] Device 100 includes a delay device 150. The delay device 150 includes a delay switch 151, a passive element 152, and a comparator 141. The passive element may include at least one of the following: a capacitor; or an inductor. The passive element 152 may be described as a delay capacitor 152. The passive element 152 may be configured and positioned to generate a second sample by storing a plurality of sampled output pulses, thereby introducing a delay. The delay device 150 may be configured to perform analog polyphase filtering, such as differentiation, on the random response of the sensing device 130. The delay device 150 may include an analog polyphase filter. The analog polyphase filter may include a differentiating device. The delay device 150 may be configured to compare a first sample of a plurality of pulses with a second sample of a plurality of pulses. The second sample is a delayed version of the first sample. The first sample is stored as an analog signal by the delay device 150 and is based on a first current flowing through the memristor 120 during a first time period. The second sample is an analog signal based on the delayed first sample. Each bitstream generator may further include a delay device 150 configured to generate a second sample by calculating on a plurality of sampled output pulses. Each bitstream generator may further include a delay device 150 configured to generate a second sample by introducing a delay into the plurality of sampled output pulses.

[0046] The delay device 150 may include a comparison device 140. In this manner, the comparator 141 compares the analog signal of the second sample with the stored analog signal of the first sample, and outputs information indicating randomly generated bits in the random bit stream based on the comparison. This information indicating randomly generated bits in the random bit stream can be a single bit and can be referred to as a stable random signal. At this stage, the stable random signal can be output as an analog signal from the device 100.

[0047] Because the analog signal is converted into a corresponding random binary sequence for generating random numbers using a memristor, the random characteristics of nanoscale devices (memristors) can be utilized without significant diffusion properties. This is advantageous in multi-bit memory applications.

[0048] The analog signal of each of the first and second samples can be based on the analog voltage of the current through the memristor when pulses or multiple pulses of the first and second samples are applied. When the delay device includes comparator 140, delay device 150 can be configured to subtract the second sample from the first sample. The random response of the first sample can be subtracted from the random response of the second sample. An analog delay circuit (e.g., a sample-and-hold circuit) can be used to compare the first and second samples. The sample-and-hold circuit can be described as an analog device that samples the voltage of a continuously varying analog signal and stores its value at a constant level for a specified minimum time period. The sample-and-hold circuit can store charge in a capacitor, such as delay capacitor 152. In fact, the first sample can be stored as an analog signal (or voltage) in sample-and-hold comparator 141.

[0049] The delay device 150 cancels out the drift of the random response. The drift frequency is low, therefore the analog polyphase filter can be considered a high-pass filter. In this way, frequency components of low-frequency analog signals can be eliminated.

[0050] Apparatus 100 includes an ADC 160. The ADC 160 is configured to convert an analog random signal or response or (tuned) information indicating randomly generated bits in a random bit stream into a digital random signal. The digital random signal may be referred to as a digital bit stream, a digital random bit stream, a digital bit stream output, a digital output, or a digital random signal output. The digital random signal output includes information indicating randomly generated bits in the random bit stream. This information indicating randomly generated bits in the random bit stream can be a single bit output. The ADC 160 may be a Schmitt trigger or an inverter.

[0051] Device 100 includes a feedback loop 170. Feedback loop 170 includes a feedback resistor 171, a feedback capacitor 172, and a feedback comparator 173. Feedback loop 170 can be a low-pass filter. Feedback loop 170 can low-pass filter the random bitstream output from delay device 150 and use the output of feedback loop 170 as a comparison threshold. The comparison threshold can be generated by modifying the analog or digital random output of delay device 170 and feeding it back to the circuit. The feedback loop can be configured to generate the comparison threshold by modifying tuning information indicating randomly generated bits in the random bitstream. The modified tuning information indicating randomly generated bits in the random bitstream can be fed back to delay device 150 to provide the comparison threshold.

[0052] Device 100 includes a tuning device 180. Tuning device 180 includes a tuning switch 181 and a threshold switch 182. The input to tuning switch 181 can be a (static) voltage (i.e., a user input voltage) or a random bit stream generated by integrating information indicating randomly generated bits in the random bit stream, to set the average value of the random output stream from feedback loop 170 in the closed loop. The input threshold can be based on the user input voltage. The comparison threshold can be based on the average value generated by feedback loop 170. Therefore, tuning switch 181 can select either the user input voltage or a voltage set by feedback loop 170 to route a user-provided threshold (user threshold) or feedback from a comparison threshold via feedback loop 170 (comparison threshold) to delay device 150. Threshold switch 182 either routes the input to tuning switch 181 (i.e., user threshold or comparison threshold) to ground or grounds it without tuning. Tuning parameter 180 allows tuning or setting the average value of the output random bit stream.

[0053] Each bitstream generator may also include a tuning device 180 comprising one or more analog switches configured to control one or more statistical characteristics of the random bitstream using a comparison threshold or an input threshold. The one or more statistical characteristics may include one or more of the following: average; offset; variance; distribution; and bias. This makes it possible to utilize the random characteristics of the memristor 120 (which have no obvious diffusion characteristics and are optimized for multi-bit memory applications).

[0054] Feedback loop 170 and tuning device 180 process and feed back the circuit output to help stabilize circuit characteristics. The characteristics requiring stability are the statistical characteristics of the analog or digital bitstream. Stable circuit characteristics ensure that the output remains constant in the absence of input, i.e., a definite steady state exists. At delay device 150, stabilization occurs by differentiation and by feeding back the average value of the bitstream's statistical characteristics via feedback loop 170. For example, a first level of stabilization occurs at delay device 150, where differentiation is inherently stable. A second (and further) level of stabilization can be achieved by feeding back a characteristic of the bitstream (e.g., the mean or average value) to delay device 150 via feedback device 170 and tuning device 180.

[0055] In use, device 100 can be used to generate random numbers. In use, pulse generator 110 generates multiple pulses; for example, current pulses or voltage pulses. These pulses are applied to memristor 120. For example, a first pulse is applied to memristor 120. In response to the first pulse applied to memristor 120, memristor 120 generates a first output pulse based on its response to the applied first pulse. For example, in response to a first current or voltage pulse applied to the memristor, the memristor generates a first output pulse. The first output pulse is delayed by delay device 150 to generate a second output pulse by introducing a delay to the first output pulse. The first output pulse and the second output pulse are compared by comparison device 140. The comparison device outputs information indicating randomly generated bits (analog signals) in the random bit stream. ADC 160 converts the analog signal into digital bits. When a further pulse is applied to memristor 120, ADC 160 outputs further digital bits, thus forming a digital bit stream. The digital bit stream is described as random numbers.

[0056] Device 100 has advantages over known systems. Specifically, when memristor 120 is subjected to electrical stress from multiple pulses, defects develop in it, altering its internal resistance. In this way, the internal physical and chemical structure of the memristor is modified, thus transforming the device into a resistor. Resistors are sensitive to any subsequent current flowing through them. Therefore, the resistance of memristor 120 will increase or decrease. Random bits can be generated by comparing the resistance of memristor 120 before and shortly after the pulse.

[0057] The non-repeatability of the random response from memristor 120 has been considered a drawback in the field until now. However, this disclosure proposes a method that uses the non-repeatability of the random response as an advantage to generate truly random numbers and averages the values ​​with arbitrary precision. This makes random bit generation possible. Furthermore, the hardware cost is low; the most basic device 100 may include a monostable device or circuit, a comparator, and a memristor. A monostable device or circuit has only one stable position or state. A monostable device is defined as a device that, when driven, generates a narrow pulse of definite duration and selectable controllability.

[0058] The current bitstream generator included in the device for generating random numbers utilizes the inherent periodic variation of nanoscale memristors under constant stimulation. Furthermore, the circuit diagram 100 of this system is more hardware-efficient than existing systems because it requires only capacitors and a (clock-controlled) comparator, which can be constructed very efficiently using two inverters.

[0059] By tuning or controlling a random bitstream, current bitstream generators can be used as random neurons for random computation. Using the generated average value, analog values ​​can be encoded into probabilistic bits, where the analog value equals the time average of the random bitstream. The hardware implementation of the analog-to-digital to probabilistic bit (p-bit) converter can be accomplished using memristors.

[0060] Unlike other TRNG memristors whose output statistical characteristics cannot be controlled, the tuning device 180 in this disclosure enables the device to tune the average value of the output bitstream. The average value of the output bitstream can be set using the tuning device 180 (via Vtune). The mean or average value of the output bitstream can be approximated to the Sigmoid (Vtune), therefore the circuit is not merely a TRNG, but a random binary neuron because the analog bitstream has an adjustable mean. This ability to generate an analog bitstream with an adjustable mean is called a random binary neuron, and it is a building block of emerging random computing platforms.

[0061] In this way, the mean of the output random signal can be tuned non-linearly using Vtune. Therefore, another advantage is that the function connecting Vtune to the mean of the output bitstream is non-linear and approximates the sigmoid function. The sigmoid function is an activation function used in neuromorphic computing and machine learning.

[0062] Memristors are more reliable than those that use large voltage scanning at the input.

[0063] Feedback loop 170 offers advantages over post-processing because it regulates DC behavior. Feedback loop 170 improves the power efficiency of post-processing. The operational amplifier (or feedback comparator 173) in feedback loop 170 helps control the average value.

[0064] Random bit streams can be used as jitter noise in decision circuits.

[0065] This disclosure allows for the use of differentiation, thus requiring only two samples to determine a bit. Consequently, the apparatus and method are very fast.

[0066] In other examples, the memristor response is compared only to a fixed threshold, which may eventually lead to failure or only work with memristors exhibiting large random responses. In this disclosure, the threshold can be selected based on the memristor over time, and the difference between two samples is compared to the threshold. The difference between samples is much more stable than that between individual samples, so it can be reliably compared to the threshold. This also allows for the use of lower input voltages or lower pulses. Furthermore, the differential operation mathematically amplifies the random response of the memristor, thereby eliminating drift and amplifying the random response. This makes it possible to use memristors with large drift but exhibiting minimal random response.

[0067] A comparison device is provided, which is configured to compare a first sample of pulse output with a second sample of pulse output and to indicate information about randomly generated bits in a random bit stream based on the first comparison output. This is advantageous, especially because it suppresses the natural drift of memristor characteristics, which makes it difficult for prior art methods to generate bits.

[0068] The advantage of this disclosure is its speed. Some examples use a counting-based method, which involves integrating the response of a memristor over a fixed time period and determining whether the memristor's response is different each time. This disclosure offers differentiation, and therefore improves speed. One bit can be determined based on only two samples.

[0069] Figure 1B Figure 101 shows the response of a memristor to a series or more stress pulses and sensing pulses.

[0070] The randomness of pulse-to-pulse response in the memristor is clearly visible in the amplification section of Figure 101. Figure 1B In this context, the randomness of the response is expressed in terms of resistance (i.e., current divided by the voltage amplitude used for stress and detection).

[0071] Figure 1B The number of pulses on the x-axis ranges from 0 to 5000 (as time varies). When the resistance is equal to 25µs, the resistance ranges from 2000 ohms to 2800 ohms. The resistance is the response of the memristor, and the pulse count or number of pulses represents multiple stress pulses and sensing pulses.

[0072] The magnified portion of Figure 101 shows a graph with a resistance of 2450 to 2550 ohms between pulses 400 and 1000.

[0073] Existing techniques use a fixed threshold centered on some local random portion, for example, a threshold of 2500 ohms for a pulse from 500 to 900. If the response exceeds the threshold, the response is marked as "1"; if the response does not exceed the threshold, the response is marked as "0". Using this method, the complete memristor response (current and therefore resistance) drifts over time, which renders the use of a fixed threshold ineffective, as the resistance may eventually fall permanently below the selected threshold, resulting in a permanent 1 or 0.

[0074] like Figure 1B As shown, this disclosure compares one pulse with the next pulse, such as... Figure 2A and 2BAs shown. Therefore, the "threshold" is adaptive and derived from the pulse itself. This comparison allows for a more robust solution in the presence of drift. Mathematically, this disclosure is a high-pass filter that removes low-frequency components, i.e., drift components.

[0075] This is one method of establishing stable circuit characteristics to ensure that the output remains constant in the absence of input, i.e., a definite steady state exists. Stabilization occurs at delay device 150 by differentiation and by feeding back the average value of the bitstream statistics via feedback loop 170. (See also...) Figure 1A As shown, the first layer of stabilization occurs at the delay device 150, i.e., the differential is inherently stable. The second layer (and further) of stabilization can be achieved by feeding back a characteristic of the bitstream (e.g., mean or average value) to the delay device 150 via feedback loop 170 and tuning device 180.

[0076] Its advantages are the same as those mentioned above. Figure 1A The advantages described in the text are the same.

[0077] Go to Figure 2A and Figure 2B , Figure 2A and Figure 2B Pulse diagrams 200 and 210 depict a plurality of input pulses according to the present disclosure.

[0078] Figure 2A and Figure 2B The multiple pulses in the pulse generator 110 are current pulses. The pulse generator 110 is configured to apply multiple pulses to the memristor 120 when the pulse switch 112 is closed. When the pulse switch 112 is open, the pulse generator 110 does not apply voltage or current pulses to the memristor 120.

[0079] Figure 2A The pulse plot shows the time between 0.001 seconds and 0.01 seconds on the x-axis and the current between approximately -100 microamps and 450 microamps on the y-axis. The measurement trace shows large pulses followed by a sequence of random pulses. Each large pulse is followed by a random pulse, such as the first sample or the second sample. Referring to other plots, the large pulses are described as stress pulses, and the random pulses are described as sensing pulses or output pulses. As previously described, when subjected to electrical stress from a large pulse or electric field from the pulse generator 110, the internal structure of the memristor 120 deforms, making the memristor 120 sensitive to any subsequent current flowing through it. Therefore, when multiple pulses are applied to the memristor 120, the resistance of the memristor 120 changes, resulting in the generation of a random response. Figure 2AAs shown, when a large pulse (first stress pulse 201a, ..., third stress pulse 203a, ..., tenth stress pulse 210a, ...) for example, an electrical stress pulse of about 450 microamps is applied to the memristor, a random response, for example, a smaller pulse of about 200 microamps, is generated by measuring and comparing smaller random pulses (first sensing pulse 201b, ..., third sensing pulse 203b, ..., tenth stress pulse 210b, ...).

[0080] If the large pulse is very large, the distribution will be wider, and the height variation of the smaller pulse will also be greater.

[0081] Figure 2B yes Figure 2A A magnified version of the pulse diagram shows the time between 0.001 seconds and 0.007 seconds on the x-axis and the current between approximately 187 microamps and 238 microamps on the y-axis. From the sensing pulses (smaller pulses) 203b, ..., 210b, it can be seen that the random sequence output of the device is 1001 due to the measurement and comparison of sensing pulses 203b, ..., 210b. As described with respect to the device diagram, a delay device 150 can be configured to subtract a second sample from the first sample.

[0082] Sensing pulses and stress pulses can be considered in pairs. For example, in terms of sensing pulses, paired sensing pulses are the first and second sensing pulses, the third and fourth sensing pulses, the fifth and sixth sensing pulses, the seventh and eighth sensing pulses, and the ninth and tenth sensing pulses. If the first pulse in a pair is less than the second pulse in the pair, then a 1 is assigned to that bit. Otherwise, a 0 is assigned. Figure 2B As shown, the first pair (the third and fourth sensing pulses) is 1, and the fourth pair (the ninth and tenth sensing pulses) is 1. The other two pairs are 0 because the first pulse in each pair is not less than the second pulse in that pair. This is an arbitrary definition and can also be understood in reverse.

[0083] Generally, if we consider paired sensing pulses, the value is 1 if the first sensing pulse is less than the second. In all other cases, it is 0. As an example, when using a general analog polyphase filter and delay, bits can be generated by considering several other combinations of sensing pulses.

[0084] Choosing "1" or "0" can be understood as subtracting P(N+1)-P(N) from N, and if > 0, then it is "1". Otherwise, it is "0" for each pair.

[0085] If multiple stress pulses are input in different ways, the output noise of the device (e.g., including outputs that indicate information about randomly generated bits in a random bit stream) may be altered. Figure 2A and Figure 2B The multiple stress pulses in the circuit are narrow voltage pulses. Compared to existing methods, applying narrow voltage pulses leads to a better understanding of the memristor 120 and makes its behavior more reliable. Furthermore, mainstream memristor integrated circuits all contain hardware that applies pulses to the memristor and reads the memristor's response to these pulses, where the memristor is used as a storage device.

[0086] Generating multiple stress pulses and sensing pulses is straightforward because, in simple embodiments, only switching is required. Using this device and method is less invasive and destructive than generating a large number of continuous inputs because the multiple stress pulses and sensing pulses of this disclosure require fewer inputs. Due to the characteristics of the pulses and the random response from the memristor that does not exhibit obvious randomness, using multiple stress pulses and sensing pulses allows for very rapid numerical generation. For example, some applications rely on memristor TRNGs, which spontaneously generate random noise without requiring pulse input to the memristor.

[0087] In this disclosure, a wide range of memristors can be used because the method and apparatus are applicable to a large number of memristors, for example, diffused memristors and non-diffused memristors can be used.

[0088] Typically, the input pulse is narrow to prevent the memristor's resistance from saturating to its extreme low-resistance and high-resistance states. A lower voltage pulse is used to read the resistance state to minimize the impact of the read operation on the resistance state. However, since memristors require unpredictable states, the width and amplitude of the input pulse are not critical.

[0089] Figure 3 This is a simplified schematic diagram depicting device 300. Device 300 may be a bitstream generator. Figure 1A This is a specific example of the apparatus 100 according to the present disclosure, and Figure 3 This is a more general example of such a device. In other words, Figure 1A The device depicted in the middle can be seen as Figure 3 A specific example of the device 300 depicted in the image.

[0090] According to this disclosure, apparatus 300 is suitable for generating random numbers. Apparatus 300 includes: an input sample stream obtained from a plurality of pulses 310; apparatus 320 for dividing the input sample stream into a first sample stream and a second sample stream via logic circuitry, the apparatus 320 being capable of and configured to generate a first series of pulses 330 based on the first sample stream and a second series of pulses 331 based on the second sample stream; apparatus 340 for calculating and delaying the second series of pulses, the apparatus 340 being capable of and configured to generate a delayed second series of pulses based on the second series of pulses 331; apparatus 350 for subtracting the first series of pulses 330 from the delayed second series of pulses, the apparatus 350 being capable of and configured to output an output 360 including information indicating randomly generated bits in a random bit stream; and a comparison apparatus 370 composed of apparatus 350, the apparatus 370 being capable of and configured to compare the information indicating randomly generated bits in a random bit stream with a threshold 371, the threshold 371, and the output.

[0091] Several components of device 300 are optional, and those skilled in the art will clearly understand these components from the following disclosure, including threshold 371. Device 300 may additionally include feedback. When threshold 371 is a comparison threshold, feedback helps generate the comparison threshold by modifying and feeding back the feedback output 360. Threshold 371 may also be an input threshold.

[0092] Due to the sample stream obtained from multiple pulses 310 and Figure 1A This relates to the pulse generator 110. At this stage, multiple pulses are generated, and this is referred to as the (pulse) sample stream.

[0093] The device 320, which divides the sample stream into a first sample stream and a second sample stream via logic circuitry, can, for example... Figure 1A The pulse generator 110 is used for this purpose. When comparing a first sample (stream) with a second sample (stream), based on a first series of pulses 330 and a second series of pulses 331 respectively, the first sample stream and the second sample stream can be used. The first sample and the second sample can be separated using logic circuitry instead of pulse switch 112.

[0094] A device 340 for calculating and delaying a second series of pulses to generate a delayed second series of pulses based on the second series of pulses 331, for example, may be a device 340 for calculating and delaying a second series of pulses to generate a delayed second series of pulses based on the second series of pulses 331. Figure 1A The delay device 150 in the middle is used. In this way, the second series of pulses 331 can be calculated to delay the second series of pulses 331, and the first series of pulses 331 can be compared with the delayed second series of pulses.

[0095] The device 350 that subtracts the first series of pulses from the delayed second series of pulses can, for example, be generated by the delay device 150 using a (stable) random signal or a random series of pulses. The device 350 that subtracts the first series of pulses from the delayed second series of pulses can output... Figure 1A It has the function of simulating random signals.

[0096] The comparison device 370 and the threshold 371, for example, can be determined by... Figure 1A The comparison device 140, feedback loop 170, and tuning device 180 are used for this purpose. The comparison device 370 and threshold 371 can compare a random signal or series of pulses with an adjustable or controllable threshold via a comparator. In this way, the random characteristics of the bit stream can be tuned. This allows the average value of the output random bits to be tuned or set.

[0097] For example, the output 360 can be generated by Figure 1A The ADC 160 in the system performs the operation and outputs random bits or bit streams digitally.

[0098] Those skilled in the art will understand that Figure 3 The hardware and functions described can be implemented in a variety of ways. Figure 1A An example of such an implementation is described.

[0099] Its advantages are the same as those mentioned above. Figure 1A The advantages described in the text are the same.

[0100] Go to Figure 4 , Figure 4 This is a block diagram depicting an apparatus 400 for generating random numbers using a memristor according to the present disclosure. The block diagram includes annotations explaining the function of each depicted hardware component to facilitate understanding. The depicted apparatus 400 is specifically designed for generating random numbers for a PCB or IC, and block diagram 400 includes elements that can be used to generate random numbers on a PCB or IC. These elements are related to… Figure 1A The components are related and will be described accordingly. Figure 4 The arrows in the diagram depict the information flow within hardware 400.

[0101] Block diagram 400 includes: an excitation source 410 with controllable parameters (e.g., an adjustable voltage or current source); means 411 for applying the excitation to a nanoscale device (e.g., a switch for generating pulses); a nanoscale device 420 (e.g., a metal-oxide-semiconductor memristor, a spintronic device, a ferroelectric device, a magnetic device, etc.); means 430 for extracting the generated random response (e.g., a resistor, a MOSFET-based IV converter for converting random current into random voltage for voltage-mode processing); and means 440 for differentiating the random response or for offsetting deviations in the extracted response (e.g., subtracting the random response from its delayed version, which uses analog memory / The device includes: a delay circuit (e.g., a capacitor sample / hold circuit, an analog filter, etc.) for generating the comparison threshold; a device 450 (e.g., an analog voltage-mode comparator or an analog current-mode comparator) for comparing the differentiated random response with a controllable threshold; a device 460 (e.g., a Schmitt trigger, an inverter, etc.) for converting the analog random response into a digital bitstream output; a device 470 (e.g., low-pass filtering the digital random bitstream and using the output as the comparison threshold) for generating the comparison threshold by modifying and feeding back the analog / digital random output of the circuit itself; and a device 480 (e.g., a switching network that routes the comparison threshold derived from feedback or a user-provided threshold).

[0102] The stimulus source 410 and the device 411 for applying the stimulus can, for example, be made by Figure 1A The pulse generator 110 in the middle is used. The nanoscale device 420 and... Figure 1A The memristor 120 in the middle is related. The device 430 for extracting the generated random response can, for example, be made by... Figure 1A The sensing device 130 in the middle performs the differentiation. The device 440 for differentiation can, for example, be made by... Figure 1A The delay device 150 in the middle is used for differentiation. The analog random signal 441 can be output from the device 440 for differentiation. The device 450 for comparison can be, for example, by... Figure 1A The comparison device 140 performs the conversion. The device 460 for conversion can, for example, be made by... Figure 1A The conversion is performed by the ADC 160. A digital random bitstream 461 can be output from the conversion device 460 for conversion. Feedback 462 can be sent from the output of device 460 to device 470 to generate a comparison threshold. Device 470 for generating the comparison threshold can, for example, be... Figure 1A The feedback loop 170 performs this. The device 480 for selecting the comparison threshold can, for example, be... Figure 1A The tuning device 180 in the middle is used.

[0103] Several components of the apparatus 400 are optional, and those skilled in the art will clearly understand these components from the following disclosure, including a digital random bit stream 461, feedback 462, and means 460 for conversion, means 470 for generating a comparison threshold, and means 480 for selecting a comparison threshold.

[0104] The stimulus source 410 and the comparison device 450 can be equivalent to the device that changes the statistical properties of the generated random signal.

[0105] The means 470 for generating the comparison threshold and the means 480 for selecting the comparison threshold can be equivalent to the means for processing and feeding back the circuit output to stabilize its characteristics.

[0106] Its advantages are the same as those mentioned above. Figure 1A The advantages described in the text are the same.

[0107] Go to Figure 5 , Figure 5 This is a flowchart depicting a method 500 for generating random numbers according to the present disclosure. The method is applicable, for example, to devices 100, 300, and 400.

[0108] In step 510, the pulse generator generates multiple pulses. For example, the pulse generator uses a voltage source or a current source to generate multiple pulses. These multiple pulses can be referred to as the stimulation source for the memristor. For example, refer to... Figure 1A The pulse generator 110 can generate these pulses.

[0109] In step 520, multiple pulses are applied to the memristor. The applied pulses are also called stimuli.

[0110] In step 530, the memristor generates an output comprising multiple output pulses. For example, a random response (e.g., random bits) can be extracted by comparing the resistance of the memristor before and shortly after a stimulus flows through it. The resistance of the memristor depends on the charge flowing through it, i.e., the stimulus. The multiple output pulses can be based on the response of the memristor through which multiple pulses are applied. The response of the memristor can be a voltage. The method may also include detecting a change in the memristor current as a voltage using a detection resistor.

[0111] In step 540, the comparison device compares a first sample of the pulse output with a second sample of the pulse output. For example, the analog signal of the second sample is compared with the analog signal of the stored first sample by a comparator. The first sample may include a plurality of sampled output pulses. The method may also include generating the second sample by introducing a delay into the plurality of sampled output pulses using a delay device. The method may also include generating the second sample by performing calculations on the plurality of sampled output pulses using a delay device. The method may also include storing the plurality of sampled output pulses to generate the second sample using a delay device and introducing a delay into the plurality of sampled output pulses. The delay device may include at least one or more of the following: a comparison device; an analog polyphase filter or differentiating device; and a passive element. The passive element may be a capacitor. When the delay device includes a comparison device, the method further includes subtracting the second sample from the first sample using the delay device.

[0112] In step 550, the comparison device outputs information indicating randomly generated bits in a random bit stream based on the comparison. For example, the comparator outputs information indicating randomly generated bits in a random bit stream based on a first comparison. The information indicating randomly generated bits in a random bit stream can be a single bit or a bit stream, and can be referred to as a stable random signal. The method may further include: comparing the information indicating randomly generated bits in a random bit stream with a comparison threshold by the comparison device; and outputting tuning information indicating randomly generated bits in a random bit stream based on a second comparison by the comparison device. The comparison device includes a clock comparator. The method may further include generating the comparison threshold by modifying the tuning information indicating randomly generated bits in a random bit stream via a feedback loop.

[0113] The method may also include controlling one or more statistical properties of the random bitstream using a comparison threshold or an input threshold via one or more analog switches. The one or more statistical properties may include at least one or more of the following: mean; offset; variance; distribution; and bias.

[0114] Optionally, when the comparator outputs information indicating randomly generated bits in the random bit stream (i.e., an analog signal), the method may further include converting the analog signal into digital bits. When a further pulse is applied to the memristor 120, the ADC 160 outputs further digital bits, forming a digital bit stream (or random bit stream). The digital bit stream is described as random numbers. The random numbers can be a random bit stream of selected length.

[0115] Its advantages are the same as those mentioned above. Figure 1A The advantages described in the text are the same.

[0116] It should be understood that the above description of specific embodiments is merely illustrative and is not intended to limit the scope of this disclosure. Many modifications to the described embodiments are conceivable, some of which are now described, and all of these modifications are intended to be within the scope of this disclosure.

[0117] For example, while most of the devices described above and depicted in the figures include a single comparator, it should be understood that the comparison devices described herein may include two or more comparators. Multilevel (e.g., ternary, quaternary, etc.) logic circuits can be implemented using two or more comparators.

[0118] For example, while most of the devices described above and depicted in the figures include a single bitstream generator, it should be understood that the devices described herein may include multiple bitstream generators, wherein each of the multiple bitstream generators is connected together.

[0119] This system can be described from a cryptographic perspective. The following applications arise from the ability to tune statistical properties, where the control / tuning power remains at a fixed value. This allows the system to be viewed as a digital source of hardware randomness. Numerous applications can be considered in classical cryptography and decentralized cryptography in Web3. Some examples could include: secure key generation for classical cryptographic algorithms, hardware ID generation for e-wallets (e.g., Ledger devices), efficient generation of random test vectors for probabilistic interactive proof networks in decentralized cryptography, zero-knowledge proofs, seed generation for digital PRNGs, hardware-supported verifiable random function services for Web3.0, instantaneous cryptographic key generators, and physically unclonable functions.

[0120] This system can be described from the perspective of jitter and control. The following applications arise from the ability to tune statistical characteristics, where the control / tuning capability is kept at a fixed value. This allows the system to be viewed as hardware that generates random analog signals. Some examples may include: control of circuits (e.g., amplifiers, power electronics, and ADCs), modulation amplifiers and analog-to-digital converters (Sigma Delta), jitter generators for enhancing ADCs, array jitter generators for image processing, and jitter in power electronic control loops.

[0121] This system can be described from the perspective of machine learning and AI. The following applications arise from the ability to tune the statistical properties of random outputs (such as mean and variance) and revolve around the ability of the current system to form networks. This system can form networks because the output of one unit can be connected to the input of neighboring units to build machine learning systems in hardware. Some examples may include: Bayesian belief networks, Hopfield networks, reservoir computing platforms, inverse problem solvers, Boltzmann machines, Ising machines, random computation, quantum simulation, random binary neurons, hardware simulation optimizers, simulated annealing, data classifiers for machine learning, and adiabatic computation.

[0122] Some of the disclosed methods and systems can be implemented using machine learning and AI. Specifically, as mentioned above... Figure 4 The analog random signal 441 output from device 440 for differentiation can be used for AI computation. In such a system, the device can generate an adjustable distribution in hardware for Bayesian inference and Monte Carlo sampling. Therefore, information indicating randomly generated bits in the random bit stream is used for Bayesian inference and Monte Carlo sampling.

[0123] The randomness of a memristor can be described from several perspectives: as a random distribution applied to a threshold voltage to model random IV scans, as random telegraph noise under a constant read pulse, as the conductance distribution under repeated set / reset, or as inter-pulse variation under constant pulse excitation.

[0124] In fact, when the randomness of a memristor is described as inter-pulse variation under constant impulse stimulation, it usually refers to the memristor response, which is highly applicable on the shortest timescale. In this domain, random behavior can be modeled as an absorbing Markov chain that eventually reaches some equilibrium distribution of conductance states. A Markov chain can be described as a stochastic model that describes a sequence of possible events, where the probability of each event depends only on the state reached by the previous event. Therefore, a memristor under constant impulse stimulation can be considered to generate random samples from some unknown distribution, as described from the beginning.

[0125] Storing model parameters in the conductance of a memristor array is an energy-efficient and area-saving approach, paving the way for upcoming computational paradigms. However, the variability of memristors (from one read cycle to another) introduces uncertainty into the parameters that would otherwise be represented by conductance, making this challenging. If the stored parameters have a certain inherent distribution and uncertainty, it is conceivable to tune the conductance distribution of the memristor to reflect the distribution of the parameters. By aligning the conductance distribution associated with the memristor conductance with the parameter distribution associated with the described parameters, variations in memristor conductance act as a natural representation of the potential uncertainty in the parameters and are no longer considered a source of error.

[0126] Precisely tuning a memristor to the desired conductance distribution is difficult due to the coupling of the tuning moment distribution. However, in this application, this is possible because the device uses a memristor and leverages the periodic conductance variation of the memristor to create a stable distribution with adjustable mean and standard deviation. In some implementations, the distributions do not perfectly match the expected complex parameter distribution, and therefore they are used as adjustable proposed distributions for adaptive Monte Carlo sampling of the expected parameter distribution. This can be achieved... Figure 6 I saw it in the middle.

[0127] This device is based on the periodic variability of memristor 120, which is observed as a random change in the current read at a sensing device (e.g., sensing device 130) when a pulse (e.g., from pulse generator 110) is applied (read), wherein the noise distribution is handled by analog circuitry (e.g., device 100) consisting of a sample-and-hold differentiator (e.g., delay device 150), a comparator (e.g., comparator 140), and feedback circuitry (e.g., feedback loop 170 and / or tuning device 180). In this example, the sense resistor detects the change in the memristor current as a voltage. The analog circuitry stabilizes the noise distribution of the read current by eliminating or preventing slow low-frequency drift components and by amplifying high-frequency broadband noise. Figure 6 In this context, the circuit 600 based on the described device can be implemented in the digital domain (i.e., by using an ADC (e.g., ADC 160) to output a digital random bit stream 461) or in the sampled analog domain (i.e., output an analog random signal 441) and used for AI calculations.

[0128] The device can be seen in circuit 600, which includes a memristor and a "distributed adjustment" circuit. Circuit 600 operates as follows: Switch SW1... memristor Apply voltage source ,in This is the sampling period. This generates a voltage pulse sample, which is compared with the current-sensing resistor. The random current response of the memristor is proportional to the current of the current. The gain block in progress... (Or the first block) scales it down to an equivalent sequence of random conductances. , As a low-frequency drift component, it is preferable to remove (or eliminate) it to ensure a stable distribution. This is via the second block. It was achieved.

[0129] To ensure from The resulting sequence has a definite mean, using a third block. The fourth piece And the fifth piece The feedback structure is composed of the output sequence. The expected reference mean It was injected between the fourth and fifth blocks.

[0130] Output about input ( and ) and circuit blocks ( , , and The z-transform of () is shown in Equation 1:

[0131] (Equation 1)

[0132] Any memristor can be used, such as Pt, TiO2, and / or Pt memristors. The feedback circuit (e.g., representing feedback loop 170 and / or tuning device 180) can be implemented in the digital domain, such as in a microcontroller. The pulse can be generated and controlled by a custom-designed memristor characteristic analysis platform. This platform can apply the pulse, measure the resulting random current response, process the sample in the feedback circuit, and transmit the circuit's output to a computer via a serial port for analysis. This computer may include a Python script.

[0133] Figure 7 The input sequence, which is a time series, is shown as a set of feedback parameters. and the obtained output sequence A comparison between the two. The resulting output sequence is the output noise distribution. The voltage pulse used can be 1V every 100µs. Output Each sample represents a sample from a distribution whose mean and variance can be tuned using feedback parameters (e.g., via tuning device 180). The resulting distribution can be tuned by changing the feedback parameters. The feedback parameters can be one or more statistical properties, including at least one or more of the following: mean; offset; variance; distribution; and bias. The closed-loop gain controls the variance of the resulting distribution and references the input. Set the average value. The circuit's ability to eliminate low-frequency drift and amplified noise is significant.

[0134] Figure 8 The experimentally generated outputs for three different parameter sets are shown. The distribution of the feedback parameters, with each set showing 250k pulses, demonstrates that the system can tune the mean and variance.

[0135] In complex statistical models, samples are generated from outcome distributions that are analytically difficult to process. Bayesian inference can be used in conjunction with device 100 and / or circuit 600 to efficiently sample the desired distribution. Bayesian inference can be described as a statistical inference method in which the probability of a hypothesis is updated using Bayes' theorem as more evidence or information becomes available. Bayesian inference uses prior knowledge (in the form of a prior distribution) to estimate the posterior probability. Through Monte Carlo processing, these samples can be used to compute various statistical measures of the desired distribution. Monte Carlo methods, or Monte Carlo experiments, can be described as a class of computational algorithms that rely on repeated random sampling to obtain numerical results. In other words, Monte Carlo methods use randomness to solve problems that may in principle be deterministic.

[0136] To sample from a memristive distribution generator (MDG) or multiple MDGs, the system can have M different hardware MDGs and corresponding output samples. ,in This vector Jointly representing a sample from each of these MDGs, such as Figure 6 As shown, there is a sequence of "distributed regulation" circuits. This can be described as the nth output of the kth circuit. ,like .

[0137] In the Bayesian inference framework, samples are derived from the posterior distribution. The samples are extracted for inference, therefore a circuit needs to be created for each parameter to be calculated. First, N samples are extracted. These samples are based on the prior distribution Distribution:

[0138] (Equation 2)

[0139] Prior distribution This is a crucial part of Bayesian inference; it represents information about uncertain parameters and combines it with the probability distribution of new data to derive the posterior distribution. The posterior distribution is then used for future inferences and decisions.

[0140] Assuming that each element βi in β is independent of the other elements, the joint prior distribution Simplified to the product of the prior distributions:

[0141] (Equation 3)

[0142] Each They all said The prior distribution depends on the characteristics of the corresponding memristor and the parameters of the corresponding feedback circuit.

[0143] During the use of M MDGs, each sampling operation will be performed from the joint distribution. Samples generated This distribution covers multiple MDGs (or all MDGs). Properties (representing the post-training performance of a given dataset and a specific observation / noise model) The distribution of (the distribution of) remains to be determined. Bayes' theorem provides:

[0144] (Equation 4)

[0145] In equation 4, It is a posterior distribution. It is given Observe the likelihood function of the data. yes The prior distribution, and This serves as evidence for the normalization constant of the posterior distribution.

[0146] Directly using Equation 4 to calculate the posterior distribution may not be feasible because the parametric form of these distributions is often unknown. Therefore, samples generated by the hardware MDG are directly used for Monte Carlo sampling of the expected posterior distribution.

[0147] When direct sampling is computationally expensive, importance sampling is a technique for Monte Carlo sampling of a target distribution of interest. This method introduces a proposal distribution and weights, associating each sample from the proposal distribution with a sample from the target distribution.

[0148] This can be achieved using a hardware MDG, which in turn generates a proposal distribution and facilitates the Monte Carlo process by tuning the proposal distribution.

[0149] Weighted sampling can be used. Given samples from two probability mass functions: and Weights can be defined. The relationship of the mass function is shown in Equation 5:

[0150] (Equation 5)

[0151] Then, using the distribution Samples drawn from Calculated with weights The expectations, among which, obey distributed:

[0152] (Equation 6)

[0153] The samples generated by the hardware MDG are used to sample the desired distribution. By setting... (Equation 3) And applying Bayes' theorem (Equation 4), for a given sample Then we can obtain equation 7:

[0154] (Equation 7)

[0155] Equation 7 shows that the likelihood function, divided by the normalization constant, can be represented as a weight. This weight relates the posterior distribution to the prior of the MDG generation. This simplification allows the weights to be calculated directly from the likelihood function (up to the normalization constant) without knowing the exact distribution of the hardware MDG.

[0156] By substituting, equation 7 can be expressed as: .

[0157] Calculating the normalization constant may not be necessary, as it is possible to construct a system that does not require computation. The estimator is shown in Equation 8:

[0158] (Equation 8)

[0159] When from Extraction and It is no longer dependent on When the weights are determined, Equation 9 is generated:

[0160] (Equation 9)

[0161] Equation 9 shows that it may be unnecessary to calculate the unnormalized weights (as shown in Equation 7), and instead of the normalized weights used in the estimator (as shown in Equation 8), the unnormalized weights can simply be defined as:

[0162] (Equation 10)

[0163] Choosing a proposal distribution that approximates the true posterior, generated by hardware, is important for improving estimation efficiency and accuracy, thereby increasing the success rate of importance sampling. This can be achieved by adaptively tuning the parameters of each individual MDG to continuously improve the approximation. To guide this tuning, the Effective Sample Size (ESS) needs to be monitored, which is calculated as: When ESS is low, the circuit parameters are iteratively adjusted to ensure a good match between the proposed distribution and the posterior distribution.

[0164] In this example, the application can be used to estimate parameters of a one-dimensional regression, employing two or more MDG circuits based on Pt / TiO2 / Pt memristors. The example applies multiple pulses, measures the resulting random current response, processes the samples in a feedback circuit, and transmits the circuit's output to a computer via a serial port for analysis. This computer may include a Python script. The Python script in this example additionally includes the dataset and is responsible for processing each incoming sample from the hardware. Calculate an approximate value for the posterior distribution.

[0165] In the presence of white noise In this case, linear regression can be modeled as a dependent variable. and independent variable The relationships between them are as follows:

[0166] (Equation 11)

[0167] Given the i-th sample The complete K data points ( , The likelihood function of the set of ) can be expressed as:

[0168] (Equation 12)

[0169] At the start of the first iteration, the Python script initializes the feedback parameters of all MDG circuits to obtain the optimal solution. The initial guess. Subsequently, the system requested samples from the hardware. The script then calculates the likelihood of the entire dataset, corresponding to the unnormalized weights. Repeat this process for a predefined / preset number of iterations (or multiple predefined / preset iterations), keeping the feedback parameters constant (or identical). Next, determine the normalized weights. The script evaluates the quality of the posterior estimate (i.e., the output) using the ESS after a specified number of iterations. If the output is not within the threshold, the script instructs the hardware to adjust the feedback network parameters, thereby changing the final distribution. The script then obtains a predefined number of samples again by repeating the predefined number of iterations, and this loop continues until a satisfactory ESS value is reached. When the output (i.e., the estimate) is within the threshold, its distribution is examined using the posterior samples, and the expected moments of the model parameters are estimated using Equation 8.

[0170] Figure 9 A and Figure 9 C shows the experimental results when MDG produces suboptimal distributed samples. Figure 9 B and Figure 9 D shows the experimental results when the hardware is configured to produce samples that better fit the posterior distribution. The underlying parameter value is... and And the dataset is subject to noise. Interference. After the hardware has run a sufficient number of iterations, the MDGs are tuned so that they can generate samples from the distribution to perform efficient and accurate Monte Carlo sampling of the posterior distribution of the model parameters (and therefore the sample mean).

[0171] Therefore, feedback circuitry can be used to control the read noise of the memristor, generating a distribution with tunable characteristics. The device disclosed herein can be used to facilitate Monte Carlo I sampling engines, as well as parameter estimation problems on noisy datasets via Bayesian regression (e.g., when two memristors are used in the device). In other words, the device facilitates Monte Carlo sampling within a Bayesian inference framework, and / or can be configured to perform Monte Carlo sampling within a Bayesian inference framework. In this way, the method performs Monte Carlo sampling within a Bayesian inference framework.

[0172] Random pulse signals can be used to control mixed-signal analog and digital circuits. For example, the output frequency of a fractional-order phase-locked loop (PLL) can be controlled by a random pulse sequence. In other examples, the output of a Σ-Δ (sigma-delta) modulator used in a high-resolution (i.e., large-bit) ADC is a random pulse sequence. In some examples, the pulse sequence has undesirable spectral characteristics not present in the output of the apparatus disclosed herein. Therefore, the apparatus disclosed herein can be a superior competitor (or building block) to Σ-Δ modulators and fractional-order PLLs in terms of spectral performance. More generally, random bitstreams can be used as jitter noise in decision circuits.

[0173] This application uses a variable comparison threshold to compare the instantaneous values ​​of the memristor's resistance, instead of a fixed comparison threshold. In this way, comparing consecutive pairs of samples is equivalent to (mathematically) performing differentiation, thus making it robust to the memristor's drift over time. The apparatus and method extract randomness from the memristor without significantly altering its fundamental conductivity. By applying only a non-invasive pulse, this application is able to amplify and extract randomness, thereby preserving the memristor's fundamental conductivity and allowing it to be used simultaneously as a memory element.

[0174] Furthermore, the disclosed systems and methods do not require volatile memristors, nor do they specify any particular material system or doping profile. Diffuse and volatile memristors have limited applications in CMOS memory applications, thus necessitating the use of non-volatile memristors, which will become part of future CMOS systems, to construct TRNGs. This application demonstrates the functionality of memristors for CMOS memory applications.

[0175] Furthermore, the disclosed system and method can control the mean and variance of the output analog random signal by controlling the gain and offset of the feedback loop, thereby controlling the characteristics of the analog distribution output from the device.

[0176] It should be understood that the above description is intended to be illustrative and not restrictive. Many other implementations will become apparent to those skilled in the art after reading and understanding the above description. While this disclosure has been described with reference to specific exemplary embodiments, it should be recognized that this disclosure is not limited to the described embodiments but can be modified and changed within the spirit and scope of the appended claims. Accordingly, the specification and drawings should be considered illustrative and not restrictive. Therefore, the scope of the disclosure should be determined by reference to the appended claims and the full scope of their equivalents.

Claims

1. An apparatus for generating random numbers, the apparatus comprising one or more bitstream generators, wherein each bitstream generator comprises: memristor; The pulse generator is configured as follows: Generate multiple pulses; as well as The plurality of pulses are applied through the memristor to generate an output comprising a plurality of output pulses; and The comparator is configured as follows: Compare the first sample of the pulse output with the second sample of the pulse output; and The first comparison is used to output information indicating randomly generated bits in the random bit stream.

2. The apparatus according to claim 1, wherein, The comparison device is further configured to: The information indicating randomly generated bits in the random bit stream is compared with a comparison threshold or an input threshold; and The second comparison is used to output tuning information indicating randomly generated bits in the random bit stream.

3. The apparatus of claim 2, further comprising a feedback loop configured to generate the comparison threshold by modifying the tuning information indicating randomly generated bits in a random bit stream.

4. The apparatus according to claim 2 or 3, wherein, Each bitstream generator also includes a tuning device comprising one or more analog switches configured to control one or more statistical properties of the random bitstream using the comparison threshold or input threshold.

5. The apparatus according to claim 4, wherein, The one or more statistical properties may include at least one or more of the following: mean; offset; variance; distribution; and bias.

6. The apparatus according to any one of the preceding claims, wherein, The comparison device includes a clock comparator.

7. The apparatus according to any one of the preceding claims, wherein, The first sample includes a plurality of sampled output pulses, and each bitstream generator further includes a delay device configured to generate a second sample by performing calculations on the plurality of sampled output pulses.

8. The apparatus according to any one of claims 1 to 6, wherein, The first sample includes a plurality of sampled output pulses, and each bitstream generator further includes a delay device configured to generate a second sample by introducing a delay into the plurality of sampled output pulses.

9. The apparatus according to claim 8, wherein, The delay device includes an analog polyphase filter, wherein the analog polyphase filter optionally includes a differentiating device.

10. The apparatus according to claim 8 or 9, wherein, The delay device includes a passive element configured and positioned to generate the second sample by storing a plurality of output pulses of the sample, thereby introducing a delay.

11. The apparatus according to claim 10, wherein: The passive component is a capacitor; The response of the memristor is current; as well as Each of the bitstream generators also includes a detection resistor configured to detect changes in the current of the memristor as a function of voltage.

12. The apparatus according to any one of claims 7 to 11, wherein, The delay device includes the comparison device.

13. The apparatus according to any one of claims 7 to 12, wherein, The delay device is configured to subtract the second sample from the first sample.

14. The apparatus according to any one of the preceding claims, wherein, The first sample and the second sample are sensing pulses, and the pulse generator is further configured to generate a plurality of stress pulses, wherein each sensing pulse is preceded by a stress pulse, and wherein optionally, the plurality of stress pulses are narrow voltage pulses.

15. The apparatus according to any one of the preceding claims, wherein, The pulse generator is configured to control the amplitude of the stress pulse.

16. The apparatus according to any one of the preceding claims, wherein, Each bitstream generator comprises only one memristor.

17. The apparatus according to any one of the preceding claims, wherein, The plurality of output pulses are based on the response when the plurality of pulses are applied through the memristor.

18. The apparatus according to any one of the preceding claims, wherein, Each bitstream generator outputs information indicating multiple randomly generated bits to form the random bitstream.

19. The apparatus according to any one of the preceding claims, wherein, The device is configured to perform Monte Carlo sampling within a Bayesian inference framework.

20. A method for generating random numbers, comprising: Multiple pulses are generated using a pulse generator; Apply the plurality of pulses to the memristor; The memristor generates an output comprising multiple output pulses. The first sample of the pulse output is compared with the second sample of the pulse output using a comparison device. as well as The comparison device outputs information indicating randomly generated bits in the random bit stream based on the first comparison.

21. The method of claim 20, further comprising: The comparison device compares information indicating randomly generated bits in the random bit stream with a comparison threshold. as well as The comparison device outputs tuning information indicating randomly generated bits in the random bit stream based on the second comparison, and optionally... The comparison device includes a clock comparator.

22. The method of claim 21, further comprising: The comparison threshold is generated by modifying the tuning information of randomly generated bits in the random bit stream through a feedback loop.

23. The method according to any one of claims 20 to 22, further comprising: One or more statistical properties of the random bitstream are controlled by using one or more analog switches, or by using a comparison threshold or an input threshold. The one or more statistical properties may selectively include at least one or more of the following: average value; Offset; variance; Distribution; and deviation.

24. The method according to any one of claims 20 to 23, wherein, The first sample includes a plurality of sampled output pulses, and the method further includes: The second sample is generated by introducing a delay into a plurality of output pulses of the sample using a delay device; and optionally... The delay device stores the sampled multiple output pulses to generate the second sample, and introduces a delay into the sampled multiple output pulses.

25. The method according to claim 24, wherein, The delay device includes at least one of the following: The comparison device; Analog polyphase filters or differentiating devices; and Passive components.

26. The method according to any one of claims 20 to 25, wherein, The first and second samples are sensing pulses, and the method further includes: Multiple stress pulses are generated by the pulse generator, preceding the output of the first and second samples, wherein the multiple stress pulses may optionally be narrow voltage pulses; and optionally... The amplitude of the plurality of stress pulses is controlled by the pulse generator.

27. The method according to any one of claims 20 to 26, further comprising Monte Carlo sampling within a Bayesian inference framework.

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