Affine block vector model for intra block copy

By employing an affine block vector model and affine motion compensation technology in video coding, the problem of low coding efficiency in intra-frame block copy mode is solved, achieving more efficient video data compression.

CN121753323APending Publication Date: 2026-03-27INTERDIGITAL CE PATENT HOLDINGS SAS
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-06-17
Publication Date
2026-03-27

AI Technical Summary

Technical Problem

Existing video coding technologies are inefficient when handling intra-frame block copy, making it difficult to effectively utilize intra-frame block copy mode for efficient encoding and decoding.

Method used

By employing an affine block vector model, a candidate list for control point block vector prediction is constructed by determining the association between the current block and the copy mode of the affine inner block. Affine motion compensation and optical flow-based prediction refinement techniques are then applied to improve coding efficiency.

Benefits of technology

It improves the efficiency of video encoding and decoding, enhances the utilization of intra-frame block copy mode, and improves the compression effect of video data.

✦ Generated by Eureka AI based on patent content.

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Abstract

Systems, methods, and tools for video encoding and / or video decoding using Intra Block Copy (IBC) mode are disclosed herein. In an example, a device (e.g., a decoder) may obtain an IBC mode indication in video data. The device may determine, based on the indication, that the current block is associated with the IBC mode. Based on the determination, the device may obtain one or more (e.g., multiple) control point block vectors (CPBVs) associated with the current block. The device may decode the current block based on the CPBV. In an example, a device (e.g., an encoder) may obtain a current block associated with video content. The device may determine whether the current block is associated with an affine IBC mode. Based on the determination, the device may obtain one or more (e.g., multiple) CPBVs associated with the current block. The device may encode the current block based on the CPBV.
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Description

[0001] Cross-references to related applications This application claims the benefit of European Provisional Application No. 23306025.9, filed on 27 June 2023, the contents of which are incorporated herein by reference. Background Technology

[0002] Video coding systems can be used to compress digital video signals, for example, to reduce the storage and / or transmission bandwidth required for such signals. Video coding systems can include, for example, block-based, wavelet-based, and / or object-based systems. Summary of the Invention

[0003] This document discloses systems, methods, and tools (instrumentality) for video encoding and / or video decoding using intra-block copy (IBC) mode.

[0004] In the example, a device for performing video decoding (such as a video decoder) can be configured to obtain an affine IBC mode indication in the video data. The device can determine, for example, that a current block is associated with an affine IBC based on the obtained affine IBC mode indication. Based on the determination that the current block is associated with an affine IBC, the device can obtain one or more (e.g., multiple) control point block vectors (CPBVs) associated with the current block. Based on one or more (e.g., multiple) CPBVs, the device can decode the current block.

[0005] In the example, a device for video encoding (such as a video encoder) can be configured to obtain a current block associated with video content. The device can determine whether the current block is associated with an affine IBC. Based on the determination that the current block is associated with an affine IBC, the device can obtain one or more (e.g., multiple) CPBVs associated with the current block. Based on the one or more (e.g., multiple) CPBVs, the device for video encoding can encode the current block.

[0006] In the example, the device can determine that the current block is associated with a merged IBC pattern. Based on this determination, the device can construct a candidate list of IBC affine control point block vectors (BVs) for prediction. One or more (e.g., multiple) CPBVs can be obtained based on the BV prediction candidate list.

[0007] In the example, the device can apply affine motion compensation based on one or more (e.g., multiple) CPBVs to obtain a prediction block. The device can then apply optical flow-based prediction refinement (PROF) to the obtained prediction block.

[0008] In an example, a device (e.g., a video encoder) for video encoding can include an indication (such as an affine IBC mode indication) in video data. For example, the video encoder can include the affine IBC mode indication in the video data based on a determination that a current block is associated with an IBC mode.

[0009] In an example, a device such as a decoder can be configured to obtain a current block in a current picture. As described herein, the current picture can be or can include camera captured video content. Camera captured video content can be interchangeably referred to as natural video and / or natural video content.

[0010] The device can determine that the current block is associated with an IBC mode. For example, the IBC mode can be or can be associated with an affine IBC mode. Based on the determination that the current block is associated with the affine IBC mode, the device can determine that the current block is associated with a merge IBC mode.

[0011] Based on the determination that the current block is associated with the merge IBC mode, the device can construct an IBC affine control block vector prediction candidate list. The device can obtain one or more control point block vectors (CPBVs) associated with the current block. Based on the CPBVs, the device can compute an affine block vector (BV) field associated with the current block. The device can obtain a prediction block associated with the current block. For example, the device can obtain the prediction block based on applying affine motion compensation to the current block. The device can apply a prediction refinement based on optical flow (PROF) to the prediction block. The device can add the prediction block and a residual block associated with the current block.

[0012] Based on the determination that the current block is not associated with the merge IBC mode, the device can determine that the current block is associated with an IBC affine advanced motion vector prediction (AMVP) mode. The device can construct an IBC AMVP control block vector prediction candidate list. The device can add a BV difference to a corresponding BV. The BV difference can be associated with the constructed IBC AMVP control block vector prediction candidate list. The device can obtain a CPBV associated with the current block. Based on the CPBV, the device can compute an affine BV field associated with the current block. The device can obtain a prediction block associated with the current block. For example, the device can obtain the prediction block based on applying affine motion compensation to the current block. The device can apply PROF to the prediction block. The device can add the prediction block and a residual block associated with the current block.

[0013] The examples can be performed by a device having a processor. The device can be a decoder. The examples can be performed by a computer program product storing program code instructions on a non-transitory computer-readable medium and comprising the program code instructions. The examples can be performed by a computer program comprising program code instructions.

[0014] The systems, methods, and tools described herein can involve a decoder. In some examples, the systems, methods, and tools described herein can involve an encoder. In some examples, the systems, methods, and tools described herein can involve a signal (e.g., from an encoder and / or received by a decoder). A computer-readable medium can include instructions for causing one or more processors to perform the methods described herein. A computer program product can include instructions that, when the program is executed by one or more processors, can cause the one or more processors to perform the methods described herein. BRIEF DESCRIPTION OF DRAWINGS

[0015] Figure 1A is a system diagram illustrating an example communications system in which one or more disclosed embodiments can be implemented.

[0016] Figure 1B is a system diagram illustrating an example wireless transmit / receive unit (WTRU) that can be used within the communications system 100 of Figure 1A FIG. 1 shows a diagram of a system including an example wireless transmit / receive unit (WTRU) that can be used within the communications system 100 of

[0017] Figure 1C is a system diagram illustrating an example radio access network (RAN) and an example core network (CN) that can be used within the communications system 100 of Figure 1A FIG. 2 shows a diagram of a system including an example radio access network (RAN) and an example core network (CN) that can be used within the communications system 100 of

[0018] Figure 1D is a system diagram illustrating yet another example RAN and yet another example CN that can be used within the communications system 100 of Figure 1A FIG. 3 shows a diagram of a system including yet another example RAN and yet another example CN that can be used within the communications system 100 of

[0019] Figure 2 is a diagram illustrating an example video encoder.

[0020] Figure 3 is a diagram illustrating an example video decoder.

[0021] Figure 4 is an example of a system in which various aspects and examples can be implemented.

[0022] Figures 5A-5D is an example of an intra block copy (IBC) reference region predicted from a current block.

[0023] Figure 6 is one or more padding candidates for replacing a zero vector in an IBC list.

[0024] Figure 7 is an example reference region for IBC if a coding tree unit (CTU) (m, n) is coded.

[0025] Figure 8 An example of motion representation categories based on entire block and sub-blocks is illustrated.

[0026] Figures 9A-9B An example of control point based affine motion model is illustrated.

[0027] Figure 10 An example affine motion field representation based on 4x4 sub-blocks is illustrated.

[0028] Figure 11 An example of the location of inherited affine motion predictor is illustrated.

[0029] Figure 12 An example of control point motion vector (CPMV) inheritance from one affine block to another is illustrated.

[0030] Figure 13 An example of the location of constructed affine merge mode candidate positions is illustrated.

[0031] Figure 14 An example sub-block MV V SB and pixel .

[0032] Figure 15 An example IBC affine CU decoding procedure is illustrated. DETAILED DESCRIPTION

[0033] A more detailed understanding can be had from the following description, given by way of example in conjunction with the accompanying drawings.

[0034] Figure 1A is a diagram illustrating an example communications system 100 in which one or more disclosed embodiments can be implemented. The communications system 100 can be a multiple access system that provides content, such as voice, data, video, messaging, broadcast, etc., to multiple wireless users. The communications system 100 can enable multiple wireless users to access such content through the sharing of system resources, including wireless bandwidth. For example, the communications systems 100 can employ one or more channel access methods, such as code division multiple access (CDMA), time division multiple access (TDMA), frequency division multiple access (FDMA), orthogonal FDMA (OFDMA), single-carrier FDMA (SC-FDMA), zero-tail unique-word DFT-Spread OFDM (ZT UWDTS-s OFDM), unique-word OFDM (UW-OFDM), resource block-filtered OFDM, filter bank multicarrier (FBMC), and the like.

[0035] As Figure 1AAs shown, the communication system 100 can include wireless transmit / receive units (WTRUs) 102a, 102b, 102c, 102d, a RAN 104 / 113, a CN 106 / 115, a public switched telephone network (PSTN) 108, the Internet 110, and other networks 112, though it will be appreciated that the disclosed embodiments contemplate any number of WTRUs, base stations, networks, and / or network elements. Each of the WTRUs 102a, 102b, 102c, 102d can be any type of device configured to operate and / or communicate in a wireless environment. By way of example, the WTRUs 102a, 102b, 102c, 102d (any of which can be referred to as a “station” and / or a “STA”)) can be configured to transmit and / or receive wireless signals and can include a user equipment (UE), a mobile station, a fixed or mobile subscriber unit, a subscription-based unit, a pager, a cellular telephone, a personal digital assistant (PDA), a smartphone, a laptop, a netbook, a personal computer, a wireless sensor, a hotspot or Mi-Fi device, an Internet of Things (IoT) device, a watch or other wearable, a head-mounted display (HMD), a vehicle, a drone, a medical device and applications (e.g., remote surgery), industrial devices and applications (e.g., a robot or other wireless devices operating in an industrial and / or an automated processing chain environments), consumer electronics, a device operating on a commercial and / or industrial wireless network, and the like. Any of the WTRUs 102a, 102b, 102c, and 102d can be interchangeably referred to as a UE.

[0036] The communication system 100 can also include a base station 114a and / or a base station 114b. Each of the base stations 114a, 114b can be any type of device configured to wirelessly interface

[0037] The base stations 114a can be part of the RAN 104 / 113, which can also include other base stations and / or network elements (not shown), such as a base station controller (BSC), a radio network controller (RNC), relay nodes, etc. The base stations 114a and / or the base stations 114b can be configured to transmit and / or receive wireless signals on one or more carrier frequencies, which can be referred to as a cell (not shown). These frequencies can be in the licensed spectrum, the unlicensed spectrum, or a combination of the licensed and unlicensed spectrums. A cell can provide wireless service to a particular geographic area that can be relatively fixed or can change over time as users who are in the cell move. The cell can further be divided into cell sectors. For example, a cell associated with a base station 114a can be divided into three sectors. Thus, in one embodiment, the base station 114a can include three transceivers, one for each sector of the cell. In one embodiment, the base station 114a can employ multiple-input multiple-output (MIMO) technology and can use multiple transceivers for each sector of the cell. For example, beamforming can be used to transmit and / or receive signals in a desired spatial direction.

[0038] The base stations 114a, 114b can communicate with one or more of the WTRUs 102a, 102b, 102c, 102d over the air interface 116, which can be any suitable wireless communication link (e.g., radio frequency (RF), microwave, centimeter wave, micrometer wave, infrared (IR), ultraviolet (UV), visible light, etc.). The air interface 116 can be established using any suitable radio access technology (RAT).

[0039] More specifically, as noted above, the communications system 100 can be a multiple access system and can employ one or more channel access schemes, such as CDMA, TDMA, FDMA, OFDMA, SC-FDMA, etc. For example, the base station 114a and the WTRUs 102a, 102b, 102c in the RAN 104 / 113 can implement a radio technology such as Universal Mobile Telecommunications System (UMTS) Terrestrial Radio Access (UTRA), which can establish the air interface 116 using wideband CDMA (WCDMA). WCDMA can include communication protocols such as High-Speed Packet Access (HSPA) and / or Evolved HSPA (HSPA+). HSPA can include High-Speed Downlink (DL) Packet Access (HSDPA) and / or High-Speed UL Packet Access (HSUPA).

[0040] In an embodiment, the base station 114a and the WTRUs 102a, 102b, 102c can implement a radio technology such as Evolved UMTS Terrestrial Radio Access (E-UTRA), which can establish the air interface 116 using Long Term Evolution (LTE) and / or LTE-Advanced (LTE-A) and / or LTE-Advanced Pro (LTE-A Pro).

[0041] In an embodiment, the base station 114a and the WTRUs 102a, 102b, 102c can implement a radio technology such as NR Radio Access, which can establish the air interface 116 using New Radio (NR).

[0042] In an embodiment, the base station 114a and the WTRUs 102a, 102b, 102c can implement multiple radio access technologies. For example, the base station 114a and WTRUs 102a, 102b, 102c can implement LTE wireless access and NR wireless access together, for instance using dual connectivity (DC) principles. Thus, the air interface utilized by WTRUs 102a, 102b, 102c can be characterized by multiple types of radio access technologies and / or transmissions sent to / from multiple types of base stations (e.g., a eNB and a gNB).

[0043] In other embodiments, the base station 114a and the WTRUs 102a, 102b, 102c can implement radio technologies such as IEEE 802.11 (i.e., Wireless Fidelity (WiFi), IEEE 802.16 (i.e., Worldwide Interoperability for Microwave Access (WiMAX)), CDMA2000, CDMA2000 IX, CDMA2000 EV-DO, Interim Standard 2000 (IS-2000), Interim Standard 95 (IS-95), Interim Standard 856 (IS-856), Global System for Mobile communications (GSM), Enhanced Data rates for GSM Evolution (EDGE), GSM EDGE (GERAN), and the like.

[0044] For example, Figure 1AThe base station 114b in the embodiment can be a wireless router, Home Node B, Home eNode B, or access point, for example, and can utilize any suitable RAT for facilitating wireless connectivity access to the Internet, such as IEEE 802.11, 802.16, 802.20, 802.22, or WiMAX, for example. The base station 114b and the WTRUs 102c, 102d in the embodiment can implement a radio technology such as IEEE 802.11 to establish a wireless local area network (WLAN). In an embodiment, the base station 114b and the WTRUs 102c, 102d can implement a radio technology such as IEEE 802.15 to establish a wireless personal area network (WPAN). In yet another embodiment, the base station 114b and the WTRUs 102c, 102d can utilize a cellular-based RAT (e.g., WCDMA, CDMA2000, GSM, LTE, LTE-A, LTE-A Pro, NR, etc.) to establish a picocell or femtocell. As shown, the base station 114b can be directly connected to the Internet 110. Thus, the base station 114b can not be required to access the Internet 110 via the CN 106 / 115. Figure 1A

[0045] The RAN 104 / 113 can be in communication with the CN 106 / 115, which can be any type of network configured to provide voice, data, applications, and / or voice over internet protocol (VoIP) services to one or more of the WTRUs 102a, 102b, 102c, 102d. The data can have varying quality of service (QoS) requirements, such as differing throughput requirements, latency requirements, error tolerance requirements, reliability requirements, data throughput requirements, mobility requirements, and the like. The CN 106 / 115 can provide call control, billing services, mobile location-based services, pre-paid calling, Internet connectivity, video distribution, etc., and / or perform high-level security functions, such as user authentication. Although not shown in Figure 1A Although not shown in FIG. 1A, it will be appreciated that the RAN 104 / 113 and / or the CN 106 / 115 can be in direct or indirect communication with other RANs that employ the same RAT as the RAN 104 / 113 or a different RAT. For example, in addition to being connected to the RAN 104 / 113, which can employ a NR radio technology, the CN 106 / 115 can also be in communication with another RAN (not shown) employing a GSM, UMTS, CDMA 2000, WiMAX, E-UTRA, or WiFi radio technology.

[0046] ​CN 106 / 115 can also serve as a gateway for WTRU 102a, 102b, 102c, 102d to access PSTN 108, the Internet 110, and / or other networks 112. PSTN 108 may include a circuit-switched telephone network providing Common Old-Style Telephone Service (POTS). The Internet 110 may include a global system of interconnected computer networks and devices using common communication protocols such as Transmission Control Protocol (TCP), User Datagram Protocol (UDP), and / or Internet Protocol (IP) from the TCP / IP Internet Protocol suite. Network 112 may include wired and / or wireless communication networks owned and / or operated by other service providers. For example, network 112 may include another CN connected to one or more RANs, which may use the same RAT as RAN 104 / 113 or a different RAT.

[0047] Some or all of the WTRUs 102a, 102b, 102c, and 102d in the communication system 100 may include multi-mode capabilities (e.g., WTRUs 102a, 102b, 102c, and 102d may include multiple transceivers for communicating with different wireless networks via different wireless links). For example... Figure 1A The WTRU 102c shown can be configured to communicate with base station 114a, which may employ cellular-based radio technology, and to communicate with base station 114b, which may employ IEEE 802 radio technology.

[0048] Figure 1B This is a system diagram illustrating example WTRU 102. (Example:) Figure 1B As shown, among other things, WTRU 102 may include, in particular, a processor 118, a transceiver 120, a transmit / receive element 122, a speaker / microphone 124, a keypad 126, a display / touchpad 128, non-removable memory 130, removable memory 132, a power supply 134, a global positioning system (GPS) chipset 136, and / or other peripheral devices 138, etc. It should be understood that WTRU 102 may include any sub-combination of the foregoing elements while remaining consistent with the embodiments.

[0049] The processor 118 can be a general purpose processor, a special purpose processor, a conventional processor, a digital signal processor (DSP), a plurality of microprocessors, one or more microprocessors in association with a DSP core, a controller, a microcontroller, Application Specific Integrated Circuits (ASICs), Field Programmable Gate Array (FPGAs) circuits, any other type of integrated circuit (IC), a state machine, and the like. As already suggested above, the processor 118 can include multiple processors. The processor 118 can perform signal coding, data processing, power control, input / output processing, and / or any other functionality that enables the WTRU 102 to operate in a wireless environment. The processor 118 can be coupled to the transceiver 120, which can be coupled to the transmit / receive element 122. While Figure 1B The processor 118 and the transceiver 120 are depicted as separate components, but can be integrated together in an electronic package or chip.

[0050] The transmit / receive element 122 can be configured to transmit signals to, or receive signals from, a base station (e.g., the base station 114a) over the air interface 116. For example, in one embodiment, the transmit / receive element 122 can be an antenna configured to transmit and / or receive RF signals. In an embodiment, the transmit / receive element 122 can be an emitter / detector configured to transmit and / or receive IR, UV, or visible light signals, for example. In yet another embodiment, the transmit / receive element 122 can be configured to transmit and / or receive both RF and light signals. It will be appreciated that the transmit / receive element 122 can be configured to transmit and / or receive any combination of wireless signals.

[0051] Although the transmit / receive element 122 is depicted in the WTRU 102 Figure 1B In one embodiment, the WTRU 102 can include two or more transmit / receive elements 122 (e.g., multiple antennas) to facilitate increasing the WTRU's 102 capacity. For example, the WTRU 102 can include two transmit / receive elements 122, one for transmitting and one for receiving, or in a MIMO configuration, multiple transmit / receive elements 122 can be used to transmit and receive wireless signals.

[0052] The transceiver 120 can be configured to modulate information to be transmitted by the transmit / receive element 122 and to demodulate information received by the transmit / receive element 122. As noted above, the WTRU 102 can have multi-mode capabilities. Thus, the transceiver 120 can include multiple transceivers for enabling the WTRU 102 to communicate via multiple RATs, such as NR and IEEE 802.11, for example.

[0053] The processor 118 of the WTRU 102 can be coupled to, and can receive user input data from, the speaker / microphone 124, the keypad 126, and / or the display / touchpad 128 (e.g., a liquid crystal display (LCD) display unit or organic light-emitting diode (OLED) display unit). The processor 118 can also output user data to the speaker / microphone 124, the keypad 126, and / or the display / touchpad 128. In addition, the processor 118 can access information from, and store data in, any type of suitable memory, such as the non-removable memory 130 and / or the removable memory 132. The non-removable memory 130 can include random-access memory (RAM), read-only memory (ROM), a hard disk, or any other type of memory storage device. The removable memory 132 can include a subscriber identity module (SIM) card, a memory stick, a secure digital (SD) memory card, and the like. In other embodiments, the processor 118 can access information from, and store data in, a memory that is not physically located on the WTRU 102, such as on a server or a home computer (not shown).

[0054] The processor 118 can receive power from the power source 134, and can be configured to distribute and / or control the power to the other components in the WTRU 102. The power source 134 can be any suitable device for powering the WTRU 102. For example, the power source 134 can include one or more dry cell batteries (e.g., nickel-cadmium (NiCd), nickel-zinc (NiZn), nickel metal hydride (NiMH), lithium-ion (Li-ion), etc.), solar cells, fuel cells, and the like.

[0055] The processor 118 can also be coupled to the GPS chipset 136, which can be configured to provide location information (e.g., longitude and latitude) regarding the current location of the WTRU 102. In addition to, or

[0056] The processor 118 can further be coupled to other peripherals 138 that can include one or more software and / or hardware modules that provide additional features, functionality and / or wired or wireless connectivity. For example, the peripherals 138 can include an accelerometer, an e-compass, a satellite transceiver, a digital camera (for photographs or video), a universal serial bus (USB) port, a vibration device, a television transceiver, a hands -free headset, a Bluetooth® module, a frequency modulated (FM) radio unit, a digital music player, a media player, an electronic game player module, an Internet browser, a virtual reality and / or an augmented reality (VR / A R) device, an exercise tracker, etc. The peripherals 138 can include one or more sensors, the sensors can be one or more of a gyroscope, an accelerometer, a hall effect sensor, a magnetometer, an orientation sensor, a proximity sensor, a temperature sensor, a time sensor; a geolocation sensor, an altimeter, a light sensor, a touch sensor, a magnetometer, a barometer, a posture sensor, a biometric sensor, and / or a humidity sensor.

[0057] The WTRU 102 can include a full duplex radio for which transmission and reception of some or all signals (e.g., some or all signals associated with the UL (e.g., for transmission) and downlink (e.g., for reception) with respect to particular subframes) can be concurrent and / or simultaneous. The full duplex radio can include an interference management unit to reduce and / or eliminate self-interference and / or cross- interference that can occur during concurrent transmission and reception. In one embodiment, the WTRU 102 can include a half duplex radio for which transmission and reception of some or all signals (e.g., some or all signals associated with the UL (e.g., for transmission) or the downlink (e.g., for reception) with respect to particular subframes) can be concurrent but not simultaneous.

[0058] Figure 1C is a system diagram illustrating the RAN 104 and the CN 106 according to an embodiment. As described above, the RAN 104 can employ an E-UTRA radio technology to communicate with the WTRUs 102a, 102b, 102c over the air interface 116. The RAN 104 can also be in communication with the CN 106.

[0059] The RAN 104 can include eNode-Bs 160a, 160b, 160c, though it will be appreciated that the RAN 104 can include any number of eNode-Bs while remaining consistent with an embodiment. The eNode-Bs 160a, 160b, 160c can each include one or more transceivers for communicating with the WTRUs 102a, 102b, 102c over the air interface 116. In one embodiment, the eNode-Bs 160a, 160b, 160c can implement MIMO technology. Thus, the eNode-B 160a, for example, can use multiple antennas to transmit wireless signals to, and / or receive wireless signals from, the WTRU 102a.

[0060] Each of the eNode-Bs 160a, 160b, 160c can be associated with a particular cell (not shown) and can be configured to handle radio resource management decisions, handover decisions, scheduling of users in the UL and / or DL, and the like. As shown, the eNode-Bs 160a, 160b, 160c can communicate with one another over an X2 interface. Figure 1C

[0061] Figure 1C The CN 106 shown in FIG. 10 can include a mobility management entity (MME) 162, a serving gateway (SGW) 164, and a packet data network (PDN) gateway (or PGW) 166. While each of the foregoing elements are depicted as part of the CN 106, it will be appreciated that any of these elements can be owned and / or operated by an entity other than the CN operator.

[0062] The MME 162 can be connected to each of the eNode-Bs 160a, 160b, 160c in the RAN 104 via an S1 interface and can serve as a control node. For example, the MME 162 can be responsible for authenticating users of the WTRUs 102a, 102b, 102c, bearer activation / deactivation, selecting a particular serving gateway during an initial attach of the WTRUs 102a, 102b, 102c, and the like. The MME 162 can provide a control plane function for switching between the RAN 104 and other RANs (not shown) that employ other radio technologies, such as GSM and / or WCDMA.

[0063] ​The SGW 164 can be connected to each of the eNode Bs 160a, 160b, 160c in the RAN 104 via the S1 interface. The SGW 164 can generally route and forward user data packets to / from the WTRUs 102a, 102b, 102c. The SGW 164 can perform other functions, such as anchoring user planes during inter-eNode B handovers, triggering paging when DL data is available for the WTRUs 102a, 102b, 102c, managing and storing contexts of the WTRUs 102a, 102b, 102c, and the like.

[0064] The SGW 164 can be connected to the PGW 166, which can provide the WTRUs 102a, 102b, 102c with access to packet-switched networks, such as the Internet 110, to facilitate communications between the WTRUs 102a, 102b, 102c and IP-enabled devices.

[0065] The CN 106 can also serve as a gateway for the WTRUs 102a, 102b, 102c to access the PSTN 108, the Internet 110, and / or the other networks 112. The PSTN 108 can include circuit-switched telephone networks that provide

[0066] Although WTRUs are described in Figures 1A-1D representative embodiments as wireless terminals, it is contemplated that in certain representative embodiments such terminals can use (e.g., temporarily or permanently) a wired communication interface with communication networks.

[0067] In representative embodiments, the other network 112 can be a WLAN.

[0068] A WLAN in an infrastructure Basic Service Set (BSS) mode can have an Access Point (AP) for the BSS and one or more stations (STAs) associated with the AP. The AP can have an access or an interface to a Distribution System (DS) or another type of wired / wireless network that carries traffic in to and / or out of the BSS. Traffic to STAs that originates from outside the BSS can arrive through the AP and can be delivered to the STAs. Traffic originating from STAs to destinations outside the BSS can be sent to the AP to be delivered to respective destinations. For example, traffic between STAs within a BSS can be sent through the AP, where a source STA can send traffic to the AP and the AP can deliver the traffic to a destination STA. The traffic between STAs within a BSS can be considered and / or referred to as peer-to-peer (P2P) traffic. P2P traffic can be sent between (e.g., directly between) source and destination STAs with a direct link setup (DLS). In certain representative embodiments, the DLS can use an 802.11e DLS or an 802.11z tunneled DLS (TDLS). A WLAN using an Independent BSS (IBSS) mode can not have an AP, and all STAs in the IBSS, e.g., communicating directly with each other without an AP, can be peer wireless devices. The IBSS communication mode is sometimes referred to herein as "ad-hoc" mode of communication.

[0069] When using an 802.11 ac infrastructure mode of operation or similar, an AP can transmit beacons on a fixed channel, such as a primary channel. The primary channel can be a fixed width (e.g., a wide bandwidth of 20 MHz) or a dynamically set width via signaling. The primary channel can be the operating channel of the BSS and can be used by STAs to establish a connection with the AP. In certain representative embodiments, e.g., in an 802.11 system, carrier sense multiple access with collision avoidance (CSMA / CA) with collision avoidance can be implemented. For CSMA / CA, STAs, including the AP (e.g., each STA) can sense the primary channel. If a particular STA senses / detects and / or determines that the primary channel is busy, the particular STA can backoff. Only one STA can transmit at any given time in a given BSS.

[0070] High Throughput (HT) STAs can use 40 MHz wide channels for communication, for example, via a combination of the primary 20 MHz channel with an adjacent or nonadjacent 20 MHz channel to form a 40 MHz wide channel.

[0071] Very High Throughput (VHT) STAs can support 20 MHz, 40 MHz, 80 MHz, and / or 160 MHz wide channels. 40 MHz and / or 80 MHz channels can be formed by combining contiguous 20 MHz channels. A 160 MHz channel can be formed by combining 8 contiguous 20 MHz channels, or by combining two non-contiguous 80 MHz channels, which can be referred to as an 80+80 configuration. For the 80+80 configuration, after channel encoding, the data can be parsed into two streams by a segment parser. The inverse fast Fourier transform (IFFT) and time domain processing can be done on each stream separately. The streams can be mapped on to the two 80 MHz channels, and the data can be transmitted by the transmitting STA. At the receiver of the receiving STA, the above-described 80+80 configuration operations can be reversed, and the combined data can be sent to the medium access control (MAC).

[0072] 802.11af and 802.11ah support sub-1 GHz modes of operation. The channel operating bandwidths and carriers in 802.11af and 802.11ah are reduced relative to those used in 802.11η and 802.11ac. 802.11af supports 5 MHz, 10 MHz, and 20 MHz bandwidths in the TV White Space (TVWS) spectrum, and 802.11ah supports 1 MHz, 2 MHz, 4 MHz, 8 MHz, and 16 MHz bandwidths using non-TVWS spectrum. According to a representative embodiment, 802.11ah can support metering type control / Machine Type Communication, such as MTC devices in a macro coverage area. MTC devices can have certain capabilities, e.g., limited capabilities, including support (e.g., only support) for certain and / or limited bandwidths. MTC devices can include a battery with a battery life above a threshold (e.g., to maintain a very long battery life).

[0073] WLAN systems that can support multiple channels and channel bandwidths, such as 802.11η, 802.11ac, 802.11af, and 802.11ah include a channel that can be designated as the primary channel. The bandwidth of the primary channel can be equal to the largest common operating bandwidth supported by all STAs in the BSS. The bandwidth of the primary channel can be set and / or limited by a STA of all STAs operating in the BSS that supports the minimum bandwidth operating mode. In the example of 802.11ah, for a STA (e.g., a MTC type of device) that supports (e.g., only supports) a 1 MHz mode, the primary channel can be 1 MHz wide, even if other STAs in the AP and BSS support 2 MHz, 4 MHz, 8 MHz, 16 MHz, and / or other channel bandwidth operating modes. Carrier sensing and / or network allocation vector (NAV) settings can depend on the status of the primary channel. If the primary channel is busy, e.g., due to a STA (which only supports a 1 MHz operating mode) transmitting to the AP, then the entire available frequency band can be considered busy, even though most of the available frequency band remains idle and can be available.

[0074] In the United States, the available frequency bands that 802.11ah can use are from 902 MHz to 928 MHz. In Korea, the available frequency bands are from 917.5 MHz to 923.5 MHz. In Japan, the available frequency bands are from 916.5 MHz to 927.5 MHz. The total bandwidth available to 802.11ah is 6 MHz to 26 MHz, depending on the country code.

[0075] Figure 1D is a system diagram illustrating the RAN 113 and the CN 115 according to an embodiment. As described above, the RAN 113 can employ an NR radio technology to communicate with the WTRUs 102a, 102b, 102c over the air interface 116. The RAN 113 can also be in communication with the CN 115.

[0076] The RAN 113 can include gNBs 180a, 180b, 180c, although the RAN 113 can include any number of gNBs while remaining consistent with an embodiment. The gNBs 180a, 180b, 180c can each include one or more transceivers for communicating with the WTRUs 102a, 102b, 102c over the air interface 116. In one embodiment, the gNBs 180a, 180b, 180c can implement MIMO technology. For example, gNBs 180a, 108b can utilize beamforming to transmit signals to and / or receive signals from the gNBs 180a, 180b, 180c. Thus, the gNB 180a, for example, can use multiple antennas to transmit wireless signals to, and / or receive wireless signals from, the WTRU 102a. In an embodiment, the gNBs 180a, 180b, 180c can implement carrier aggregation technology. For example, the gNB 180a can transmit multiple component carriers (not shown) to the WTRU 102a. A subset of these component carriers can be on unlicensed spectrum while the remaining component carriers can be on licensed spectrum. In an embodiment, the gNBs 180a, 180b, 180c can implement Coordinated Multi-Point (CoMP) technology. For example, WTRU 102a can receive coordinated transmissions from gNBs 180a and 180b (and / or gNB 180c).

[0077] The WTRUs 102a, 102b, 102c can communicate with gNBs 180a, 180b, 180c using transmissions associated with the extensible numerology. For example, the OFDM symbol spacing and / or OFDM subcarrier spacing can vary for different transmissions, different cells, and / or different portions of the wireless transmission spectrum. The WTRUs 102a, 102b, 102c can communicate with gNBs 180a, 180b, 180c using subframes or transmission time intervals (TTIs) of various or extensible lengths (e.g., containing a variable number of OFDM symbols and / or lasting a variable length of absolute time).

[0078] The gNBs 180a, 180b, 180c can be configured to communicate with the WTRUs 102a, 102b, 102c in a standalone configuration and / or a non-standalone configuration. In the standalone configuration, the WTRUs 102a, 102b, 102c can communicate with gNBs 180a, 180b, 180c without also accessing other RANs (e.g., such as eNode-Bs 160a, 160b, 160c). In the standalone configuration, the WTRUs 102a, 102b, 102c can utilize one or more of gNBs 180a, 180b, 180c as a mobility anchor point. In the standalone configuration, the WTRUs 102a, 102b, 102c can utilize signal s in an unlicensed frequency band to communicate with gNBs 180a, 180b, 180c. In the non-standalone configuration, the WTRUs 102a, 102b, 102c can communicate / wirelessly couple to gNBs 180a, 180b, 180c with another RAN, such as eNode-Bs 160a, 160b, 160c. For example, WTRUs 102a, 102b, 102c can implement DC principles to substantially simultaneously communicate with one or more gNBs 180a, 180b, 180c and one or more eNode-Bs 160a, 160b, 160c. In the non-standalone configuration, eNode-Bs 160a, 160b, 160c can serve as the WTRUs' 102a, 102b, 102c mobility anchor point, and gNBs 180a, 180b, 180c can provide additional coverage and / or throughput to serving WTRUs 102a, 102b, 102c.

[0079] Each of the gNBs 180a, 180b, 180c can be associated with a particular cell (not shown) and can be configured to handle radio resource management decisions, handover decisions, scheduling of users in the UL and / or DL, support of network slicing, dual connectivity, interworking between NR and E-UTRA, routing of user plane data towards User Plane Function (UPF) 184a, 184b, routing of control plane information towards Access and Mobility Management Function (AMF) 182a, 182b, and the like. As shown, the gNBs 180a, 180b, 180c can communicate with one another over an Xn interface. Figure 1D As shown, the gNBs 180a, 180b, 180c can be in communication with the AN 180a, 180b, 180c over an Xn interface.

[0080] Figure 1DThe illustrated CN 115 can include at least one AMF 182a, 182b, at least one UPF 184a, 184b, at least one Session Management Function (SMF) 183a, 183b, and possibly a Data Network (DN) 185a, 185b. While each of the foregoing elements are depicted as part of the CN 115, it will be appreciated that any of these elements can be owned and / or operated by an entity other than the CN operator.

[0081] The AMF 182a, 182b can be connected to one or more of the gNBs 180a, 180b, 180c in the RAN 113 via an N2 interface and can serve as the control node. For example, the AMF 182a, 182b can be responsible for authenticating the WTRUs 102a, 102b, 102c, support for network slicing (e.g., handling different PDU sessions with different requirements), selecting a particular SMF 183a, 183b, management of the WTRU 102a, 102b, 102c registration area, termination of NAS signaling, mobility management, and the like. The AMF 162 can utilize network slicing to customize CN support for the WTRUs 102a, 102b, 102c based on the type of service being utilized by the WTRUs 102a, 102b, 102c. For example, different network slices can be established for different use cases such as services relying on ultra-reliable low latency (URLLC) access, services relying on enhanced massive mobile broadband (eMBB) access, services for machine type communication (MTC) access, and / or the like. The AMF 162 can provide control plane functionality such as for switching between the RAN 113 and other RANs (not shown) that employ other radio technologies (e.g., LTE, LTE-A, LTE-A Pro, and / or non-3GPP access technologies such as WiFi).

[0082] The SMF 183a, 183b can be connected to AMF 182a, 182b in the CN 115 via an N11 interface. The SMF 183a, 183b can also be connected to the UPF 184a, 184b in the CN 115 via an N4 interface. The SMF 183a, 183b can select and control the UPF 184a, 184b and configure the routing of traffic through the UPF 184a, 184b. The SMF 183a, 183b can perform other functions, such as managing and allocating IP address

[0083] The UPF 184a, 184b can be connected to one or more of the gNBs 180a, 180b, 180c in the RAN 113 via an N3 interface, which can provide the WTRUs 102a, 102b, 102c with access to packet- switched networks, such as the Internet 110, to facilitate communications between the WTRUs 102a, 102b, 102c and IP-enabled devices. The UPF 184a, 184b can perform other functions, such as routing and forwarding packets, enforcing user plane policies, supporting multi-homed PDU sessions, handling user plane QoS, buffering of downlink packets, providing mobility anchoring, and the like.

[0084] The CN 115 can include, or can communicate with, an IP gateway (e.g., an IP multimedia subsystem (IMS) server) that serves as an interface between the CN 115 and the PSTN 108. In addition, the CN 115 can provide the WTRUs 102a, 102b, 102c with access to the other networks, which can include other wired and / or wireless networks that are owned and / or operated by other service providers. In one embodiment, the WTRUs 102a, 102b, 102c can be connected to a local DN 185a, 185b through the UPF 184a, 184b via the N3 interface and an N6 interface between the UPF 184a, 184b and the DN 185a, 185b.

[0085] In view of Figures 1A-1D And Figures 1A-1D corresponding description, one or more or all of the functions described herein in relation to one or more of the following can be performed by one or more emulation devices (not shown): WTRUs 102a-d, base stations 114a-b, eNode-Bs 160a-c, MME 162, SGW 164, PGW 166, gNBs 180a-c, AMF 182a-b, UPF 184a-b, SMF 183a-b, DN 185a-b, and / or any other device(s) described herein. An emulation device can be one or more devices configured to emulate one or more or all of the functions described herein. For example, an emulation device can be used to test other devices and / or to simulate a network and / or WTRU functionality.

[0086] The one or more emulation devices can perform the one or more, or all, functions while being implemented as part of a wired and / or wireless communication network. The one or more emulation devices can perform the one or more, or all, functions while being temporarily implemented / deployed as part of a wired and / or wireless communication network. The emulation devices can be directly coupled to other devices for testing purposes and / or can perform testing using over-the-air communications.

[0087] The one or more emulation devices can perform the one or more, or all, functions while being implemented / deployed outside of a wired and / or wireless communication network. For example, one or more emulation devices can be used in a testing laboratory (which can be inside or outside of a wired and / or wireless communication network) and / or a non-deployed (e.g., testing) wired and / or wireless communication network to perform tests on one or more components.

[0088] This application describes various aspects, including tools, features, examples, models, methods, etc. Many of these aspects are described specifically, and often in a manner that can sound limiting, at least to show individual characteristics. However, this is for clarity in description, not to limit the application or scope of those aspects. In fact, all the different aspects can be combined and interchanged to provide further aspects. Also, aspects can be combined with aspects described in earlier applications as well.

[0089] The aspects described and contemplated in this application can be implemented in many different forms. Figures 5-15 described herein can provide some examples, but other examples are contemplated. The discussion of Figures 5-15 does not limit the breadth of implementation. At least one of the aspects generally relates to video encoding and decoding, and at least one other aspect generally relates to communicating generated or encoded bitstreams. These and other aspects can be implemented as a method, apparatus, computer-readable storage medium having stored thereon instructions for encoding or decoding video data according to any of the described methods, and / or a computer-readable storage medium having stored thereon a bitstream generated according to any of the described methods.

[0090] In this application, the terms “reconstructed” and “decoded” can be used interchangeably, the terms “pixel” and “sample” can be used interchangeably, and the terms “image,” “picture,” and “frame” can be used interchangeably.

[0091] Various methods are described herein, and each of the methods includes one or more steps or actions for accomplishing the described method. Unless otherwise specified, the sequence of steps and / or actions can be modified or combined with other steps and / or actions without departing from the scope of the described method. Moreover, the terms “first,” “second,” and the like can be used to modify elements, components, steps, operations, and the like in various examples, such as, for example, “first decoding” and “second decoding.” Unless specifically required, the use of such terms is not intended to limit the order of modifying the operations. Thus, in this example, the first decoding does not need to be performed before the second decoding, and can occur, for example, before, during, or overlapping in time with the second decoding.

[0092] Various methods and other aspects described in this application can be used to modify modules of a video encoder (200) and video decoder (300), such as decoding modules, as shown in Figure 2 and Figure 3 The subject matter disclosed herein can be applied to video coding of any type, format, or version, whether described in a standard or recommendation, whether pre-existing or future developed, and extensions of any such standards and recommendations, for example. The aspects described in this application can be used individually or in combination, unless otherwise stated or technically precluded.

[0093] Various numerical values, such as bits, bit depths, and the like, are used in the examples described in this application. These and other specific values are for describing examples, and the described aspects are not limited to these specific values.

[0094] Figure 2 A diagram of an example video encoder is illustrated. Variations of the example encoder 200 are contemplated, but for purposes of clarity, the encoder 200 is described below without describing all contemplated variations.

[0095] Before being encoded, a video sequence can undergo pre-encoding processing (201), e.g., applying a color transform on the input color pictures (e.g., conversion from RGB 4:4:4 to YCbCr 4:2:0), or performing a remapping of the input picture components in order to get a signal distribution more resilient to compression (e.g., using a histogram equalization of one of the color components). Metadata can be associated with the pre-processing and be attached to the bitstream.

[0096] In an encoder (200), as described herein, pictures can be encoded by one or more encoder elements. Pictures to be encoded can be partitioned (202) and processed in units of, for example, coding units (CU). The units can be encoded using, for example, intra mode or inter mode. If a unit is encoded in intra mode, the encoder can perform intra prediction (260). If a unit is encoded in inter mode, the encoder can perform motion estimation (275) and / or motion compensation (270). The encoder can decide (205) which of the intra mode or the inter mode to use for encoding the unit, and can indicate the intra / inter decision by, for example, a prediction mode indication such as a prediction mode flag. For example, a prediction residual can be calculated by subtracting (210) a predicted block from an image block (e.g., an original image block).

[0097] The prediction residual can be transformed (225) and quantized (230). The quantized transform coefficients, as well as one or more motion vectors and / or other syntax elements, can be entropy encoded (245) to output a bitstream. The encoder can skip the transform, and directly apply quantization on the untransformed residual signal. The encoder can bypass the transform and / or quantization. For example, the residual can be directly encoded without applying the transform and / or quantization process.

[0098] The encoder can decode the encoded block in order to provide a reference for further prediction. The quantized transform coefficients can be dequantized (240) and inverse transformed (250) to decode the prediction residual. By combining (255) the decoded prediction residual and the predicted block, an image block can be reconstructed. In-loop filters (265) can be applied to the reconstructed picture to perform, for example, deblocking / sampling adaptive offset (SAO) filtering to reduce encoding artifacts. The filtered image can be stored at a reference picture buffer (280).

[0099] Figure 3 A diagram illustrating an example of a video decoder is shown. In an example decoder (300), as described herein, a bitstream can be decoded by one or more decoder elements. The video decoder (300) can perform a decoding pass that is inverse to the encoding pass as described in Figure 2 The encoder (200) can perform video decoding as part of encoding video data.

[0100] In an example, an input to the decoder can be or include a video bitstream, which can be generated by the video encoder (200). The bitstream can be entropy decoded (330) to obtain transform coefficients, motion vectors, and / or other encoded information. Picture partitioning information can indicate how a picture was partitioned. The decoder can partition (335) the picture according to the decoded picture partitioning information. Transform coefficients can be dequantized (340) and inverse transformed (350) to decode the prediction residual. By combining (355) the decoded prediction residual and a predicted block, an image block can be reconstructed. The predicted block can be obtained (370) from intra prediction (360) or motion compensated prediction (e.g., inter prediction) (375). In-loop filters (365) can be applied to the reconstructed image. The filtered image can be stored at a reference picture buffer (380). In an example, the content of the reference picture buffer (380) on the decoder (300) side for a given picture can be similar (e.g., identical) to the content of the reference picture buffer (280) on the encoder (200) side for the same picture.

[0101] The decoded picture can undergo post-decoding processing (385), such as inverse color transform (e.g., conversion from YCbCr 4:2:0 to RGB 4:4:4) and / or performing inverse remapping of inverse of the remapping process performed in the pre-encoding processing (201). The post-decoding processing can use metadata derived in the pre-encoding processing and signaled in the bitstream. In one example, the decoded image (e.g., after applying the in-loop filters (365) and / or after the post-decoding processing (385), if post-decoding processing is used) can be sent to a display device for presentation to a user.

[0102] Figure 4FIG. illustrates a diagram of an example of a system in which various aspects and examples described herein can be implemented. The system (400) can be embodied as a device including the various components described below and can be configured to perform one or more of the aspects described in this document. Examples of such devices can include, but are not limited to, various electronic devices such as personal computers, laptop computers, smartphones, tablet computers, digital multimedia set top boxes, digital television receivers, personal video recording systems, connected home appliances, and servers. One or more elements of the system (400) can individually or collectively be embodied in a single integrated circuit (IC), multiple ICs, and / or discrete components. For example, in at least one example, the processing and encoder / decoder elements of the system (400) can be distributed across multiple ICs and / or discrete components. In various examples, the system (400) can be communicatively coupled to one or more other systems, or other electronic devices, via, for example, a communications bus or through dedicated input and / or output ports. In various examples, the system (400) can be configured to implement one or more of the aspects described in this document.

[0103] The system (400) can include at least one processor (410) configured to execute instructions loaded therein for implementing, for example, the various aspects described herein. The processor (410) can include embedded memory, input output interface, and / or various other circuitries as known in the art. The system (400) can include at least one memory (420) (e.g., a volatile memory device and / or a non-volatile memory device). The system (400) can include a storage device (440), which can include non-volatile memory and / or volatile memory, including, but not limited to, Electrically Erasable Programmable Read-Only Memory (EEPROM), Read-Only Memory (ROM), Programmable Read-Only Memory (PROM), Random Access Memory (RAM), Dynamic Random Access Memory (DRAM), Static Random Access Memory (SRAM), flash, magnetic disk drive, and / or optical disk drive. The storage device (440) can include, for example, an internal storage device, an attached storage device (including detachable and non-detachable storage devices), and / or a network accessible storage device, as non-limiting examples.

[0104] The system (400) can include an encoder / decoder module (430) that is configured, e.g., to process data to provide encoded video or decoded video, and the encoder / decoder module (430) can include its own processor and memory. The encoder / decoder module (430) can represent (an) module(s) that can be included in a device to perform the encoding and / or decoding functions. As is known, a device can include one or both of the encoding and decoding modules. Also, the encoder / decoder module (430) can be implemented as a separate element of the system (400), or can be incorporated in the processor (410) as a combination of hardware and software as known to those skilled in the art.

[0105] Program code to be loaded onto the processor (410) or the encoder / decoder (430) to perform the various aspects described herein can be stored in the storage device (440) and then loaded onto the memory (420) for execution by the processor (410). According to various examples, one or more of the processor (410), the memory (420), the storage device (440), and the encoder / decoder module (430) can store one or more of various items during the performance of the processes described herein. Such stored items can include, but are not limited to, input video, decoded video or portions of decoded video, bitstreams, matrices, variables, and intermediate or final results from the processing of equations, formulas, operations, and operational logic.

[0106] In some examples, the memory internal to the processor (410) and / or the encoder / decoder module (430) can be used to store instructions and provide working memory for processing needed during encoding or decoding. However, in other examples, memory external to the processing device (e.g., the processing device can be the processor (410) or the encoder / decoder module (430)) can be used for one or more of these functions. The external memory can be the memory (420) and / or the storage device (440), e.g., dynamic volatile memory and / or non-volatile flash memory. In several examples, external non-volatile flash memory is used to store, e.g., the operating system of a television. In at least one example, fast external dynamic volatile memory, such as RAM, is used as working memory for video encoding and decoding operations.

[0107] The inputs to the elements of the system (400) can be provided through various input devices, as indicated in block (445). Such input devices can include, without limitation: (i) an RF portion that receives radio frequency (RF) signals transmitted, for example, by a broadcast facility over the air, (ii) a component (COMP) input terminal (or set of COMP input terminals), (iii) a universal serial bus (USB) input terminal, and / or (iv) a high-definition multimedia interface (HDMI) input terminal. Figure 4 Other examples, not shown in FIG. 4, can include a composite video.

[0108] In various examples, the input devices of block (445) can have associated respective input processing elements, as known in the art. For example, the RF portion can be associated with elements adapted to: (i) select a desired frequency (also referred to as selecting a signal, or limiting a signal band of frequencies to a band of frequencies), (ii) down-convert the selected signal, (iii) band-limit to a narrower band of frequencies again, to select a signal band of frequencies (e.g., which can be referred to as a channel in certain examples), (iv) demodulate the down-converted and band-limited signal, (v) perform error correction, and / or (vi) demultiplex to select a desired stream of data packets. The RF portion of various examples can include one or more elements to perform these functions, such as a frequency

[0109] The USB and / or HDMI terminals can include respective interface processors for connecting the system (400) to other electronic devices across USB and / or HDMI connections. It is to be understood that various aspects of input processing (e.g., Reed Solomon error correction) can be implemented as desired within, for example, a separate input processing IC or within the processor (410). Similarly, various aspects of USB or HDMI interface processing can be implemented as desired within a separate interface IC or within the processor (410). The demodulated, error corrected, and demultiplexed streams can be provided to various processing elements, including, for example, the processor (410) and the encoder / decoder (430), to operate in conjunction with memory and storage elements to process the data streams as desired for presentation on output devices.

[0110] The various elements of the system (400) can be disposed within an integrated housing. Within the integrated housing, the various elements can be interconnected and communicate data therebetween using a suitable connection arrangement (425), such as an internal bus as known in the art, including an Inter-IC (I2C) bus, wiring, and printed circuit boards.

[0111] The system (400) can include a communication interface (450) that enables communication with other devices via a communication channel (460). The communication interface (450) can include, but is not limited to, a transceiver configured to transmit and receive data through the communication channel (460). The communication interface (450) can include, but is not limited to, a modem or network card, and the communication channel (460) can be implemented, for example, in a wired and / or wireless medium.

[0112] In various examples, data can be streamed or otherwise provided to the system (400) using a wireless network such as a Wi-Fi network (e.g., IEEE 802.11 (IEEE refers to the Institute of Electrical and Electronics Engineers)). The Wi-Fi signals of these examples are received through the communication channel (460) and the communication interface (450) that are suitable for Wi-Fi communication. The communication channel (460) of these examples can typically be connected to an access point or router that provides access to external networks, including the Internet, to allow streaming applications and other over-the-top communications. Other examples can provide streamed data to the system (400) using a set-top box that delivers data through the HDMI connection of the input block (445). Still other examples provide streamed data to the system (400) using the RF connection of the input block (445). As indicated above, various examples can provide data in a non-streaming manner. Moreover, various examples use wireless networks other than Wi-Fi, such as a cellular network or a Bluetooth® network.

[0113] The system (400) can provide output signals to various output devices, including a display (475), speakers (485), and / or other peripheral devices (495). Various example displays (475) can include one or more of a touchscreen display, an organic light-emitting diode (OLED) display, a curved display, and / or a foldable display, for example. The display (475) can be used in a television, a tablet computer, a laptop computer, a cellular phone (mobile phone), or other device. The display (475) can also be integrated with other components (e.g., as in a smart phone), or separate (e.g., an external monitor for a laptop computer). In various examples, other peripheral devices (495) can include one or more of a digital video disc (or disc) player (DVD for both terms), a disc player, a stereo system, and / or a lighting system. Various examples can use one or more peripheral devices (495) that provide functionality based on the output of the system (400). For example, a disc player performs the functionality of playing the output of the system (400).

[0114] In various examples, control signals are communicated between the system (400) and the display (475), speakers (485), or other peripheral devices (495) using signaling such as AV. Link, Consumer Electronics Control (CEC), or other communication protocols that can enable device-to-device control with or without user intervention. The output devices can be communicatively coupled to the system (400) via dedicated connections through respective interfaces (470, 480, and 490). Alternatively, the output devices can be connected to the system (400) using the communication channel (460) via the communication interface (450). The display (475) and speakers (485) can be integrated in a single unit with other components of the system (400) in an electronic device such as, for example, a television. In various examples, the display interface (470) can include a display driver such as, for example, a timing controller (T Con) chip.

[0115] For example, if the RF portion of the input (445) is part of a separate set-top box, the display (475) and speakers (485) can alternatively be separate from one or more of the other components. In various examples where the display (475) and speakers (485) can be external components, the output signals can be provided via dedicated output connections including, for example, HDMI ports, USB ports, or COMP outputs.

[0116] Examples can be realized by computer software implemented by a processor (410), or by hardware, or by a combination of hardware and software. As a non-limiting example, examples can be realized by one or more integrated circuits. As a non-limiting example, the memory (420) can be of any type appropriate for technology environments and can be implemented using any appropriate data storage technology, such as optical memory devices, magnetic memory devices, semiconductor-based memory devices, fixed memory and removable memory. As a non-limiting example, the processor (410) can be of any type appropriate for technology environments and can encompass one or more microprocessors, general purpose computers, special purpose computers, and processors based on a multi-core architecture, as non-limiting examples.

[0117] Various implementations relate to decoding. As used in this application, "decoding" can include, for example, all or part of the processes performed on a received encoded sequence in order to produce a final output suitable for display. In various examples, such processes include one or more processes typically performed by a decoder, such as entropy decoding, inverse quantization, inverse transform, and differential decoding. In various examples, such processes also or alternatively can include processes performed by decoders of various implementations described in this application, such as, for example, obtaining a prediction block for a current block in a current picture; obtaining a plurality of samples in the prediction block, where the plurality of samples includes previously decoded samples and non-decoded samples; padding the non-decoded samples using neighboring samples; decoding the current block based on the padded samples; and so on.

[0118] As further examples, in one example, "decoding" refers only to entropy decoding, in another example, "decoding" refers only to differential decoding, and in another example, "decoding" refers to a combination of entropy decoding and differential decoding. Based on the specific context of the description, it will be clear whether the phrase "decoding process" is intended to refer specifically to a subset of operations or more broadly to a decoding process as a whole, and is considered well understood by those of skill in the art.

[0119] Various implementations relate to encoding. In a manner similar to the above discussion regarding "decoding," as used in this application, "encoding" can include, for example, all or part of the processes performed on an input video sequence in order to produce an encoded bitstream. In various examples, such processes include one or more processes typically performed by an encoder, such as partitioning, differential encoding, transform, quantization, and entropy encoding. In various examples, such processes also or alternatively can include processes performed by encoders of various implementations described in this application, such as, for example, obtaining a prediction block for a current block in a current picture; obtaining a plurality of samples in the prediction block, where the plurality of samples includes previously encoded samples and non-encoded samples; padding the non-encoded samples using neighboring samples; encoding the current block based on the padded samples; and so on.

[0120] As a further example, in one example, "encoding" refers only to entropy encoding, in another example, "encoding" refers only to differential encoding, and in another example, "encoding" refers to a combination of differential encoding and entropy encoding. Based on the specific context of the description, it will be clear whether the phrase "encoding process" is intended to refer specifically to a subset of operations or more broadly to the decoding process as a whole, and is considered well understood by those skilled in the art.

[0121] When a diagram is presented with a flow diagram, it will be understood that same also provides a block diagram for a corresponding apparatus. Similarly, when a diagram is presented with a block diagram, it will be understood that same also provides a flow diagram for a corresponding method / process.

[0122] Implementations and aspects described herein can be implemented in, for example, a method or a process, an apparatus, a software program, a data stream, or a signal. Even if only discussed in the context of a single implementation form (for example, discussed only as a method), implementation of the discussed features can also be implemented in other forms (for example, an apparatus or program). An apparatus can be implemented in, for example, appropriate hardware, software, and firmware. The methods can be implemented in, for example, an apparatus such as, for example, a processor, which refers to processing devices in general, including, for example, a computer, a microprocessor, an integrated circuit, or a programmable logic device. Processors also include communication devices, such as, for example, computers, cell phones, portable / personal digital assistants (PDAs), and other devices that facilitate communication of information between end-users.

[0123] Reference to “one example” or “an example” or “one implementation” or “an implementation” and other variations thereof means that a particular feature, structure, characteristic, and so forth being described in connection with this example is included in at least one example. Therefore, the appearance of the phrase “in one example” or “in an example” or “in one implementation” or “in an implementation” or any other variations thereof in various places throughout this application does not necessarily refer to the same example.

[0124] Additionally, the application can refer to “determining” various pieces of information. Determining the information can include one or more of, for example, estimating the information, calculating the information, predicting the information, or retrieving the information from memory.

[0125] Furthermore, the application can refer to “accessing” various pieces of information. Accessing the information can include one or more of, for example, receiving the information, retrieving the information (for example, from memory), storing the information, moving the information, copying the information, calculating the information, determining the information, predicting the information, or estimating the information.

[0126] Additionally, the application can refer to "receiving" various pieces of information. As with "accessing," receiving is intended to be a broad term. Receiving information can include one or more of, for example, accessing information or retrieving information (for example, from memory). Further, "receiving" is intended to cover the receipt of information in some way, either in whole or in part. For example, "receiving" can include one or more of, for example, accessing, retrieving, or determining.

[0127] It will be appreciated that any reference to "or" can be a comprehensive reference to each of the listed items. For example, a reference to "A or B" is a reference to A alone, B alone, or to both A and B. Likewise, a reference to "A, B, or C" is a reference to A alone, B alone, C alone, A and B, A and C, B and C, or A and B and C. A reference to "at least one of A, B, or C" is a reference to A alone, B alone, C alone, A and B, A and C, B and C, or A and B and C. A reference to "at least one of A, B, and C" is a reference to A alone, B alone, C alone, A and B, A and C, B and C, or A and B and C. A reference to "A, B, and / or C" is a reference to A alone, B alone, C alone, A and B, A and C, B and C, or A and B and C. A reference to "A, B, and / or C" is a reference to A alone, B alone, C alone, A and B, A and C, B and C, or A and B and C. A reference to "one or more of A, B, and / or C" is a reference to A alone, B alone, C alone, A and B, A and C, B and C, or A and B and C. A reference to "one or more of A, B, and C" is a reference to A alone, B alone, C alone, A and B, A and C, B and C, or A and B and C. A reference to "one or more of A, B, and C" is a reference to A alone, B alone, C alone, A and B, A and C, B and C, or A and B and C. As used herein, the indefinite articles "a" and "an" refer to one or more than one, unless otherwise indicated. As used herein, the term "plurality" refers to more than one, unless otherwise indicated.

[0128] Further, as used herein, the word "signal" among other things refers to indicating something to a corresponding decoder. An encoder signal can include, for example, an encoding function of an input of a block using a precision factor, etc. In this way, in examples, the same parameters can be used on both the encoder side and the decoder side. Thus, for example, an encoder can transmit (explicitly signal) a particular parameter to a decoder so that the decoder can use the same particular parameter. Conversely, if the decoder already has the particular parameter along with other parameters, signaling can be used without transmission (implicit signaling) to simply allow the decoder to know and select the particular parameter. By avoiding transmission of any actual function, bit savings can be achieved in various examples. It will be appreciated that signaling can be implemented in a variety of ways. For example, in various examples, one or more syntax elements, flags, etc. are used to signal information to a corresponding decoder. While the foregoing involves the verb form of the word "signal," the word "signal" can (for example, also) be used as a noun herein.

[0129] As will be evident to one of ordinary skill in the art, implementations can produce a variety of signals including as example, signals that are generated by one or more processors. These signals can be in the form of electrical signals, optical signals, acoustic signals, or other forms of energy. Further, it is common in the art for such signals to be at least partially digital and to be stored using a variety of different storage technologies, including digital storage media. Such signals can be generated using a variety of processes including, for example, analog and / or digital modulation processes.

[0130] Many examples are described herein. Features of examples can be provided individually or in any combination, across various claim classes and types. Further, examples can include one or more of the features, devices, or aspects described herein, individually or in any combination, across various claim classes and types. For example, features described herein can be implemented in a bitstream or signal that includes information generated as described herein. This information can allow a decoder to decode the bitstream, an encoder, a bitstream, and / or a decoder, according to any of the described embodiments. For example, features described herein can be implemented by creating and / or transmitting and / or receiving and / or decoding a bitstream or signal. For example, features described herein can be implemented as a method, a process, an apparatus, a medium storing instructions, a medium storing data, or a signal. For example, features described herein can be implemented by a TV, a set-top box, a cell phone, a tablet, or other electronic device that performs decoding. The TV, set-top box, cell phone, tablet, or other electronic device can display (e.g., using a monitor, screen, or other type of display) resulting images (e.g., images reconstructed from residuals of a video bitstream). The TV, set-top box, cell phone, tablet, or other electronic device can receive a signal that includes encoded images and perform decoding.

[0131] These examples can be performed by a device having at least one processor. The device can be an encoder or a decoder. These examples can be performed by a computer program product that is stored on a non-transitory computer readable medium and includes program code instructions. These examples can be performed by a computer program that includes program code instructions.

[0132] Intra block copy (IBC) can be used for screen content coding. IBC can improve coding efficiency for screen content material. IBC mode can be implemented as a block-level coding mode. For example, because IBC mode is implemented as a block-level coding mode, block matching (BM) can be performed at an encoder, e.g., to find a block vector (e.g., and / or motion vector) for a coding unit (CU). A block vector can indicate a displacement from a current block to a reference block. The reference block can be (e.g., can have been) reconstructed within a current picture. A luma block vector for an IBC coded CU can be in integer precision. A chroma block vector can be rounded to integer precision. If combined with adaptive motion vector resolution (AMVR), IBC mode can switch between 1-pel motion vector precision and 4-pel motion vector precision. An IBC coded CU can be considered a third prediction mode, e.g., different from an intra prediction mode or an inter prediction mode. IBC mode can be applicable to one or more CUs having a width and / or height less than or equal to 64 luma samples.

[0133] At a CU level, an indication such as a flag can be used to signal IBC mode. IBC mode can be signaled as an IBC advanced motion vector prediction (AMVP) mode or an IBC skip / merge mode. In an example, IBC skip / merge mode can use a merge candidate index. For example, the merge candidate index can be used to indicate which block vector from a list of neighboring candidate IBC coded blocks is used to predict a current block. The merge list can include spatial, history-based motion vector prediction (HMVP), and / or paired candidates. In an example, IBC AMVP mode can use a block vector difference. For example, the block vector difference can be coded in the same way as a motion vector difference. Block vector prediction can use two candidates (e.g., one from a left neighbor and another from an above neighbor (e.g., if IBC coded)) as predictors. If either neighbor is not available, a block vector (e.g., a default block vector) can be used as a predictor. An indication such as a flag can be signaled to indicate a block vector predictor index.

[0134] An IBC reference region can be utilized. For example, an IBC reference region can be utilized to limit memory consumption and / or decoder complexity. IBC in video coding can allow a reconstructed portion of a predefined area, e.g., including an area of a current CTU and a certain area of a left CTU.

[0135] Figures 5A-5D An example of an IBC reference region in accordance with a current block prediction is illustrated. For example, Figures 5A-5D A current coding tree unit (CTU) processing order and available reference samples in a current and left CTU can be illustrated. Figures 5A-5DA reference region for IBC mode is illustrated, where a block can represent a 64x64 luma sample unit.

[0136] Depending on the location of the current coding CU site within the current CTU, one or more of the following can be applied.

[0137] In an example, if the current block falls into the top-left 64x64 block of the current CTU, the current block can reference, e.g., using a current picture reference (CPR) mode, reference samples in the bottom-right 64x64 block of the left CTU in addition to the reconstructed samples (e.g., samples that have been reconstructed) in the current CTU. The current block can also reference, e.g., using the CPR mode, reference samples in the bottom-left 64x64 block of the left CTU and reference samples in the top-right 64x64 block of the left CTU in addition to the reconstructed samples in the current CTU if the luma site (0, 64) relative to the current CTU has not been reconstructed. The current block can also reference reference samples in the bottom-right 64x64 block of the left CTU if the luma site (0, 64) relative to the current CTU has been reconstructed.

[0138] In an example, if the current block falls into the top-right 64x64 block of the current CTU, the current block can reference, e.g., using a CPR mode, reference samples in the bottom-left 64x64 block and the bottom-right 64x64 block of the left CTU in addition to the reconstructed samples in the current CTU if the luma site (0, 64) relative to the current CTU has not been reconstructed. The current block can also reference reference samples in the bottom-right 64x64 block of the left CTU if the luma site (0, 64) relative to the current CTU has been reconstructed.

[0139] In an example, if the current block falls into the bottom-left 64x64 block of the current CTU, the current block can reference, e.g., using a CPR mode, reference samples in the top-right 64x64 block and the bottom-right 64x64 block of the left CTU in addition to the reconstructed samples in the current CTU if the luma site (64, 0) relative to the current CTU has not been reconstructed. The current block can also reference, e.g., using the CPR mode, reference samples in the bottom-right 64x64 block of the left CTU if the luma site (0, 64) relative to the current CTU has been reconstructed.

[0140] In an example, if the current block falls into the bottom-right 64x64 block of the current CTU, the current block can reference, e.g., using a CPR mode, the reconstructed samples in the current CTU.

[0141] The location of the current coding CU site within the current CTU described herein can allow for implementation of IBC mode, e.g., using local on-chip memory for hardware implementation.

[0142] The IBC merge / AMVP list construction can be modified. In an example, an IBC merge / AMVP candidate can be inserted into the IBC merge / AMVP candidate list if the IBC merge / AMVP candidate is valid. In an example, top-right, bottom-left, and / or top-left spatial candidates and a pair-wise average candidate can be added to the IBC merge / AMVP candidate list. In an example, template-based adaptive reordering (ARMC TM) can be applied to the IBC merge list.

[0143] The size of the history-based motion vector prediction (HMVP) table for IBC can be increased to, for example, 25 entries. After deriving up to 20 IBC merge candidates by full pruning, the IBC merge candidates can be reordered together. After reordering, one or more candidates can be selected as final candidates in the IBC merge list. For example, after reordering, the top 6 candidates with the lowest template matching cost can be selected as final candidates in the IBC merge list.

[0144] One or more candidates of the padded IBC merge / AMVP list that are zero vectors can be replaced with a set of block vector prediction (BVP) candidates located in the IBC reference region. Zero vectors can be invalid as block vectors in IBC merge mode, and zero vectors can be discarded as BVP in the IBC candidate list.

[0145] Figure 6 One or more padded candidates of zero vectors in the IBC list are illustrated for replacement. For example, as illustrated in Figure 6 two or more (e.g., three) candidates can be located on the corners (e.g., nearest corners) of the reference region. Two or more (e.g., three) additional candidates can be determined in the middle of the three sub-regions (A, B, and C). As illustrated in Figure 6 the coordinates can be determined by the width and height of the current block and / or the ΔΧ and ΔΥ parameters.

[0146] In an example, the reference for IBC can be extended to two CTU rows above the CTU processed by the encoder or encoder. Figure 7 An example reference region for IBC if CTU(m, n) is being encoded is illustrated. As illustrated in Figure 7 For the CTU(m, n) to be encoded, the reference region can include the CTUs with indices where W denotes the maximum horizontal index within the current tile, slice, or picture. The range of each sample block vector search (e.g., or referred to as local search) can be limited horizontally to and vertically to to accommodate the reference region extension, where C denotes the CTU size.

[0147] In an example, template matching (TM) based motion search and refinement can be applied to the case of IBC. For example, an IBC-TM merge mode can be used. IBC TM can involve a merge candidate list for block vector (BV) prediction, e.g., different from the list used by regular IBC merge mode. As in regular TM merge mode, one or more candidates can be selected according to a pruning method with motion distance between candidates. A zero motion candidate can have been replaced with a motion vector (MV).

[0148] In IBC-TM merge mode, the selected candidate can be refined with a template matching method. A TM-merge indication (such as a TM-merge flag) can be signaled to indicate the template matching merge IBC mode.

[0149] In IBC-TM AMVP mode, up to 3 candidates can be selected from the IBC-TM merge list. The candidates (e.g., each of the candidates) can be refined according to a template matching method, and / or the candidates (e.g., each of the candidates) can be sorted according to resulting TM cost.

[0150] If IBC is used, TM refinement can be performed, e.g., at integer pixel positions, and in IBC-TM AMVP mode, TM refinement can be performed, e.g., in integer or 4-pixel precision depending on AMVR values. The refinement can be done within, e.g., the existing IBC reference region.

[0151] IBC mode can interact with one or more coding tools. For example, interaction between IBC mode and one or more other inter coding tools, such as paired merge candidates, history-based motion vector predictor (HMVP), combined intra / inter prediction mode (CIIP), merge mode with motion vector difference (MMVD), and / or geometric partition mode (GPM) can be as follows.

[0152] In an example, IBC can be used with paired merge candidates and HMVP. Paired IBC merge candidates (e.g., new paired IBC merge candidates) can be generated by averaging two IBC merge candidates. For HMVP, IBC motion can be inserted into a history buffer for future reference.

[0153] In an example, IBC can not be used in combination with internal tools, such as affine motion.

[0154] In an example, IBC can be used in combination with CIIP, MMVD, and GPM.

[0155] In an example, if partitioning such as DUAL_TREE partitioning is used, IBC can not be allowed for chroma coding blocks.

[0156] In an encoding tool, the current picture can not be included as one of the reference pictures in reference picture list 0 for IBC prediction. The derivation process of the motion vector of IBC mode can exclude one or more (e.g., all) neighboring blocks in inter mode, and vice versa. The following IBC design aspects can be applied in an encoding tool.

[0157] In an example, IBC can share the same process as in regular MV merge, including pair-wise merge candidates and history-based motion predictor, but TMVP and zero vector are not allowed because TMVP and zero vector can be invalid for IBC mode.

[0158] In an example, a separate HMVP buffer (e.g., 5 candidates each) can be used for MVs (e.g., regular MVs) and IBC.

[0159] In an example, block vector constraints can be implemented in the form of bitstream conformance constraints. An encoder can ensure that there are no invalid vectors in the bitstream, and merge can not be used if the merge candidate is invalid (out of range or 0). Such bitstream conformance constraints can be expressed in terms of virtual buffer as described herein.

[0160] In an example, for deblocking, IBC can be treated as an inter mode.

[0161] In an example, if a current block is coded using IBC prediction mode, AMVR can not use quarter-pel. AMVR can be signaled to indicate whether the MV is inter-pel or 4 integer-pel.

[0162] In an example, the number of IBC merge candidates can be signaled separately from the number of regular, subblock, and / or geometric merge candidates in a slice header.

[0163] Merge with motion vector difference (MMVD) used in an encoding tool (e.g., associated with blocks of inter prediction) can include one or more of the following.

[0164] In an example, affine MMVD and GPM-MMVD can be extensions of regular MMVD mode. MMVD mode can be extended to IBC merge mode.

[0165] In an example, in IBC block vector difference (IBC-MBVD), the motion vector difference distance set can be {1-pixel, 2-pixel, 4-pixel, 8-pixel, 12-pixel, 16-pixel, 24-pixel, 32-pixel, 40-pixel, 48-pixel, 56-pixel, 64-pixel, 72-pixel, 80-pixel, 88-pixel, 96-pixel, 104-pixel, 112-pixel, 120-pixel, 128-pixel}, and the BVD direction can be two horizontal and two vertical directions.

[0166] In an example, the base candidate can be selected from the candidates in the reordered IBC merge list (e.g., top five candidates). One or more (e.g., all) possible MBVD refinement locations (e.g., 20x4) of the base candidate can be reordered based on the sum of absolute difference (SAD) cost between the template (e.g., one row above and one column left of the current block) and the reference of the refinement location. The top 8 refinement locations with the lowest template SAD cost can be kept as available locations, thus used for MBVD index coding. The MBVD index can be binarized by rice code with the parameter equal to 1.

[0167] IBC can be applicable to camera captured video content. In coding tools such as EMC, IBC coding mode can be used by default for encoding of camera captured content. One or more adaptations such as high level tool control, encoder optimization, and / or fractional pixel extension on IBC can be employed to make compression efficient.

[0168] High level tool control can be employed to make compression efficient.

[0169] In an example, for natural content, IBC merge mode can be disabled. Sequence parameter set (SPS) level indication such as SPS level flag can be implemented to disable the associated CU level signaling. IBC AMVP mode can be activated if explicitly indicated by SPS indication such as SPS flag.

[0170] In an example, for natural content, reconstruction-reordering IBC (RR-IBC), TM-IBC, and / or IBC-CIIP can be disabled. For RR-IBC and TM-IBC, corresponding SPS indication (e.g., SPS flag) can be implemented.

[0171] IBC can be applied to intra slices of natural content. For example, IBC applied to intra slices of natural content can be indicated by high level syntax to remove CU level signaling of IBC indication (e.g., IBC flag). For screen content, IBC can be applied to one or more (e.g., all) slices.

[0172] Encoder optimization can be employed to make compression efficient.

[0173] In an example, at the encoder, IBC block vector search can be optimized for natural content, and if the SAD cost is much higher than the lowest SAD cost of one or more (e.g., all) intra modes, the rate-distortion optimization (RDO) process can be skipped for IBC AMVP mode.

[0174] In an example, if the best intra mode has less than 3 non-zero coefficients, IBC AMVP mode can not be evaluated.

[0175] In an encoding tool, some partition depths in inter slices can be skipped, e.g., depending on the picture order count (POC) distance between the current picture and the nearest reference picture of the current picture. If IBC is enabled from SPS level, the encoding tool can set the POC distance equal to 0, which can not align with the configuration for random access and low delay in common test conditions (CTC). In testing, a real POC distance can be used for inter slices, e.g., instead of being set to 0.

[0176] Fractional pixel extension on IBC can be employed to make compression efficient. The representation of IBC block vector can be extended to fractional pixel resolution. An interpolation filter can be needed to derive the prediction samples at non-integer stages that are located in the reconstructed region of the current frame.

[0177] In an example, the options of block vector resolution can be extended to include quarter-pixel resolution in addition to full-pixel and 4-pixel resolution. Similar to inter AMVR syntax, the first bin of AMVR syntax can be signaled to indicate whether the BV is at quarter-pixel resolution. The second bin can be signaled to switch between full-pixel resolution and 4-pixel resolution.

[0178] In an example, the interpolation filters applied to the luma and chroma components of IBC blocks can be the 8-tap luma filter and the chroma filter, respectively, as used in motion compensation. If IBC related encoding tools are needed, a 2-tap bilinear interpolation filter can be applied to generate the template prediction block.

[0179] In an example, if one or more reference samples are not available or are located outside the valid IBC reference region in the current frame, reference sample padding can be needed. If needed, the reference sample padding can be performed first in the horizontal direction and then in the vertical direction.

[0180] Bi-predictive IBC prediction mode can be used. Bi-predictive IBC can have two prediction modes: IBC BVP merge mode and bi-predictive IBC merge mode.

[0181] The IBC BVP merge mode can derive two BVs (e.g., similar to the MV derivation of the AMVP merge mode for a combined reference list AMVP motion vector predictor and inter merge candidate of other reference list) from the IBC AMVP mode and the IBC merge mode to form a bi-directionally predicted inter CU. Two different indices for the IBC BVP mode and the IBC merge candidate, respectively, taken from the IBC AMVP candidate list and the IBC merge candidate list can be signaled from the encoder to the decoder.

[0182] The bi-directional prediction IBC merge mode can derive two BVs from the IBC merge candidate list, e.g., with two different IBC merge indices. These two indices can be signaled from the encoder to the decoder. The goal of the bi-directional prediction IBC merge mode can be IBC regular merge and / or IBC merge mode with block vector difference (IBC-MBVD) and IBC geometric partition mode (IBC-GPM), e.g., for screen content, which can be enabled in the coding tools by default. In the bi-directional prediction IBC merge mode, bi-directional prediction IBC-MBVD can be enabled in natural and screen content, and bi-directional prediction IBC-GPM can be enabled in screen content.

[0183] The IBC BVP merge mode and the bi-directional prediction IBC merge mode can use one or more of the following: merge candidate list construction; BV refinement; compensation; BV storage; signaling; and / or enabling in chroma component blocks.

[0184] A merge candidate list can be constructed. The IBC BVP merge mode and the bi-directional prediction IBC merge mode can reuse the IBC merge candidate list construction method (e.g., the existing IBC merge candidate list construction method) for the uni-directional prediction IBC merge mode.

[0185] A BV can be refined. The IBC BVP merge mode and the bi-directional prediction IBC merge mode can enable template matching for IBC (e.g., the existing IBC).

[0186] The IBC BVP merge mode and the bi-directional prediction IBC merge mode can generate a final IBC prediction sample with an average of bi-directionally predicted IBC samples (1:1).

[0187] If bi-directional prediction IBC is enabled, two BVs can be stored in the BV storage.

[0188] A control indication (such as a control flag) for bi-predictive IBC can be signaled at slice level in I slices. The control indication (such as a control flag) for bi-predictive IBC can skip signaling in B and / or P slices. If bi-predictive IBC is enabled, IBC of reconstruction-reordering can be disabled.

[0189] IBC BVP merge mode and bi-predictive IBC merge mode can be enabled in a chroma component block of a tree (e.g., a single tree).

[0190] In coding tools, motion data representation can be classified into two categories: whole block based motion representation and sub-block based motion representation. Figure 8 Examples of whole block and sub-block based motion representation categories are illustrated. As Figure 8 In whole block based motion representation category and / or sub-block based motion representation category, merge / skip and AMVP modes for encoding motion information can be used, as illustrated in

[0191] Whole block based motion representation can be or can include assigning a set of motion information consisting of one or two motion vectors and associating a reference picture(s) with the inter block. For whole block based motion representation, a motion vector can be used to describe the motion before refinement. For sub-block motion representation, motion can be described for sub-blocks.

[0192] In an example, sub-block based motion coding mode can divide a block into 4x4 or 8x8 luma sample sub-blocks and assign a set (e.g., a separate set) of motion information to the sub-blocks.

[0193] Sub-block based motion representation and coding can be associated with one or more of the following: affine motion compensation, affine merge mode, and / or affine AMVP mode.

[0194] Sub-block based motion representation and coding can be associated with affine motion compensation. In an example, in coding tools, a translational motion model can be applied to motion compensated temporal prediction (MCP). Such translational motion can not be able to capture one or more types of motion, such as zoom-in, zoom-out, rotation, perspective motion, and / or irregular motion. In an example, in other coding tools, sub-block based affine motion compensation prediction can be used at CU level. Figures 9A-9B An example control point based affine motion model is illustrated. Figure 9A An example of a 4-parameter affine model is illustrated. An example of a 6-parameter affine model is illustrated. An affine motion field of a block can be represented by two control point motion vectors (e.g., as Figure 9A the illustrated 4-parameter affine motion model) or three control point motion vectors (e.g., as Figure 9B the illustrated 6-parameter affine motion model).Figure 9B The motion information of the block can be described by using a 6-parameter affine motion model. As Figures 9A-9B The vector , , may be a control point motion vector (CPMV) associated with the block and is used to represent the affine motion field of the block under consideration.

[0195] For the 4-parameter affine motion model, the motion vector at a sample site in the block can be derived as: Equation 1: 4-parameter affine motion field calculation.

[0196] For the 6-parameter affine motion model, the motion vector at a sample site in the block can be derived as: Equation 2: 6-parameter affine motion field calculation.

[0197] The motion vector may be the motion vector of the top-left control point. The motion vector may be the motion vector of the bottom-left control point.

[0198] In the coding tool, affine motion compensation can be performed on a 4x4 subblock basis. To derive the motion vector of a 4x4 luma subblock, as Figures 9A-9B illustrated in the above equation, the motion vector of the center sample of the subblock according to the above equation can be calculated according to the above equation and rounded to 1 / 16 fractional precision. A motion compensation interpolation filter can be applied to generate the prediction of the subblock with the derived motion vector. The subblock size in the chroma components can be 4x4. The MV of a 4x4 chroma subblock can be calculated as the average of the MV of the top-left luma subblock and the MV of the bottom-right luma subblock in the collocated 8x8 luma region.

[0199] Figure 10 An example affine motion field representation on a 4x4 subblock basis is illustrated. For translational inter prediction, the affine AMVP mode and the affine merge mode can be used for the affine inter prediction mode.

[0200] In an example, an affine merge mode can be used for the affine inter prediction mode. The affine merge mode can be a sub-block based motion coding mode inside the sub-block merge mode. The affine merge mode can be applied to one or more CUs having a width and / or height greater than or equal to 8. In the affine merge mode, CPMVs of the current CU can be generated based on motion information of one or more spatial neighboring CUs. There can be up to five control point motion vector predictor (CPMVP) candidates, and an index can be signaled to indicate one to be used for the current CU. An affine merge candidate list can be formed using one of the following types of CPVM candidates: inherited affine merge candidates extrapolated from CPMVs of neighbor CUs; constructed affine merge candidate CPMVPs derived using translation MVs of neighbor CUs; or zero MVs.

[0201] In the coding tool, one or more (e.g., up to two) inherited affine candidates can be derived from affine motion models of neighboring blocks, e.g., one from a left neighboring CU and one from an above neighboring CU.

[0202] Figure 11 An example site of inherited affine motion predictors is illustrated. The candidate blocks can be shown in Figure 11 . For a left predictor, the scan order can be from A0 to Al. As Figure 11 illustrated in , for an above predictor, the scan order can be from B0 to Bl to B2. The first inherited candidate from each side can be selected. If a neighboring affine CU is identified, one or more control point motion vectors of the neighboring affine CU can be used to derive CPMVP candidates in the affine merge list of the current CU.

[0203] Figure 12 An example CPMV inheritance from one affine block to another is illustrated. As Figure 12 illustrated in , if a neighbor bottom-left block A is coded in affine mode, the motion vectors of the top-left, top-right, and bottom-left corners of the CU containing block A can be obtained , and . If block A is coded with a 4-parameter affine model, two CPMVs of the current CU can be calculated according to and . If block A is coded with a 6-parameter affine model, three CPMVs of the current CU can be calculated according to , and .

[0204] A constructed affine candidate can be or can mean a candidate constructed by combining neighbor translation motion information of each control point. The motion information of the control points can be fromFigure 13 The illustrated designated spatial neighbors and temporal neighbors derivation. CPMVk (k = 1, 2, 3, 4) can denote the k-th control point. For CPMV1, the B2->B3->A2 block can be examined, and the MV of the first available block can be used. For CPMV2, the Bl->B0 block can be examined. For CPMV3, the Al->A0 block can be examined. If TMVP is available, TMVP can be used as CPMV4.

[0205] After obtaining the MVs of the four control points, an affine merge candidate can be constructed based on the motion information. The following combinations of control point MVs can be used to generate the constructed affine merge candidate: .

[0206] For example, if the control point motion vectors {CPMV1, CPMV2, CPMV3} are used, the control point motion vectors {CPMV1, CPMV2, CPMV3} can be used to generate an affine motion field for the CU, e.g., following Figure 13 .

[0207] While the combination of 3 CPMVs constructs a 6-parameter affine merge candidate, the combination of 2 CPMVs can construct a 4-parameter affine merge candidate. To avoid the motion scaling process in the case that CPMVs point to different reference pictures, if the reference indices of the control points are different, the related combination of control point MVs can be discarded.

[0208] Figure 13 An example site of the constructed affine merge mode candidate position is illustrated. After considering the appending of the inherited affine merge candidate and the constructed affine merge candidate to the affine merge candidate list, if the list is still not full, one or more zero MVs can be inserted to the end of the list.

[0209] In an example, an affine AMVP mode can be used for the affine inter prediction mode. The affine AMVP mode can be applied to one or more CUs whose width and / or height is greater than or equal to 16. A CU-level affine indication, such as an affine flag, can be signaled in the bitstream, for example, to indicate the use of the affine AMVP mode. Another indication, such as another flag, can be signaled if a 4-parameter affine or a 6-parameter affine model is used. In the affine AMVP mode, the difference between the CPMVs of the current CU and the predictor control point motion vector predictor (CPMVP) can be encoded.

[0210] A CPMVP used to predict a CU's CPMV can be taken from an affine AMVP candidate list, e.g., consisting of two elements. The affine AMVP candidate list can be constructed using one or more (e.g., in order) of the following types of CPMV candidates: an inherited affine AMVP candidate extrapolated from a CPMV of a neighbor CU; a constructed affine AMVP candidate CPMVP derived using a translation MV of a neighbor CU; and / or a zero MV.

[0211] One or more checks described herein can be configured. Checking potential candidates can be or can mean checking that a valid affine AMVP or affine merge candidate is available and valid to predict the affine CPMV of the current CU and, if so, adding it to the candidate list being constructed. The order of checking of inherited affine AMVP candidates can be the same as the order of checking of inherited affine merge candidates. The difference can be that for AMVP candidates, affine CUs with the same reference picture as in the current block can be considered. If an inherited affine motion predictor is inserted into the candidate list, the pruning process can be skipped.

[0212] Constructed affine AMVP candidates can be derived from one or more spatial neighbors (e.g., one or more specified spatial neighbors) illustrated in Figure 13 The same order of checking can be used as in the affine merge candidate construction. In addition and / or alternatively, the reference picture index of the neighboring block can be checked. The first block in the checking order can be used, which is inter coded and has the same reference picture as in the current CU.

[0213] If the current CU is coded with 4-parameter affine mode and and are available, the MVs can be added as candidates to the affine AMVP list. If the current CU is coded with 6-parameter affine mode and one or more (e.g., all) of the three CPMVs are available, the CPMVs can be added as one candidate to the affine AMVP list. If the current CU is not coded with 4-parameter affine mode and / or if and are not available, and / or if the current CU is not coded with 6-parameter affine mode and / or if one or more (e.g., all) of the three CPMVs are not available, the constructed AMVP candidate can be set to be unavailable.

[0214] If the affine AMVP list of candidates is still less than 2 after the valid inherited affine AMVP candidates and the constructed AMVP candidate are inserted, a zero MV can be added, e.g., in order. , and One or more (e.g., all) control point MVs of the current CU are predicted as translational MVs (if available). If the list is not full, zero MVs can be used to fill the affine AMVP list.

[0215] Affine motion compensation refinement with prediction refinement with optical flow (PROF) can be configured. Subblock-based affine motion compensation can save memory access bandwidth and / or reduce computational complexity compared to pixel-based motion compensation, e.g., at the cost of prediction accuracy. To achieve finer motion compensation granularity, PROF can be used to refine subblock-based affine motion compensation prediction without increasing memory access bandwidth for motion compensation. In an encoding tool, after subblock-based affine motion compensation is performed, luma prediction samples can be refined by adding a difference derived by an optical flow equation. PROF can be described as follows: performing subblock-based affine motion compensation; computing spatial gradients of the subblock prediction and ; computing luma prediction refinement; and / or adding the luma prediction refinement to the subblock prediction .

[0216] Subblock-based affine motion compensation can be performed to generate a subblock prediction .

[0217] Spatial gradients of the subblock prediction can be computed at sample sites, e.g., using a 3-tap filter [-1, 0, 1] and . The following gradient computation can be the same: .

[0218] shift 1 can be used to control the precision of the gradients. The subblock (e.g., 4x4) prediction can be extended by one sample on one side for the gradient computation. To avoid additional memory bandwidth and / or additional interpolation computation, the extended samples on the extended boundary can be copied from the nearest integer pixel positions in the reference picture.

[0219] The luma prediction refinement can be computed by the following optical flow equation: , where, may be the difference between the sample MVs (denoted by ) computed for the sample site . The subblock MVs of the subblock to which the sample Figure 14 belongs are illustrated in . The Quantization is performed.

[0220] Figure 14 Figures illustrate example sub-block MVs V SB and pixels (e.g., as illustrated by the dashed arrow).

[0221] Because the affine model parameters and the sample site relative to the sub-block center are invariant across sub-blocks and sub-blocks, one can compute for the first sub-block and reuse it for other sub-blocks in the same CU. For example, let and be the horizontal and vertical offsets from the sample site to the sub-block center . One can derive : .

[0222] To maintain accuracy, the sub-block center can be computed as where WSB and HSB are the width and height of the sub-block, respectively.

[0223] For the 4-parameter affine model, .

[0224] For the 6-parameter affine model, , where , and may be the top-left, top-right, and bottom-left control point motion vectors. w and h may be the width and height of the CU.

[0225] One can add the luma prediction refinement to the sub-block prediction . The prediction may be generated as follows: .

[0226] If: one or more (e.g., all) control point MVs are the same (which indicates that the CU has translational motion); and / or the affine motion parameters are greater than a limit (e.g., a specified limit), then the PROF cannot be applied to the affine coded CU because the sub-block based affine motion compensation (MC) is downgraded to CU based MC to avoid large memory access bandwidth.

[0227] An encoding method can be applied to, for example, reduce the encoding complexity of affine motion estimation with PROF. PROF can not be applied in the affine motion estimation stage if the CU is not a root block and the parent block of the CU does not select affine mode as the best mode, the PROF can not be applied because the probability of the current CU selecting affine mode as the best mode is low; and / or if the magnitude of the four affine parameters (C, D, E, F) is less than a predefined threshold and the current picture is not a low-delay picture, the PROF can not be applied because the improvement introduced by PROF is small. Affine motion estimation with PROF can be accelerated as described herein.

[0228] A device such as an encoder and / or decoder can be configured to improve the coding efficiency of compression of, for example, camera-captured video content, for the IBC prediction mode. Camera-captured video content can be interchangeably referred to as natural video and / or natural video content.

[0229] As described herein, an affine model for block vector representation can be introduced to enrich the block vector model supported in the IBC mode. For example, such an enriched representation of block vector information can have a compression (e.g., better compression measures) associated with one or more picture portions by capturing various (e.g., a large variety of) geometric transformation relationships (such as scaling, rotation, symmetry, and / or the like) that can exist between a prediction block and a reference block of the prediction block.

[0230] To enrich the block vector model supported in the IBC mode, two or more (e.g., two) measures described herein can be configured and / or used. For example, two or more of the following can be applied.

[0231] Two control point block vectors can be associated with an IBC coding unit and can represent block vector information at one or more spatial sites, for example, corresponding to the top-left and top-right corners of the CU under consideration (e.g., similar to the affine inter mode).

[0232] In addition to and / or alternatively, three control point motion vectors can be used for affine block vector field representation (e.g., a more enriched affine block vector field representation).

[0233] Similar to one or more procedures in inter prediction, an IBC affine BVP mode can be introduced to encode affine BV information. The IBC affine BVP mode can include signaling of a BV prediction index in the affine IBC AMVP candidate list, for example, along with one or two motion vector differences.

[0234] Similar to one or more procedures in inter prediction, an IBC affine merge mode can be introduced to encode affine BV information. The IBC affine merge mode can include signaling of an affine BV merge index, e.g., identifying an affine BV model in an affine IBC merge candidate list.

[0235] In an example, an IBC affine merge mode can be supported.

[0236] In an example, an affine-IBC-MBVD block vector coding mode can be introduced. The affine-IBC-MBVD block vector coding mode can be included in the IBC affine merge mode described herein, e.g., from which a BV offset can be signaled by an index and, alternatively and / or additionally, can be applied to control point block vectors (CPBVs) of an affine IBC merge CU under consideration.

[0237] In an example, an IBC affine mode can introduce BV representation at a subblock level, such as a 4x4 subblock level. A BV can be assigned to a subblock (e.g., a 4x4 subblock) of an affine IBC coding unit.

[0238] In an example, a pixel-based affine prediction can be performed for an affine IBC CU. A BV can be assigned to a luma sample site within the CU.

[0239] In an example, a PROF can be applied to an affine IBC CU, e.g., after a subblock-based (e.g., 4x4 subblock-based) affine prediction is performed.

[0240] The affine IBC modes described herein can be activated for encoding of camera-captured video content (e.g., non-graphical video content).

[0241] In an example, control point block vectors of a given CU can be constrained (e.g., normatively constrained) to ensure that one or more (e.g., all) block vectors in affine BV fields of one or more (e.g., all) CUs point to a prediction block that is spatially within an IBC search region, e.g., Figure 7 illustrated in FIG. 6.

[0242] With respect to fractional block vector representation, the measure can include IBC block vectors encoded at accuracy levels corresponding to ¼ pixel accuracy, 1 pixel accuracy, and / or 4 pixel accuracy. In the IBC affine AMVP mode described herein, two or more motion vector differences can be encoded for a given CU, e.g., depending on the affine BV model used. A first MVD can be encoded at an accuracy level associated to the current CU. If the first MVD can be encoded at an accuracy level associated to the current CU, other BVDs can be encoded in differential encoding, e.g., in the form of a BV difference from the first BVD. For example, if the first BVD is encoded at a 1 pixel or 4 pixel accuracy level, the other BVDs can be encoded at a double precision level compared to the first BVD.

[0243] As described herein, affine motion compensation can be supported in IBC mode. For example, Table 1 illustrates an example coding unit syntax table, e.g., supporting affine motion compensation in IBC mode as described herein.

[0244] As illustrated in Table 1, one or more syntax elements can be configured (e.g., added), e.g., an indication such as ibc affine flag can be signaled, a type of affine model can be signaled, one or two additional block vector differences can be signaled.

[0245] In an example, an indication such as ibc affine flag can be added to indicate the use of affine BV model in IBC AMVP mode. The indication such as ibc affine flag can be signaled if IBC affine is allowed at sequence parameter set (SPS) level and / or for block sizes with width and height higher than or equal to 16.

[0246] If the indication such as ibc affine flag is true, the type of affine model can be signaled. For example, if two affine BV models (e.g., 4-parameter affine model and 6-parameter affine model) are allowed as in inter mode, the type of affine model can be signaled.

[0247] If IBC affine is active for the current IBC AMVP CU, one or two additional block vector differences can be signaled, e.g., depending on the BV affine model used (e.g., 4-parameter or 6-parameter).

[0248] The syntax element mvp_l0_flag shown in Table 1 can be used for non-affine IBC AMVP mode and / or affine IBC AMVP mode. For example, the syntax element mvp_l0_flag can be configured to indicate a block vector predictor used to predictively encode BV information for a current CU in IBC AMVP mode (e.g., affine or non-affine).

[0249] Table 1: Example rich coding unit syntax table .

[0250] Table 2 illustrates an example rich BV data coding syntax that supports affine IBC merge mode as described herein. As shown in Table 2, an indication such as ibc_merge_affine_flag can be signaled to indicate that an affine BV representation is used for a current CU in IBC merge mode.

[0251] For example, an indication such as ibc_merge_affine_flag can be after the IBC merge_idx syntax element. The ibc_merge_affine_flag can indicate to a device such as a decoder from which BV prediction candidate to derive BV data for a current CU. For example, the BV data can be derived in IBC merge mode or in IBC affine merge mode.

[0252] Table 2: Example rich merge_data syntax table

[0253] Figure 15 Figure illustrates an example IBC affine CU decoding procedure as described herein. As illustrated in Figure 15 As illustrated in

[0254] As illustrated in Figure 15 If the CU is in IBC mode, e.g., an IBC CU, it can be determined whether the CU is in merge mode, as illustrated in

[0255] If the CU is not in merge mode, the CU can be in IBC affine AMVP mode. A list of affine IBC control point block vector predictor candidates for the current CU can be constructed. The list of affine IBC control point block vector predictor candidates can include affine AMVP candidate list construction (e.g., similar to inter prediction).

[0256] Based on the decoder mvp_l0 syntax element, for example, as shown in Table 1, a selected predictor for the CPVC of the current CU can be obtained.

[0257] The decoded BV difference associated with the CPBV can be added to the corresponding BV. The addition can result in a decoded CPBV for the current CU.

[0258] If the affine IBC CU is in merge mode, a list of affine IBC merge candidates can be constructed (e.g., similar to affine merge candidate list construction for inter prediction, but applied to block vectors).

[0259] The CPBV for the current CU can be derived as the CPBV indicated by the parsed merge_idx syntax element.

[0260] For AMVP encoding mode and / or merge affine IBC encoding mode, if the CPBV for the current CU is obtained, a BV affine field for the current CU can be calculated (e.g., in the same way as affine motion field calculation in inter affine case).

[0261] Affine motion compensation can be applied, for example, resulting in a predicted block for the current CU.

[0262] Optical flow based prediction refinement (PROF) can be applied to the predicted CU, for example, to enhance the quality of the predicted block. The applied PROF can be a similar (e.g., same) process as used for inter prediction.

[0263] The residual block and / or the predicted block for the current CU can be added to the obtained decoded IBC affine CU.

[0264] Two control point block vector mode can support IBC, for example, corresponding to the 4-parameter affine model for inter prediction.

[0265] In an example, IBC affine merge mode can be supported (e.g., can be the only IBC mode supported). The support of IBC affine merge mode can enable compression efficiency and / or reduce complexity (e.g., compared to the case where affine IBC AMVP mode is supported).

[0266] In an example, alternatively and / or additionally, an affine AMVP mode can be used in one or more pictures. For example, the affine AMVP mode can be used in inter pictures having a low temporal layer ID (e.g., the lowest temporal layer ID). Inter pictures having a low temporal layer ID (e.g., the lowest temporal layer ID) can be used as reference pictures by one or more other pictures.

[0267] In an example, an affine-IBC-MBVD block vector coding mode can be employed. The affine-IBC-MBVD block vector coding mode can be included in the IBC affine merge mode described herein. For example, a BV offset can be signaled by a syntax element and additionally and / or alternatively applied to the CPBVs of the affine IBC merge CU under consideration.

[0268] In an example, a pixel-based affine prediction can be performed for an affine IBC CU. A BV can be assigned to a luma sample position within the CU. Compression efficiency can be achieved.

[0269] If a pixel-based affine model is used for IBC, a PROF prediction refinement can be skipped during prediction of a CU.

[0270] The affine IBC mode described herein can be activated for encoding of camera-captured video content (e.g., as opposed to graphics video content).

[0271] In an example, the control point block vectors of a given CU can be constrained (e.g., normatively constrained) to be one or more (e.g., all) block vectors in the affine BV field of one or more (e.g., all) CUs to point to, for example Figure 7 a prediction block spatially located within the IBC search region, as illustrated in FIG. 5.

[0272] With respect to fractional block vector representation, the IBC block vectors can be coded at accuracy levels corresponding to ¼-pixel accuracy, 1-pixel accuracy, and / or 4-pixel accuracy. In the IBC affine AMVP mode described herein, two or more motion vector differences can be coded for a given CU, for example depending on the affine BV model used. A first MVd can be coded at an accuracy level associated to the current CU. If the first MVd is coded at an accuracy level associated to the current CU, other BVd of the affine CU can be coded at a differential coding compared to the first BVd. For example, if the first BVd is coded at a 1-pixel or 4-pixel accuracy level, the other BVd can be coded at a double precision level compared to the first BVd.

[0273] In an example, the affine block vectors computed on a sub-block basis (e.g., typically on a 4x4 block basis) can be stored in a motion data storage buffer of the video codec used. The computed affine block vectors stored in the buffer can be used for spatial prediction of block vector data of future blocks in the same picture, which can be in affine mode or non-affine mode.

[0274] In an example, the affine block vectors computed on a sub-block basis (e.g., typically on a 4x4 block basis) can be stored in a motion data storage buffer of the video codec used. The computed affine block vectors stored in the buffer can be used for temporal prediction of block vector data of blocks in one or more future pictures, which can use the current picture as a reference picture for temporal prediction.

[0275] In an example, the IBC affine motion described herein can be controlled at a high level, e.g., at a sequence level. For example, the IBC affine motion described herein can be controlled using an indication signaled using a dedicated SPS, such as a flag signaled using a dedicated SPS.

[0276] In an example, the IBC affine motion described herein can be controlled at a high level, e.g., at a picture level. For example, the IBC affine motion described herein can be controlled using an indication signaled using a dedicated picture header, such as a flag signaled using a dedicated picture header.

[0277] In an example, the IBC affine motion described herein can be controlled at a high level, e.g., at a slice level. For example, the IBC affine motion described herein can be controlled using an indication signaled using a dedicated slice header, such as a flag signaled using a dedicated slice header.

[0278] In an example, the IBC affine motion described herein can be controlled at a high level, e.g., at a sub-picture level, tile level, and / or tile group level.

[0279] Although features and elements are described above in particular combinations, one of ordinary skill in the art will appreciate that each feature or element can be used alone or in any combination with the other features and elements. In addition, the methods described herein can be implemented in a computer program, software, or firmware incorporated in a computer- readable medium for execution by a computer or processor. Examples of computer- readable media include electronic signals (when analog or digital) and computer- readable storage media. Examples of computer-readable storage media include, but are not limited to, a read only memory (ROM), a random access memory (RAM), a register, cache memory, semiconductor memory devices, magnetic media such as, internal hard disks and removable disks, magneto-optical media, and optical media such as CD-ROM disks, and digital versatile disks (DVDs). A processor in association with software can be used to implement a radio frequency transceiver for use in a WTRU, UE, terminal, base station, RNC, or any host computer.

Claims

1. An apparatus for performing video decoding, the apparatus comprising: The processor is configured as follows: Obtain the affine intra-block copy (IBC) mode indication in the video data; Based on the obtained affine IBC mode indication, it is determined that the current block is associated with an affine IBC; Based on the determination of the association between the current block and the affine IBC, multiple control point block vectors (CPBVs) associated with the current block are obtained. as well as The current block is decoded based on the multiple CPBVs.

2. A method for performing video decoding, the method comprising: Obtain the affine intra-block copy (IBC) mode indication in the video data; Based on the obtained affine IBC mode indication, it is determined that the current block is associated with an affine IBC; Based on the determination of the association between the current block and the affine IBC, multiple control point block vectors (CPBVs) associated with the current block are obtained. as well as The current block is decoded based on the multiple CPBVs.

3. An apparatus for performing video encoding, the apparatus comprising: The processor is configured as follows: Get the current block associated with the video content; Determine whether the current block is associated with an affine intra-block copy (IBC) mode; Based on the determination that the current block is associated with the IBC mode, multiple control point block vectors (CPBVs) associated with the current block are obtained. The current block is encoded based on the multiple CPBVs.

4. A method for video encoding, the method comprising: Get the current block associated with the video content; Determine whether the current block is associated with an affine intra-block copy (IBC) mode; Based on the determination that the current block is associated with the IBC mode, multiple control point block vectors (CPBVs) associated with the current block are obtained. The current block is encoded based on the multiple CPBVs.

5. The device according to claim 1 or claim 3, wherein, The processor is configured to: Determine that the current block is associated with the merged IBC mode; and Based on the determination that the current block is associated with the merged IBC mode, an IBC affine control point block vector (BV) prediction candidate list is constructed, wherein the plurality of CPBVs are obtained based on the BV prediction candidate list.

6. The device according to claim 1 or claim 3, wherein, The processor is configured to: Affine motion compensation is applied based on the multiple CPBVs to obtain the prediction block; and Optical flow-based prediction refinement (PROF) is applied to the obtained prediction blocks.

7. The method according to claim 2 or claim 4, wherein, The method includes: Determine that the current block is associated with the merged IBC mode; and Based on the determination that the current block is associated with the merged IBC mode, an IBC affine control point block vector (BV) prediction candidate list is constructed, wherein the plurality of CPBVs are obtained based on the BV prediction candidate list.

8. The method according to claim 2 or claim 4, wherein, The method includes: Affine motion compensation is applied based on the multiple CPBVs to obtain the prediction block; and Optical flow-based prediction refinement (PROF) is applied to the obtained prediction blocks.

9. The method according to claim 4, wherein, The method includes: Based on the determination that the current block is associated with the IBC mode, the affine IBC mode indication is included in the video data.

10. The device according to claim 3, wherein, The processor is configured to: Based on the determination that the current block is associated with the IBC mode, the affine IBC mode indication is included in the video data.

11. A computer-readable storage medium comprising instructions for performing video decoding, the instructions causing a processor to perform the method of any one of claims 2, 7, or 8.

12. A computer-readable storage medium comprising instructions for performing video decoding, the instructions causing a processor to perform the method of any one of claims 4, 7, 8 or 9.

13. A non-transitory computer-readable storage medium comprising instructions for performing video decoding, the instructions causing a processor to perform the method of any one of claims 2, 7, or 8.

14. A non-transitory computer-readable storage medium comprising instructions for performing video decoding, the instructions causing a processor to perform the method of any one of claims 4, 7, 8 or 9.