Capacitive load driving circuit and liquid ejecting apparatus

Abstract

The invention provides a capacitive load driving circuit and a liquid ejecting apparatus, which can reduce the possibility that the operation stability of the capacitive load driving circuit is reduced and the waveform precision of a driving signal is reduced. The capacitive load drive circuit includes: a first base drive signal output circuit to which a first digital signal is input and which outputs a first base drive signal; the first amplifying circuit is used for amplifying the first basic driving signal and outputting a first driving signal for driving a first capacitive load; and a wiring substrate including a first substrate surface and a second substrate surface positioned opposite to each other, the wiring substrate being provided with the first base drive signal output circuit and the first amplification circuit, the first amplification circuit being provided on the first substrate surface, and the first base drive signal output circuit being provided on the second substrate surface.

Description

Technical Field

[0001] This invention relates to a capacitive load drive circuit and a liquid ejection device. Background Technology

[0002] A liquid ejection device is known, comprising: a liquid ejection head including a capacitive load, through which a liquid such as ink is ejected by being driven according to a drive signal; and a capacitive load drive circuit that supplies the drive signal to the liquid ejection head. For example, Patent Document 1 discloses a liquid ejection device having a drive signal generation circuit (capacitive load drive circuit), which includes an analog-to-analog converter circuit that specifies the waveform of the drive signal, and a pair of transistors that outputs the drive signal based on the output from the analog-to-analog converter circuit.

[0003] Patent Document 1: Japanese Patent Application Publication No. 2018-099852

[0004] The drive signal for driving the liquid nozzle is a large-amplitude signal. When this drive signal is supplied to a capacitive load, it is accompanied by a large current that can stably drive the capacitive load. Due to this current, the transistor pair that outputs the drive signal and the analog-to-analog converter circuit that specifies the waveform of the drive signal may sometimes become overheated. If the transistor pair and the analog-to-analog converter circuit become overheated, the operational stability of the capacitive load drive circuit, including the transistor pair and the analog-to-analog converter circuit, will decrease, and the waveform accuracy of the output drive signal may decrease. Summary of the Invention

[0005] One aspect of the capacitive load driving circuit according to the present invention comprises:

[0006] The first basic drive signal output circuit is input with a first digital signal and outputs a first basic drive signal.

[0007] A first amplifier circuit amplifies the first basic drive signal and outputs a first drive signal to drive the first capacitive load; and

[0008] The wiring substrate includes a first substrate surface and a second substrate surface located opposite each other, and is provided with a first basic drive signal output circuit and a first amplification circuit.

[0009] The first amplifier circuit is disposed on the first substrate surface.

[0010] The first basic drive signal output circuit is disposed on the second substrate surface.

[0011] One aspect of the liquid ejection device according to the present invention comprises:

[0012] The nozzle ejects liquid via a capacitive load; and

[0013] A capacitive load driving circuit outputs a driving signal to drive the capacitive load.

[0014] The capacitive load drive circuit includes:

[0015] The first basic drive signal output circuit is input with a first digital signal and outputs a first basic drive signal.

[0016] A first amplifier circuit amplifies the first basic drive signal and outputs a first drive signal to drive the first capacitive load; and

[0017] The wiring substrate includes a first substrate surface and a second substrate surface located opposite each other, and is provided with a first basic drive signal output circuit and a first amplification circuit.

[0018] The first amplifier circuit is disposed on the first substrate surface.

[0019] The first basic drive signal output circuit is disposed on the second substrate surface. Attached Figure Description

[0020] Figure 1 This is a diagram showing a simplified configuration of a liquid ejection device.

[0021] Figure 2 This is a diagram illustrating an example of the functional configuration of the ejection unit.

[0022] Figure 3 This is a diagram showing a simplified structure of one of the multiple ejection sections of the ejection module.

[0023] Figure 4 This is a diagram showing an example of the signal waveforms of the drive signals COMA and COMB.

[0024] Figure 5 This is a diagram illustrating the functional structure of the drive signal selection circuit.

[0025] Figure 6 This is a diagram illustrating an example of the decoded content in the decoder.

[0026] Figure 7 This is a diagram showing an example of the configuration of a selection circuit corresponding to an ejector section.

[0027] Figure 8 This is a diagram used to illustrate the operation of the drive signal selection circuit.

[0028] Figure 9 This is a diagram illustrating an example of the configuration of a drive circuit.

[0029] Figure 10This is a diagram illustrating an example of the operation of an amplifier control circuit.

[0030] Figure 11 This is a diagram illustrating an example of the structure of a head-driving module.

[0031] Figure 12 This is a diagram illustrating an example of the structure of a drive circuit board.

[0032] Figure 13 This is a diagram illustrating an example of the structure of a transistor.

[0033] Figure 14 This is a diagram illustrating an example of the thermal connection between a transistor and an integrated circuit and a heat sink.

[0034] Figure 15 This is a diagram showing an example of a cross-section of the head drive module in a modified example.

[0035] Explanation of reference numerals in the attached figures

[0036] 1: Liquid ejection device; 2: Control unit; 3: Liquid container; 4: Conveying unit; 5: Ejection unit; 10: Head drive module; 20: Liquid ejection module; 23: Ejection module; 30: Wiring component; 41: Conveyor motor; 42: Conveyor roller; 50: Drive signal output circuit; 52, 52a, 52b: Drive circuit; 53: Reference voltage output circuit; 60: Piezoelectric element; 100: Control circuit; 101: Integrated circuit; 120: Conversion circuit; 200: Drive signal selection circuit; 210: Selection control circuit; 212: Shift register; 214: Latch circuit; 216: Decoder; 220: Restore circuit; 230: Selection circuit; 232a, 232b: Inverters; 234a, 234b: Transmission gates; 500: Integrated circuit; 510: Amplifier control circuit; 511: Memory; 512: Latch circuit; 513: Adder; 514: Latch circuit; 515: D / A converter; 520: Driver circuit; 530: Amplifier circuit; 531: Transistor; 531cp: Semiconductor chip; 531fa, 531f b, 531fc: lead frame; 531mb, 531md, 531mf: face; 531mo: molding part; 531ta, 531tb, 531tc: external connection terminal; 532: transistor; 532cp: semiconductor chip; 532fa, 532fb, 532fc: lead frame; 532mb, 532md, 532mf: face; 532mo: molding part; 532ta, 532tb, 532tc: external connection terminal; 541~545: heat conduction component; 600: ejection part; 6 01: Piezoelectric element; 611, 612: Electrodes; 621: Vibrating plate; 631: Chamber; 632: Nozzle plate; 641: Reservoir; 651: Nozzle; 661: Supply port; 710: Radiator; 711: Recess; 712: Opening; 713: Cooling fan; 715: Water cooling mechanism; 720: Radiator; 721: Recess; 722~724: Protrusion; 800: Drive circuit board; 810: Wiring board; 811~814: Edge; 815, 816: Surface; CN1, CN2: Connecting part; P: Dielectric. Detailed Implementation

[0037] Hereinafter, preferred embodiments of the present invention will be described using the accompanying drawings. The drawings are provided for ease of explanation. It should be noted that the embodiments described below are not intended to unduly limit the scope of the invention as defined in the claims. Furthermore, not all of the components described below are necessarily essential elements of the present invention.

[0038] 1. Composition of the liquid ejection device

[0039] Figure 1 This is a diagram showing a simplified configuration of the liquid ejection device 1. Figure 1As shown, the liquid ejection device 1 is a so-called line inkjet printer that forms a desired image on the medium P by ejecting ink, an example of a liquid, onto the medium P conveyed by the transport unit 4 at a desired time. It should be noted that the liquid ejection device 1 is not limited to a line inkjet printer, but can also be a serial inkjet printer. Furthermore, the liquid ejection device 1 is not limited to an inkjet printer, but can also be a color material ejection device for manufacturing color filters for liquid crystal displays, an electrode material ejection device for forming electrodes for organic EL displays, FEDs (surface-emitting diodes), etc., a biological organic matter ejection device for manufacturing biochips, a three-dimensional modeling device, and a printing and dyeing device, etc. Here, in the following description, the direction of the transported medium P is sometimes referred to as the transport direction, and the width direction of the transported medium P is sometimes referred to as the main scanning direction.

[0040] like Figure 1 As shown, the liquid ejection device 1 includes a control unit 2, a liquid container 3, a conveying unit 4, and multiple ejection units 5.

[0041] The control unit 2 includes processing circuits such as a CPU (Central Processing Unit), an FPGA (Field Programmable Gate Array), and storage circuits such as semiconductor memory. Based on image data supplied from an external device such as a host (not shown) located outside the liquid ejection device 1, the control unit 2 outputs signals to control various elements of the liquid ejection device 1.

[0042] The liquid container 3 stores ink, which is one example of a liquid, that is supplied to the ejection unit 5. Specifically, the liquid container 3 stores multi-colored ink, such as black, cyan, magenta, yellow, red, and gray ink, which is ejected to the medium P.

[0043] The conveying unit 4 includes a conveying motor 41 and a conveying roller 42. A conveying control signal Ctrl-T, output by the control unit 2, is input to the conveying unit 4. The conveying motor 41 operates based on the conveying control signal Ctrl-T. With the operation of the conveying motor 41, the conveying roller 42 is driven to rotate. Thus, the medium P is conveyed along the conveying direction.

[0044] Each of the multiple ejection units 5 has a head drive module 10 and a liquid ejection module 20. An image information signal IP output by the control unit 2 is input to the ejection unit 5, and ink stored in the liquid container 3 is supplied. Then, the head drive module 10 controls the operation of the liquid ejection module 20 based on the input image information signal IP, and the liquid ejection module 20 ejects the ink supplied from the liquid container 3 onto the medium P. At this time, by arranging and positioning the liquid ejection modules 20 of each of the multiple ejection units 5 along the main scanning direction to a width greater than or equal to the width of the medium P, ink can be ejected across the entire width direction of the transported medium P, thus forming a line inkjet printer.

[0045] Here, the functional composition of the ejection unit 5 will be explained. Figure 2 This diagram illustrates an example of the functional configuration of the ejection unit 5. (See diagram for example.) Figure 2 As shown, the ejection unit 5 has a head drive module 10 and a liquid ejection module 20.

[0046] The head drive module 10 and liquid ejection module 20 of the ejection unit 5 are electrically connected via a wiring component 30. This wiring component 30 can be, for example, a flexible printed circuit board (FPC) or a flexible flat cable (FFC). It should be noted that the head drive module 10 and liquid ejection module 20 can also be configured to replace the aforementioned FPC or FFC, or to be electrically connected via a BtoB (Board to Board) connector based on the aforementioned FPC or FFC. That is, the wiring component 30 can also include connection components such as a BtoB (Board to Board) connector in addition to the aforementioned FPC or FFC.

[0047] The head drive module 10 has a control circuit 100, drive signal output circuits 50-1 to 50-m and a conversion circuit 120.

[0048] The control circuit 100 includes a CPU, FPGA, etc. The image information signal IP output by the control unit 2 is input to the control circuit 100. Based on the input image information signal IP, the control circuit 100 outputs signals controlling various elements of the ejection unit 5.

[0049] Specifically, the control circuit 100 generates voltage change data dDATA for controlling the operation of the liquid ejection module 20 based on the image information signal IP, and outputs it to the conversion circuit 120. The conversion circuit 120 converts the voltage change data dDATA into a differential signal such as LVDS (Low Voltage Differential Signaling), and outputs it as a data signal DATA to the liquid ejection module 20. It should be noted that the conversion circuit 120 can also convert the voltage change data dDATA into a differential signal using a high-speed transmission method other than LVDS, such as LVPECL (Low Voltage Positive Emitter Coupled Logic) or CML (Current Mode Logic), and output it as a data signal DATA to the liquid ejection module 20. In addition, the conversion circuit 120 can also output part or all of the input voltage change data dDATA as a single-ended data signal DATA to the liquid ejection module 20.

[0050] Additionally, the control circuit 100 outputs digital waveform signals dA1 and dB1 to the drive signal output circuit 50-1. The drive signal output circuit 50-1 includes drive circuits 52a and 52b. The digital waveform signal dA1 is input to the drive circuit 52a. After performing digital-to-analog conversion on the input digital waveform signal dA1, the drive circuit 52a generates a drive signal COMA1 by performing Class AB amplification and outputs it to the liquid ejection module 20. The digital waveform signal dB1 is input to the drive circuit 52b. After performing digital-to-analog conversion on the input digital waveform signal dB1, the drive circuit 52b generates a drive signal COMB1 by performing Class AB amplification and outputs it to the liquid ejection module 20. That is, the digital waveform signals dA1 and dB1 are digital signals that define the signal waveforms of the drive signals COMA1 and COMB1. The drive circuits 52a and 52b generate and output the drive signals COMA1 and COMB1 by amplifying the signal waveforms defined by the digital waveform signals dA1 and dB1.

[0051] Additionally, the drive signal output circuit 50-1 includes a reference voltage output circuit 53. The reference voltage output circuit 53 generates a reference voltage signal VBS1 representing a constant potential of the reference potential of the piezoelectric element 60 (described later) in the liquid ejection module 20, and outputs it to the liquid ejection module 20. This reference voltage signal VBS1 can be, for example, a ground potential, or a constant potential such as 5.5V or 6V. It should be noted that a constant potential includes a potential that is considered approximately constant when taking into account errors such as potential variations caused by the operation of peripheral circuits, potential variations caused by differences in circuit components, and potential variations caused by the temperature characteristics of circuit components.

[0052] The drive signal output circuits 50-2 to 50-m differ only in the input and output signals, and have the same configuration as drive signal output circuit 50-1. That is, drive signal output circuit 50-j (j being any one of 1 to m) includes circuits equivalent to drive circuits 52a and 52b, and a circuit equivalent to reference voltage output circuit 53. Furthermore, the circuits equivalent to drive circuits 52a and 52b generate drive signals COMAj and COMBj based on the digital waveform signals dAj and dBj input from control circuit 100, and output them to liquid ejection module 20; the circuit equivalent to reference voltage output circuit 53 generates a reference voltage signal VBSj and outputs it to liquid ejection module 20.

[0053] The liquid ejection module 20 has a recovery circuit 220 and ejection modules 23-1 to 23-m.

[0054] The data signal DATA output by the conversion circuit 120 is input to the restoration circuit 220. The restoration circuit 220 restores the input data signal DATA into a single-ended signal, separates it into signals corresponding to the ejection modules 23-1 to 23-m, and outputs them to the corresponding ejection modules 23-1 to 23-m.

[0055] Specifically, the restoration circuit 220 restores and separates the data signal DATA to generate a clock signal SCK1, a printing data signal SI1, and a latch signal LAT1 corresponding to the ejection module 23-1, and outputs them to the ejection module 23-1. Additionally, the restoration circuit 220 restores and separates the data signal DATA to generate a clock signal SCKj, a printing data signal SIj, and a latch signal LATj corresponding to the ejection module 23-j, and outputs them to the ejection module 23-j.

[0056] That is, the restoration circuit 220 restores the data signal DATA of the differential signal output by the head drive module 10, and separates the restored signal into signals corresponding to the ejection modules 23-1 to 23-m. Thus, the restoration circuit 220 generates clock signals SCK1 to SCKm, printing data signals SI1 to SIm, and latch signals LAT1 to LATm corresponding to each of the ejection modules 23-1 to 23-m, and outputs them to the corresponding ejection modules 23-1 to 23-m. It should be noted that any one of the clock signals SCK1 to SCKm, printing data signals SI1 to SIm, and latch signals LAT1 to LATm output by the restoration circuit 220 corresponding to each of the ejection modules 23-1 to 23-m can also be a common signal for all ejection modules 23-1 to 23-m.

[0057] Here, given that the restoration circuit 220 generates clock signals SCK1~SCKm, printing data signals SI1~SIm, and latch signals LAT1~LATm by restoring and separating the data signal DATA, the data signal DATA output by the control circuit 100 is a differential signal corresponding to the clock signals SCK1~SCKm, printing data signals SI1~SIm, and latch signals LAT1~LATm. Furthermore, the voltage change data dDATA, which forms the basis of the data signal DATA, includes signals corresponding to each of the clock signals SCK1~SCKm, printing data signals SI1~SIm, and latch signals LAT1~LATm. That is, the voltage change data dDATA includes signals that control the operation of the ejection modules 23-1~23-m of the liquid ejection module 20. It should be noted that the ejection unit 5 may also be composed of the clock signals SCK1~SCKm, printing data signals SI1~SIm and latch signals LAT1~LATm output by the control circuit 100 without the conversion circuit 120 and the restoration circuit 220.

[0058] The ejection module 23-1 has a drive signal selection circuit 200 and a plurality of ejection sections 600. In addition, each of the plurality of ejection sections 600 includes a piezoelectric element 60.

[0059] The drive signals COMA1, COMB1, and reference voltage signal VBS1 output by the drive signal output circuit 50-1 of the ejection module 23-1, as well as the clock signal SCK1, printing data signal SI1, and latch signal LAT1 output by the recovery circuit 220, are input to the ejection module 23-1. The drive signals COMA1, COMB1, SCK1, SI1, and LAT1 are input to the drive signal selection circuit 200 of the ejection module 23-1. The drive signal selection circuit 200 generates a drive signal VOUT by selecting or not selecting the signal waveforms included in each of the drive signals COMA1 and COMB1 based on the input clock signal SCK1, SI1, and LAT1, and supplies this drive signal VOUT to one end of the piezoelectric element 60 of the corresponding ejection section 600. At this time, the reference voltage signal VBS1 is supplied to the other end of the piezoelectric element 60. Therefore, ink is ejected from the corresponding ejection section 60 by driving the piezoelectric element 60 according to the potential difference between the drive signal VOUT supplied to one end and the reference voltage signal VBS1 supplied to the other end.

[0060] The ejection modules 23-2 to 23-m differ only in the input and output signals; they share the same configuration as ejection module 23-1. Specifically, ejection module 23-j has a drive signal selection circuit 200 and multiple ejection sections 600, each including a piezoelectric element 60. Drive signals COMAj, COMBj, a reference voltage signal VBSj, a clock signal SCKj, a printing data signal SIj, and a latch signal LATj are input to ejection module 23-j. The drive signal selection circuit 200 generates a drive signal VOUT by selecting or not selecting the signal waveforms included in each of the drive signals COMAj and COMBj based on the input clock signal SCKj, printing data signal SIj, and latch signal LATj, and supplies this drive signal VOUT to one end of the piezoelectric element 60 of the corresponding ejection section 600. At the same time, the reference voltage signal VBSj is supplied to the other end of the piezoelectric element 60. Therefore, ink is ejected from the corresponding ejection section 60 by driving the piezoelectric element 60 according to the potential difference between the drive signal VOUT supplied to one end and the reference voltage signal VBSj supplied to the other end.

[0061] As described above, the liquid ejection device 1 of this embodiment controls the transport unit 4 to transport the medium P based on image data supplied by the control unit 2 (such as a host computer not shown), and controls the ejection of ink from the liquid ejection module 20 of the ejection unit 5, so that a desired amount of ink falls on the desired position of the medium P, forming a desired image on the medium P. That is, the liquid ejection device 1 includes: a liquid ejection module 20 having ejection modules 23-1 to 23-m that eject ink by driving the piezoelectric element 60; and a head drive module 10 having drive signal output circuits 50-1 to 50-m that output drive signals COMA1 to COMAm and COMB1 to COMBm to drive the piezoelectric element 60.

[0062] Here, the drive signal output circuits 50-1 to 50-m have the same configuration, and in the following description, they will sometimes be simply referred to as drive signal output circuit 50 without distinction. Similarly, in the following description, the drive circuits 52a and 52b included in each of the drive signal output circuits 50-1 to 50-m will sometimes be simply referred to as drive circuit 52 without distinction. In this case, the description will focus on the input of digital waveform signals dO as digital waveform signals dA1 to dAm and dB1 to dBm to the drive circuit 52, and the generation and output of drive signals COM as drive signals COMA1 to COMAm and COMB1 to COMBm based on the input digital waveform signal dO. On the other hand, when describing the drive circuits 52a and 52b included in each of the drive signal output circuits 50-1 to 50-m, in the following description, the drive circuits 52a and 52b included in the drive signal output circuit 50-j will sometimes be referred to as drive circuits 52aj and 52bj.

[0063] Furthermore, the reference voltage output circuits 53 included in each of the drive signal output circuits 50-1 to 50-m have the same configuration, and in the following description, they will sometimes be simply referred to as reference voltage output circuit 53 without distinction. In this case, the description will focus on the reference voltage output circuit 53 generating and outputting reference voltage signals VBS as reference voltage signals VBS1 to VBSm. On the other hand, when describing the reference voltage output circuits 53 included in each of the drive signal output circuits 50-1 to 50-m, in the following description, the reference voltage output circuit 53 included in the drive signal output circuit 50-j will sometimes be referred to as reference voltage output circuit 53-j.

[0064] Furthermore, the ejection modules 23-1 to 23-m have the same configuration, and in the following description, they will sometimes be simply referred to as ejection module 23 without distinction. In this case, the description will focus on the inputs to the output module 23 as clock signals SCK1 to SCKm, printing data signals SI1 to SIm, latch signals LAT1 to LATm, drive signals COMA1 to COMAm, drive signals COMB1 to COMBm, and reference voltage signals VBS1 to VBSm.

[0065] Here, an example of the structure of the ejection section 600 of the ejection module 23 will be described. Figure 3 This is a diagram showing a simplified structure of one of the multiple ejection sections 600 of the ejection module 23. (See diagram for details.) Figure 3 As shown, the ejection section 600 includes a piezoelectric element 60, a vibrating plate 621, a chamber 631, and a nozzle 651.

[0066] The chamber 631 is filled with ink supplied from the reservoir 641. Additionally, ink is introduced from the liquid container 3 into the reservoir 641 via an ink tube (not shown) and a supply port 661. That is, the chamber 631 is filled with ink stored in the corresponding liquid container 3.

[0067] Vibrating plate 621 via Figure 3 The piezoelectric element 60 disposed on the upper surface is displaced by driving it. Then, as the vibrating plate 621 is displaced, the internal volume of the ink-filled chamber 631 expands and contracts. That is, the vibrating plate 621 functions as a diaphragm that changes the internal volume of the chamber 631.

[0068] Nozzle 651 is an opening disposed on nozzle plate 632 and communicating with chamber 631. By changing the internal volume of chamber 631, an amount of ink corresponding to the change in internal volume is ejected from nozzle 651.

[0069] The piezoelectric element 60 is a structure in which a piezoelectric body 601 is sandwiched between a pair of electrodes 611 and 612. With this structure, the piezoelectric body 601 causes the central portions of electrodes 611 and 612 to flex vertically together with the vibrating plate 621 according to the potential difference of the signal supplied to the electrodes 611 and 612. An amount of ink is ejected corresponding to the deformation of the piezoelectric element 60 and the vibrating plate 621.

[0070] Specifically, a drive signal VOUT is supplied to one end of the piezoelectric element 60, i.e., one of electrodes 611 and 612, and a reference voltage signal VBS is supplied to the other end of the piezoelectric element 60, i.e., the other of electrodes 611 and 612. If the voltage value of the drive signal VOUT increases, the piezoelectric element 60 flexes upward. Then, by flexing the piezoelectric element 60 upward, the vibrating plate 621 is displaced, and the internal volume of the chamber 631 expands. As a result, ink is introduced from the reservoir 641. On the other hand, if the voltage value of the drive signal VOUT decreases, the piezoelectric element 60 flexes downward. Then, by flexing the piezoelectric element 60 downward, the vibrating plate 621 is displaced, and the internal volume of the chamber 631 shrinks. As a result, an amount of ink corresponding to the shrinkage is ejected from the nozzle 651. That is, the ejection section 600 includes a piezoelectric element 60 driven by a drive signal VOUT based on a drive signal COM, and ink is ejected by driving the piezoelectric element 60.

[0071] It should be noted that the structure of the piezoelectric element 60 is only required to be able to eject ink from the ejection section 600 by driving it, and is not limited to such a structure. Figure 3 The bending vibration structure shown could also be a structure using longitudinal vibration, for example. Additionally, the piezoelectric element 60 could be configured to flex downwards as the voltage of the drive signal VOUT increases and flex upwards as the voltage of the drive signal VOUT decreases.

[0072] 2. Functional Composition of the Drive Signal Selection Circuit

[0073] Next, the configuration and operation of the drive signal selection circuit 200 of the ejection module 23 will be explained. When explaining the configuration and operation of the drive signal selection circuit 200 of the ejection module 23, an example of the signal waveforms included in the drive signals COMA and COMB input to the drive signal selection circuit 200 will first be explained.

[0074] Figure 4 This is a diagram illustrating an example of the signal waveforms for the drive signals COMA and COMB. (See diagram for example.) Figure 4As shown, the drive signal COMA includes a drive waveform Adp configured during a period T from the rise of the latch signal LAT to the next rise of the latch signal LAT. The drive waveform Adp is a signal waveform that causes a predetermined amount of ink to be ejected from the ejection section 600 corresponding to the piezoelectric element 60 when supplied to one end of the piezoelectric element 60. The drive signal COMB includes a drive waveform Bdp configured during period T. The drive waveform Bdp is a signal waveform with a voltage amplitude smaller than that of the drive waveform Adp, and is a signal waveform that causes a smaller than predetermined amount of ink to be ejected from the ejection section 600 corresponding to the piezoelectric element 60 when supplied to one end of the piezoelectric element 60. Furthermore, the voltage values ​​of the drive waveforms Adp and Bdp at their respective start and end times are both a common voltage Vc. That is, the drive waveforms Adp and Bdp are signal waveforms that begin and end with voltage Vc, respectively.

[0075] In the following description, the amount of ink ejected from the ejection section 600 corresponding to the piezoelectric element 60 when the driving waveform Adp is supplied to one end of the piezoelectric element 60 will sometimes be referred to as a large amount, and the amount of ink ejected from the ejection section 600 corresponding to the piezoelectric element 60 when the driving waveform Bdp is supplied to one end of the piezoelectric element 60 will sometimes be referred to as a small amount.

[0076] It should be noted that the signal waveforms included in the drive signals COMA and COMB are not limited to... Figure 4 The illustrated signal waveforms can be varied depending on the type of ink ejected from the ejector 600, the number of piezoelectric elements 60 driven by the drive signals COMA and COMB, and the wiring length of the drive signals COMA and COMB. For example, drive signals COMA1 to COMAm can include different signal waveforms, and drive signals COMB1 to COMBm can also include different signal waveforms. Furthermore, for example, drive signals COMA and COMB can each include two or more consecutive drive waveforms within a period T. In this case, a signal specifying the switching timing of two or more drive waveforms is input to the drive signal selection circuit 200, and the ejector 600 ejects ink multiple times within a period T. Thus, the ink ejected multiple times within a period T lands on the medium P and combines to form a point on the medium P. Additionally, for example, to reduce the possibility of increased ink viscosity near the opening of the nozzle 651, drive signals COMA and COMB can also include signal waveforms for vibrating the ink near the opening of the nozzle 651, i.e., so-called micro-vibration waveforms.

[0077] Here, in the following explanation, the period T from the rise of the latch signal LAT to the next rise of the latch signal LAT is sometimes referred to as the point formation period for forming a point of the desired size on the medium P.

[0078] Next, the structure and operation of the drive signal selection circuit 200, which generates and outputs the drive signal VOUT by selecting or not selecting the signal waveforms included in the drive signals COMA and COMB respectively, will be explained. Figure 5 This is a diagram illustrating the functional configuration of the drive signal selection circuit 200. (See diagram for example.) Figure 5 As shown, the drive signal selection circuit 200 includes a selection control circuit 210 and multiple selection circuits 230. Here, in the following description, the ejection module 23 having n ejection sections 600 will be described as multiple ejection sections 600.

[0079] The selection control circuit 210 receives the printing data signal SI, the latch signal LAT, and the clock signal SCK. Furthermore, the selection control circuit 210 has a group of shift registers (S / R) 212, latch circuits 214, and decoders 216 corresponding to each of the n ejector sections 600. That is, the drive signal selection circuit 200 includes the same number of n shift registers 212, n latch circuits 214, and n decoders 216 as the number of ejector sections 600.

[0080] The printing data signal SI is a signal synchronized with the clock signal SCK, and includes 2 bits of printing data [SIH, SIL] used to define the size of the dots formed by the ink ejected from each of the n ejector units 600 as any one of "large dot LD", "small dot SD" and "no ejection ND". This printing data signal SI is maintained in the shift register 212 corresponding to the ejector unit 600 in 2-bit increments of printing data [SIH, SIL].

[0081] Specifically, n shift registers 212 corresponding to the ejector section 600 are cascaded together. The serially input printing data signal SI is sequentially transmitted to the subsequent stage of the cascaded shift registers 212 according to the clock signal SCK. Then, by stopping the supply of the clock signal SCK, two bits of printing data [SIH, SIL] corresponding to the ejector section 600 of that shift register 212 are held in the n shift registers 212. It should be noted that... Figure 5 In order to distinguish the cascaded n shift registers 212, they are recorded as level 1, level 2, ..., level n from the upstream side to the downstream side of the input printed data signal SI.

[0082] Each of the n latching circuits 214 latches together the 2 bits of printed data [SIH, SIL] held by the corresponding shift register 212 at the rising edge of the latch signal LAT.

[0083] Each of the n decoders 216 decodes the 2-bit printed data [SIH, SIL] latched by the corresponding latch circuit 214, and outputs selection signals S1 and S2 corresponding to the logic level of the decoded content in each cycle T. Figure 6 This is a diagram illustrating an example of the decoded content in decoder 216. Decoder 216 outputs 2 bits of latched printed data [SIH, SIL] and... Figure 6 The selected signals S1 and S2 represent the logic levels specified for the decoded content. For example, when the decoder 216 has 2 bits of printed data [SIH, SIL]=[1, 0] latched by the corresponding latch circuit 214, it sets the logic levels of the selected signals S1 and S2 to L and H levels respectively within period T. It should be noted that in Figure 6 In the diagram, the printing data [SIH, SIL]=[0, 0] and the printing data [SIH, SIL]=[0, 1] are plotted together as the printing data [SIH, SIL]=[0, *].

[0084] Each of the n ejector sections 600 is provided with a corresponding selection circuit 230. That is, the drive signal selection circuit 200 has n selection circuits 230. The selection signals S1 and S2 output by the decoder 216 corresponding to the same ejector section 600, and the drive signals COMA and COMB are input to the selection circuit 230. Then, the selection circuit 230 generates a drive signal VOUT by selecting or not selecting the signal waveforms included in each of the drive signals COMA and COMB according to the selection signals S1 and S2, and outputs it to the corresponding ejector section 600.

[0085] Figure 7 This diagram shows an example of the configuration of a selection circuit 230 corresponding to an ejector section 600. (See diagram for example.) Figure 7 As shown, the selection circuit 230 has inverters 232a and 232b and transmission gates 234a and 234b.

[0086] The selection signal S1 is input to the positive control terminal of transmission gate 234a (not marked with a circle), while it is logically inverted by inverter 232a and input to the negative control terminal of transmission gate 234a (marked with a circle). Additionally, a drive signal COMA is supplied to the input terminal of transmission gate 234a. When the input selection signal S1 is at a high level (H), transmission gate 234a conducts between its input and output terminals; when the input selection signal S1 is at a low level (L), it de-conducts between the input and output terminals. That is, transmission gate 234a outputs the drive signal COMA to the output terminal when the selection signal S1 is at a high level (H), and does not output the drive signal COMA to the output terminal when the selection signal S1 is at a low level (L).

[0087] The selection signal S2 is input to the positive control terminal of transmission gate 234b (not marked with a circle), while it is logically inverted by inverter 232b and input to the negative control terminal of transmission gate 234b (marked with a circle). Additionally, a drive signal COMB is supplied to the input terminal of transmission gate 234b. When the input selection signal S2 is at a high level (H), transmission gate 234b conducts between its input and output terminals; when the input selection signal S2 is at a low level (L), it de-conducts between the input and output terminals. That is, transmission gate 234b outputs the drive signal COMB to its output terminal when the selection signal S2 is at a high level (H), and does not output the drive signal COMB to its output terminal when the selection signal S2 is at a low level (L).

[0088] The outputs of transmission gates 234a and 234b are connected together. Drive signals COMA and COMB, which are selected or not selected by selection signals S1 and S2, are supplied to the outputs of these commonly connected transmission gates 234a and 234b. The selection circuit 230 outputs the signal supplied to the commonly connected outputs as a drive signal VOUT to the corresponding ejection section 600.

[0089] The operation of the drive signal selection circuit 200 is explained. Figure 8 This diagram illustrates the operation of the drive signal selection circuit 200. The printing data signal SI and the clock signal SCK are input serially in sync and transmitted sequentially by the shift register 212 corresponding to the ejector unit 600. Then, by stopping the input of the clock signal SCK, the two bits of printing data [SIH, SIL] corresponding to each ejector unit 600 are held in the corresponding shift register 212.

[0090] Subsequently, when the latch signal LAT rises, the 2 bits of printed data [SIH, SIL] held by shift register 212 are latched together by latch circuit 214. It should be noted that... Figure 8 In the diagram, the 2-bit printed data [SIH, SIL] corresponding to the shift registers 212 of levels 1, 2, ..., n, which are latched by the latching circuit 214, are illustrated as LT1, LT2, ..., LTn.

[0091] The decoder 216 outputs logic level selection signals S1 and S2 based on the dot size specified by the latched 2-bit printed data [SIH, SIL].

[0092] Specifically, when the printed data [SIH, SIL] = [1, 1], decoder 216 sets the logic levels of selection signals S1 and S2 to H and L levels respectively within period T, and outputs this to selection circuit 230. As a result, selection circuit 230 selects the drive waveform Adp within period T and outputs the drive signal VOUT corresponding to "large dot LD". Alternatively, when the printed data [SIH, SIL] = [1, 0], decoder 216 sets the logic levels of selection signals S1 and S2 to L and H levels respectively within period T, and outputs this to selection circuit 230. As a result, selection circuit 230 selects the drive waveform Bdp within period T and outputs the drive signal VOUT corresponding to "small dot SD". Furthermore, when the printed data [SIH, SIL] = [0, 1] and when the printed data [SIH, SIL] = [0, 0], the decoder 216 sets the logic levels of the selection signals S1 and S2 to L and L levels respectively within the period T, and outputs them to the selection circuit 230. As a result, the selection circuit 230 does not select either the drive waveforms Adp or Bdp within the period T, and outputs a constant voltage Vc drive signal VOUT corresponding to "no ejection ND".

[0093] Here, when the selection circuit 230 does not select either the drive waveforms Adp or Bdp, the voltage Vc supplied to the piezoelectric element 60 just now is maintained at one end of the corresponding piezoelectric element 60 through the capacitive component of the piezoelectric element 60. That is, the drive signal VOUT output by the selection circuit 230 at a constant voltage Vc includes the case where the voltage Vc maintained at the just now by the capacitive component of the piezoelectric element 60 is supplied to the piezoelectric element 60 as the drive signal VOUT when neither the drive waveforms Adp nor Bdp are selected as the drive signal VOUT.

[0094] As described above, the drive signal selection circuit 200 selects or deselects drive signals COMA and COMB based on the printing data signal SI, the latch signal LAT, and the clock signal SCK, thereby generating a drive signal VOUT corresponding to each of the multiple ejector sections 600 and outputting it to the corresponding ejector section 600. This allows for individual control of the amount of ink ejected from each of the multiple ejector sections 600.

[0095] 3. Composition of the drive circuit

[0096] Next, the structure and operation of the drive circuit 52 for output drive signals COMA and COMB will be explained. Figure 9 This is a diagram illustrating an example of the configuration of the drive circuit 52. (As shown...) Figure 9 As shown, the drive circuit 52 includes an amplification control circuit 510, a driver circuit 520, and an amplification circuit 530.

[0097] The amplification control circuit 510 includes a memory 511, a latch circuit 512, an adder 513, a latch circuit 514, and a D / A converter 515. Additionally, as the digital waveform signal dO output by the control circuit 100, voltage change data dDATA, a latch signal dLAT, and a clock signal dCK are input to the amplification control circuit 510.

[0098] Voltage change data dDATA is input to memory 511. Memory 511 stores the voltage change information Dv included in the input voltage change data dDATA. A latch signal dLAT is input to latch circuit 512. Latch circuit 512 latches the voltage change information Dv held by memory 511 on the rising edge of the input latch signal dLAT. Then, latch circuit 512 outputs the latched voltage change information Dv to adder 513.

[0099] In addition to inputting the voltage change information Dv output by the latch circuit 512 into the adder 513, the adder 513 also inputs the signal output by the latch circuit 514, which will be described later. The adder 513 calculates and holds the summed voltage change information obtained by adding the voltage change information Dv to the signal output by the latch circuit 514.

[0100] A clock signal dCK is input to latch circuit 514. Latch circuit 514 latches the summed voltage change information held by adder 513 at the rising edge of clock signal dCK. Then, latch circuit 514 outputs the latched summed voltage change information to adder 513 and D / A converter 515. That is, adder 513 calculates and holds the new summed voltage change information by adding the voltage change information Dv latched by latch circuit 512 to the summed voltage change information latched by latch circuit 514.

[0101] The D / A converter 515 converts the summed voltage change information output by the latch circuit 514 into an analog signal and outputs it as a drive waveform signal WS to the driver circuit 520. The amplified signal waveform of the drive waveform signal WS output by the D / A converter 515, i.e., the drive waveform signal WS output by the amplification control circuit 510, is equivalent to the signal waveform of the drive signal COM.

[0102] Here, the operation of the amplification control circuit 510 for the output drive waveform signal WS will be explained. Figure 10 This is a diagram illustrating an example of the operation of the amplifier control circuit 510. (As shown...) Figure 10As shown, at time t0, the control circuit 100 generates voltage change data dDATA, which includes voltage change amount information Dv1 for causing the voltage value to change by voltage ΔV1, as a digital waveform signal dO, and outputs it to the memory 511. Thus, the voltage change amount information Dv1 is stored in the memory 511.

[0103] Then, at time t1, the control circuit 100 sets the logic level of the latch signal dLAT, which is a digital waveform signal dO, to a high level. As a result, the latch circuit 512 latches the voltage change information Dv1 held in the memory 511. At a subsequent time t3, the control circuit 100 outputs voltage change data dDATA, including voltage change information Dv0 used to maintain a constant voltage value, as a digital waveform signal dO to the memory 511. That is, the voltage change information Dv0 is held in the memory 511 instead of the voltage change information Dv1.

[0104] At time t1, the voltage change information Dv1 latched by latch circuit 512 is input to adder 513. Adder 513 adds the voltage change information Dv1 latched by latch circuit 512 to the summed voltage change information output by latch circuit 514, and holds it as the new summed voltage change information.

[0105] Additionally, the control circuit 100 generates a clock signal dCK that becomes H-level periodically by ΔT as a digital waveform signal dO, and outputs it to the latch circuit 514. Then, at times t2, t4, and t5, if an H-level clock signal dCK is input to the latch circuit 514, the latch circuit 514 latches the sum of the voltage changes by voltage ΔV1 each time an H-level clock signal dCK is input, and outputs this information to the D / A converter 515. Thus, the D / A converter 515 generates and outputs a drive waveform signal WS indicating the voltage increase of voltage ΔV1 at times t2, t4, and t5.

[0106] At a subsequent moment t6, the control circuit 100 sets the logic level of the latch signal dLAT, which is a digital waveform signal dO, to a high level. As a result, the latch circuit 512 latches the voltage change information Dv0, which is used to maintain the voltage value held in the memory 511 at a constant value. Furthermore, at a subsequent moment t8, the control circuit 100 generates voltage change data dDATA, which includes the voltage change information Dv2 used to change the voltage value by voltage -ΔV2, as a digital waveform signal dO, and outputs it to the memory 511. That is, the voltage change information Dv2 is held in the memory 511, replacing the voltage change information Dv0.

[0107] The voltage change information Dv0 latched by latch circuit 512 is input to adder 513. Adder 513 adds the voltage change information Dv0 latched by latch circuit 512 to the summed voltage change information output by latch circuit 514, and holds it as the new summed voltage change information.

[0108] Additionally, at times t7 and t9, a clock signal dCK of level H is input to the latch circuit 514. At this time, the voltage change information Dv0 latched by the latch circuit 512 is used to maintain a constant voltage value. Therefore, the latch circuit 514 latches the summed voltage change information, which does not change even when the input clock signal dCK of level H is applied, and outputs it to the D / A converter 515. Consequently, the D / A converter 515 generates and outputs a drive waveform signal WS with a constant voltage value at times t7 and t9.

[0109] Then, at time t10, the control circuit 100 sets the logic level of the latch signal dLAT, which is the digital waveform signal dO, to a high level. As a result, the latch circuit 512 latches the voltage change information Dv2 used to maintain the voltage value change voltage -ΔV2 held in the memory 511.

[0110] The voltage change information Dv2 latched by latch circuit 512 is input to adder 513. Then, adder 513 adds the voltage change information Dv2 latched by latch circuit 512 to the summed voltage change information output by latch circuit 514, and holds it as the new summed voltage change information.

[0111] Additionally, the control circuit 100 generates a clock signal dCK that becomes H-level periodically by ΔT as a digital waveform signal dO and outputs it to the latch circuit 514. Then, at times t11 and t12, if an H-level clock signal dCK is input to the latch circuit 514, the latch circuit 514 latches the sum of the voltage change (voltage value reduced by voltage ΔV2) each time an H-level clock signal dCK is input, and outputs it to the D / A converter 515. Thus, the D / A converter 515 generates and outputs a drive waveform signal WS (voltage value reduced by voltage ΔV2) at times t11 and t12.

[0112] As described above, the amplification control circuit 510 outputs a drive waveform signal WS with an increasing voltage value, a drive waveform signal WS with a decreasing voltage value, and a drive waveform signal WS with a constant voltage value based on the digital waveform signal dO. That is, the amplification control circuit 510 can output a drive waveform signal WS that corresponds to the signal waveform dO output by the control circuit 100.

[0113] In this embodiment of the liquid ejection device 1, the voltage change data dDATA included in the digital waveform signal dO input to the amplification control circuit 510 is described as data representing the change in the voltage value of the drive waveform signal WS in each cycle of the clock signal dCK. However, the voltage change data dDATA included in the digital waveform signal dO may also be data representing the absolute value of the voltage value of the drive waveform signal WS in each cycle of the clock signal dCK.

[0114] By making the voltage change data dDATA included in the digital waveform signal dO represent the change in voltage value of the drive waveform signal WS within each cycle of the clock signal dCK, the amount of data dDATA included in the digital waveform signal dO can be reduced, thereby increasing the transmission speed of the voltage change data dDATA included in the digital waveform signal dO. On the other hand, when the voltage change data dDATA included in the digital waveform signal dO represents the absolute value of voltage value of the drive waveform signal WS within each cycle of the clock signal dCK, the amplification control circuit 510 does not need to have an adder 513 and a latch circuit 514, thereby enabling miniaturization of the amplification control circuit 510.

[0115] Return to Figure 9 The driver circuit 520 receives the drive waveform signal WS output by the amplification control circuit 510 and a voltage signal Vamp with a specified voltage value input to the amplification circuit 530. Here, the voltage value of the voltage signal Vamp is greater than or equal to the maximum value of the voltage values ​​of the drive waveforms Adp and Bdp included in the drive signals COMA and COMB, for example, a DC voltage of 42V. The driver circuit 520 generates an amplified drive waveform signal by amplifying the voltage value of the input drive waveform signal WS based on the voltage signal Vamp. The waveform shape of this amplified drive waveform signal is the same as the waveform shape of the drive waveforms Adp and Bdp included in the drive signals COMA and COMB. Then, the driver circuit 520 generates amplification control signals Hdr and Ldr based on the generated amplified drive waveform signal and outputs them to the amplification circuit 530.

[0116] Specifically, the driver circuit 520 generates an amplified control signal Hdr obtained by applying a bias voltage of a predetermined voltage value to the amplified drive waveform signal, and an amplified control signal Ldr obtained by subtracting the bias voltage of the predetermined voltage value from the amplified drive waveform signal, and outputs them to the amplifier circuit 530. Here, it is preferable to determine the bias voltage applied to the amplified drive waveform signal by the driver circuit 520 based on the base-emitter saturation voltage of the transistor 531 in the amplifier circuit 530 (described later), and to determine the bias voltage subtracted from the amplified drive waveform signal by the driver circuit 520 based on the base-emitter saturation voltage of the transistor 532 in the amplifier circuit 530 (described later). This reduces the possibility of waveform distortion in the drive signal COM output by the driver circuit 520. Such a driver circuit 520 may be configured, for example, as an operational amplifier that amplifies the voltage value of the drive waveform signal WS based on a voltage signal Vamp.

[0117] The amplifier circuit 530 includes transistors 531 and 532. Transistor 531 is an NPN bipolar transistor, and transistor 532 is a PNP bipolar transistor. Preferably, transistors 531 and 532 form a complementary pair.

[0118] A voltage signal Vamp is input to the collector terminal of transistor 531. An amplification control signal Hdr is input to the base terminal of transistor 531. The emitter terminal of transistor 531 is electrically connected to the emitter terminal of transistor 532. An amplification control signal Ldr is input to the base terminal of transistor 532. A ground potential Gnd is input to the collector terminal of transistor 532. Then, the amplifier circuit 530 outputs the signal at the connection point Cout between the emitter terminals of transistors 531 and 532 as a drive signal COM.

[0119] In this amplifier circuit 530, when the voltage value of the drive waveform signal WS increases, i.e., when the voltage value of the amplified drive waveform signal generated by the driver circuit 520 increases, the collector terminal and emitter terminal of transistor 531 are controlled to be turned on, and the emitter terminal and collector terminal of transistor 532 are controlled to be turned off. Thus, current based on the voltage signal Vamp is supplied to the plurality of piezoelectric elements 60 connected to the connection point Cout via transistor 531. As a result, through the capacitive component of the piezoelectric element 60, the voltage value of the connection point Cout, i.e., the voltage value of the drive signal COM output by the amplifier circuit 530, increases in accordance with the voltage value of the amplified drive waveform signal generated by the driver circuit 520.

[0120] Furthermore, when the voltage value of the drive waveform signal WS decreases, that is, when the voltage value of the amplified drive waveform signal generated by the driver circuit 520 decreases, the collector terminal and emitter terminal of transistor 531 are controlled to be non-conductive, while the emitter terminal and collector terminal of transistor 532 are controlled to be conductive. As a result, the charge accumulated in the plurality of piezoelectric elements 60 connected to the connection point Cout is released to the ground potential Gnd via transistor 532. Consequently, the voltage value of the connection point Cout, that is, the voltage value of the drive signal COM output by the amplifier circuit 530, decreases in a manner that follows the voltage value of the amplified drive waveform signal generated by the driver circuit 520.

[0121] Furthermore, when the voltage value of the drive waveform signal WS is constant, that is, when the voltage value of the amplified drive waveform signal generated by the driver circuit 520 is constant, the collector terminal and emitter terminal of transistor 531 are controlled to be non-conductive, and the emitter terminal and collector terminal of transistor 532 are controlled to be non-conductive. Thus, the capacitive component of the piezoelectric element 60 connected to the connection point Cout maintains the voltage value of the connection point Cout, that is, the voltage value of the drive signal COM output by the amplifier circuit 530. In other words, the voltage value of the connection point Cout, that is, the voltage value of the drive signal COM output by the amplifier circuit 530, is maintained at the same voltage value as the voltage value of the amplified drive waveform signal generated by the driver circuit 520.

[0122] As described above, in the liquid ejection device 1 of this embodiment, the drive circuit 52 includes an amplification control circuit 510, a driver circuit 520, and an amplification circuit 530. The amplification control circuit 510 outputs a drive waveform signal WS with a predetermined drive signal COM based on a digital waveform signal dO, which is a digital signal. The driver circuit 520 generates an amplified drive waveform signal by amplifying the voltage of the drive waveform signal WS. Then, the amplification circuit 530 outputs the drive signal COM as a drive signal by amplifying the current of the amplified drive waveform signal. Thus, even when the ejection module 23 has a large number of piezoelectric elements 60, the drive circuit 52 can output a drive signal COM with a current sufficient to stably drive the large number of piezoelectric elements 60.

[0123] That is, the driving circuit 52a1 has an amplification control circuit 510 that receives the input digital waveform signal dA1 and outputs a driving waveform signal WS, and an amplification circuit 530 that amplifies the driving waveform signal WS and outputs a driving signal COMA1. The driving circuit 52b1 has an amplification control circuit 510 that receives the input digital waveform signal dB1 and outputs a driving waveform signal WS, and an amplification circuit 530 that amplifies the driving waveform signal WS and outputs a driving signal COMB1. Similarly, each of the driving circuits 52a2 to 52am has an amplification control circuit 510 that receives the corresponding digital waveform signals dA2 to dAm and outputs a driving waveform signal WS, and an amplification circuit 530 that amplifies the driving waveform signal WS and outputs the corresponding driving signals COMA2 to COMAAm. Each of the driving circuits 52b2 to 52bm has an amplification control circuit 510 that receives the corresponding digital waveform signals dB2 to dBm and outputs a driving waveform signal WS, and an amplification circuit 530 that amplifies the driving waveform signal WS and outputs the corresponding driving signals COMB2 to COMBm. That is, the head drive module 10 has multiple amplification control circuits 510 and multiple amplification circuits 530.

[0124] At this time, the multiple amplifier circuits 530 of the head drive module 10 each include transistors 531 and 532, which are bipolar transistors. The drive waveform signal WS is amplified in Class AB by the drive of transistors 531 and 532, thereby outputting the drive signal COM. That is, the multiple amplifier circuits 530 of the liquid ejection device 1 in this embodiment each constitute a Class AB amplifier circuit.

[0125] In this embodiment of the liquid ejection device 1, the driver circuit 520 and the amplification control circuit 510 included in the drive circuit 52 are configured as a single integrated circuit 500. This allows for miniaturization of the drive circuit 52. Furthermore, a portion of the circuitry constituting the amplification control circuit 510 and the driver circuit 520 can also be configured outside the integrated circuit 500. Additionally, in this case, the amplification control circuit 510 and driver circuit 520 included in one of the multiple drive circuits 52 in the head drive module 10 can be mounted on a single integrated circuit 500, as can the amplification control circuit 510 and driver circuit 520 included in a different drive circuit 52. That is, the amplification control circuit 510 and driver circuit 520 included in the drive circuit 52a of the drive signal output circuit 50-j and the amplification control circuit 510 and driver circuit 520 included in the drive circuit 52b of the drive signal output circuit 50-j can also be constituted by a single integrated circuit 500. Similarly, the amplification control circuit 510 and driver circuit 520 included in the drive circuit 52a of the drive signal output circuit 50-1 and the amplification control circuit 510 and driver circuit 520 included in the drive circuit 52a of the drive signal output circuit 50-j can also be constituted by a single integrated circuit 500. In the liquid ejection device 1 of this embodiment, the case where the amplification control circuit 510 and driver circuit 520 included in the drive circuit 52a of the drive signal output circuit 50-j and the amplification control circuit 510 and driver circuit 520 included in the drive circuit 52b of the drive signal output circuit 50-j is described as being constituted by a single integrated circuit 500.

[0126] 4. Structure of the head driver module

[0127] As the number of piezoelectric elements 60 driven by the drive signal COM increases, the current generated by the propagation of the drive signal COM in the drive circuit 52 configured as described above increases, leading to increased heat generation. Particularly in the head drive module 10, which has multiple drive circuits 52 as shown in the liquid ejection device 1 of this embodiment, the high-density arrangement of the multiple drive circuits 52 causes heat concentration within them, potentially resulting in localized temperature rises. Such temperature rises in the head drive module 10 can decrease the operational stability of the head drive module 10, which includes multiple drive circuits 52. Assuming that the operational stability of the head drive module 10 decreases, the operational stability of the liquid ejection module 20, which is controlled by the head drive module 10, also decreases, resulting in a decrease in the ejection accuracy of ink from the liquid ejection module 20.

[0128] In the liquid ejection device 1 of this embodiment, the head drive module 10 is characterized by excellent heat dissipation performance, which efficiently releases the heat generated in the drive circuit 52, thus reducing the likelihood that the operational stability of the head drive module 10 will decrease due to the heat generated in the multiple drive circuits 52. As a result, the likelihood of a decrease in the operational stability of the liquid ejection module 20 is reduced, and the likelihood of a decrease in the ejection accuracy of the ink ejected from the liquid ejection module 20 is also reduced.

[0129] A specific example of the structure of such a head drive module 10 with excellent heat dissipation performance will be described. Figure 11 This diagram illustrates an example of the structure of the head drive module 10. In the following description, the liquid ejection module 20 will be described as having six ejection modules 23, namely ejection modules 23-1 to 23-6. Therefore, the head drive module 10 will be described as having drive signal output circuits 50-1 to 50-6 corresponding to each of the ejection modules 23-1 to 23-6. Furthermore, in the following description, mutually orthogonal X-axis, Y-axis, and Z-axis will be used. Sometimes, the starting side of the arrow along the illustrated X-axis will be called the -X side, and the front end side will be called the +X side; the starting side of the arrow along the illustrated Y-axis will be called the -Y side, and the front end side will be called the +Y side; the starting side of the arrow along the illustrated Z-axis will be called the -Z side, and the front end side will be called the +Z side.

[0130] like Figure 11 As shown, the head drive module 10 has a drive circuit board 800 and heat sinks 710 and 720.

[0131] The drive circuit board 800 includes a wiring board 810 and various circuits including connection portions CN1 and CN2 mounted on the wiring board 810, an integrated circuit 101, and drive signal output circuits 50-1 to 50-6.

[0132] Heat sink 710 has a recess 711 opening towards the -Z side and is located on the +Z side of drive circuit board 800, while heat sink 720 has a recess 721 opening towards the -Z side and is located on the -Z side of drive circuit board 800. Furthermore, drive circuit board 800 is housed within the space formed by the recess 711 of heat sink 710 and the recess 721 of heat sink 720. In other words, drive circuit board 800, which includes wiring board 810 and various circuits including connection portions CN1, CN2, integrated circuit 101, and drive signal output circuits 50-1 to 50-6 mounted on wiring board 810, is housed within the space formed by the recess 711 of heat sink 710 and the recess 721 of heat sink 720. Drive circuit board 800 and the various circuits included in drive circuit board 800 are cooled by both heat sink 710 and heat sink 720. In other words, both heat sink 710 and heat sink 720 promote the cooling of the drive circuit board 800 and the various circuits contained therein. Therefore, the heat generated in the drive circuit board 800 is efficiently released. From the perspective of efficiently releasing the heat generated in the drive circuit board 800, the heat sinks 710 and 720 are preferably made of a metal material with high thermal conductivity, such as aluminum, iron, or copper.

[0133] Furthermore, the heat sink 710 has an opening 712 that connects the +Z side surface to the recess 711, and a cooling fan 713 mounted on the opening 712. The cooling fan 713 delivers airflow to the recess 711 of the heat sink 710 through the opening 712. Thus, the cooling fan 713 promotes cooling of the drive circuit board 800 housed in the space formed by the recesses 711 and 721. In other words, due to the presence of the cooling fan 713, the heat dissipation performance of the heat sink 710 is higher than that of the heat sink 720. Here, the fact that the heat dissipation performance of the radiator 710 is higher than that of the radiator 720 is not limited to the configuration using the cooling fan 713. For example, it may include cases where the thermal conductivity of the material used for the radiator 710 is higher than that of the material used for the radiator 720, the area in the radiator 710 that contributes to heat dissipation is larger than that in the radiator 720, or the heat capacity in the radiator 710 that contributes to heat dissipation is larger than that in the radiator 720.

[0134] As described above, the head drive module 10 has a heat sink 710 and a heat sink 720 that facilitate heat dissipation of the multiple amplification control circuits 510 and multiple amplification circuits 530 included in the drive signal output circuits 50-1 to 50-6 of the drive circuit board 800, which are various circuits provided on the drive circuit board 800.

[0135] Here, a specific example of the structure of the drive circuit board 800, which includes the wiring board 810, the connection portions CN1 and CN2 mounted on the wiring board 810, the integrated circuit 101, and the drive signal output circuits 50-1 to 50-6, will be described. Figure 12 This is a diagram illustrating an example of the structure of the drive circuit board 800. (As shown...) Figure 12 As shown, the drive circuit board 800 includes a wiring board 810, drive signal output circuits 50-1 to 50-6, connection parts CN1 and CN2, and integrated circuit 101.

[0136] The wiring substrate 810 is a plate-shaped component extending in a plane formed by the X and Y axes. It is generally rectangular, including a side 811 extending along the Y axis, a side 812 located on the +X side of side 811 and extending along the Y axis, a side 813 intersecting sides 811 and 812 and extending along the X axis, and a side 814 located on the -Y side of side 813, intersecting sides 811 and 812 and extending along the X axis. Drive signal output circuits 50-1 to 50-6, connection portions CN1 and CN2, and integrated circuit 101 are mounted on this wiring substrate 810. In the following description, in the wiring substrate 810, which is a plate-shaped component extending in a plane formed by the X and Y axes, the surface located on the +Z side is referred to as surface 815, and the surface located on the -Z side is referred to as surface 816. That is, the head drive module 10 has a wiring substrate 810, which includes a surface 815 and a surface 816 located opposite each other along the Z-axis, and is provided with an amplification control circuit 510 and an amplification circuit 530 included in the drive circuits 52a and 52b of each of the drive signal output circuits 50-1 to 50-6.

[0137] A connector CN1 is disposed on surface 815 of the wiring substrate 810, located along edge 811. A cable (not shown) electrically connected to the control unit 2 is mounted on the connector CN1. Thus, various signals output by the control unit 2, including image information signal IP, are supplied to the head drive module 10 via the connector CN1. It should be noted that the connector CN1 is not limited to a configuration for mounting cables transmitting various signals including image information signal IP; for example, it could be a BtoB connector that directly electrically connects the head drive module 10 and the control unit 2.

[0138] A connecting portion CN2 is disposed on surface 815 of the wiring substrate 810, located along edge 812. One end of the wiring component 30 is mounted to the connecting portion CN2. The other end of the wiring component 30 is connected to the liquid ejection module 20. Thus, various signals, including drive signals COMA1~COMA6, COMB1~COMB6 output from the head drive module 10 and data signals DATA, are supplied to the liquid ejection module 20 via the connecting portion CN2.

[0139] Integrated circuit 101 is disposed on surface 815 of wiring substrate 810, and located on the +X side of connection portion CN1 and the -X side of connection portion CN2. Part or all of the control circuit 100 described above is mounted on integrated circuit 101. That is, when an image information signal IP input via connection portion CN1 is input to integrated circuit 101, integrated circuit 101 generates and outputs various signals based on the input image information signal IP. Here, in addition to control circuit 100, integrated circuit 101 may also include part or all of the conversion circuit 120 described above. It should be noted that in the liquid ejection device 1 of this embodiment, the description assumes that all of control circuit 100 and all of conversion circuit 120 are mounted on integrated circuit 101.

[0140] The drive signal output circuits 50-1 to 50-6 are located in the wiring substrate 810 between the integrated circuit 101 and the connection part CN2.

[0141] Specifically, drive signal output circuits 50-1 to 50-3 of drive signal output circuits 50-1 to 50-6 are arranged and positioned along the X-axis between integrated circuit 101 and connecting part CN2, from side 811 toward side 812, in the order of drive signal output circuit 50-1, drive signal output circuit 50-2, and drive signal output circuit 50-3. Furthermore, drive signal output circuits 50-4 to 50-6 of drive signal output circuits 50-1 to 50-6 are arranged and positioned along the X-axis between integrated circuit 101 and connecting part CN2, with drive signal output circuits 50-4, drive signal output circuit 50-5, and drive signal output circuit 50-6 from side 811 toward side 812 on the side of drive signal output circuits 50-1 to 50-3.

[0142] In the drive signal output circuit 50-1, the transistors 531 and 532 included in the drive circuit 52a are disposed on the surface 815 of the wiring substrate 810 and are arranged and positioned along the X-axis with transistor 531 on the side of edge 811 and transistor 532 on the side of edge 812. The transistors 531 and 532 included in the drive circuit 52b are disposed on the surface 815 of the wiring substrate 810 on the +Y side of the transistors 531 and 532 included in the drive circuit 52a and are arranged and positioned along the X-axis with transistor 531 on the side of edge 811 and transistor 532 on the side of edge 812.

[0143] Furthermore, in the drive signal output circuit 50-1, an integrated circuit 500, which houses the driver circuit 520 and amplification control circuit 510 included in the drive circuit 52a, and the driver circuit 520 and amplification control circuit 510 included in the drive circuit 52b, is located between transistors 531 and 532 included in the drive circuit 52a of the drive signal output circuit 50-1, and between transistors 531 and 532 included in the drive circuit 52b of the drive circuit 50-1, and is disposed on surface 816 of the wiring substrate 810 when viewed from the direction along the Z-axis. That is, the integrated circuit 500 of the drive signal output circuit 50-1 and the transistors 531 and 532 included in the drive circuit 52a and drive circuit 52b of the drive signal output circuit 50-1 are mounted on different surfaces of the wiring substrate 810. The integrated circuit 500 of the drive signal output circuit 50-1 is located between the transistors 531 and 532 included in the drive circuit 52a and between the transistors 531 and 532 included in the drive circuit 52b of the drive signal output circuit 50-1.

[0144] In other words, the amplifier circuit 530, which is configured to include transistors 531 and 532, is disposed on surface 815 of the wiring substrate 810, and the amplifier control circuit 510, which is mounted on the integrated circuit 500, is disposed on surface 816 of the wiring substrate 810. At this time, when viewing the wiring substrate 810 from the normal direction of the wiring substrate 810, that is, along the Z-axis, the integrated circuit 500 including the amplifier control circuit 510 is located between transistors 531 and 532 included in the amplifier circuit 530.

[0145] Similarly, in each of the drive signal output circuits 50-2 to 50-6, the transistors 531 and 532 included in the drive circuit 52a are disposed on the surface 815 of the wiring substrate 810 and are arranged and positioned along the X-axis with transistor 531 on the side of edge 811 and transistor 532 on the side of edge 812. The transistors 531 and 532 included in the drive circuit 52b are disposed on the surface 815 of the wiring substrate 810 on the +Y side of the transistors 531 and 532 included in the corresponding drive circuit 52a, and are arranged and positioned along the X-axis with transistor 531 on the side of edge 811 and transistor 532 on the side of edge 812.

[0146] Furthermore, in each of the drive signal output circuits 50-2 to 50-6, an integrated circuit 500, which houses the driver circuit 520 and amplification control circuit 510 included in the drive circuit 52a and the driver circuit 520 and amplification control circuit 510 included in the drive circuit 52b, is located between transistors 531 and 532 included in the drive circuit 52a of the corresponding drive signal output circuits 50-2 to 50-6, and between transistors 531 and 532 included in the drive circuit 52b of the corresponding drive signal output circuits 50-2 to 50-6, and is disposed on the surface 816 of the wiring substrate 810. That is, in each of the drive signal output circuits 50-2 to 50-6, the integrated circuit 500 and the transistors 531 and 532 included in the drive circuit 52a and drive circuit 52b of the corresponding drive signal output circuits 50-2 to 50-6 are mounted on different surfaces of the wiring substrate 810. The integrated circuit 500 is located between the transistors 531 and 532 included in the drive circuit 52a of the corresponding drive signal output circuits 50-2 to 50-6, and between the transistors 531 and 532 included in the drive circuit 52b.

[0147] In other words, the transistors 531 and 532 of the amplifier circuits 530 included in each of the plurality of drive circuits 52 of the head drive module 10 are disposed on surface 815 of the wiring substrate 810, but not on surface 816 of the wiring substrate 810. Similarly, the integrated circuit 500 of the amplification control circuit 510 included in each of the plurality of drive circuits 52 of the head drive module 10 is disposed on surface 816 of the wiring substrate 810, but not on surface 815 of the wiring substrate 810. That is, in the liquid ejection device 1 of this embodiment, all the transistors 531 and 532 of the amplifier circuits 530 included in each of the plurality of drive circuits 52 of the head drive module 10 are disposed on surface 815 of the wiring substrate 810, and all the integrated circuit 500 of the amplification control circuit 510 included in each of the plurality of drive circuits 52 of the head drive module 10 is disposed on surface 816 of the wiring substrate 810.

[0148] In the drive circuit board 800 configured as described above, the image information signal IP input via the connection part CN1 is supplied to the integrated circuit 101. The control circuit 100 and conversion circuit 120 included in the integrated circuit 101 generate digital waveform signals dA1~dA6, dB1~dB6 and data signal DATA based on the image information signal IP, and output them from the integrated circuit 101. The digital waveform signals dA1~dA6 and dB1~dB6 output from the integrated circuit 101 propagate in the wiring pattern (not shown) of the wiring board 810 and are input to the corresponding drive circuit 52. Each drive circuit 52 generates corresponding drive signals COMA1~COMA6 and COMB1~COMB6 based on the input digital waveform signals dA1~dA6 and dB1~dB6, and outputs them. Then, multiple signals including the drive signals COMA1~COMA6 and COMB1~COMB6 output by multiple drive circuits 52 and the data signal DATA output by the integrated circuit 101 are supplied to the liquid ejection module 20 via the connection part CN2. Thus, ink is ejected from the liquid ejection module 20 by the head drive module 10 as the operation of the liquid ejection module 20.

[0149] In this embodiment of the liquid ejection device 1, an example is shown where the integrated circuit 101, including the control circuit 100, is mounted together with multiple drive circuits 52 on the wiring substrate 810. However, the integrated circuit 101 can also be mounted on a different substrate (not shown) than the drive circuits 52. By mounting the integrated circuit 101 and multiple drive circuits 52 on a common substrate, as in the liquid ejection device 1 of this embodiment, the wiring length for signal propagation between the multiple drive circuits 52 and the integrated circuit 101 can be shortened. This reduces the possibility of noise or the like superimposing on the signals propagating between the multiple drive circuits 52 and the integrated circuit 101, and improves the waveform accuracy of various signals, including the drive signals COM output by each of the multiple drive circuits 52. On the other hand, the heat generated by the multiple drive circuits 52 is greater than that generated by the integrated circuit 101. By mounting these heat-generating multiple drive circuits 52 and the integrated circuit 101 on different substrates, the possibility of heat generated in the multiple drive circuits 52 affecting the integrated circuit 101 is reduced. As a result, the possibility of decreased operational stability of the integrated circuit 101 is reduced.

[0150] Furthermore, in the head drive module 10 of the liquid ejection device 1 in this embodiment, such as Figure 12The drive circuit board 800 shown is housed in the space formed by the recess 711 of the heat sink 710 located on the +Z side of the drive circuit board 800 and the recess 721 of the heat sink 720 located on the -Z side of the drive circuit board 800. At this time, heat generated in the drive circuit board 800, including heat generated in the transistors 531, 532 and the integrated circuit 500 included in the drive circuit board 800, is released from both the +Z and -Z sides of the drive circuit board 800 via the heat sinks 710 and 720. Therefore, in the liquid ejection device 1 of this embodiment, the possibility of a decrease in the operational stability of the head drive module 10 due to heat generated in the plurality of drive circuits 52 included in the head drive module 10 is reduced. Consequently, the possibility of a decrease in the operational stability of the liquid ejection module 20 controlled by the head drive module 10 is also reduced, and the possibility of a decrease in the ejection accuracy of ink ejected from the liquid ejection module 20 is also reduced.

[0151] Here, an example of the heat dissipation structure of the drive circuit 52 in the head drive module 10 of the liquid ejection device 1 of this embodiment, and the thermal connection between the transistors 531, 532 and integrated circuit 500 in the head drive module 10 and the heat sinks 710 and 720 will be described. Here, "thermal connection" includes not only a state in which two components are physically in contact with each other, where a connection is made in a manner that causes heat to move between two or more components, but also a state in which one or more intervening materials with excellent thermal conductivity are provided between two components and the connection is made through the intervening materials, and a state in which there is a gap between two components but the gap is 100 μm or less. In addition, as an "intervening material with excellent thermal conductivity" for thermal connection, any material with high conductivity can be used, but it is preferable to use a material that, in addition to high thermal conductivity, also has flame retardancy, electrical insulation and surface conformability, such as conductive grease containing silicone or acrylic resin and having high thermal conductivity, gel sheet, rubber sheet, etc.

[0152] In explaining a specific example of the thermal connection relationship between transistors 531, 532 and integrated circuit 500 in the head drive module 10 and heat sinks 710 and 720, firstly, an example of the structure of transistors 531 and 532 included in the drive circuit 52 will be described. As described above, in the liquid ejection device 1 of this embodiment, transistor 531 is an NPN bipolar transistor, transistor 532 is a PNP bipolar transistor, and transistors 531 and 532 form a complementary pair. Therefore, transistors 531 and 532 have the same structure only differing in the type of semiconductor element they carry. In the following description, only the structure of transistor 531 will be described in detail using the accompanying drawings, while the structure of transistor 532 will be omitted from the drawings and its description will be simplified or omitted.

[0153] Figure 13 This is a diagram illustrating an example of the structure of transistor 531. (As shown...) Figure 13 As shown, transistor 531 has a molding section 531mo, lead frames 531fa, 531fb, 531fc, a semiconductor chip 531cp, and external connection terminals 531ta, 531tb, and 531tc.

[0154] The molding portion 531mo has a surface 531mb and a surface 531mf. Surface 531mb is the surface with the largest area in the molding portion 531mo, and surface 531mf is located opposite to surface 531mb and is either equal in area to or second in size to surface 531mb. That is, the transistor 531 includes surface 531mb and surface 531mf, with surface 531mb having a larger area than surface 531mf, and the two surfaces being located opposite each other. Furthermore, lead frames 531fa, 531fb, and 531fc, and a semiconductor chip 531cp are disposed inside the molding portion 531mo. In other words, the molding portion 531mo is formed in a manner that covers the lead frames 531fa, 531fb, 531fc, and the semiconductor chip 531cp. The molded portion 531mo is configured to include flame-retardant epoxy resin, etc., and functions as a protective component to protect the internally disposed semiconductor chip 531cp from the influence of external air and impact. It should be noted that the molded portion 531mo is not limited to being made of a single material. For example, from the perspective of improving heat dissipation, the surface 531mb can also be configured to include tin-based alloy materials or copper-based alloy materials. In this case, the tin-based alloy material or copper-based alloy material constituting the surface 531mb can also be integrally formed with the lead frame 531fb described later.

[0155] The lead frame 531fb is made of a copper-based alloy. Inside the molding section 531mo, the lead frame 531fb includes a flat plate extending along a plane formed by at least one of surfaces 531mb and 531mf, located closer to surface 531mb than surface 531mf. That is, the lead frame 531fb is positioned such that the thermal resistance between the lead frame 531fb and surface 531mb is smaller than the thermal resistance between the lead frame 531fb and surface 531mf. A semiconductor chip 531cp, serving as an NPN bipolar transistor element, is mounted on the lead frame 531fb. The semiconductor chip 531cp is then fixed to the lead frame 531fb, for example, using a high-melting-point solder. Thus, the semiconductor chip 531cp is electrically connected to the lead frame 531fb. That is, transistor 531 includes semiconductor chip 531cp. Inside the molding part 531mo, semiconductor chip 531cp is fixed to lead frame 531fb, so that the thermal resistance between semiconductor chip 531cp and surface 531mb is smaller than the thermal resistance between semiconductor chip 531cp and surface 531mf.

[0156] Furthermore, the lead frames 531fa and 531fc, located inside the molding section 531mo, are each made of a copper-based alloy. The lead frames 531fa and 531fc are each electrically connected to the semiconductor chip 531cp via bonding wires (not shown), such as aluminum wires or gold wires. Thus, inside the molding section 531mo, the base electrode, collector electrode, and emitter electrode of the semiconductor chip 531cp, which serves as an NPN bipolar transistor element, are each electrically connected to their corresponding lead frames 531fa, 531fb, and 531fc.

[0157] External connection terminals 531ta, 531tb, and 531tc are connection terminals provided outside the molding section 531mo for mounting transistor 531 on wiring substrate 810, and are made of a material with copper alloy as the base material.

[0158] External connection terminal 531ta is integrally formed with lead frame 531fa and extends from face 531md of molded portion 531mo, which intersects with faces 531mb and 531mf, toward the outside of molded portion 531mo. External connection terminal 531tb is integrally formed with lead frame 531fb and extends from face 531md toward the outside of molded portion 531mo. External connection terminal 531tc is integrally formed with lead frame 531fc and extends from face 531md toward the outside of molded portion 531mo. That is, external connection terminals 531ta, 531tb, and 531tc function as the base terminal, collector terminal, and emitter terminal of transistor 531, and extend from face 531md of molded portion 531mo toward a direction away from molded portion 531mo. At this time, external connection terminals 531ta, 531tb, and 531tc are configured to... Figure 13 The forming process shown extends along the surface 531mf in a direction away from the molding portion 531mo.

[0159] In this embodiment of the liquid ejection device 1, the base electrode of the semiconductor chip 531cp is electrically connected to the lead frame 531fa, the collector electrode of the semiconductor chip 531cp is electrically connected to the lead frame 531fb, and the emitter electrode of the semiconductor chip 531cp is electrically connected to the lead frame 531fc. That is, the external connection terminal 531ta corresponds to the base terminal of the transistor 531, the external connection terminal 531tb corresponds to the collector terminal of the transistor 531, and the external connection terminal 531tc corresponds to the emitter terminal of the transistor 531. It should be noted that the relationships between the external connection terminals 531ta, 531tb, and 531tc and the base, emitter, and collector terminals of the transistor 531 are not limited to this.

[0160] As described above, in the liquid ejection device 1 of this embodiment, the transistors 531 included in the drive circuits 52a and 52b of each of the drive signal output circuits 50-1 to 50-6 are so-called SIP (Single In-line Package) type bipolar transistors with external connection terminals 531ta, 531tb, and 531tc arranged in a row on the surface 531md of the molding portion 531mo. After the external connection terminals 531ta, 531tb, and 531tc extending from the surface 531md of the molding portion 531mo toward a direction away from the molding portion 531mo are formed into a predetermined shape, they are mounted on the surface 815 of the wiring substrate 810.

[0161] Here, as described above, transistor 531 and transistor 532 have the same structure. That is, transistor 532 has molding portions 532mo, surfaces 532mb, 532mf, 532md, lead frames 531fa, 531fb, 531fc, semiconductor chip 531cp, and external connection terminals 531ta, 531tb, 531tc corresponding to those of transistor 531. In this case, the area of ​​surface 532mb included in transistor 532 is larger than the area of ​​surface 532mf, and surfaces 532mb and 532mf are located opposite each other. Furthermore, the transistor 532 includes a semiconductor chip 532cp inside the molding portion 532mo. The semiconductor chip 532cp is fixed to the lead frame 532fb inside the molding portion 532mo, resulting in a lower thermal resistance between the semiconductor chip 532cp and the surface 532mb than the thermal resistance between the semiconductor chip 532cp and the surface 532mf. Additionally, the external connection terminals 532ta, 532tb, and 532tc of the transistor 532, which are electrically connected to the wiring substrate 810, are arranged in a row on the surface 532md of the molding portion 532mo. That is, the transistor 532 is a SiP-type bipolar transistor. Moreover, after the external connection terminals 532ta, 532tb, and 532tc extending from the surface 532md of the molding portion 532mo are formed into a predetermined shape, the transistor 532 is mounted on the surface 815 of the wiring substrate 810.

[0162] Figure 14 This diagram illustrates an example of the thermal connection between transistors 531, 532, and integrated circuit 500 and heat sinks 710 and 720. Here, Figure 14 This is a cross-sectional view of the head drive module 10 when it is cut by means of transistors 531, 532 and integrated circuit 500 of one of the multiple drive circuits 52 in the head drive module 10.

[0163] like Figure 14 As shown, in the head drive module 10, the drive circuit board 800 is housed in the space formed by the recesses 711 and 721 with the surface 815 of the wiring board 810 on the +Z side and the surface 816 of the wiring board 810 on the -Z side. Furthermore, transistors 531 and 532 and an integrated circuit 500 are mounted on the wiring board 810 of the drive circuit board 800.

[0164] Transistor 531 is disposed on surface 815 of wiring substrate 810 with molding portion 531mo on the -X side, external connection terminals 531ta, 531tb, and 531tc on the +X side, and at least a portion of surface 531mf in contact with surface 815. Furthermore, transistor 531 is electrically connected to wiring substrate 810 via solder or the like through external connection terminals 531ta, 531tb, and 531tc, thereby mounting transistor 531 on wiring substrate 810. Transistor 532 is disposed on surface 815 of wiring substrate 810 with molding portion 532mo on the +X side, external connection terminals 532ta, 532tb, and 532tc on the -X side, and at least a portion of surface 532mf in contact with surface 815. Furthermore, transistor 532 is electrically connected to wiring substrate 810 via solder or the like through external connection terminals 532ta, 532tb, and 532tc, thereby mounting transistor 532 on wiring substrate 810. That is, transistors 531 and 532 are mounted on surface 815 of wiring substrate 810 with external connection terminals 531ta, 531tb, 531tc opposite to external connection terminals 532ta, 532tb, 532tc.

[0165] When viewed along the Z-axis, at least a portion of integrated circuit 500 is located between transistors 531 and 532 and is mounted on surface 816 of wiring substrate 810. At this time, integrated circuit 500 is mounted on surface 816 of wiring substrate 810 such that at least a portion of integrated circuit 500 overlaps with at least a portion of transistor 531 and at least a portion of integrated circuit 500 overlaps with at least a portion of transistor 532 when viewed along the Z-axis.

[0166] Here, transistors 531 and 532 are mounted on surface 815 of the wiring substrate 810 with external connection terminals 531ta, 531tb, 531tc opposite to external connection terminals 532ta, 532tb, 532tc. Therefore, integrated circuit 500 is mounted on surface 816 of the wiring substrate 810 between external connection terminals 531ta, 531tb, 531tc and external connection terminals 532ta, 532tb, 532tc when viewed along the Z-axis. This shortens the wiring length for transmitting the amplified control signal Hdr from integrated circuit 500 to transistor 531 and the amplified control signal Ldr from integrated circuit 500 to transistor 532. As a result, the possibility of noise superimposed in the amplified control signals Hdr and Ldr is reduced, and the drive control of transistors 531 and 532 is improved. Therefore, the waveform accuracy of the drive signal COM output by the drive circuit 52 is improved, and the ejection accuracy of ink ejected from the liquid ejection module 20 is improved.

[0167] The heat sink 720 is located on the -Z side of the drive circuit board 800, that is, on the surface 816 side of the wiring board 810. The heat sink 720 includes protrusions 722, 723, and 724 that protrude toward the +Z side.

[0168] The protrusion 722 is formed correspondingly to the transistor 531. Specifically, when viewing the head drive module 10 from the Z-axis direction, the protrusion 722 is positioned such that at least a portion overlaps with at least a portion of the surface 531mf of the transistor 531. Furthermore, in the Z-axis direction, the heat-conducting member 543, serving as an intermediary, is located between the wiring substrate 810 and the protrusion 722. Moreover, with the drive circuit substrate 800 housed in the space formed by the recesses 711 and 721, the protrusion 722 contacts one side of the heat-conducting member 543, the other side of the heat-conducting member 543 contacts the surface 816 of the wiring substrate 810, and the surface 531mf of the transistor 531 contacts the area of ​​the surface 815 opposite the surface 816 of the heat-conducting member 543 along the Z-axis. That is, the protrusion 722, the surface 531mf, and the heat-conducting member 543 are positioned such that at least a portion overlaps when viewed from the Z-axis direction. Thus, the protrusion 722 and the surface 531mf of the transistor 531 are thermally connected via the heat conduction component 543 and the wiring substrate 810. Consequently, the heat generated in the transistor 531 is efficiently transferred to the heat sink 720 via the wiring substrate 810 and the heat conduction component 543. Therefore, the heat dissipation efficiency generated in the transistor 531 is improved.

[0169] Here, as described above, the heat conduction component 543 used as the intermediary part is preferably made of a material with high thermal conductivity and flame retardancy, electrical insulation, and surface conformability, such as conductive grease, gel sheet, or rubber sheet. Thus, the heat conduction component 543 functions not only as a heat conduction component that transmits heat generated in the transistor 531 to the heat sink 720, but also as a component that insulates the wiring substrate 810 from the heat sink 720 and improves the seal between the wiring substrate 810 and the heat sink 720.

[0170] As described above, the surface 531mf of transistor 531 is thermally connected to the surface 815 of wiring substrate 810, and the surface 816 of wiring substrate 810 is thermally connected to heat sink 720. Therefore, heat sink 720 is thermally connected to amplifier circuit 530 including transistor 531 via wiring substrate 810. Thus, the heat generated in transistor 531, i.e., the heat generated in amplifier circuit 530 including transistor 531, is efficiently transferred to heat sink 720 and released to the outside. At this time, the liquid ejection device 1 of this embodiment has a heat conduction member 543, which is located between heat sink 720 and wiring substrate 810, i.e., between the protrusion 722 of heat sink 720 and surface 816 of wiring substrate 810, and is in contact with both heat sink 720 and wiring substrate 810. That is, surface 816 of wiring substrate 810 and heat sink 720 are thermally and physically connected via the insulating heat conduction member 543. This improves the heat dissipation efficiency between the surface 816 of the wiring substrate 810 and the heat sink 720, and also improves the insulation performance between the surface 816 of the wiring substrate 810 and the heat sink 720.

[0171] Here, more preferably, with the drive circuit board 800 housed in the space formed by the recesses 711 and 721, when viewing the head drive module 10 in the Z-axis direction, the protrusion 722 is positioned such that the entire protrusion 722 overlaps with at least a portion of the surface 531mf of the transistor 531, or such that at least a portion of the protrusion 722 overlaps with the entire surface 531mf of the transistor 531. As a result, the heat generated in the transistor 531 is transferred to the heat sink 720 more efficiently via the wiring board 810 and the heat conduction member 543. Consequently, the heat release efficiency generated in the transistor 531 is further improved.

[0172] In addition, such as Figure 12 As shown, multiple transistors 531 are arranged side-by-side along the Y-axis on surface 815 of the wiring substrate 810. The heat sink 720 may include a protrusion 722 corresponding individually to each of the multiple transistors 531 arranged side-by-side along the Y-axis, or it may include several common protrusions 722 among the multiple transistors 531 arranged side-by-side along the Y-axis. Additionally, cutouts, through holes, etc., may be formed on the protrusions 722, extending along the X-axis from the -X side to the +X side of the protrusion 722. Thus, the gas, including the airflow blown by the cooling fan 713, can circulate efficiently within the space formed by the recesses 711 and 721. Therefore, the cooling efficiency in the head drive module 10 is improved.

[0173] The protrusion 723 is formed correspondingly to the transistor 532. Specifically, when viewing the head drive module 10 from the direction along the Z-axis, the protrusion 723 is positioned such that at least a portion overlaps with at least a portion of the surface 532mf of the transistor 532. Furthermore, in the direction along the Z-axis, the heat-conducting member 544, serving as an intermediary, is located between the wiring substrate 810 and the protrusion 723. Moreover, when the drive circuit substrate 800 is accommodated in the space formed by the recesses 711 and 721, the protrusion 723 contacts one side of the heat-conducting member 544, the other side of the heat-conducting member 544 contacts the surface 816 of the wiring substrate 810, and the surface 532mf of the transistor 532 contacts the area of ​​the surface 815 opposite the surface 816 of the heat-conducting member 544 along the Z-axis. That is, the protrusion 723, the surface 532mf, and the heat-conducting member 544 are positioned such that at least a portion overlaps when viewed from the direction along the Z-axis. Thus, the protrusion 723 and the surface 532mf of the transistor 532 are thermally connected via the heat conduction component 544 and the wiring substrate 810. Consequently, the heat generated in the transistor 532 is efficiently transferred to the heat sink 720 via the wiring substrate 810 and the heat conduction component 544. Therefore, the heat dissipation efficiency generated in the transistor 532 is improved.

[0174] Here, as described above, the heat conduction component 544 used as the intervening part is preferably made of a material with high thermal conductivity and flame retardancy, electrical insulation, and surface conformability, such as conductive grease, gel sheet, or rubber sheet. Thus, the heat conduction component 544 functions not only as a heat conduction component that transmits heat generated in the transistor 532 to the heat sink 720, but also as a component that insulates the wiring substrate 810 from the heat sink 720 and improves the seal between the wiring substrate 810 and the heat sink 720.

[0175] As described above, the surface 532mf of transistor 532 is thermally connected to the surface 815 of wiring substrate 810, and the surface 816 of wiring substrate 810 is thermally connected to heat sink 720. Therefore, heat sink 720 is thermally connected to amplifier circuit 530 including transistor 532 via wiring substrate 810. Thus, the heat generated in transistor 532, i.e., the heat generated in amplifier circuit 530 including transistor 532, is efficiently transferred to heat sink 720 and released to the outside. At this time, the liquid ejection device 1 of this embodiment has a heat conduction member 544, which is located between heat sink 720 and wiring substrate 810, i.e., between the protrusion 723 of heat sink 720 and surface 816 of wiring substrate 810, and is in contact with both heat sink 720 and wiring substrate 810. That is, surface 816 of wiring substrate 810 and heat sink 720 are thermally and physically connected via the insulating heat conduction member 544. This improves the heat dissipation efficiency between the surface 816 of the wiring substrate 810 and the heat sink 720, and also improves the insulation performance between the surface 816 of the wiring substrate 810 and the heat sink 720.

[0176] Here, more preferably, with the drive circuit board 800 housed in the space formed by the recesses 711 and 721, when viewing the head drive module 10 along the Z-axis direction, the protrusion 723 is positioned such that the entire protrusion 723 overlaps with at least a portion of the surface 532mf of the transistor 532, or such that at least a portion of the protrusion 723 overlaps with the entire surface 532mf of the transistor 532. As a result, the heat generated in the transistor 532 is transferred to the heat sink 720 more efficiently via the wiring board 810 and the heat conduction member 544. Consequently, the heat release efficiency generated in the transistor 532 is further improved.

[0177] In addition, such as Figure 12 As shown, multiple transistors 532 are arranged side-by-side along the Y-axis on surface 815 of the wiring substrate 810. The heat sink 720 may include a protrusion 723 corresponding individually to each of the multiple transistors 532 arranged side-by-side along the Y-axis, or it may include several common protrusions 723 among the multiple transistors 532 arranged side-by-side along the Y-axis. Additionally, cutouts, through holes, etc., may be formed on the protrusions 723, extending along the X-axis from the -X side to the +X side. This allows gas, including the airflow blown by the cooling fan 713, to circulate efficiently within the space formed by the recesses 711 and 721. Consequently, the cooling efficiency in the head drive module 10 is improved.

[0178] The protrusion 724 is formed correspondingly to the integrated circuit 500. Specifically, the protrusion 724 is positioned between protrusions 722 and 723 when viewed from the Y-axis direction of the head drive module 10, and at least a portion of it overlaps with at least a portion of the integrated circuit 500 when viewed from the Z-axis direction of the head drive module 10. Furthermore, in the Z-axis direction, a heat-conducting member 545, serving as an intermediary, is located between the integrated circuit 500 and the protrusion 724. Moreover, when the drive circuit board 800 is accommodated in the space formed by the recesses 711 and 721, one side of the protrusion 724 contacts the heat-conducting member 545, and the other side of the heat-conducting member 545 contacts the integrated circuit 500. That is, the protrusion 724, the integrated circuit 500, and the heat-conducting member 545 are positioned such that at least a portion overlaps when viewed from the Z-axis direction. Thus, the protrusion 724 and the integrated circuit 500 are thermally connected via the heat-conducting member 545. Therefore, the heat generated in the integrated circuit 500 is efficiently transferred to the heat sink 720 via the heat conduction component 545. As a result, the heat release efficiency generated in the integrated circuit 500 is improved.

[0179] Here, as described above, the heat conduction component 545 used as the intermediary part is preferably made of a material with high thermal conductivity and flame retardancy, electrical insulation, and surface conformability, such as conductive grease, gel sheet, or rubber sheet. Thus, the heat conduction component 545 functions not only as a heat conduction component that transmits heat generated in the integrated circuit 500 to the heat sink 720, but also as a component that insulates the integrated circuit 500 from the heat sink 720 and improves the seal between the integrated circuit 500 and the heat sink 720.

[0180] As described above, the integrated circuit 500 is thermally connected to the heat sink 720. In other words, the head drive module 10 includes a heat sink 720 thermally connected to the amplification control circuit 510 included in the integrated circuit 500. Thus, the heat generated in the integrated circuit 500 and the heat generated in the amplification control circuit 510 mounted on the integrated circuit 500 is efficiently transferred to the heat sink 720 and released to the outside. At this time, the liquid ejection device 1 of this embodiment includes a heat conduction member 545, which is located between the heat sink 720 and the integrated circuit 500, specifically between the protrusion 724 of the heat sink 720 and the integrated circuit 500, and is in contact with both the heat sink 720 and the integrated circuit 500. That is, the integrated circuit 500 and the heat sink 720 are thermally and physically connected via the insulating heat conduction member 545. This improves the heat dissipation efficiency between the integrated circuit 500 and the heat sink 720, and also improves the insulation performance between the integrated circuit 500, the surface 816 of the wiring substrate 810 on which the integrated circuit 500 is disposed, and the heat sink 720.

[0181] Here, more preferably, with the drive circuit board 800 housed in the space formed by the recesses 711 and 721, when viewing the head drive module 10 from the Z-axis direction, the protrusion 724 is positioned such that either the entire protrusion 724 overlaps with at least a portion of the integrated circuit 500, or at least a portion of the protrusion 724 overlaps with the entire integrated circuit 500. This allows the heat generated in the integrated circuit 500 to be transferred to the heat sink 720 more efficiently via the heat conduction member 545. As a result, the heat release efficiency of the transistor 532 is improved.

[0182] In addition, such as Figure 12 As shown, multiple integrated circuits 500 are arranged side-by-side along the Y-axis on surface 816 of the wiring substrate 810. The heat sink 720 may include a protrusion 724 corresponding individually to each of the multiple integrated circuits 500 arranged side-by-side along the Y-axis, or it may include several shared protrusions 724 among the multiple integrated circuits 500 arranged side-by-side along the Y-axis. Alternatively, cutouts or through holes may be formed on the protrusions 724, extending along the X-axis from the -X side to the +X side. This allows gas, including the airflow blown by the cooling fan 713, to circulate efficiently within the space formed by the recesses 711 and 721. As a result, the overall cooling efficiency of the drive circuit substrate 800 is improved.

[0183] As described above, the heat sink 720 includes a protrusion 724 protruding towards the +Z side and thermally connected to the amplification control circuit 510 included in the integrated circuit 500, a protrusion 722 protruding towards the +Z side and thermally connected to the transistor 531 included in the amplification circuit 530, and a protrusion 723 protruding towards the +Z side and thermally connected to the transistor 532 included in the amplification circuit 530. In other words, the heat sink 720 includes recesses between the protrusions 722 and 724, and between the protrusions 723 and 724. Therefore, the possibility that the heat from the amplification control circuit 510 included in the integrated circuit 500, released via the protrusion 724, will affect the transistors 531 and 532 included in the amplification circuit 530, is reduced, and the possibility that the heat from the transistor 531 included in the amplification circuit 530 released via the protrusion 722, and the heat from the transistor 532 included in the amplification circuit 530 released via the protrusion 723, will affect the amplification control circuit 510 included in the integrated circuit 500 is also reduced. Furthermore, by including recesses between protrusions 722 and 724, and between protrusions 723 and 724, in the heat sink 720, large electronic components along the Z-axis direction can be mounted on the surface 816 of the wiring substrate 810. As a result, the variety of electronic components that can be mounted on the wiring substrate 810 increases, and the versatility of the drive circuit board 800, including the wiring substrate 810, is improved.

[0184] The heat sink 710 is located on the +Z side of the drive circuit board 800, that is, on the surface 815 side of the wiring board 810. Furthermore, along the Z-axis, the heat conduction member 541, serving as an intermediary, is located between the heat sink 710 and the surface 531mb of the transistor 531, and the heat conduction member 542, also serving as an intermediary, is located between the heat sink 710 and the surface 532mb of the transistor 532. Moreover, when the drive circuit board 800 is housed in the space formed by the recesses 711 and 721, the surface 531mb of the transistor 531 contacts one side of the heat conduction member 541, and the other side of the heat conduction member 541 contacts the heat sink 710; the surface 532mb of the transistor 532 contacts one side of the heat conduction member 542, and the other side of the heat conduction member 542 contacts the heat sink 710. That is, the heat sink 710 and the surface 531mf of transistor 531 are thermally connected via heat conduction member 541, and the heat sink 710 and the surface 532mf of transistor 532 are thermally connected via heat conduction member 542. Thus, transistor 531 and heat sink 710 are thermally connected, and transistor 532 and heat sink 710 are thermally connected. Consequently, the heat generated in transistor 531 is efficiently transferred to heat sink 710 via heat conduction member 541, and the heat generated in transistor 532 is efficiently transferred to heat sink 710 via heat conduction member 542. Therefore, the heat dissipation efficiency of the heat generated in transistors 531 and 532, i.e., the heat generated in the amplifier circuit 530 including transistors 531 and 532, is improved.

[0185] Here, as described above, the heat conduction components 541 and 542 used as intermediary parts are preferably made of materials with high thermal conductivity and flame retardancy, electrical insulation, and surface conformability, such as conductive grease, gel sheets, and rubber sheets. Thus, in addition to functioning as heat conduction components that transmit the heat generated in transistors 531 and 532 to the heat sink 710, the heat conduction components 541 and 542 also function as components that insulate the transistors 531 and 532 from the heat sink 710 and improve the seal between the transistors 531 and 532 and the heat sink 710.

[0186] As described above, the facet 531mb of transistor 531 and the facet 532mb of transistor 532 are thermally connected to the heat sink 710. In other words, the amplifier circuit 530, including transistors 531 and 532, is thermally connected to the heat sink 710. Therefore, the heat generated in transistors 531 and 532, i.e., the heat generated in the amplifier circuit 530 including transistors 531 and 532, is efficiently transferred to the heat sink 710 and released to the outside. At this time, the liquid ejection device 1 of this embodiment has a heat conduction member 541 and a heat conduction member 542. The heat conduction member 541 is located between the heat sink 710 and the facet 531mb of transistor 531, and is in contact with both the heat sink 710 and the facet 531mb of transistor 531. The heat conduction member 542 is located between the heat sink 710 and the facet 532mb of transistor 532, and is in contact with both the heat sink 710 and the facet 532mb of transistor 532. That is, the heat sink 710 and the surface 531mb of the transistor 531 are thermally and physically connected via an insulating heat-conducting component 541, and the heat sink 710 and the surface 532mb of the transistor 532 are thermally and physically connected via an insulating heat-conducting component 542. This improves the heat dissipation efficiency between the transistors 531 and 532 and the heat sink 710, and also improves the insulation performance between the transistors 531 and 532 and the heat sink 710.

[0187] Furthermore, in the liquid ejection device 1 of this embodiment, as described above, the heat dissipation performance of the heat sink 710 is higher than that of the heat sink 720. By using such a heat sink 710 with excellent heat dissipation performance to release the heat generated in the transistors 531 and 532 without passing through the wiring substrate 810, the heat dissipation efficiency of the transistors 531 and 532 can be further improved.

[0188] Furthermore, in the liquid ejection device 1 of this embodiment, the heat sink 710, which has excellent heat dissipation properties, is not thermally connected to the surface 531mb of the transistor 531 with low thermal resistance from the semiconductor chip 531cp via the wiring substrate 810, nor is it thermally connected to the surface 532mb of the transistor 532 with low thermal resistance from the semiconductor chip 532cp via the wiring substrate 810. Therefore, the heat generated in the transistors 531 and 532, especially in the semiconductor chips 531cp and 532cp which generate significant heat, can be efficiently released via the heat sink 710. Consequently, the heat dissipation efficiency of the transistors 531 and 532 is further improved.

[0189] It should be noted that, in Figure 14The example shown illustrates a heat sink 710 without protrusions. However, heat sink 710 can also have protrusions corresponding to the surface 531mb of transistor 531 and the surface 532mb of transistor 532, similar to heat sink 720. Furthermore, heat sinks 710 and 720 can also have a structure with multiple fins formed towards the outside of the head drive module 10. This increases the area of ​​heat sinks 710 and 720, further improving the heat dissipation efficiency of heat sinks 710 and 720.

[0190] Here, in the drive circuit 52a of the drive signal output circuit 50-1, the amplification control circuit 510 is an example of a first basic drive signal output circuit, the digital waveform signal dA1 input to the amplification control circuit 510 of the drive circuit 52a is an example of a first digital signal, the drive waveform signal WS output by the amplification control circuit 510 of the drive circuit 52a is an example of a first basic drive signal, the amplification circuit 530 of the drive circuit 52a is an example of a first amplification circuit, the transistor 531 of the amplification circuit 530 is an example of a first transistor, the transistor 532 of the amplification circuit 530 is an example of a second transistor, the drive signal COMA1 output by the amplification circuit 530 of the drive circuit 52a is an example of a drive signal, and the piezoelectric element 60 of the ejection module 23-1 driven by the drive signal COMA1 is an example of a first capacitive load. Furthermore, in the drive circuit 52a of the drive signal output circuit 50-2, the amplification control circuit 510 is an example of a second basic drive signal output circuit; the digital waveform signal dA2 input to the amplification control circuit 510 of the drive circuit 52a is an example of a second digital signal; the drive waveform signal WS output by the amplification control circuit 510 of the drive circuit 52a is an example of a second basic drive signal; the amplification circuit 530 of the drive circuit 52a is an example of a second amplification circuit; the drive signal COMA2 output by the amplification circuit 530 of the drive circuit 52a is an example of a second drive signal; and the piezoelectric element 60 of the ejection module 23-2 driven by the drive signal COMA2 is an example of a second capacitive load. Moreover, the amplification control circuit 510 of each of the drive signal output circuits 50-1 to 50-6 is an example of multiple basic drive signal output circuits, and the amplification circuit 530 of each of the drive signal output circuits 50-1 to 50-6 is an example of multiple amplification circuits. Furthermore, the liquid ejection module 20 is an example of an ejection head, and the head drive module 10, which includes the drive circuit 52, is an example of a capacitive load drive circuit. Additionally, in the amplifier circuit 530 of the drive circuit 52a included in the drive signal output circuit 50-1, the surface 531mb of transistor 531 is an example of a first surface, the surface 531mf of transistor 531 is an example of a second surface, the surface 532mb of transistor 532 is an example of a third surface, and the surface 532mf of transistor 532 is an example of a fourth surface.Furthermore, surface 815 of wiring substrate 810 is an example of a first substrate surface, surface 816 of wiring substrate 810 is an example of a second substrate surface, heat sink 710 is an example of a first heat dissipation component, heat sink 720 is an example of a second heat dissipation component, the space formed by the recess 711 of heat sink 710 and the recess 721 of heat sink 720 is an example of a receiving portion, the protrusion 724 included in heat sink 720 is an example of a first protrusion, and at least one of the protrusions 722 and 723 included in heat sink 720 is an example of a second protrusion.

[0191] 5. Effects

[0192] As described above, in the liquid ejection device 1 of this embodiment, the head drive module 10 includes heat sinks 710 and 720 and a drive circuit board 800. The drive circuit board 800 includes: an amplification control circuit 510, which receives a digital waveform signal dO and outputs a drive waveform signal WS; an amplification circuit 530, including transistors 531 and 532, which amplifies the drive waveform signal WS by driving the transistors 531 and 532 and outputs a drive signal COM for driving the piezoelectric element 60; and a wiring board 810, on which the amplification control circuit 510 and the amplification circuit 530 are provided.

[0193] Furthermore, in the head drive module 10, the surface 531mb of transistor 531 and the surface 532mb of transistor 532 are thermally connected to the heat sink 710. The surface 531mf of transistor 531, located opposite to surface 531mb, and the surface 532mf of transistor 532, located opposite to surface 532mb, are thermally connected to the surface 815 of the wiring substrate 810. Furthermore, the surface 816 of the wiring substrate 810, located opposite to surface 815, is thermally connected to the heat sink 720. Thus, the heat generated in transistors 531 and 532 is released from surfaces 531mb and 532mb through the heat sink 710, and is also released from surfaces 531mf and 532mf through the wiring substrate 810 via the heat sink 720. In other words, the heat generated in transistors 531 and 532 is released from both surfaces of transistors 531 and 532 through the heat sinks 710 and 720. As a result, the heat dissipation efficiency from transistors 531 and 532 is improved, and the likelihood of transistors 531 and 532 becoming overheated is reduced. Consequently, the likelihood of a decrease in the operational stability of the drive circuit 52, including the amplifier circuit 530, is reduced. Therefore, the likelihood of a decrease in the waveform accuracy of the drive signal COM output by the drive circuit 52 and the head drive module 10 including the drive circuit 52 is reduced.

[0194] At this time, by making the heat sink 710, which is thermally connected to transistors 531 and 532 without passing through the wiring substrate 810, have a higher heat dissipation performance than the heat sink 720, which is thermally connected to transistors 531 and 532 through the wiring substrate 810, the heat release efficiency from transistors 531 and 532 is further improved. Therefore, the possibility of transistors 531 and 532 becoming overheated is further reduced. As a result, the possibility of decreased operational stability of the drive circuit 52, including the amplifier circuit 530, is further reduced, and the possibility of decreased waveform accuracy of the drive signal COM output by the drive circuit 52 and the head drive module 10 including the drive circuit 52 is further reduced.

[0195] Furthermore, by making the area of ​​facet 531mb in transistor 531 larger than the area of ​​facet 531mf, and by making the area of ​​facet 532mb in transistor 532 larger than the area of ​​facet 532mf, the heat dissipation efficiency of heat sink 710 for transistors 531 and 532 is further improved. Consequently, the likelihood of transistors 531 and 532 becoming overheated is further reduced. As a result, the likelihood of decreased operational stability of the drive circuit 52, including the amplifier circuit 530, is further reduced, and the likelihood of decreased waveform accuracy of the drive signal COM output by the drive circuit 52 and the head drive module 10 including the drive circuit 52 is further reduced.

[0196] Furthermore, by making the thermal resistance between semiconductor chip 531cp and surface 531mb in transistor 531 smaller than that between semiconductor chip 531cp and surface 531mf, and by making the thermal resistance between semiconductor chip 532cp and surface 532mb in transistor 532 smaller than that between semiconductor chip 532cp and surface 532mf, the heat dissipation efficiency of heat sink 710 for transistors 531 and 532 is further improved. Therefore, the possibility of transistors 531 and 532 becoming overheated is further reduced. As a result, the possibility of decreased operational stability of drive circuit 52, including amplifier circuit 530, is further reduced, and the possibility of decreased waveform accuracy of drive signal COM output by drive circuit 52 and head drive module 10 including drive circuit 52 is further reduced.

[0197] Furthermore, by employing a heat-conducting component 541, which, in addition to high thermal conductivity, also possesses flame retardancy, electrical insulation, and bump-following properties, located between the surface 531mb of transistor 531 and heat sink 710; a heat-conducting component 542, which, in addition to high thermal conductivity, also possesses flame retardancy, electrical insulation, and bump-following properties, located between the surface 532mb of transistor 532 and heat sink 710; and heat-conducting components 543 and 544, which, in addition to high thermal conductivity, also possess flame retardancy, electrical insulation, and bump-following properties, located between the surface 816 of wiring substrate 810 and heat sink 720, the insulation performance between heat sinks 710 and 720 and wiring substrate 810 is improved, and the fit between heat sinks 710 and 720 and transistors 531 and 532 and wiring substrate 810 is improved. Therefore, the heat dissipation efficiency of heat sinks 710 and 720 for transistors 531 and 532 is further improved. Consequently, the possibility of transistors 531 and 532 becoming overheated is further reduced. As a result, the possibility of decreased operational stability of the drive circuit 52, including the amplifier circuit 530, is further reduced, and the possibility of decreased waveform accuracy of the drive signal COM output by the drive circuit 52 and the head drive module 10 including the drive circuit 52 is further reduced.

[0198] Furthermore, by providing an amplifier circuit 530, including transistors 531 and 532, on surface 815 of the wiring substrate 810, and an amplification control circuit 510, which outputs the drive waveform signal WS, on surface 816 of the wiring substrate 810, the possibility of the temperature of the drive circuit 52 rising due to the interaction between the heat generated in the amplifier circuit 530 and the heat generated in the amplification control circuit 510 is reduced. Therefore, the possibility of decreased operational stability of the drive circuit 52 is reduced, and the possibility of decreased waveform accuracy of the drive signal COM output by the drive circuit 52 and the head drive module 10 including the drive circuit 52 is reduced.

[0199] At this time, since all the amplification circuits 530 included in the multiple drive circuits 52 disposed on the wiring substrate 810 are disposed on surface 815 of the wiring substrate 810, and all the amplification control circuits 510 included in the multiple drive circuits 52 are disposed on surface 816 of the wiring substrate 810, the possibility of heat generated in the amplification circuit 530 and heat generated in the amplification control circuit 510 interfering with each other is further reduced, and the possibility of temperature rise in the drive circuit 52 is further reduced. Therefore, the possibility of decreased operational stability of each of the multiple drive circuits 52 is reduced, and the possibility of decreased waveform accuracy of the drive signal COM output by the multiple drive circuits 52 and the head drive module 10 including the multiple drive circuits 52 is reduced.

[0200] Furthermore, by thermally connecting the heat sink 720, which promotes heat dissipation from the surface 816 side of the wiring substrate 810, to the amplification control circuit 510, the heat dissipation efficiency of the amplification control circuit 510 is also improved. Therefore, the possibility of the amplification control circuit 510 becoming overheated, in addition to transistors 531 and 532, is reduced. As a result, the possibility of decreased operational stability of the drive circuit 52, including the amplification circuit 530 and the amplification control circuit 510, is further reduced, and the possibility of decreased waveform accuracy of the drive signal COM output by the drive circuit 52 and the head drive module 10 including the drive circuit 52 is further reduced.

[0201] 6. Variations

[0202] Here, in the liquid ejection device 1 of this embodiment described above, the cooling of the drive circuit board 800 is promoted by the airflow blown by the cooling fan 713 through the radiator 710. However, it is not limited to this.

[0203] Figure 15 This is a diagram showing an example of a cross-section of the head drive module 10 in a modified example. (See diagram below.) Figure 15 As shown, the heat sink 710 may also have a water-cooling mechanism 715 that promotes cooling of the drive circuit board 800. In the water-cooling mechanism 715, cooling water is circulated by a pump or the like (not shown). As a result, the heat release capability of the heat sink 710 is further improved, and the heat release efficiency of the transistors 531 and 532, which promote heat release through the heat sink 710, is improved.

[0204] Alternatively, an insulating coating, such as epoxy resin, can be applied to the heat sinks 710 and 720. This increases the options for materials that can be used for the heat sinks 710 and 720, including the heat conduction component 541 between the transistor 531 and the heat sink 710, the heat conduction component 542 between the transistor 532 and the heat sink 710, the heat conduction components 543 and 544 between the wiring substrate 810 and the heat sink 720, and the heat conduction component 545 between the integrated circuit 500 and the heat sink 720. Furthermore, the heat sinks 710 and 720 can directly promote the release of heat generated in the drive circuit 52 without using heat conduction components 541-545. Therefore, the heat release efficiency of the heat sinks 710 and 720 for the heat generated in the drive circuit 52 is further improved. It should be noted that the heat sinks 710 and 720 only need to have insulating properties; they can also be made of insulating ceramics or the like, instead of an insulating coating based on epoxy resin.

[0205] The embodiments and variations have been described above, but the present invention is not limited to these embodiments and can be implemented in various ways without departing from its spirit. For example, the above embodiments can also be appropriately combined.

[0206] This invention includes configurations that are substantially the same as those described in the embodiments (e.g., configurations with the same function, method, and result, or configurations with the same purpose and effect). Additionally, this invention includes configurations that replace non-essential parts of the configurations described in the embodiments. Furthermore, this invention includes configurations that have the same effect as those described in the embodiments or that can achieve the same purpose. Additionally, this invention includes configurations that incorporate known techniques into the configurations described in the embodiments.

[0207] The following content is derived from the above implementation method.

[0208] One aspect of a capacitive load drive circuit includes:

[0209] The first basic drive signal output circuit is input with a first digital signal and outputs a first basic drive signal.

[0210] A first amplifier circuit amplifies the first basic drive signal and outputs a first drive signal to drive the first capacitive load; and

[0211] The wiring substrate includes a first substrate surface and a second substrate surface located opposite each other, and is provided with a first basic drive signal output circuit and a first amplification circuit.

[0212] The first amplifier circuit is disposed on the first substrate surface.

[0213] The first basic drive signal output circuit is disposed on the second substrate surface.

[0214] According to this capacitive load drive circuit, by placing the first amplifier circuit, which generates a large amount of heat, and the first basic drive signal output circuit, which also generates a large amount of heat, on different sides of the wiring substrate, the possibility of the temperature of the capacitive load drive circuit rising due to the interaction between the heat generated in the first amplifier circuit and the heat generated in the first basic drive signal output circuit is reduced. Therefore, the possibility of a decrease in the stability of the capacitive load drive circuit is reduced, and the possibility of a decrease in the waveform accuracy of the drive signal output by the capacitive load drive circuit is reduced.

[0215] In one aspect of the capacitive load drive circuit, it could also be that...

[0216] The capacitive load drive circuit includes:

[0217] Multiple basic drive signal output circuits, including a second basic drive signal output circuit that receives a second digital signal and outputs a second basic drive signal, and a first basic drive signal output circuit; and

[0218] Multiple amplifier circuits, including a second amplifier circuit that amplifies the second basic drive signal and outputs a second drive signal to drive the second capacitive load, and a first amplifier circuit.

[0219] The plurality of amplifier circuits are disposed on the first substrate surface but not on the second substrate surface.

[0220] The plurality of basic drive signal output circuits are disposed on the second substrate surface and not on the first substrate surface.

[0221] According to this capacitive load drive circuit, by placing multiple amplifier circuits that generate a lot of heat on a first substrate surface, which is one side of the wiring substrate, and placing multiple basic drive signal output circuits that generate a lot of heat on a second substrate surface, which is the other side of the wiring substrate, the possibility of the temperature of the capacitive load drive circuit rising due to the interaction between the heat generated in the multiple amplifier circuits and the heat generated in the multiple basic drive signal output circuits is reduced. Therefore, the possibility of a decrease in the stability of the capacitive load drive circuit is reduced, and the possibility of a decrease in the waveform accuracy of the drive signal output by the capacitive load drive circuit is reduced.

[0222] In one aspect of the capacitive load drive circuit, it could also be that...

[0223] The capacitive load drive circuit includes:

[0224] The first heat dissipation component is thermally connected to the first amplifier circuit; and

[0225] The second heat dissipation component is thermally connected to the first basic drive signal output circuit.

[0226] According to this capacitive load drive circuit, a first heat dissipation component promotes the release of heat generated in the first amplifier circuit, which generates a large amount of heat, and a second heat dissipation component promotes the release of heat generated in the first basic drive signal output circuit, which also generates a large amount of heat. Therefore, the likelihood of the first amplifier circuit, which generates a large amount of heat, becoming overheated is reduced, and the likelihood of the first basic drive signal output circuit, which generates a large amount of heat, becoming overheated is also reduced. Consequently, the likelihood of the temperature of the capacitive load drive circuit rising is further reduced. Therefore, the likelihood of the stability of the capacitive load drive circuit decreasing is further reduced, and the likelihood of the waveform accuracy of the drive signal output by the capacitive load drive circuit decreasing is further reduced.

[0227] In one aspect of the capacitive load drive circuit, it could also be that...

[0228] The second heat dissipation component is thermally connected to the first amplifier circuit via the wiring substrate.

[0229] According to this capacitive load drive circuit, in addition to the first heat dissipation component, a second heat dissipation component is used to promote the release of heat generated in the first amplifier circuit, which generates a lot of heat. Therefore, the possibility of the first amplifier circuit, which generates a lot of heat, becoming overheating is further reduced. Consequently, the possibility of the temperature of the capacitive load drive circuit rising is further reduced. Therefore, the possibility of the stability of the capacitive load drive circuit decreasing is further reduced, and the possibility of the waveform accuracy of the drive signal output by the capacitive load drive circuit decreasing is further reduced.

[0230] In one aspect of the capacitive load drive circuit, it could also be that...

[0231] The second heat dissipation component has:

[0232] The first protrusion is thermally connected to the first basic drive signal output circuit; and

[0233] The second protrusion is thermally connected to the first amplifier circuit via the wiring substrate.

[0234] According to this capacitive load drive circuit, the second heat dissipation component has a first protrusion thermally connected to the first basic drive signal output circuit and a second protrusion thermally connected to the first amplifier circuit via a wiring substrate. This reduces the likelihood that the heat generated in the first basic drive signal output circuit and the heat generated in the first amplifier circuit will interact in the second heat dissipation component, causing a decrease in heat dissipation efficiency. Therefore, the possibility of a temperature rise in the capacitive load drive circuit is reduced. Consequently, the possibility of a decrease in the stability of the capacitive load drive circuit and a decrease in the waveform accuracy of the drive signal output by the capacitive load drive circuit are reduced.

[0235] In one aspect of the capacitive load drive circuit, it could also be that...

[0236] The first amplifier circuit includes a first transistor and a second transistor, and outputs the first drive signal by driving the first transistor and the second transistor.

[0237] The first basic drive signal output circuit is located between the first transistor and the second transistor.

[0238] According to this capacitive load drive circuit, the wiring length of the first basic drive signal output by the first basic drive signal output circuit can be shortened. Therefore, the operational stability of the first amplifier circuit, including the first transistor and the second transistor, is improved.

[0239] In one aspect of the capacitive load drive circuit, it could also be that...

[0240] The capacitive load drive circuit includes a first heat dissipation component and a second heat dissipation component to promote heat dissipation of the first amplifier circuit.

[0241] The first transistor includes a first surface and a second surface located opposite each other.

[0242] The second transistor includes a third surface and a fourth surface located opposite each other.

[0243] The heat dissipation performance of the first heat dissipation component is higher than that of the second heat dissipation component.

[0244] The first surface and the third surface are thermally connected to the first heat dissipation component.

[0245] The second and fourth surfaces are thermally connected to the first substrate surface.

[0246] The second substrate surface is thermally connected to the second heat dissipation component.

[0247] According to this capacitive load drive circuit, the first transistor included in the first amplifier circuit releases heat from both the first and second surfaces, and the second transistor included in the first amplifier circuit releases heat from both the third and fourth surfaces. Therefore, the heat generated in the first amplifier circuit including the first and second transistors is released more efficiently. Consequently, the possibility of the first amplifier circuit including the first and second transistors becoming overheated is reduced, and the possibility of a decrease in the stability of the capacitive load drive circuit is reduced. Therefore, the possibility of a decrease in the waveform accuracy of the drive signal output by the capacitive load drive circuit is reduced.

[0248] Furthermore, according to this capacitive load drive circuit, by making the heat dissipation performance of the first heat dissipation component, which promotes heat release from the first surface of the first transistor and the third surface of the second transistor without passing through the wiring substrate, higher than the heat dissipation performance of the second heat dissipation component, which promotes heat release from the third surface of the first transistor and the fourth surface of the second transistor via the wiring substrate, the heat generated in the first amplifier circuit including the first transistor and the second transistor can be released more efficiently. Therefore, the possibility of the first amplifier circuit including the first transistor and the second transistor becoming overheated is further reduced. Consequently, the possibility of a decrease in the stability of the capacitive load drive circuit is further reduced, and the possibility of a decrease in the waveform accuracy of the drive signal output by the capacitive load drive circuit is further reduced.

[0249] In one aspect of the capacitive load drive circuit, it could also be that...

[0250] The wiring substrate is housed in a receiving portion configured to include the first heat dissipation component and the second heat dissipation component.

[0251] According to the capacitive load drive circuit, the possibility of ink mist or other substances adhering to the first amplifier circuit and the first basic drive signal output circuit is reduced.

[0252] In one aspect of the capacitive load drive circuit, it could also be that...

[0253] The first transistor and the second transistor are SIP-type bipolar transistors.

[0254] In one aspect of the capacitive load drive circuit, it could also be that...

[0255] The first amplifier circuit is an AB class amplifier circuit.

[0256] One aspect of the liquid ejection device includes:

[0257] The nozzle ejects liquid via a capacitive load; and

[0258] A capacitive load driving circuit outputs a driving signal to drive the capacitive load.

[0259] The capacitive load drive circuit includes:

[0260] The first basic drive signal output circuit is input with a first digital signal and outputs a first basic drive signal.

[0261] A first amplifier circuit amplifies the first basic drive signal and outputs a first drive signal to drive the first capacitive load; and

[0262] The wiring substrate includes a first substrate surface and a second substrate surface located opposite each other, and is provided with a first basic drive signal output circuit and a first amplification circuit.

[0263] The first amplifier circuit is disposed on the first substrate surface.

[0264] The first basic drive signal output circuit is disposed on the second substrate surface.

[0265] According to this liquid ejection device, in the capacitive load drive circuit, the first amplification circuit, which generates a large amount of heat, and the first basic drive signal output circuit, which also generates a large amount of heat, are located on different surfaces of the wiring substrate. This reduces the likelihood that the heat generated in the first amplification circuit and the heat generated in the first basic drive signal output circuit will interact, thus reducing the possibility of the temperature of the capacitive load drive circuit rising. Therefore, the possibility of a decrease in the stability of the capacitive load drive circuit and the possibility of a decrease in the waveform accuracy of the drive signal output by the capacitive load drive circuit are reduced.

[0266] In one aspect of the liquid ejection device, it may also be that...

[0267] The capacitive load drive circuit includes:

[0268] Multiple basic drive signal output circuits, including a second basic drive signal output circuit that receives a second digital signal and outputs a second basic drive signal, and a first basic drive signal output circuit; and

[0269] Multiple amplifier circuits, including a second amplifier circuit that amplifies the second basic drive signal and outputs a second drive signal to drive the second capacitive load, and a first amplifier circuit.

[0270] The plurality of amplifier circuits are disposed on the first substrate surface but not on the second substrate surface.

[0271] The plurality of basic drive signal output circuits are disposed on the second substrate surface and not on the first substrate surface.

[0272] According to this liquid ejection device, by placing multiple amplification circuits that generate a lot of heat on a first substrate surface, which is one side of the wiring substrate, and placing multiple basic drive signal output circuits that generate a lot of heat on a second substrate surface, which is the other side of the wiring substrate, the possibility of the temperature of the capacitive load drive circuit rising due to the interaction between the heat generated in the multiple amplification circuits and the heat generated in the multiple basic drive signal output circuits is reduced. Therefore, the possibility of a decrease in the stability of the capacitive load drive circuit is reduced, and the possibility of a decrease in the waveform accuracy of the drive signal output by the capacitive load drive circuit is reduced.

[0273] In one aspect of the liquid ejection device, it may also be that...

[0274] The liquid ejection device includes:

[0275] The first heat dissipation component is thermally connected to the first amplifier circuit; and

[0276] The second heat dissipation component is thermally connected to the first basic drive signal output circuit.

[0277] According to this liquid ejection device, the first heat dissipation component promotes the release of heat generated in the first amplification circuit, which generates a large amount of heat, and the second heat dissipation component promotes the release of heat generated in the first basic drive signal output circuit, which also generates a large amount of heat. Therefore, the likelihood of the first amplification circuit, which generates a large amount of heat, becoming overheated is reduced, and the likelihood of the first basic drive signal output circuit, which generates a large amount of heat, becoming overheated is also reduced. Consequently, the likelihood of the temperature of the capacitive load drive circuit rising is further reduced. Therefore, the likelihood of the stability of the capacitive load drive circuit decreasing is further reduced, and the likelihood of the waveform accuracy of the drive signal output by the capacitive load drive circuit decreasing is further reduced.

[0278] In one aspect of the liquid ejection device, it may also be that...

[0279] The second heat dissipation component is thermally connected to the first amplifier circuit via the wiring substrate.

[0280] According to this liquid ejection device, in addition to the first heat dissipation component, a second heat dissipation component is used to promote the release of heat generated in the first amplification circuit, which generates a large amount of heat. Therefore, the likelihood of the first amplification circuit, which generates a large amount of heat, becoming overheating is further reduced. Consequently, the likelihood of the temperature of the capacitive load drive circuit rising is further reduced. Therefore, the likelihood of the stability of the capacitive load drive circuit decreasing is further reduced, and the likelihood of the waveform accuracy of the drive signal output by the capacitive load drive circuit decreasing is further reduced.

[0281] In one aspect of the liquid ejection device, it may also be that...

[0282] The second heat dissipation component has:

[0283] The first protrusion is thermally connected to the first basic drive signal output circuit; and

[0284] The second protrusion is thermally connected to the first amplifier circuit via the wiring substrate.

[0285] According to this liquid ejection device, the second heat dissipation component has a first protrusion thermally connected to the first basic drive signal output circuit and a second protrusion thermally connected to the first amplifier circuit via a wiring substrate. This reduces the likelihood that the heat generated in the first basic drive signal output circuit and the heat generated in the first amplifier circuit will interact in the second heat dissipation component, causing a decrease in heat dissipation efficiency. Consequently, the possibility of a temperature rise in the capacitive load drive circuit is reduced. Therefore, the possibility of a decrease in the stability of the capacitive load drive circuit and a decrease in the waveform accuracy of the drive signal output by the capacitive load drive circuit are reduced.

[0286] In one aspect of the liquid ejection device, it may also be that...

[0287] The first amplifier circuit includes a first transistor and a second transistor, and outputs the first drive signal by driving the first transistor and the second transistor.

[0288] The first basic drive signal output circuit is located between the first transistor and the second transistor.

[0289] According to this liquid ejection device, the wiring length of the first basic drive signal output by the first basic drive signal output circuit can be shortened. Therefore, the operational stability of the first amplifier circuit, including the first transistor and the second transistor, is improved.

[0290] In one aspect of the liquid ejection device, it may also be that...

[0291] The liquid ejection device includes a first heat dissipation component and a second heat dissipation component to promote heat dissipation of the first amplification circuit.

[0292] The first transistor includes a first surface and a second surface located opposite each other.

[0293] The second transistor includes a third surface and a fourth surface located opposite each other.

[0294] The heat dissipation performance of the first heat dissipation component is higher than that of the second heat dissipation component.

[0295] The first surface and the third surface are thermally connected to the first heat dissipation component.

[0296] The second and fourth surfaces are thermally connected to the first substrate surface.

[0297] The second substrate surface is thermally connected to the second heat dissipation component.

[0298] According to this liquid ejection device, the first transistor included in the first amplifier circuit releases heat from both the first and second surfaces, and the second transistor included in the first amplifier circuit releases heat from both the third and fourth surfaces. Therefore, the heat generated in the first amplifier circuit including the first and second transistors is released more efficiently. Consequently, the possibility of the first amplifier circuit including the first and second transistors becoming overheated is reduced, and the possibility of a decrease in the stability of the capacitive load drive circuit is reduced. Therefore, the possibility of a decrease in the waveform accuracy of the drive signal output by the capacitive load drive circuit is reduced.

[0299] Furthermore, according to this liquid ejection device, by making the heat dissipation performance of the first heat dissipation component, which promotes heat release from the first surface of the first transistor and the third surface of the second transistor without passing through the wiring substrate, higher than the heat dissipation performance of the second heat dissipation component, which promotes heat release from the third surface of the first transistor and the fourth surface of the second transistor via the wiring substrate, the heat generated in the first amplifier circuit including the first transistor and the second transistor can be released more efficiently. Therefore, the possibility of the first amplifier circuit including the first transistor and the second transistor becoming overheated is further reduced. Consequently, the possibility of a decrease in the stability of the capacitive load drive circuit is further reduced, and the possibility of a decrease in the waveform accuracy of the drive signal output by the capacitive load drive circuit is further reduced.

[0300] In one aspect of the liquid ejection device, it may also be that...

[0301] The wiring substrate is housed in a receiving portion configured to include the first heat dissipation component and the second heat dissipation component.

[0302] According to the liquid ejection device, the possibility of ink mist and other substances adhering to the first amplification circuit and the first basic drive signal output circuit is reduced.

[0303] In one aspect of the liquid ejection device, it may also be that...

[0304] The first transistor and the second transistor are SIP-type bipolar transistors.

[0305] In one aspect of the liquid ejection device, it may also be that...

[0306] The first amplifier circuit is an AB class amplifier circuit.

Claims

1. A capacitive load driving circuit characterized by comprising: Possessing: a first base drive signal output circuit that is input with a first digital signal and outputs a first base drive signal; a first amplification circuit that amplifies the first base drive signal and outputs a first drive signal that drives a first capacitive load; and a wiring substrate that includes a first substrate surface and a second substrate surface that are located opposite each other and is provided with the first base drive signal output circuit and the first amplification circuit, the first amplification circuit is provided on the first substrate surface, the first base drive signal output circuit is provided on the second substrate surface.

2. The capacitive load drive circuit according to claim 1, characterized in that the capacitive load drive circuit possesses: a plurality of base drive signal output circuits that includes a second base drive signal output circuit and the first base drive signal output circuit, the second base drive signal output circuit being input with a second digital signal and outputting a second base drive signal; and a plurality of amplification circuits that includes a second amplification circuit and the first amplification circuit, the second amplification circuit amplifying the second base drive signal and outputting a second drive signal that drives a second capacitive load, the plurality of amplification circuits are provided on the first substrate surface and not on the second substrate surface, the plurality of base drive signal output circuits are provided on the second substrate surface and not on the first substrate surface.

3. The capacitive load drive circuit according to claim 1, characterized in that the capacitive load drive circuit possesses: a first heat dissipation member that is thermally connected with the first amplification circuit; and a second heat dissipation member that is thermally connected with the first base drive signal output circuit.

4. The capacitive load drive circuit according to claim 3, characterized in that the second heat dissipation member is thermally connected with the first amplification circuit via the wiring substrate.

5. The capacitive load drive circuit according to claim 4, characterized in that the second heat dissipation member has: a first protrusion that is thermally connected with the first base drive signal output circuit; and a second protrusion that is thermally connected with the first amplification circuit via the wiring substrate.

6. The capacitive load drive circuit according to claim 1, characterized in that the first amplification circuit includes a first transistor and a second transistor and outputs the first drive signal through driving of the first transistor and the second transistor, the first base drive signal output circuit is located between the first transistor and the second transistor.

7. The capacitive load drive circuit according to claim 6, characterized in that the capacitive load drive circuit possesses a first heat dissipation member and a second heat dissipation member that promote heat dissipation of the first amplification circuit, the first transistor includes a first surface and a second surface that are located opposite each other, the second transistor includes a third surface and a fourth surface that are located opposite each other, the heat dissipation property of the first heat dissipation member is higher than the heat dissipation property of the second heat dissipation member, the first surface and the third surface are thermally connected with the first heat dissipation member, the second surface and the fourth surface are thermally connected with the first substrate surface, ​ ​ The second substrate surface is thermally connected to the second heat dissipation member.

8. The capacitive load driving circuit according to claim 7, wherein The wiring substrate is housed in a housing portion configured to include the first heat dissipation member and the second heat dissipation member.

9. The capacitive load driving circuit according to claim 8, wherein The first transistor and the second transistor are SIP-type bipolar transistors.

10. The capacitive load driving circuit according to any one of claims 1 to 9, wherein The first amplification circuit is an AB class amplification circuit.

11. A liquid discharge apparatus characterized by comprising: provided with: a liquid ejection head that ejects liquid by driving of a capacitive load; and a capacitive load driving circuit that outputs a drive signal that drives the capacitive load, The capacitive load driving circuit is provided with: a first base drive signal output circuit that is input with a first digital signal and outputs a first base drive signal; a first amplification circuit that amplifies the first base drive signal and outputs a first drive signal that drives a first capacitive load; and a wiring substrate that includes a first substrate surface and a second substrate surface at positions opposite to each other, and is provided with the first base drive signal output circuit and the first amplification circuit, the first amplification circuit is provided at the first substrate surface, the first base drive signal output circuit is provided at the second substrate surface.

12. The liquid ejection apparatus according to claim 11, wherein The capacitive load driving circuit is provided with: a plurality of base drive signal output circuits including a second base drive signal output circuit and the first base drive signal output circuit, the second base drive signal output circuit being input with a second digital signal and outputting a second base drive signal; and a plurality of amplification circuits including a second amplification circuit and the first amplification circuit, the second amplification circuit amplifying the second base drive signal and outputting a second drive signal that drives a second capacitive load, the plurality of amplification circuits are provided at the first substrate surface and not provided at the second substrate surface, the plurality of base drive signal output circuits are provided at the second substrate surface and not provided at the first substrate surface.

13. The liquid ejection apparatus according to claim 11, wherein The liquid ejection apparatus is provided with: a first heat dissipation member that is thermally connected to the first amplification circuit; and a second heat dissipation member that is thermally connected to the first base drive signal output circuit.

14. The liquid ejection apparatus according to claim 13, wherein The second heat dissipation member is thermally connected to the first amplification circuit via the wiring substrate.

15. The liquid ejection apparatus according to claim 14, wherein The second heat dissipation member has: a first protruding portion that is thermally connected to the first base drive signal output circuit; and a second protruding portion that is thermally connected to the first amplification circuit via the wiring substrate.

16. The liquid ejection apparatus according to claim 11, wherein The first amplification circuit includes a first transistor and a second transistor, and outputs the first drive signal by driving of the first transistor and the second transistor, The first base drive signal output circuit is located between the first transistor and the second transistor.

17. The liquid ejecting apparatus according to claim 16, wherein The liquid ejecting apparatus includes a first heat dissipation member and a second heat dissipation member that promote heat dissipation of the first amplification circuit, The first transistor includes a first surface and a second surface located opposite each other, The second transistor includes a third surface and a fourth surface located opposite each other, The first heat dissipation member has a higher heat dissipation property than the second heat dissipation member, The first surface and the third surface are thermally connected to the first heat dissipation member, The second surface and the fourth surface are thermally connected to the first substrate surface, The second substrate surface is thermally connected to the second heat dissipation member.

18. The liquid ejecting apparatus according to claim 17, wherein The wiring substrate is housed in a housing portion configured to include the first heat dissipation member and the second heat dissipation member.

19. The liquid ejecting apparatus according to claim 18, wherein The first transistor and the second transistor are SIP-type bipolar transistors.

20. The liquid ejecting apparatus according to any one of claims 11 to 19, wherein The first amplification circuit is an AB class amplification circuit.

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