Interface control method, control circuit, chip and electronic equipment
By splitting and controlling the current source in the pins and sub-pins of the Type-C interface, and generating switching pin commands, the problem of not being able to perform USB 2.0 data communication simultaneously during fast charging is solved, enabling multiple transmission functions to be performed simultaneously during fast charging.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-12-29
- Publication Date
- 2026-03-31
AI Technical Summary
During fast charging, the DP and DM pins of the Type-C interface are used for fast charging protocol communication, which makes it impossible to perform USB 2.0 data communication at the same time.
By dividing the pins and sub-pins into a spaced configuration in the interface of the first electronic device, and using a current source and a switching unit to control the level signals of these pins, a pin exchange command is generated to configure the pins for different transmission functions, such as fast charging protocol transmission and USB 2.0 data transmission.
It enables simultaneous transmission of fast charging protocol and USB 2.0 data during fast charging, avoiding conflicts in transmission functions.
Smart Images

Figure CN121770087A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of fast charging technology, and in particular to an interface control method, control circuit, chip and electronic device. Background Technology
[0002] Currently, most fast charging protocols in related technologies rely on the DP and DM pins of the Type-C interface for fast charging communication, such as the Huawei protocol, Samsung protocol, and UFCS (Universal Fast Charging Specification) protocol. Since USB 2.0 data communication also relies on the DP and DM pins of the Type-C interface, USB 2.0 data communication cannot occur during fast charging. Summary of the Invention
[0003] In view of the above problems, embodiments of this application provide an interface control method, control circuit, chip, and electronic device to solve the technical problem that the first and second transmissions cannot be performed simultaneously during fast charging.
[0004] In a first aspect, embodiments of this application provide an interface control method applied to a first chip, the first chip being disposed in a first electronic device, the first electronic device including a first interface, the first interface including a first pin and a first target sub-pin spaced apart by being divided by a first target pin, and a second pin and a second target sub-pin spaced apart by being divided by a second target pin, the first target sub-pin and the second target sub-pin being respectively connected to two first current sources; the interface control method includes: When the second electronic device is connected, a first current source is applied to the first target sub-pin or the second target sub-pin to obtain the first level signal of the first target sub-pin or the second target sub-pin and the second level signal of the first pin or the second pin; If it is determined from the first level signal and the second level signal that the current charging device supports the fast charging protocol, a pin swap command is generated. The pin swap command is used to configure the first pin and / or the second pin to implement a first transmission function, or to configure the first pin and / or the second pin to implement a second transmission function.
[0005] Secondly, embodiments of this application provide an interface control method applied to a first chip, the first chip being disposed in a first electronic device, the first electronic device including a first interface, the first interface including a first pin and a first target sub-pin spaced apart by being divided by a first target pin, and a second pin and a second target sub-pin spaced apart by being divided by a second target pin, the first target sub-pin and the second target sub-pin being respectively connected to two first current sources, the first pin and the second pin being respectively connected to two second current sources, the currents of the first current sources and the second current sources being different; the interface control method includes: When the second electronic device is connected, a first current source is applied to the first target sub-pin or the second target sub-pin, and a second current source is applied to the first pin or the second pin, thereby obtaining the first level signal of the first target sub-pin or the second target sub-pin and the second level signal of the first pin or the second pin; If it is determined from the first level signal and the second level signal that the current charging device supports the fast charging protocol, a pin swap command is generated. The pin swap command is used to configure the first pin and / or the second pin to implement a first transmission function, or to configure the first pin and / or the second pin to implement a second transmission function.
[0006] Thirdly, embodiments of this application provide an interface control method applied to a first chip, the first chip being disposed in a first electronic device, the first electronic device including a first interface, the first interface including a first pin and a first target sub-pin spaced apart by being divided by a first target pin, and a second pin and a second target sub-pin spaced apart by being divided by a second target pin, the first target sub-pin and the second target sub-pin being respectively connected to two first current sources, the first pin and the second pin being respectively connected to two second current sources, the currents of the first current sources and the second current sources being different; the interface control method includes: When the second electronic device is connected, a first current source is applied to the first target sub-pin or the second target sub-pin to obtain the first level signal of the first target sub-pin and the second level signal of the first pin or the second pin. If it is determined from the first level signal and the second level signal that the current charging device supports the fast charging protocol, then a second current source is applied to the first pin or the second pin to obtain the third level signal of the first pin or the second pin; If it is determined from the third level signal that the current charging device supports the fast charging protocol, a pin swap command is generated. The pin swap command is used to configure the first pin and / or the second pin to implement a first transmission function, or to configure the first pin and / or the second pin to implement a second transmission function.
[0007] Fourthly, embodiments of this application provide a control circuit connected to a first interface. The first interface includes a first pin and a first target sub-pin formed by dividing a first target pin, a second pin and a second target sub-pin formed by dividing a second target pin, a third target pin, and a fourth target pin. The first target sub-pin and the second target sub-pin are respectively connected to two first current sources. The control circuit includes: a control module, a first switching unit, and a second switching unit. The first switching unit is used to control the connection and disconnection between the first output terminal of the control module and the first pin and the second pin, respectively, and the connection and disconnection between the first output terminal of the control module and the second switching unit. The second switching unit is used to control the connection and disconnection between the second output terminal of the control module and the third target pin and the fourth target pin, respectively, as well as the connection and disconnection between the first switching unit and the third target pin and the fourth target pin, respectively; The control module is used to implement the interface control method described above.
[0008] Fifthly, embodiments of this application provide a chip for implementing the above-described interface control method.
[0009] Sixthly, embodiments of this application provide an electronic device, including the aforementioned chip or the aforementioned control circuit.
[0010] The interface control method, control circuit, chip, and electronic device provided in this application embodiment divides the first target pin in the first interface of the first electronic device into a first pin and a first target sub-pin with intervals, and divides the second target pin into a second pin and a second target sub-pin with intervals. When the second electronic device is connected to the first electronic device, if it is determined that the current charging device supports a fast charging protocol based on the level signal of the first pin or the second pin and the level signal of the first target sub-pin or the second target sub-pin, then the first pin and / or the second pin are configured to perform a first transmission, or the first pin and / or the second pin are configured to perform a second transmission. In this way, the first transmission and the second transmission can be performed simultaneously during the fast charging process.
[0011] These or other aspects of this application will become more apparent in the following description of the embodiments. Attached Figure Description
[0012] Figure 1 The diagram illustrates an application scenario of the interface control method provided in this application embodiment.
[0013] Figure 2 The diagram illustrates the structure of the second electronic device and cable in an application scenario of the interface control method provided in this embodiment.
[0014] Figure 3 The diagram illustrates the connection between the first electronic device and the second electronic device in an application scenario of the interface control method provided in this embodiment.
[0015] Figure 4 A flowchart illustrating the interface control method provided in an embodiment of this application is shown.
[0016] Figure 5 The following diagram illustrates the implementation. Figure 4 A schematic diagram of the structure of the first chip in the interface control method shown.
[0017] Figure 6 It shows Figure 4 The diagram shows the connection between the first and second electronic devices in the application scenario of the interface control method.
[0018] Figure 7 It shows Figure 4 The diagram shows another application scenario of the interface control method, illustrating the connection between the first and second electronic devices.
[0019] Figure 8 A flowchart illustrating an interface control method provided in another embodiment of this application is shown.
[0020] Figure 9 The following diagram illustrates the implementation. Figure 8 A schematic diagram of the structure of the first chip in the interface control method shown.
[0021] Figure 10 It shows Figure 8 The diagram shows the connection between the first and second electronic devices in the application scenario of the interface control method.
[0022] Figure 11 It shows Figure 8 The diagram shows another application scenario of the interface control method, illustrating the connection between the first and second electronic devices.
[0023] Figure 12 A flowchart illustrating an interface control method provided in another embodiment of this application is shown.
[0024] Figure 13The diagram shows a schematic representation of the structure of a second electronic device in another application scenario of the interface control method provided in this application embodiment.
[0025] Figure 14 A schematic diagram of the control circuit provided in an embodiment of this application is shown.
[0026] Figure 15 It shows Figure 14 The diagram shows the structure of the first and second switching units in the control circuit.
[0027] Figure 16 A schematic diagram of the control circuit provided in another embodiment of this application is shown.
[0028] Figure 17 A schematic diagram of the chip structure provided in an embodiment of this application is shown.
[0029] Figure 18 A schematic diagram of the structure of an electronic device provided in an embodiment of this application is shown.
[0030] Figure 19 A schematic diagram of the structure of an electronic device provided in another embodiment of this application is shown. Detailed Implementation
[0031] The embodiments of this application are described in detail below. Examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain this application, and should not be construed as limiting this application.
[0032] To enable those skilled in the art to better understand the solutions of this application, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.
[0033] In the embodiments of this application, it should be noted that, in this document, relational terms such as first and second are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations.
[0034] Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.
[0035] In the description of the embodiments of this application, the words "example" or "for example" are used to indicate exemplification, illustration, or description. Any embodiment or design described as "example" or "for example" in the embodiments of this application is not to be construed as being more preferred or having more advantages than another embodiment or design. The use of the words "example" or "for example" is intended to present relative concepts in a clear manner.
[0036] Furthermore, in the embodiments of this application, "multiple" refers to two or more. Therefore, in the embodiments of this application, "multiple" can also be understood as "at least two". "At least one" can be understood as one or more, such as one, two, or more. For example, including at least one means including one, two, or more, and is not limited to which ones are included. For example, including at least one of A, B, and C, then it could include A, B, C, A and B, A and C, B and C, or A and B and C.
[0037] It should be noted that in the embodiments of this application, "and / or" describes the relationship between associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. In addition, the character " / ", unless otherwise specified, generally indicates that the associated objects before and after it are in an "or" relationship.
[0038] It should be noted that in the embodiments of this application, "connection" can be understood as electrical connection. The connection between two electrical components can be a direct or indirect connection between the two electrical components. For example, the connection between A and B can be a direct connection between A and B, or an indirect connection between A and B through one or more other electrical components.
[0039] In related technologies, when a power supply device performs fast charging for a powered device based on a proprietary fast charging protocol, it typically uses the DP and DM pins of the Type-C interface for fast charging protocol communication. However, since USB 2.0 data transmission also requires the DP and DM pins, in actual fast charging, these pins are prioritized for fast charging protocol communication, preventing USB 2.0 data transmission. Therefore, when a device is in fast charging mode, USB 2.0 data communication is usually not possible simultaneously, creating a functional mutual exclusion.
[0040] The interface control method provided in this application embodiment can be applied to... Figure 1 The first electronic device 100 shown includes a first interface 10. Please refer to [link / reference]. Figure 1 As shown, the first interface 10 includes a first pin 10a and a first target sub-pin 11a spaced apart by a first target pin 11, and a second pin 10b and a second target sub-pin 12a spaced apart by a second target pin 12. The first electronic device 100 can be an electronic device supporting a fast charging protocol.
[0041] And, as Figure 1 As shown, corresponding pads can be set for the first pin 10a, the first target sub-pin 11a, the second pin 10b, and the second target sub-pin 12a.
[0042] Please see Figure 2 As shown, the second electronic device 200 can be an electronic device supporting a fast charging protocol. The second electronic device 200 includes a second interface 20, which includes a first newly added pin 20a and a first connecting sub-pin 21a spaced apart by the first connecting pin 21, and a second newly added pin 20b and a second connecting sub-pin 22a spaced apart by the second connecting pin 22. Furthermore, corresponding pads can be provided for the first newly added pin 20a, the first connecting sub-pin 21a, the second newly added pin 20b, and the second connecting pin 22a.
[0043] The first electronic device 100 and the second electronic device 200 can be connected via a cable 300. The cable 300 has two connectors 30, one of which connects to the first interface 10 and the other connector 30 connects to the second interface 20. The cable 300 can be a cable that supports a fast charging protocol. Please refer to [link / reference]. Figure 3As shown, the connector 30 includes a first newly added connector pin 30a and a first connector sub-pin 31a spaced apart by the first connector pin 31, and corresponding pads can be provided for the first newly added connector pin 30a and the first connector sub-pin 31a respectively. When the connector 30 is inserted into the first interface 10, the first newly added connector pin 30a is connected to the first pin 10a or the second pin 10b, and the first connector sub-pin 31a is connected to the first target sub-pin 11a or the second target sub-pin 12a; when the connector 30 is inserted into the second interface 20, the first newly added connector pin 30a is connected to the first newly added pin 20a or the second newly added pin 20b, and the first connector sub-pin 31a is connected to the first connecting sub-pin 21a or the second connecting pin 22a.
[0044] Therefore, when the first electronic device 100 and the second electronic device 200 are connected, the first pin 10a is connected to the first newly added pin 20a, and the first target sub-pin 11a is connected to the first connection sub-pin 21a; or, the first pin 10a is connected to the second newly added pin 20b, and the first target sub-pin 11a is connected to the second connection sub-pin 22a; or, the second pin 10b is connected to the first newly added pin 20a, and the second target sub-pin 12a is connected to the first connection pin 21a; or, the second pin 10b is connected to the second newly added pin 20b, and the second target sub-pin 12a is connected to the second connection pin 22a. The first target sub-pin 11a is used to implement the function of the first target pin 11, and the second target sub-pin 12a can be used to implement the function of the second target pin 12. The first pin 10a and / or the second pin 10b can be configured to implement the function of the first transmission or the second transmission. For example, the pins in the first pin 10a and the second pin 10b that implement the connection between the first electronic device and the second electronic device can be configured to implement a first transmission or a second transmission, or both the first pin 10a and the second pin 10b can be configured to implement a first transmission or a second transmission.
[0045] One embodiment of this application provides an interface control method; please refer to [link / reference]. Figure 4 and Figure 5 As shown, the interface control method in this embodiment is applied to, for example, Figure 1 The first electronic device 100 shown has a first chip 100a disposed within it. The first chip 100a includes two first current sources I. p1 The first target sub-pin 11a and the second target sub-pin 12a are respectively connected to the two first current sources I. p1 The corresponding connection includes the following steps: Step S11: When the second electronic device is connected, a first current source is applied to the first target sub-pin or the second target sub-pin to obtain the first level signal of the first target sub-pin or the second target sub-pin and the second level signal of the first pin or the second pin.
[0046] The first electronic device and the second electronic device can be a power receiving device (Sink device) and a power supply device (Source device), respectively, or the first electronic device and the second electronic device can be a power supply device (Source device) and a power receiving device (Sink device), respectively; the second electronic device is connected to the first electronic device so that the Source device charges the Sink device.
[0047] Specifically, when the first target sub-pin and the first pin are used to connect the first electronic device and the second electronic device, a first current source is applied to the first target sub-pin to obtain a first level signal and a second level signal of the first target sub-pin. When the second target sub-pin and the second pin are used to connect the first electronic device and the second electronic device, a first current source is applied to the second target sub-pin to obtain a first level signal and a second level signal of the second target sub-pin.
[0048] The second electronic device can be, for example, Figure 2 and Figure 3 The second electronic device 200 shown can be connected to the first electronic device 100 via a cable 300. The cable 300 has two connectors 30, one of which connects to the first interface 10, and the other connector 30 connects to the second interface 20. See the above for details. Figure 3 and Figure 5 As shown, when the first electronic device 100 is connected to the second electronic device 200, the first pin 10a is connected to the first newly added pin 20a, and the first target sub-pin 11a is connected to the first connecting sub-pin 21a; or, the first pin 10a is connected to the second newly added pin 20b, and the first target sub-pin 11a is connected to the second connecting sub-pin 22a; or, the second pin 10b is connected to the first newly added pin 20a, and the second target sub-pin 12a is connected to the first connecting sub-pin 21a; or, the second pin 10b is connected to the second newly added pin 20b, and the second target sub-pin 12a is connected to the second connecting sub-pin 22a. A first current source I is applied to the first target sub-pin 11a or the second target sub-pin 12a. p1 A first current source I is loaded on the connection path formed by the first target sub-pin 11a (second target sub-pin 12a) and the first connection sub-pin 21a (second connection pin 22a). p1No current source is loaded on the connection path formed by the first pin 10a (second pin 10b) and the first newly added pin 20a (second newly added pin 20b). The first level signal of the first target sub-pin 11a (second target sub-pin 12a) and the second level signal of the first pin 10a (second pin 10b) are different.
[0049] As one implementation method, please refer to Figure 6 As shown, a first current source I is respectively provided on the first target sub-pin 11a or the second target sub-pin 12a. p1 First current source I p1 One end is connected to the first power supply VDD1 via a switch, and the first current source I p1 The other end is connected to the first target sub-pin 11a or the second target sub-pin 12a via a cable; a first pull-down resistor R is provided on the first connection sub-pin 21a or the second connection sub-pin 22a respectively. d1 First pull-down resistor R d1 One end is connected to either the first connection pin 21a or the second connection pin 22a, and the first pull-down resistor R d1 The other end is grounded via a switch. When the first electronic device 100 is connected to the second electronic device 200, the first target sub-pin 11a is connected to the first connection sub-pin 21a; or, the first target sub-pin 11a is connected to the second connection sub-pin 22a; or, the second target sub-pin 12a is connected to the first connection sub-pin 21a; or, the second target sub-pin 12a is connected to the second connection sub-pin 22a, and a first current source I is applied to the first target sub-pin 11a or the second target sub-pin 12a. p1 First current source I p1 The first target sub-pin 11a (second target sub-pin 12a), the first connection sub-pin 21a (second connection sub-pin 22a), and the first pull-down resistor R d1 A first connection path is formed. No current source is applied to the second connection path formed by the first pin 10a (second pin 10b) and the first newly added pin 20a (second newly added pin 20b). Therefore, the first level signal on the first connection path must be different from the second level signal on the second connection path. The value of the first level signal on the first connection path can be the value of the first current source I. p1 With the first pull-down resistor R d1 The product of; the value of the second level signal on the second connection path can be 0 or close to 0. For example, the first electronic device 100 can be a source device, and the second electronic device 200 can be a sink device.
[0050] In some implementations, please refer to Figure 7As shown, a third current source I is respectively provided on the first connection sub-pin 21a or the second connection sub-pin 22a. p3 Third current source I p3 One end is connected to the third power supply VDD3 via a switch; a first resistor R1 is provided on the first target sub-pin 11a or the second target sub-pin 12a respectively, one end of the first resistor R1 is connected to the first target sub-pin 11a or the second target sub-pin 12a, and the other end of the first resistor R1 is grounded via a switch. At this time, the second electronic device 200 can also be a source device, and the first electronic device 100 can also be a sink device.
[0051] In another embodiment, the second electronic device may also be such as Figure 13 The second electronic device 400 shown is an electronic device with its own cable. The second electronic device 400 includes a second connector 40c, which includes a second additional connector pin 40a and a second connector sub-pin 41a spaced apart by the second connector pin 41. When the first electronic device 100 and the second electronic device 400 are connected, the second connector 40c is inserted into the first interface 10, the second additional connector pin 40a is connected to the first pin 10a, and the second connector sub-pin 41a is connected to the first target sub-pin 11a; or, the second additional connector pin 40a is connected to the second pin 10b, and the second connector sub-pin 41a is connected to the second target sub-pin 12a. For example, the second electronic device 400 can be a portable power bank with its own cable, and the first electronic device 100 can be a mobile terminal.
[0052] Step S12: If it is determined that the current charging device supports the fast charging protocol based on the first level signal and the second level signal, a pin swap command is generated. The pin swap command is used to configure the first pin and / or the second pin to implement the first transmission function, or to configure the first pin and / or the second pin to implement the second transmission function.
[0053] The first transmission function and the second transmission function are two different transmission functions. For example, the first transmission function is used to transmit the first data, and the second transmission function is used to transmit the second data.
[0054] For example, the pins in the first pin 10a and the second pin 10b that implement the connection between the first electronic device and the second electronic device can be configured to implement a first transmission or a second transmission, or the first pin 10a and the second pin 10b can be configured to implement a first transmission or a second transmission.
[0055] Specifically, a first-level signal and a second-level signal can be compared; when the first-level signal and the second-level signal are different, it is determined that the current charging device supports the fast charging protocol. For details, please refer to [link to relevant documentation]. Figure 5 As shown, the first chip 100a also includes a judgment module 40. The judgment module 40 includes four signal input terminals, which are respectively connected to the first target sub-pin 11a, the second target sub-pin 12a, the first pin 10a, and the second pin 10b. The judgment module 40 converts the first level signal input from the first target sub-pin 11a or the second target sub-pin 12a and the second level signal input from the first pin 10a or the second pin 10b into a first level value and a second level value, respectively. Then, the first level value and the second level value are compared. When the first level value and the second level value are different, it is determined that the current charging device supports the fast charging protocol.
[0056] After determining that the current charging device supports the fast charging protocol, a pin swap command is generated. Based on this command, the first and / or second pins are configured to be used for either the first or second transmission. Alternatively, other pins originally used for both the first and second transmissions can be configured to be used solely for the second transmission or solely for the first transmission. In subsequent steps, the first and second transmissions no longer conflict and can be performed simultaneously.
[0057] In this embodiment, the first target pin and the first target sub-pin are separated into intervals in the first interface of the first electronic device, and the second target pin and the second target sub-pin are separated into intervals. When the second electronic device is connected to the first electronic device, if it is determined that the current charging device supports the fast charging protocol based on the level signal of the first pin or the second pin and the level signal of the first target sub-pin or the second target sub-pin, then the first pin and / or the second pin are configured to perform the first transmission or the first pin and / or the second pin are configured to perform the second transmission. In this way, the first transmission and the second transmission can be performed simultaneously during the fast charging process.
[0058] In one implementation, the first transmission function and the second transmission function include a fast charging protocol transmission function and a communication data transmission function. For example, the first transmission function is a fast charging protocol transmission function and the second transmission function is a communication data transmission function, or the first transmission function is a communication data transmission function and the second transmission function is a fast charging protocol transmission function.
[0059] In one implementation, the pin swap command is used to configure the first pin and the second pin to perform a first transmission function. Following step S12, the following steps are also included: Step S131: Perform the first transmission via the first pin or the second pin.
[0060] The first transmission can be used to transmit first data. When the first transmission function is a fast charging protocol transmission function, the first data is fast charging protocol data; when the first transmission function is a communication data transmission function, the first data is communication data, such as USB communication data.
[0061] For example, the pins in the first pin 10a and the second pin 10b that implement the connection between the first electronic device and the second electronic device can be configured to implement a first transmission or a second transmission, or the first pin 10a and the second pin 10b can be configured to implement a first transmission or a second transmission.
[0062] In some implementations, please refer to [the relevant documentation]. Figure 1 As shown, the first interface 10 also includes a third target pin 13 and a fourth target pin 14 for implementing the second transmission function. Following step S12, the following steps are also included: Step S132: Perform a second transmission via the third target pin or the fourth target pin.
[0063] Specifically, during the first transmission through the first and second pins, and during fast charging, the second transmission is performed through the third or fourth target pin.
[0064] The second transmission can be used to transmit second data. When the second transmission function is a communication data transmission function, the second data is communication data, such as USB communication data; when the second transmission function is a fast charging protocol transmission function, the second data is fast charging protocol data.
[0065] For example, the pin that implements the connection between the first electronic device and the second electronic device in the third or fourth target pin can be configured to implement the second transmission, or the third and fourth target pins can be configured to implement the second transmission.
[0066] In this embodiment, the third target pin and / or the fourth target pin are configured to implement the second transmission function. During fast charging, the first pin or the second pin performs the first transmission, and the third target pin or the fourth target pin performs the second transmission, thus avoiding the conflict between the first transmission and the second transmission during fast charging.
[0067] In some implementations, please refer to [the relevant documentation]. Figure 2 and Figure 3As shown, the second interface 20 of the second electronic device 200 includes a third connection pin 23 and a fourth connection pin 24. The third connection pin 23 and the fourth connection pin 24 are respectively configured to correspond to the third target pin 13 and the fourth target pin 14. Accordingly, the second electronic device 200 configures the first newly added pin 20a and / or the second newly added pin 20b to implement the first transmission function, and configures the third connection pin 23 and / or the fourth connection pin 24 to implement the second transmission function. For example, the pins in the first newly added pin 20a and the second newly added pin 20b that implement the connection between the first electronic device and the second electronic device are configured to implement the first transmission function, and the pins in the third connection pin 23 and the fourth connection pin 24 that implement the connection between the first electronic device and the second electronic device are configured to implement the second transmission function. Alternatively, the first newly added pin 20a and the second newly added pin 20b are configured to implement the first transmission function, and the third connection pin 23 and the fourth connection pin 24 are configured to implement the second transmission function. The connector 30 of the cable 300 also includes a third cable connector pin 33 and a fourth cable connector pin 34, which are respectively configured to correspond to the third target pin 13 and the fourth target pin 14, or the third cable connector pin 33 and the fourth cable connector pin 34 are respectively configured to correspond to the third connection pin 23 and the fourth connection pin 24. For example, the first interface 10 and the second interface 20 can be Type-C interfaces respectively; the first target pin 11 and the second target pin 12 can be CC1 pin and CC2 pin respectively; the first target sub-pin 11a and the second target sub-pin 12a formed after the split can continue to be used as CC1 pin and CC2 pin respectively; the first pin 10a and the second pin 10b are used to implement the first transmission function; the third target pin 13 and the fourth target pin 14 can be DP pin and DM pin respectively; the first connection pin 21 and the second connection pin 22 can be CC1 pin and CC2 pin respectively; the first connection sub-pin 21a and the second connection sub-pin 22a formed after the split can continue to be used as CC1 pin and CC2 pin respectively; the first newly added pin 20a and the second newly added pin 20b are used to implement the first transmission function; the third connection pin 23 and the fourth connection pin 24 can be DP pin and DM pin respectively. The connector 30 of cable 300 can be a Type-C connector, the first connector pin 31 is a CC1 pin, the first connector sub-pin 31a formed by splitting can continue to be a CC1 pin, the first newly added connector pin 30a is used to realize the first transmission function, and the third cable connector pin 33 and the fourth cable connector pin 34 can be DP pin and DM pin respectively.
[0068] One embodiment of this application provides an interface control method; please refer to [link / reference]. Figure 8 and Figure 9 As shown, the interface control method in this embodiment is applied to, for example, Figure 1 The first electronic device 100 shown has a first chip 100a disposed within it. The first chip 100a includes two first current sources I. p1 and two second current sources I p2 The first target sub-pin 11a and the second target sub-pin 12a are respectively connected to the two first current sources I. p1 Correspondingly, pin 10a and pin 10b are respectively connected to the two second current sources I. p2 The corresponding connection includes the following steps: Step S21: When the second electronic device is connected, a first current source is applied to the first target sub-pin or the second target sub-pin, and a second current source is applied to the first pin or the second pin, to obtain the first level signal of the first target sub-pin or the second target sub-pin and the second level signal of the first pin or the second pin.
[0069] The first electronic device and the second electronic device can be a power receiving device (Sink device) and a power supply device (Source device), respectively, or the first electronic device and the second electronic device can be a power supply device (Source device) and a power receiving device (Sink device), respectively; the second electronic device is connected to the first electronic device so that the Source device charges the Sink device.
[0070] Specifically, when the first target sub-pin and the first pin are used to connect the first electronic device and the second electronic device, a first current source is applied to the first target sub-pin, and a second current source is applied to the first pin, thereby acquiring a first-level signal of the first target sub-pin and a second-level signal of the first pin. When the second target sub-pin and the second pin are used to connect the first electronic device and the second electronic device, a first current source is applied to the second target sub-pin, and a second current source is applied to the second pin, thereby acquiring a first-level signal of the second target sub-pin and a second-level signal of the second pin.
[0071] The second electronic device can be, for example, Figure 2 and Figure 3 The second electronic device 200 shown can be connected to the first electronic device 100 via a cable 300. The cable 300 has two connectors 30, one of which is connected to the first interface 10 and the other of which is connected to the second interface 20, as detailed above.
[0072] Please see Figure 3 and Figure 9As shown, when the first electronic device 100 is connected to the second electronic device 200, the first pin 10a is connected to the first newly added pin 20a, and the first target sub-pin 11a is connected to the first connecting sub-pin 21a; or, the first pin 10a is connected to the second newly added pin 20b, and the first target sub-pin 11a is connected to the second connecting sub-pin 22a; or, the second pin 10b is connected to the first newly added pin 20a, and the second target sub-pin 12a is connected to the first connecting sub-pin 21a; or, the second pin 10b is connected to the second newly added pin 20b, and the second target sub-pin 12a is connected to the second connecting sub-pin 22a. A first current source I is applied to the first target sub-pin 11a or the second target sub-pin 12a. p1 A first current source I is loaded on the connection path formed by the first target sub-pin 11a (second target sub-pin 12a) and the first connection sub-pin 21a (second connection pin 22a). p1 A second current source I is applied to either pin 10a or pin 10b. p2 The connection path formed by the first pin 10a (second pin 10b) and the first newly added pin 20a (second newly added pin 20b) is loaded with the second current source I. p2 Due to the first current source I p1 Second current source I p2 The first level signal of the first target sub-pin 11a (second target sub-pin 12a) and the second level signal of the first pin 10a (second pin 10b) are different.
[0073] As one implementation method, please refer to Figure 10 As shown, a first current source I is respectively provided on the first target sub-pin 11a or the second target sub-pin 12a. p1 First current source I p1 One end is connected to the first power supply VDD1 via a switch, and the first current source I p1 The other end is connected to the first target sub-pin 11a or the second target sub-pin 12a via a cable; a first pull-down resistor R is provided on the first connection sub-pin 21a or the second connection sub-pin 22a respectively. d1 First pull-down resistor R d1 One end is connected to either the first connection pin 21a or the second connection pin 22a, and the first pull-down resistor R d1 The other end is grounded via a switch. When the first electronic device 100 is connected to the second electronic device 200, the first target sub-pin 11a is connected to the first connection sub-pin 21a; or, the first target sub-pin 11a is connected to the second connection sub-pin 22a; or, the second target sub-pin 12a is connected to the first connection sub-pin 21a; or, the second target sub-pin 12a is connected to the second connection sub-pin 22a, and the first current source I... p1The first target sub-pin 11a (second target sub-pin 12a), the first connection sub-pin 21a (second connection sub-pin 22a), and the first pull-down resistor R d1 A first connection path is formed, and the value of the first level signal on the first connection path can be, for example, a first current source I. p1 With the first pull-down resistor R d1 The product of.
[0074] Please continue reading. Figure 10 As shown, a second current source I is respectively provided on the first pin 10a or the second pin 10b. p2 Second current source I p2 One end is connected to the second power supply VDD2 via a switch, and the second current source I p2 The other end is connected to either the first pin 10a or the second pin 10b via a cable; a second pull-down resistor R is provided on either the first newly added pin 20a or the second newly added pin 20b. d2 The second pull-down resistor R d2 One end is connected to either the first newly added pin 20a or the second newly added pin 20b, and the second pull-down resistor R d2 The other end is grounded via a switch. When the first electronic device 100 is connected to the second electronic device 200, the first pin 10a is connected to the first newly added pin 20a; or, the first pin 10a is connected to the second newly added pin 20b; or, the second pin 10b is connected to the first newly added pin 20a; or, the second pin 10b is connected to the second newly added pin 20b, and a second current source I is applied to the first pin 10a or the second pin 10b. p2 Second current source I p2 The first pin 10a (second pin 10b), the first newly added pin 20a (second newly added pin 20b), and the second pull-down resistor R d2 A second connection path is formed, and the value of the second level signal on the second connection path can be, for example, a second current source I. p2 With the second pull-down resistor R d2 The product of.
[0075] When the first pull-down resistor R d1 With the second pull-down resistor R d2 The same and the first current source I p1 With the second current source I p2 At different times, the first level signal and the second level signal are different.
[0076] In some implementations, please refer to Figure 11 As shown, a third current source I is respectively provided on the first connection sub-pin 21a or the second connection sub-pin 22a. p3 Third current source I p3One end is connected to the third power supply VDD3 via a switch; a first resistor R1 is provided on the first target sub-pin 11a or the second target sub-pin 12a respectively, one end of the first resistor R1 is connected to the first target sub-pin 11a or the second target sub-pin 12a, and the other end of the first resistor R1 is grounded via a switch; a fourth current source I is provided on the first newly added pin 20a or the second newly added pin 20b respectively. p4 Fourth current source I p4 One end is connected to the fourth power supply VDD4 via a switch; a second resistor R2 is provided on either the first pin 10a or the second pin 10b, one end of the second resistor R2 is connected to the first pin 10a or the second pin 10b, and the other end of the second resistor R2 is grounded via a switch. In this case, the second electronic device 200 can also be a source device, and the first electronic device 100 can also be a sink device.
[0077] In another embodiment, the second electronic device may also be such as Figure 13 The second electronic device 400 shown is an electronic device with its own cable. The second electronic device 400 includes a second connector 40c, which includes a second additional connector pin 40a and a second connector sub-pin 41a spaced apart by the second connector pin 41. When the first electronic device 100 and the second electronic device 400 are connected, the second connector 40c is inserted into the first interface 10, the second additional connector pin 40a is connected to the first pin 10a, and the second connector sub-pin 41a is connected to the first target sub-pin 11a; or, the second additional connector pin 40a is connected to the second pin 10b, and the second connector sub-pin 41a is connected to the second target sub-pin 12a. For example, the second electronic device 400 can be a portable power bank with its own cable, and the first electronic device 100 can be a mobile terminal.
[0078] Step S22: If it is determined from the first level signal and the second level signal that the current charging device supports the fast charging protocol, then a pin swap command is generated. This pin swap command is used to configure the first pin and the second pin to implement the first transmission function and the second transmission function.
[0079] For details of step S22, please refer to the description of step S12, which will not be repeated here.
[0080] In this embodiment, the first target pin and the first target sub-pin are separated into intervals in the first interface of the first electronic device, and the second target pin and the second target sub-pin are separated into intervals. When the second electronic device is connected to the first electronic device, if it is determined that the current charging device supports the fast charging protocol based on the level signal of the first pin or the second pin and the level signal of the first target sub-pin or the second target sub-pin, then the first pin and / or the second pin are configured to perform the first transmission or the second transmission. In this way, the first transmission and the second transmission can be performed simultaneously during the fast charging process.
[0081] In one implementation, the pin swap command is used to configure the first pin and / or the second pin to implement the first transmission function. Steps S131 and S132 are included after step S22, as detailed in the corresponding description of the previous embodiment.
[0082] One embodiment of this application provides an interface control method; please refer to [link / reference]. Figure 12 and Figure 9 As shown, the interface control method in this embodiment is applied to, for example, Figure 1 The first electronic device 100 shown has a first chip 100a disposed within it. The first chip 100a includes two first current sources I. p1 and two second current sources I p2 The first target sub-pin 11a and the second target sub-pin 12a are respectively connected to the two first current sources I. p1 Correspondingly, pin 10a and pin 10b are respectively connected to the two second current sources I. p2 The corresponding connection includes the following steps: Step S31: When the second electronic device is connected, a first current source is applied to the first target sub-pin or the second target sub-pin to obtain the first level signal of the first target sub-pin or the second target sub-pin and the second level signal of the first pin or the second pin.
[0083] The first electronic device and the second electronic device can be a power receiving device (Sink device) and a power supply device (Source device), respectively, or the first electronic device and the second electronic device can be a power supply device (Source device) and a power receiving device (Sink device), respectively; the second electronic device is connected to the first electronic device so that the Source device charges the Sink device.
[0084] Specifically, when the first target sub-pin and the first pin are used to connect the first electronic device and the second electronic device, a first current source is applied to the first target sub-pin to obtain a first level signal and a second level signal of the first target sub-pin. When the second target sub-pin and the second pin are used to connect the first electronic device and the second electronic device, a first current source is applied to the second target sub-pin to obtain a first level signal and a second level signal of the second target sub-pin.
[0085] The second electronic device can be, for example, Figure 2 and Figure 3 The second electronic device 200 shown can be connected to the first electronic device 100 via a cable 300. The cable 300 has two connectors 30, one of which is connected to the first interface 10 and the other of which is connected to the second interface 20, as detailed above.
[0086] Please see Figure 3 and Figure 5 As shown, when the first electronic device 100 is connected to the second electronic device 200, the first pin 10a is connected to the first newly added pin 20a, and the first target sub-pin 11a is connected to the first connecting sub-pin 21a; or, the first pin 10a is connected to the second newly added pin 20b, and the first target sub-pin 11a is connected to the second connecting sub-pin 22a; or, the second pin 10b is connected to the first newly added pin 20a, and the second target sub-pin 12a is connected to the first connecting sub-pin 21a; or, the second pin 10b is connected to the second newly added pin 20b, and the second target sub-pin 12a is connected to the second connecting sub-pin 22a. A first current source I is applied to the first target sub-pin 11a or the second target sub-pin 12a. p1 A first current source I is loaded on the connection path formed by the first target sub-pin 11a (second target sub-pin 12a) and the first connection sub-pin 21a (second connection pin 22a). p1 No current source is loaded on the connection path formed by the first pin 10a (second pin 10b) and the first newly added pin 20a (second newly added pin 20b). The first level signal of the first target sub-pin 11a (second target sub-pin 12a) and the second level signal of the first pin 10a (second pin 10b) are different.
[0087] As one implementation method, the interface control method of this embodiment can be applied to... Figure 10 and Figure 11 In the application scenarios shown. Please refer to [link / reference]. Figure 10As shown, when the first electronic device 100 is connected to the second electronic device 200, the first target sub-pin 11a is connected to the first connection sub-pin 21a; or, the first target sub-pin 11a is connected to the second connection sub-pin 22a; or, the second target sub-pin 12a is connected to the first connection sub-pin 21a; or, the second target sub-pin 12a is connected to the second connection sub-pin 22a, and a first current source I is applied to the first target sub-pin 11a or the second target sub-pin 12a. p1 First current source I p1 The first target sub-pin 11a (second target sub-pin 12a), the first connection sub-pin 21a (second connection sub-pin 22a), and the first pull-down resistor R d1 A first connection path is formed, while no current source is applied to the second connection path formed by the first pin 10a (second pin 10b) and the first newly added pin 20a (second newly added pin 20b). Therefore, the first level signal on the first connection path must be different from the second level signal on the second connection path. The value of the first level signal on the first connection path can, for example, be the value of the first current source I. p1 With the first pull-down resistor R d1 The product of the two levels means that the value of the second level signal on the second connection path can be 0 or close to 0.
[0088] In another embodiment, the second electronic device may also be such as Figure 13 The second electronic device 400 shown is an electronic device with its own cable. The second electronic device 400 includes a second connector 40c, which includes a second additional connector pin 40a and a second connector sub-pin 41a spaced apart by the second connector pin 41. When the first electronic device 100 and the second electronic device 400 are connected, the second connector 40c is inserted into the first interface 10, the second additional connector pin 40a is connected to the first pin 10a, and the second connector sub-pin 41a is connected to the first target sub-pin 11a; or, the second additional connector pin 40a is connected to the second pin 10b, and the second connector sub-pin 41a is connected to the second target sub-pin 12a. For example, the second electronic device 400 can be a portable power bank with its own cable, and the first electronic device 100 can be a mobile terminal.
[0089] Step S32: If it is determined that the current charging device supports the fast charging protocol based on the first level signal and the second level signal, then load the second current source on the first pin or the second pin and obtain the third level signal of the first pin or the second pin.
[0090] Specifically, when the first pin is used to connect the first electronic device and the second electronic device, a second current source is applied to the first pin to obtain a third-level signal. When the second pin is used to connect the first electronic device and the second electronic device, a second current source is applied to the second pin to obtain a third-level signal.
[0091] Specifically, the first level signal and the second level signal can be compared; when the first level signal and the second level signal are different, it is determined that the current charging device supports the fast charging protocol.
[0092] Specifically, please refer to Figure 5 As shown, the first chip 100a also includes a judgment module 40. The judgment module 40 includes four signal input terminals, which are respectively connected to the first target sub-pin 11a, the second target sub-pin 12a, the first pin 10a, and the second pin 10b. The judgment module 40 converts the first level signal input from the first target sub-pin 11a or the second target sub-pin 12a and the second level signal input from the first pin 10a or the second pin 10b into a first level value and a second level value, respectively. Then, the first level value and the second level value are compared. When the first level value and the second level value are different, it is determined that the current charging device supports the fast charging protocol.
[0093] Please refer to Figure 10 and Figure 11 As shown, a second current source I is applied to either the first pin 10a or the second pin 10b. p2 Second current source I p2 The first pin 10a (second pin 10b), the first newly added pin 20a (second newly added pin 20b), and the second pull-down resistor R d2 A connection path is formed, and the value of the third-level signal on this connection path can be, for example, a second current source I. p2 With the second pull-down resistor R d2 The product of.
[0094] Step S33: If it is determined from the third level signal that the current charging device supports the fast charging protocol, a pin swap command is generated. The pin swap command is used to configure the first pin and / or the second pin to implement the first transmission function, or to configure the first pin and / or the second pin to implement the second transmission function.
[0095] Specifically, a third-level signal is compared with a preset level value; when the third-level signal and the preset level value are the same, it is determined that the current charging device supports the fast charging protocol. For example, the preset level value can be, for instance, the second current source I mentioned above. p2 With the second pull-down resistor R d2 The product of.
[0096] After determining that the current charging device supports the fast charging protocol, a pin swap command is generated. Based on this command, the first and / or second pins are configured to perform either a first transmission or a second transmission. Alternatively, other pins originally used for both first and second transmissions can be configured to perform either the second transmission or the first transmission alone. In subsequent steps, the first and second transmissions will no longer conflict and can proceed simultaneously.
[0097] In this embodiment, the first target pin and the first target sub-pin are separated into intervals in the first interface of the first electronic device, and the second target pin and the second target sub-pin are separated into intervals. When the second electronic device is connected to the first electronic device, if it is determined that the current charging device supports the fast charging protocol based on the level signal of the first pin or the second pin and the level signal of the first target sub-pin or the second target sub-pin, then the first pin and / or the second pin are configured to perform the first transmission, or the first pin and / or the second pin are configured to perform the second transmission. In this way, the first transmission and the second transmission can be performed simultaneously during the fast charging process.
[0098] In one implementation, the pin swap command is used to configure the first pin and the second pin to implement a first transmission function. Steps S131 and S132 are included after step S33, as detailed in the corresponding description of the previous embodiment.
[0099] This application provides a control circuit 50. Please refer to [link / reference]. Figure 1 , Figure 9 , Figure 14 and Figure 15 As shown, the control circuit 50 is connected to the first interface 10. The first interface 10 includes a first pin 10a and a first target sub-pin 11a, which are spaced apart by the first target pin 11; a second pin 10b and a second target sub-pin 12a, which are spaced apart by the second target pin 12; a third target pin 13; and a fourth target pin 14. The first target sub-pin 11a and the second target pin 12a are respectively connected to two first current sources I. p1 Correspondingly, pin 10a and pin 10b are respectively connected to the two second current sources I. p2 Corresponding connection.
[0100] The control circuit 50 includes a control module 53, a first switch unit 51, and a second switch unit 52. The first switch unit 51 is used to control the connection and disconnection between the first output terminal 531 of the control module 53 and the first pin 10a, the connection and disconnection between the first output terminal 531 of the control module 53 and the second pin 10b, and the connection and disconnection between the first output terminal 531 of the control module 53 and the second switch unit 52.
[0101] The second switching unit 52 is used to control the connection and disconnection between the second output terminal 532 of the control module 53 and the third target pin 13, the connection and disconnection between the second output terminal 532 of the control module 53 and the fourth target pin 14, and the connection and disconnection between the first switching unit 51 and the third target pin 13, and the connection and disconnection between the first switching unit 51 and the fourth target pin 14.
[0102] The control module 53 is used to implement the interface control method described above.
[0103] Specifically, the first pin 10a can be connected to the first output terminal 531 and the second pin 10b can be connected to the first output terminal 531 through the first switching unit 51, so that the first data can be transmitted to the control module 53 through the first pin 10a or the second pin 10b, and the first data sent by the control module 53 can be transmitted to the first pin 10a or the second pin 10b.
[0104] Specifically, the second switch unit 52 can be connected to the first output terminal 531 through the first switch unit 51, and the third target pin 13 and the fourth target pin 14 can be connected to the first switch unit 51 through the second switch unit 52, thereby connecting the first output terminal 531 to the third target pin 13 and the first output terminal 531 to the fourth target pin 14. The first data is transmitted to the control module 53 through the third target pin 13 or the fourth target pin 14, and the first data sent by the control module 53 is transmitted to the third target pin 13 or the fourth target pin 14.
[0105] Specifically, the third target pin 13 can be connected to the second output terminal 532 and the fourth target pin 14 can be connected to the second output terminal 532 through the second switching unit 52, the second data can be transmitted to the control module 53 through the third target pin 13 or the fourth target pin 14, and the second data sent by the control module 53 can be transmitted to the third target pin 13 or the fourth target pin 14.
[0106] For example, the first interface 10 can be a Type-C interface, the first target pin 11 and the second target pin 12 can be CC1 pin and CC2 pin respectively, the first target sub-pin 11a and the second target sub-pin 12a formed after splitting can continue to be CC1 pin and CC2 pin respectively, the first pin 10a and the second pin 10b are used to implement the first transmission function, and the third target pin 13 and the fourth target pin 14 can be DP pin and DM pin respectively.
[0107] In this embodiment, the first target pin and the first target sub-pin are set at intervals by dividing the first target pin in the first interface of the first electronic device, and the second target pin and the second target sub-pin are set at intervals by dividing the second target pin. When the second electronic device is connected to the first electronic device, if it is determined from the charging protocol information that the current charging device supports the fast charging protocol, the first pin and the second pin are configured to perform the first transmission or the second transmission. In this way, the first transmission and the second transmission can be performed simultaneously during the fast charging process.
[0108] As one implementation method, please refer to Figure 7 As shown, the first switching unit 51 includes a first switching element 5111 connected to the first output terminal 531, a first contact terminal 5121 corresponding to the first pin 10a, a second contact terminal 5122 corresponding to the second switching unit 52 (third target pin 13), a second switching element 5112, a third contact terminal 5123 corresponding to the second pin 10b, and a fourth contact terminal 5124 corresponding to the second switching unit 52 (fourth target pin 14). The first switching element 5111 can contact the first contact terminal 5121 or the second contact terminal 5122, and the second switching element 5112 can contact the third contact terminal 5123 or the fourth contact terminal 5124. When the first switching element 5111 contacts the first contact terminal 5121 and the second switching element 5112 contacts the third contact terminal 5123, the first pin 10a is connected to the first output terminal 531 and the second pin 10b is connected to the first output terminal 531. The first pin 10a and the second pin 10b can be used to transmit the first data. When the first switching element 5111 can contact the second contact terminal 5122 and the second switching element 5112 contacts the fourth contact terminal 5124, the second switching unit 52 is connected to the first output terminal 531. Then, the third target pin 13 and the fourth target pin 14 are connected to the first switching unit 51 through the second switching unit 52, thereby connecting the first output terminal 531 to the third target pin 13 and the first output terminal 531 to the fourth target pin 14. The third target pin 13 and the fourth target pin 14 can be used to transmit the first data.
[0109] In some implementations, please refer to [the relevant documentation]. Figure 7As shown, the second switching unit 52 includes a third switching element 5211 corresponding to the third target pin 13, a fifth contact terminal 5221 corresponding to the second contact terminal 5122, a sixth contact terminal 5222 corresponding to the second output terminal 532, a fourth switching element 5212 corresponding to the fourth target pin 14, a seventh contact terminal 5223 corresponding to the fourth contact terminal 5124, and an eighth contact terminal 5224 corresponding to the second output terminal 532. When the first switching element 5111 can contact the second contact terminal 5122 and the second switching element 5112 is in contact with the fourth contact terminal 5124, the third switching element 5211 is in contact with the fifth contact terminal 5221 and the fourth switching element 5212 is in contact with the seventh contact terminal 5223. The first output terminal 531 is connected to the third target pin 13 and the fourth target pin 14. The third target pin 13 and the fourth target pin 14 can be used to transmit first data. When the third switching element 5211 is in contact with the sixth contact terminal 5222 and the fourth switching element 5212 is in contact with the eighth contact terminal 5224, the second output terminal 532 is connected to the third target pin 13 and the fourth target pin 14. The third target pin 13 and the fourth target pin 14 can be used to transmit the second data.
[0110] In some implementations, please refer to Figure 16 As shown, the first pin 10a and the second pin 10b are respectively connected to two pull-down resistors R.
[0111] One embodiment of this application provides a chip 600; please refer to [link / reference]. Figure 17 As shown, chip 600 is used to implement the interface control method described above. A chip (Integrated Circuit, IC) is also called a chip, and this chip can be, but is not limited to, a SOC (System on Chip) chip or a SIP (System in Package) chip.
[0112] In this embodiment, when the second electronic device is connected to the first electronic device, if it is determined that the current charging device supports the fast charging protocol based on the level signal of the first pin or the second pin and the level signal of the first target sub-pin or the second target sub-pin, then the first pin and / or the second pin are configured to perform a first transmission or a second transmission. In this way, the first transmission and the second transmission can be performed simultaneously during the fast charging process.
[0113] This application also provides an electronic device 700, please refer to... Figure 18As shown, the electronic device 700 includes a device body and a chip 600 as described above disposed within the device body. The electronic device can be, but is not limited to, a weight scale, body fat scale, nutrition scale, pulse oximeter, body composition analyzer, display, USB (Universal Serial Bus) docking station, automobile, smart wearable device, mobile terminal, and smart home device. Smart wearable devices include, but are not limited to, smartwatches, smart bracelets, and neck massagers. Mobile terminals include, but are not limited to, smartphones, laptops, tablets, and POS (point of sales terminal) machines. Smart home devices include, but are not limited to, smart sockets, smart rice cookers, smart robot vacuums, and smart lights.
[0114] In this embodiment, the electronic device has a first target pin and a first target sub-pin that are spaced apart by dividing the first target pin in the first interface, and a second target pin and a second target sub-pin that are spaced apart by dividing the second target pin. When the second electronic device is connected to the first electronic device, if it is determined that the current charging device supports the fast charging protocol based on the level signal of the first pin or the second pin and the level signal of the first target sub-pin or the second target sub-pin, then the first pin and / or the second pin are configured to perform the first transmission, or the first pin and / or the second pin are configured to perform the second transmission. In this way, the first transmission and the second transmission can be performed simultaneously during the fast charging process.
[0115] This application also provides an electronic device 700a, please refer to [link to relevant documentation]. Figure 19 As shown, the electronic device 700a includes a main body and a control circuit 50, as described above, disposed within the main body. The electronic device may be, but is not limited to, a weighing scale, body fat scale, nutritional scale, pulse oximeter, body composition analyzer, display, USB (Universal Serial Bus) docking station, automobile, smart wearable device, mobile terminal, and smart home device. Smart wearable devices include, but are not limited to, smartwatches, smart bracelets, and neck massagers. Mobile terminals include, but are not limited to, smartphones, laptops, tablets, and POS (point of sales terminal) machines. Smart home devices include, but are not limited to, smart sockets, smart rice cookers, smart robot vacuums, and smart lights.
[0116] In this embodiment, the electronic device has a first target pin and a first target sub-pin that are spaced apart by dividing the first target pin in the first interface, and a second target pin and a second target sub-pin that are spaced apart by dividing the second target pin. When the second electronic device is connected to the first electronic device, if it is determined that the current charging device supports the fast charging protocol based on the level signal of the first pin or the second pin and the level signal of the first target sub-pin or the second target sub-pin, then the first pin and / or the second pin are configured to perform the first transmission, or the first pin and / or the second pin are configured to perform the second transmission. In this way, the first transmission and the second transmission can be performed simultaneously during the fast charging process.
[0117] The above description is merely an embodiment of this application. It should be noted that those skilled in the art can make improvements without departing from the inventive concept of this application, but these improvements all fall within the protection scope of this application.
Claims
1. An interface control method, characterized in that, The first chip is applied to a first electronic device, which includes a first interface. The first interface includes a first pin and a first target sub-pin that are spaced apart by dividing a first target pin, and a second pin and a second target sub-pin that are spaced apart by dividing a second target pin. The first target sub-pin and the second target sub-pin are respectively connected to two first current sources. The interface control method includes: When the second electronic device is connected, a first current source is applied to the first target sub-pin or the second target sub-pin to obtain the first level signal of the first target sub-pin or the second target sub-pin and the second level signal of the first pin or the second pin; If it is determined from the first level signal and the second level signal that the current charging device supports the fast charging protocol, a pin swap command is generated. The pin swap command is used to configure the first pin and / or the second pin to implement a first transmission function, or to configure the first pin and / or the second pin to implement a second transmission function.
2. An interface control method, characterized in that, The first chip is applied to a first electronic device, which includes a first interface. The first interface includes a first pin and a first target sub-pin that are spaced apart by dividing a first target pin, and a second pin and a second target sub-pin that are spaced apart by dividing a second target pin. The first target sub-pin and the second target sub-pin are respectively connected to two first current sources, and the first pin and the second pin are respectively connected to two second current sources. The currents of the first current sources and the second current sources are different. The interface control method includes: When the second electronic device is connected, a first current source is applied to the first target sub-pin or the second target sub-pin, and a second current source is applied to the first pin or the second pin, thereby obtaining the first level signal of the first target sub-pin or the second target sub-pin and the second level signal of the first pin or the second pin; If it is determined from the first level signal and the second level signal that the current charging device supports the fast charging protocol, a pin swap command is generated. The pin swap command is used to configure the first pin and / or the second pin to implement a first transmission function, or to configure the first pin and / or the second pin to implement a second transmission function.
3. An interface control method, characterized in that, The first chip is applied to a first electronic device, which includes a first interface. The first interface includes a first pin and a first target sub-pin that are spaced apart by dividing a first target pin, and a second pin and a second target sub-pin that are spaced apart by dividing a second target pin. The first target sub-pin and the second target sub-pin are respectively connected to two first current sources, and the first pin and the second pin are respectively connected to two second current sources. The currents of the first current sources and the second current sources are different. The interface control method includes: When the second electronic device is connected, a first current source is applied to the first target sub-pin or the second target sub-pin to obtain the first level signal of the first target sub-pin or the second target sub-pin and the second level signal of the first pin or the second pin; If it is determined from the first level signal and the second level signal that the current charging device supports the fast charging protocol, then a second current source is applied to the first pin or the second pin to obtain the third level signal of the first pin or the second pin; If it is determined from the third level signal that the current charging device supports the fast charging protocol, a pin swap command is generated. The pin swap command is used to configure the first pin and / or the second pin to implement a first transmission function, or to configure the first pin and / or the second pin to implement a second transmission function.
4. The interface control method according to any one of claims 1 to 3, characterized in that, The switch pin command is used to configure the first pin and / or the second pin for a first transmission; The interface control method further includes: The first transmission is performed via the first pin used for the first transmission or the second pin used for the first transmission.
5. The interface control method according to claim 4, characterized in that, The interface also includes a third target pin and a fourth target pin for performing a second transmission; The interface control method further includes: During the first transmission or during fast charging, the second transmission is performed through the third target pin or the fourth target pin.
6. The interface control method according to any one of claims 1 to 3, characterized in that, The interface control method further includes: Compare the first level signal and the second level signal; When the first level signal and the second level signal are different, it is determined that the current charging device supports the fast charging protocol.
7. The interface control method according to claim 3, characterized in that, The interface control method further includes: Compare the third-level signal with the preset level value; When the third level signal is the same as the preset level value, it is determined that the current charging device supports the fast charging protocol.
8. A control circuit, characterized in that, Connected to a first interface, the first interface includes a first pin and a first target sub-pin spaced apart by dividing a first target pin, a second pin and a second target sub-pin spaced apart by dividing a second target pin, a third target pin and a fourth target pin, the first target sub-pin and the second target sub-pin being respectively connected to two first current sources; The control circuit includes: a control module, a first switching unit, and a second switching unit. The first switching unit is used to control the connection and disconnection between the first output terminal of the control module and the first pin and the second pin, respectively, and the connection and disconnection between the first output terminal of the control module and the second switching unit. The second switching unit is used to control the connection and disconnection between the second output terminal of the control module and the third target pin and the fourth target pin, respectively, as well as the connection and disconnection between the first switching unit and the third target pin and the fourth target pin, respectively; The control module is used to implement the interface control method as described in any one of claims 1 to 7.
9. The control circuit according to claim 8, characterized in that, The first pin and the second pin are respectively connected to two second current sources, and the currents of the first current source and the second current source are different.
10. The control circuit according to claim 8 or 9, characterized in that, The first pin and the second pin are respectively connected to two second current sources, and the currents of the first current source and the second current source are different.
11. The control circuit according to claim 8 or 9, characterized in that, The first pin and the second pin are respectively connected to two pull-down resistors.
12. The control circuit according to claim 8 or 9, characterized in that, The first target pin is the CC1 pin, the second target pin is the CC2 pin, the third target pin is the DP pin, and the fourth target pin is the DM pin.
13. A chip, characterized in that, Used to implement the interface control method as described in any one of claims 1 to 7.
14. An electronic device, characterized in that, Includes the chip as described in claim 13 or the control circuit as described in any one of claims 8 to 12.