Enhanced LIN device, communication system, communication method, bus interface and processor

Abstract

The invention discloses an enhanced LIN (Local Interconnect Network) device, an enhanced LIN communication system, a data communication method, a bus interface and a processor. The enhanced LIN equipment comprises a microcontroller unit and an LIN physical layer transceiver, the LIN physical layer transceiver comprises a high-speed modem, and the microcontroller unit comprises a standard LIN protocol stack and a data communication module; the high-speed modem comprises a sending path and a receiving path, and the sending path is responsible for converting the formatted data load generated by the microcontroller unit into a high-frequency carrier signal and sending the high-frequency carrier signal to the bus; the receiving path is responsible for acquiring high-frequency carrier signals from a bus, converting the high-frequency carrier signals into formatted data loads and sending the formatted data loads to the microcontroller unit. According to the technical scheme provided by the embodiment of the invention, a hidden high-speed data channel is opened up for the LIN bus on the premise that the hardware cost is not obviously increased, and the high-speed data communication capability of the LIN bus is expanded.

Description

Technical Field

[0001] This invention relates to the field of communication technology, specifically to the field of automotive electronic communication, and particularly to an enhanced LIN (Local Interconnect Network) device, an enhanced LIN communication system, a data communication method, a bus interface, and a processor. Background Technology

[0002] LIN bus is a low-cost, low-speed serial communication protocol widely used in automotive electronics, with its maximum speed typically limited to 20kbps. LIN bus is primarily used to connect sensors and actuators, such as window controls, seat adjustments, and air conditioning dampers. On the LIN bus, a single-master, multi-slave architecture is typically used for device networking, and communication is achieved through a data structure called a LIN frame. A LIN frame consists of a frame header sent by the master node and a response sent by one of the slave nodes.

[0003] The main problem with existing technologies is the extremely low bandwidth of the LIN bus, which severely limits its application scenarios. For example, when operations such as firmware updates, transmission of detailed diagnostic data, or rapid production line calibration are required on nodes on the LIN network, the 20kbps transmission rate makes these operations extremely time-consuming. Currently, the only solution to achieve these functions is to add an additional high-speed communication bus, such as a CAN (Controller Area Network) bus, to these nodes. However, this approach significantly increases the cost and complexity of the vehicle's wiring harness. Summary of the Invention

[0004] This invention provides an enhanced LIN device, an enhanced LIN communication system, a data communication method, a bus interface, and a processor, which effectively expand the high-speed data communication capability of the LIN bus without changing the physical topology and standard communication protocol of the LIN bus.

[0005] According to one aspect of the present invention, an enhanced LIN device is provided, comprising: a microcontroller unit and a LIN physical layer transceiver, wherein: the LIN physical layer transceiver includes a high-speed modem, and the microcontroller unit includes a standard LIN protocol stack and a data communication module;

[0006] A high-speed modem includes a transmit path and a receive path. The transmit path is responsible for converting the formatted data payload generated by the microcontroller unit into a high-frequency carrier signal and sending it to the bus. The receive path is responsible for obtaining the high-frequency carrier signal from the bus, converting it into a formatted data payload, and sending it to the microcontroller unit.

[0007] Furthermore, the LIN physical layer transceiver also includes: a standard LIN transceiver and a mode control register; the mode control register is connected to the microcontroller unit, the standard LIN transceiver, and the transmission path, respectively;

[0008] The mode control register controls the standard LIN transceiver and transmit path, enabling mutual exclusion operations.

[0009] Furthermore, the mode control register controls the standard LIN transceiver and the transmission path to achieve mutual exclusion operation, including: enabling the standard LIN transceiver and simultaneously disabling the transmission path, so that the node can send and receive standard LIN frames.

[0010] The mode control register disables the standard LIN transceiver and simultaneously enables the transmit path, causing the transmit path to superimpose a high-frequency signal during the current bus idle period.

[0011] Furthermore, the transmission path includes interconnected modulators (also known as modulators) and programmable power amplifiers;

[0012] The modulator receives the formatted data payload sent by the microcontroller unit and generates the original carrier signal;

[0013] The programmable power amplifier amplifies the original carrier signal to obtain a high-frequency carrier signal, which is then sent to the bus.

[0014] Furthermore, the receiving path includes: a band-pass filter (BPF), a low-noise amplifier (LNA), and a demodulator. The band-pass filter is connected to the low-noise amplifier, and the low-noise amplifier is connected to the demodulator.

[0015] A bandpass filter filters the high-frequency carrier signal received from the bus to obtain a bandpass carrier signal;

[0016] A low-noise amplifier amplifies a bandpass carrier signal to obtain an amplified carrier signal.

[0017] The demodulator performs signal demodulation processing on the carrier amplified signal to obtain a formatted data payload, which is then sent to the microcontroller unit.

[0018] Furthermore, the data communication module includes a high-speed data packetizer; after being activated, the high-speed data packetizer extracts data packets from the original data block, encapsulates them into a formatted data payload, and provides it to the high-speed modem.

[0019] Furthermore, the data communication module includes a high-speed data unpacker; when activated, the high-speed data unpacker unpacks the formatted data payload acquired by the high-speed modem into data packets and processes the data packets.

[0020] Furthermore, the standard LIN protocol stack controls the activation of the high-speed data packetizer and the high-speed data depacker.

[0021] Furthermore, the formatted data payload is constructed by concatenating data packets, preamble, start-of-frame delimiter, and cyclic redundancy check (CRC) code.

[0022] According to another aspect of the present invention, an enhanced LIN communication system is provided, the LIN communication system comprising: a master node mounted on a bus and at least one enhanced slave node, wherein the master node and each enhanced slave node are enhanced LIN devices as described in any one of the embodiments of the present invention.

[0023] Furthermore, the communication system also includes: at least one standard slave node mounted on the bus;

[0024] According to another aspect of the present invention, a data communication method is also provided, applied to the enhanced LIN communication system described in any one of the embodiments of the present invention, the method comprising:

[0025] Initialization and authorization for high-speed data transmission between the master node and the enhanced slave node;

[0026] Once the master node has been authorized, it will initiate high-speed data transmission.

[0027] While the master node performs high-speed data transmission, the enhanced slave node performs high-speed data reception.

[0028] The master node and the enhanced slave node perform high-speed data loop query and confirmation.

[0029] Furthermore, the master node and enhanced slave node perform high-speed data transmission initialization and authorization, including:

[0030] The master node initiates high-speed data transmission and calls the first standard LIN protocol stack. The first standard LIN protocol stack constructs a standard LIN control frame and sends it to the master node's first LIN physical layer transceiver. The first standard LIN transceiver of the first LIN physical layer transceiver then sends the standard LIN control frame to the bus.

[0031] The second LIN physical layer transceiver of the enhanced slave node receives and decodes the standard LIN control frame from the bus. The second standard LIN transceiver of the second LIN physical layer transceiver sends the decoded standard LIN control frame to the second standard LIN protocol stack of the enhanced slave node for parsing. The second standard LIN protocol stack constructs a ready response based on the parsing result and sends it to the bus through the second standard LIN transceiver.

[0032] The first LIN physical layer transceiver of the master node receives a ready response from the bus. The first standard LIN transceiver of the first LIN physical layer transceiver sends the ready response to the first standard LIN protocol stack. When the first standard LIN protocol stack receives the ready response, it determines that the authorization is complete.

[0033] Furthermore, after the master node obtains authorization, it implements high-speed data transmission, including:

[0034] The master node's first standard LIN protocol stack activates the first high-speed data packetizer;

[0035] When the master node determines that the bus has entered an idle period, its first standard LIN protocol stack writes an instruction to the first mode control register. The first mode control register controls the first standard LIN transceiver and the first transmit path, implements mutual exclusion operation, disables the first standard LIN transceiver, and simultaneously enables the first transmit path.

[0036] The first high-speed data packetizer extracts data packets from the original data block, encapsulates them into a formatted data payload, and sends it to the first LIN physical layer transceiver. After receiving the formatted data payload, the first transmission path modulates and converts it into a high-frequency carrier signal, and then sends it to the bus.

[0037] Furthermore, while the master node performs high-speed data transmission, the enhanced slave node performs high-speed data reception, including:

[0038] The second receive path of the second LIN physical layer transceiver in the enhanced slave node receives a high-frequency carrier signal from the bus, demodulates the high-frequency carrier signal into a formatted digital payload, and sends it to the second high-speed data unpacker of the enhanced slave node.

[0039] The second high-speed data unpacker decapsulates the formatted data payload into data packets and processes the data packets.

[0040] Furthermore, the master node and enhanced slave nodes perform high-speed data loop queries and confirmations, including:

[0041] The master node’s first standard LIN protocol stack reconstructs a standard LIN control frame and sends the standard LIN control frame to the first LIN physical layer transceiver, which then sends the standard LIN control frame to the bus.

[0042] The second LIN physical layer transceiver of the enhanced slave node receives and decodes the standard LIN control frame from the bus, and sends the decoded standard LIN control frame to the second standard LIN protocol stack of the enhanced slave node for parsing. The second standard LIN protocol stack constructs the receive status response of the previous data packet based on the parsing result. Within the receive status response time slot, the second standard LIN transceiver of the second LIN physical layer transceiver sends the receive status response to the bus.

[0043] When the master node receives the receive status response from the bus, it determines whether to continue sending the next data packet or retransmit the data packet that failed to be sent last time.

[0044] The master node and the enhanced slave node repeat the above steps in a loop until all data packets have been sent.

[0045] According to another aspect of the present invention, a bus interface is also provided, including an enhanced LIN device as described in any one of the embodiments of the present invention.

[0046] According to another aspect of the present invention, a processor is also provided, including a bus interface as described in any one of the embodiments of the present invention.

[0047] According to another aspect of the present invention, a computer-readable storage medium is provided, the computer-readable storage medium storing computer instructions for causing a processor to execute, thereby implementing a data communication method performed by a master node or at least one enhanced slave node in an enhanced LIN communication system as described in any embodiment of the present invention.

[0048] According to another aspect of the present invention, a computer program product is also provided, including a computer program that, when executed by a processor, implements a data communication method performed by a master node or at least one enhanced slave node in an enhanced LIN communication system as described in any embodiment of the present invention.

[0049] The technical solution of this invention adds a high-speed modem to the physical layer of an existing standard LIN device to obtain an enhanced LIN device. After networking the enhanced LIN device on the existing LIN bus to obtain an enhanced LIN communication system, based on the enhanced LIN communication system, high-speed digital carrier communication between the master node and any enhanced LIN slave node can be realized while taking into account the existing standard LIN communication mode. The technical solution of this invention can significantly improve the data transmission capability of the LIN bus without changing the existing physical topology and standard LIN communication protocol. Through an innovative "parasitic" communication method, a hidden high-speed data channel is opened for the LIN bus without significantly increasing hardware costs, thereby greatly expanding the application value of the LIN bus and providing a highly cost-effective solution for vehicle manufacturers.

[0050] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of the present invention, nor is it intended to limit the scope of the invention. Other features of the invention will become readily apparent from the following description. Attached Figure Description

[0051] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0052] Figure 1 This is a structural diagram of an enhanced LIN device provided according to an embodiment of the present invention;

[0053] Figure 2 This is a structural diagram of another enhanced LIN device provided according to an embodiment of the present invention;

[0054] Figure 3 This is a schematic diagram showing the connection relationship between a mode control register and other components in an enhanced LIN device, as applicable to an embodiment of the present invention.

[0055] Figure 4 This is a schematic diagram of the specific transmission and reception paths in a high-speed modem applicable to an embodiment of the present invention;

[0056] Figure 5 This is a schematic diagram illustrating the data interaction control between various components in a microcontroller unit and various components in a LIN physical layer transceiver, applicable to an embodiment of the present invention.

[0057] Figure 6This is a schematic diagram of the structure of an enhanced LIN communication system provided in an embodiment of the present invention;

[0058] Figure 7 This is a schematic diagram of another enhanced LIN communication system provided in an embodiment of the present invention;

[0059] Figure 8 This is a flowchart of a data communication method performed by a master node and an enhanced slave node in an enhanced LIN communication system, as provided in an embodiment of the present invention.

[0060] Figure 9 This is a flowchart illustrating the specific implementation of the high-speed data packetizer used in this embodiment of the invention to encapsulate formatted data payloads.

[0061] Figure 10 This is a flowchart illustrating a specific implementation of a high-speed data unpacker to decapsulate a formatted data payload into a data packet, applicable to an embodiment of the present invention.

[0062] Figure 11 This is a scenario diagram illustrating a data communication method implemented by a master node and an enhanced LIN slave node, applicable to an embodiment of the present invention.

[0063] Figure 12 This is a schematic diagram of a bus interface provided in an embodiment of the present invention;

[0064] Figure 13 This is a processor structure provided in an embodiment of the present invention. Detailed Implementation

[0065] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.

[0066] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0067] Figure 1 This is a structural diagram of an enhanced LIN device provided in an embodiment of the present invention. The enhanced LIN device can be used to form an enhanced LIN communication system on a LIN bus (hereinafter referred to as the bus). In the enhanced LIN communication system, both standard LIN communication between the master node and any slave node and high-speed digital carrier communication between the master node and any enhanced LIN slave node can be realized. The above two communication methods can be executed in a time-sharing manner through software scheduling, without interfering with each other.

[0068] Correspondingly, such as Figure 1 As shown, the enhanced LIN device includes a microcontroller unit (MCU) 110 and a LIN physical layer transceiver 120 (also referred to as a PHY or enhanced PHY). The LIN physical layer transceiver 120 includes a high-speed modem 1201, and the microcontroller unit 110 includes a standard LIN protocol stack 1101 and a data communication module 1102.

[0069] The high-speed modem 1201 includes a transmitting path 12011 and a receiving path 12012. The transmitting path 12011 is responsible for converting the formatted data payload generated by the microcontroller unit 110 into a high-frequency carrier signal and transmitting it to the bus. The receiving path 12012 is responsible for obtaining the high-frequency carrier signal from the bus, converting it into a formatted data payload, and transmitting it to the microcontroller unit 110.

[0070] The standard LIN protocol stack 1101 manages the higher-level LIN protocol; the data communication module 1102 is responsible for communication data processing.

[0071] In this embodiment, with the coordinated execution of the standard LIN protocol stack 1101 and data communication module 1102 in the microcontroller unit 110, the entire enhanced LIN device can operate in two communication modes: one is the standard communication mode in the prior art, and the other is the newly added high-speed communication mode. The standard communication mode can be understood as the mode in which the transceiver nodes implement standard LIN communication, while the high-speed communication mode can be understood as the mode in which the transceiver nodes implement high-speed digital carrier communication.

[0072] In related technologies, during communication based on the LIN bus protocol, there is a bus idle period between LIN frames. This bus idle period is a silent state when there is no data transmission; during this time, the bus level remains recessive (usually high), indicating that no node is driving the bus. Based on the physical characteristics of the LIN bus, this application creatively constructs a novel enhanced LIN device. Furthermore, during the LIN bus idle period, this enhanced LIN device can superimpose a high-frequency carrier signal onto the LIN bus at the physical layer, thereby enabling high-speed transmission of large amounts of data with higher bandwidth.

[0073] Accordingly, since this enhanced LIN device can creatively implement high-speed communication modes, a high-speed modem 1201 needs to be further added to the LIN physical layer transceiver 120. This high-speed modem 1201 can be understood as a new transceiver device added to the LIN physical layer transceiver 120 of the enhanced LIN device to adapt to high-speed communication modes. By using the high-speed modem 1201, the transmission and reception of high-frequency carrier signals can be achieved.

[0074] In other words, the high-speed modem 1201 is responsible for the precise bidirectional conversion between the formatted data payload transmitted from the microcontroller unit 110 and the high-frequency carrier signal transmitted on the LIN bus. In designing the high-speed modem 1201, this application aims to ensure that while enabling high-speed communication, it also strictly prevents interference with other LIN nodes on the LIN bus. The internal hardware structure of the high-speed modem 1201 mainly consists of two parts: a transmit path 12011 (TX Path) and a receive path 12012 (RX Path). The function of the transmit path 12011 is to convert the "data to be modulated" bitstream (i.e., the formatted data payload) from the microcontroller unit 110 into a high-frequency carrier signal with controlled amplitude superimposed on the LIN bus.

[0075] It should be noted that the phrase "strictly ensuring no interference to other LIN nodes on the LIN bus" specifically refers to controlling the amplitude of the high-frequency carrier signal (or superimposed signal) transmitted by the high-speed modem 1201 to the LIN bus within a relatively small range. This is because the high-speed communication mode is activated during the idle period of the LIN bus. At this time, the high-frequency carrier signal sent by the enhanced LIN device to the LIN bus is often superimposed on a high-level signal. When the amplitude of this high-frequency carrier signal is too large, it may cause other nodes on the LIN bus to misinterpret the high-frequency carrier signal, resulting in communication crosstalk.

[0076] Based on this, by analyzing the noise tolerance amplitude of each node on the LIN bus, the signal amplitude of the high-frequency carrier signal generated by the high-speed modem 1201 can be precisely designed. This ensures that the receiving node of the high-frequency carrier signal can correctly recover the formatted data payload in the high-frequency carrier signal, while other nodes on the LIN bus can directly ignore the high-frequency carrier signal as noise on a high-level recessive signal.

[0077] Accordingly, software improvements are needed on the microcontroller unit 110 of the enhanced LIN device to enable it to operate in two communication modes: a standard communication mode and a high-speed communication mode. In the standard communication mode, the enhanced LIN device can perform low-speed serial communication with other nodes on the LIN bus based on the LIN communication protocol. In the high-speed communication mode, the enhanced LIN device can perform high-speed digital carrier communication with other nodes on the LIN bus.

[0078] In an optional implementation of this embodiment, the microcontroller unit 110 can control the enhanced LIN device to operate in standard communication mode by default, so as to transmit and receive standard LIN signals through the LIN physical layer transceiver 120. When the enhanced LIN device needs to transmit large blocks of data at high speed, it can first switch the current communication mode from standard communication mode to high-speed communication mode by using standard LIN frames for authorization. After that, it can transmit and receive high-frequency carrier signals through the LIN physical layer transceiver 120 during the idle period of the LIN bus.

[0079] The technical solution of this invention provides an enhanced LIN device by adding a high-speed modem to the physical layer of an existing standard LIN device. This enhanced LIN device can achieve high-speed digital carrier communication when operating in high-speed communication mode. The technical solution of this invention can significantly improve the data transmission capability of the LIN bus without changing the existing physical topology and standard LIN communication protocol. Through an innovative "parasitic" communication method, a hidden high-speed data channel is opened for the LIN bus without significantly increasing hardware costs, thereby greatly expanding the application value of the LIN bus and providing a highly cost-effective solution for vehicle manufacturers.

[0080] Based on the above embodiments, since this enhanced LIN device needs to simultaneously implement both standard communication mode and high-speed communication mode, correspondingly, such as Figure 2 As shown, the LIN physical layer transceiver also includes a standard LIN transceiver 210 and a mode control register 220; the mode control register 220 is connected to the transmission paths in the microcontroller unit, the standard LIN transceiver, and the high-speed modem (not shown in the figure).

[0081] The mode control register 220 controls the standard LIN transceiver 210 and the transmission path to achieve mutual exclusion. Further, the mode control register 220's control of the standard LIN transceiver 210 and the transmission path to achieve mutual exclusion can include: enabling the standard LIN transceiver 210 and simultaneously disabling the transmission path, allowing the node to send and receive standard LIN frames; and...

[0082] The mode control register 220 disables the standard LIN transceiver 210 and simultaneously enables the transmit path, causing the transmit path to superimpose a high-frequency signal during the current bus idle period.

[0083] As mentioned earlier, since the enhanced LIN device needs to operate in two communication modes, two transceivers need to be introduced into the LIN physical layer transceiver. Therefore, in addition to the high-speed modem, the LIN physical layer transceiver also needs to include a standard LIN transceiver 210.

[0084] In an optional implementation of this embodiment, the standard LIN transceiver 210 may specifically include: a standard LIN transmitter (not shown in the figure) and a standard LIN receiver (not shown in the figure). The standard LIN transceiver 210 is the LIN physical layer transceiver used exclusively in existing standard LIN devices. By using the standard LIN transceiver 210, the transmission and reception of LIN protocol signals can be realized, wherein:

[0085] A standard LIN transmitter is used to receive digital signals generated and transmitted by a microcontroller unit, convert the digital signals into standard LIN signals, and then send them to the LIN bus to transmit the standard LIN signals to a matched receiving node.

[0086] A standard LIN receiver is used to receive standard LIN signals from the LIN bus, convert the received standard LIN signals into digital signals, and transmit the converted digital signals to the microcontroller unit.

[0087] Based on the above embodiments, in order to enable the LIN physical layer transceiver in the enhanced LIN device to follow the microcontroller unit for flexible and accurate mutual exclusion switching and select the specific transceiver device required at the moment, a mode control register 220 is further introduced in the enhanced LIN physical layer transceiver to realize mutual exclusion operation of the two transceiver devices.

[0088] In this optional embodiment, the mode control register 220 is a key hardware register that can be directly read and written by the MCU software installed in the microcontroller unit through the internal bus interface. It is the core arbitration unit for realizing secure and conflict-free switching between standard LIN communication and high-speed data overlay transmission. Specific bits within it are connected to the drive enable signals in the transmission path of the standard LIN transceiver (typically, the standard LIN transmitter within the standard LIN transceiver) inside the LIN physical layer transceiver and the high-speed modem. Its core function is to precisely manage the "transmission rights" of the LIN bus, ensuring that only one transmission source actively drives the bus at any given time.

[0089] In a specific example, when bit 0 is written to a specific position in the mode control register 220, bit 0 can enable the standard LIN transceiver 210 while disabling the transmit path; and when bit 1 is written to a specific position in the mode control register 220, bit 1 can disable the standard LIN transceiver 210 while enabling the transmit path.

[0090] Optionally, considering that the introduction of the mode control register 220 is to ensure orderly and conflict-free time-division multiplexing of the two communication modes on the same LIN bus, the mode control register 220 only needs to enable mutual exclusion operation of the two transmitting parts (i.e., the standard LIN transmitter and the transmitting path) in the two sets of transceivers of the LIN physical layer transceiver. The two receiving parts (i.e., the standard LIN receiver and the receiving path) in the two sets of transceivers of the LIN physical layer transceiver can remain normally open to continuously monitor the signals in their respective frequency bands. Through the above settings, the circuitry of the enhanced LIN device can be simplified to the greatest extent.

[0091] Furthermore, in Figure 3 The diagram illustrates the connection relationship between a mode control register and other components in an enhanced LIN device, as described in an embodiment of the present invention. Figure 3 As shown, the LIN physical layer transceiver may also include: a standard LIN transceiver ( Figure 3 Only the standard LIN transmitter 310 and the mode control register 320 are shown in the diagram; the mode control register 320 is connected to the microcontroller unit 330 and the standard LIN transceiver 310. Figure 3 Only the standard LIN transmitter 310 and the transmission path 340 are shown connected.

[0092] In this optional embodiment, the mode control register 320 is a key hardware register that can be directly read and written by the MCU software installed in the microcontroller unit 330 through the internal bus interface. It is the core arbitration unit for realizing secure and conflict-free switching between standard LIN communication and high-speed data overlay transmission. Specific bits within it are connected to the drive enable signals of the two transmitting sections within the LIN physical layer transceiver. Its core function is to precisely manage the "transmit rights" of the LIN bus, ensuring that only one transmitting source is actively driving the bus at any given time.

[0093] In a specific example, when bit 0 is written to a specific position in the mode control register 320, bit 0 can enable the standard LIN transmitter 310 while disabling the transmission path 340; and when bit 1 is written to a specific position in the mode control register 320, bit 1 can disable the standard LIN transmitter 310 while enabling the transmission path 340.

[0094] By default, the value in the mode control register 320 (i.e., the default value) enables the standard LIN transmitter 310 and disables transmit path 340, enabling enhanced LIN devices to send and receive standard LIN frames normally. When the MCU software receives a high-speed transmission grant and determines that the LIN bus has entered an idle period, it writes a specific value to the mode control register 320. This operation immediately triggers a mutually exclusive hardware switch: disabling the output stage of the standard LIN transmitter 310 and simultaneously enabling transmit path 340, granting it the power to superimpose high-frequency signals during the current bus idle period.

[0095] Once the required formatted data payload has been transmitted, the MCU software immediately writes the mode control register 320 back to its default value, returning the LIN bus transmission right to the standard LIN transmitter 310. Through this mutual exclusion control of transmission rights, the mode control register 320 ensures that the time-division multiplexing of the two communication modes on the same physical cable is orderly and conflict-free, while the standard LIN receiver (not shown in the figure) and receive path (not shown in the figure) inside the LIN physical layer transceiver can remain normally open to continuously monitor signals in their respective frequency bands.

[0096] Based on the above embodiments, Figure 4 The diagram shows a specific transmission path and reception path in a high-speed modem applicable to an embodiment of the present invention.

[0097] like Figure 4 As shown, the transmission path may specifically include: a modulator 410 and a programmable power amplifier 420 connected to each other;

[0098] Modulator 410 receives formatted data payload sent by microcontroller unit (not shown) and generates raw carrier signal;

[0099] The programmable power amplifier 420 amplifies the original carrier signal to obtain a high-frequency carrier signal, which is then sent to the bus.

[0100] Furthermore, the enable terminal of the modulator 410 is connected to the output terminal of the mode control register (not shown in the figure) to generate the original carrier signal according to the received formatted data payload after being enabled.

[0101] Accordingly, the receiving path may include: a bandpass filter 430, a low-noise amplifier 440, and a demodulator 450, with the bandpass filter 430 connected to the low-noise amplifier 440 and the low-noise amplifier 440 connected to the demodulator 450.

[0102] The bandpass filter 430 filters the high-frequency carrier signal received from the bus to obtain a bandpass carrier signal;

[0103] The low-noise amplifier 440 amplifies the bandpass carrier signal to obtain the amplified carrier signal.

[0104] The demodulator 450 performs signal demodulation processing on the carrier amplified signal to obtain a formatted data payload, which is then sent to the microcontroller unit (not shown in the figure).

[0105] In this optional embodiment, the modulator 410 in the transmission path can receive a serial digital bit stream (i.e., formatted data payload) from the microcontroller unit and change parameters such as the phase, amplitude, or frequency of the high-frequency carrier according to a preset modulation method (e.g., binary phase shift keying, binary amplitude shift keying, or binary frequency shift keying).

[0106] Inside modulator 410, there is typically a numerically controlled oscillator (NCO) used to generate a stable and accurate carrier signal (e.g., 250 kHz). Taking binary phase-shift keying modulation as an example, when a digital bit "1" is input into modulator 410, the carrier phase output by modulator 410 is 0°; when a digital bit "0" is input into modulator 410, the carrier phase output by modulator 410 is 180°.

[0107] Furthermore, the modulated signal output by modulator 410 (i.e., the original carrier signal) will continue to be amplified by programmable power amplifier 420 (PPA) to obtain a high-frequency carrier signal for transmission to the LIN bus (i.e., Figure 4 (The superimposed modulation signal in the signal). The gain of the programmable power amplifier 420 can be programmed and controlled by the microcontroller unit through a set register.

[0108] Optionally, the gain of the programmable power amplifier 420 can be set to a conservative value determined during the design phase that ensures safe operation under most conditions. In actual operation, enhanced LIN devices can directly use this fixed power for transmission. This approach offers the lowest cost, incurs no time overhead, and does not affect the normal operation of other node devices in the enhanced LIN communication system.

[0109] In this embodiment, the function of the receiving path is completely opposite to that of the transmitting path. The receiving path needs to accurately "capture" and demodulate the weak high-speed superimposed signal from the mixed signal of noise and standard LIN signal on the LIN bus. That is, the high-frequency carrier signal transmitted by the enhanced LIN device connected to the LIN bus in high-speed communication mode.

[0110] Correspondingly, the bandpass filter 430 is the first and most critical barrier in the receiving path. The high-frequency carrier signal received from the LIN bus is first processed by the bandpass filter 430 for narrowband filtering to obtain the bandpass carrier signal corresponding to the high-frequency carrier signal. Typically, the bandpass filter 430 can be a high-Q hardware filter whose center frequency is precisely set at the frequency of the high-frequency carrier of the modulator 410, resulting in an extremely narrow passband. The Q value defines the ratio of the center frequency to the bandwidth of the bandpass filter 430; the higher the Q value, the narrower the passband.

[0111] The main functions of the bandpass filter 430 are: 1. To filter out all low-frequency signals, including the powerful standard LIN baseband signal (0-20kHz); 2. To filter out most of the broadband noise and interference from other vehicle-mounted equipment. Only the high-frequency carrier signal at the frequency of true interest can pass through, and the final filtered result is the bandpass carrier signal.

[0112] The aforementioned bandpass carrier signal is then input to the low-noise amplifier 440. Since the amplitude of the high-frequency carrier signal on the LIN bus is very weak, after being filtered by the bandpass filter 430, it needs to be amplified by the low-noise amplifier 440 to obtain the carrier amplified signal, thereby improving the signal-to-noise ratio and preparing for subsequent demodulation processing by the demodulator 450.

[0113] Correspondingly, after the amplified carrier signal is input to the demodulator 450, the formatted data payload can be obtained by demodulation through the demodulator 450.

[0114] In a specific example, for a high-frequency carrier signal generated by binary phase-shift keying modulation, coherent demodulation is typically used. Specifically, after bandpass filtering and low-noise amplification, the resulting amplified carrier signal is mixed (i.e., multiplied) with a reference carrier generated by a local oscillator that is in phase and frequency with the transmitter. This mixture is then passed through a low-pass filter within the demodulator 450 to recover the original baseband "0" and "1" signals. The recovered digital bitstream, the demodulated data (i.e., the formatted data payload), is ultimately sent back to the microcontroller unit.

[0115] Based on the above embodiments, the data communication module includes a high-speed data packetizer; after being activated, the high-speed data packetizer extracts data packets from the original data block, encapsulates them into a formatted data payload, and provides it to the high-speed modem.

[0116] Based on the above embodiments, the data communication module of the enhanced LIN device includes a high-speed data unpacker; after being activated, the high-speed data unpacker unpacks the formatted data payload acquired by the high-speed modem into data packets and processes the data packets.

[0117] Based on the above embodiments, the standard LIN protocol stack controls and activates the high-speed data packetizer and the high-speed data depacker.

[0118] Specifically, in Figure 5 The diagram illustrates the data interaction control between components in a microcontroller unit and components in a LIN physical layer transceiver, as described in an embodiment of the present invention. Figure 5 As shown, the microcontroller unit is specifically configured with a standard LIN protocol stack 510, a high-speed data packetizer 520, and a high-speed data depacker 530, wherein:

[0119] The standard LIN protocol stack 510 is used to write mode configuration (write "1" or "0") to the mode control register in the LIN physical layer transceiver. This allows the mode control register to control the standard LIN transceiver and the transmission path according to the configuration result, achieving mutual exclusion operation. That is, enabling the standard LIN transceiver and simultaneously disabling the transmission path, or disabling the standard LIN transceiver and simultaneously enabling the transmission path.

[0120] In addition, the standard LIN protocol stack 510 is also used to control and activate the high-speed data packetizer 520 and the high-speed data depacker 530 in specific demand scenarios. Figure 5 (The specific activation interaction method is not shown in the figure.) For example, when it is necessary to extract data packets from the original data block, encapsulate them into a formatted data payload, and provide it to the high-speed modem for data transmission, the high-speed data packetizer 520 is activated; or, when it is necessary to decapsulate the formatted data payload obtained by the high-speed modem into a data packet and process the data packet, the high-speed data unpacker 530 is activated.

[0121] In one optional implementation of this embodiment, such as Figure 5 As shown, by default, the enhanced LIN device operates in standard communication mode. In this mode, the standard LIN protocol stack 510 in the microcontroller unit disables the high-speed data packetizer 520 and the high-speed data depacketizer 530. Furthermore, default values ​​are pre-written into the mode control register, thus disabling the transmit path in the high-speed modem by default, while enabling the standard LIN transceiver by default. At this time, the standard LIN protocol stack 510 can interact with the standard LIN transceiver to exchange standard frame data, and the standard LIN transceiver can transmit and receive standard LIN signals on the LIN bus.

[0122] Furthermore, when the standard LIN protocol stack 510 determines that the enhanced LIN device needs to switch its operating mode from standard communication mode to high-speed communication mode, the standard LIN protocol stack 510 can further determine whether the enhanced LIN device needs to perform formatted data payload encapsulation or decapsulation operations in high-speed communication mode. If it is determined that an encapsulation operation is required, the high-speed data packetizer 520 is activated; if it is determined that a decapsulation operation is required, the high-speed data unpacker 530 is activated accordingly. In addition, the standard LIN protocol stack 510 will simultaneously write mode configuration to the mode control register to rewrite the default value in the mode control register to a specific value. At this time, the transmit path in the high-speed modem is enabled, while it is disabled in the standard LIN transceiver.

[0123] When the high-speed data packetizer 520 is activated, it can extract data packets from the original data block and encapsulate them into a formatted data payload. This formatted data payload is then sent to the transmission path of the high-speed modem as the data to be modulated. After obtaining a high-frequency carrier signal (also known as a superimposed signal) through carrier modulation of the transmission path, it is sent to the LIN bus. In addition, when the high-speed data unpacker 530 is activated, the receiving path in the high-speed modem first demodulates the high-frequency carrier signal received through the LIN bus to obtain a formatted data payload in the form of a demodulated signal. This formatted data payload is then sent to the high-speed data unpacker 530 for decapsulation into data packets and processing.

[0124] In this optional embodiment, the function of the high-speed data packetizer 520 is to extract data packets from large blocks of data (i.e., raw data blocks) according to instructions and encapsulate them into a formatted data payload to be sent. Accordingly, in an optional embodiment of this example, the formatted data payload is constructed by concatenating data packets, preamble, start-of-frame delimiter, and cyclic redundancy check (CRC) code.

[0125] In a specific example, when the standard LIN protocol stack 510 is activated and passed relevant parameters (such as the original data block size and packet size), the high-speed data packetizer 520 cyclically extracts fixed-size data packets from the original data block. For each data packet, the high-speed data packetizer 520 calculates a predefined checksum, such as a CRC (Cyclic Redundancy Check) code. Finally, the standard LIN protocol stack 510 concatenates the preamble, start frame delimiter (SFD), data packets, and checksum to construct a formatted data payload, and sends it to the transmit buffer to await hardware transmission.

[0126] Specifically, Table 1 shows the data structure of a formatted data payload.

[0127] Table 1

[0128]

[0129] Furthermore, the high-speed data unpacker 530 functions to parse and verify the received formatted data payload (i.e., Figure 5 (Demodulated data in the received data stream). When the high-speed data unpacker 530 is activated by the standard LIN protocol stack 510, it obtains the demodulated bitstream (i.e., the formatted data payload) from the high-speed modem of the LIN physical layer transceiver. The high-speed data unpacker 530 locates the beginning of a formatted data payload by searching for a predefined start-of-frame delimiter in the received bitstream. After finding a start-of-frame delimiter, the high-speed data unpacker 530 extracts the data packets and CRC codes based on the packet size known from the initial command. Finally, the high-speed data unpacker 530 verifies the integrity of the data packets by recalculating and comparing the CRC codes. Based on the verification result, the high-speed data unpacker 530 delivers valid data packets to the upper-layer application or discards corrupted data packets, and notifies the standard LIN protocol stack 510 of the processing result (typically an acknowledgment signal or a negative acknowledgment signal).

[0130] It needs to be emphasized again that the embodiments of this invention creatively construct a novel system architecture for an enhanced LIN device. This architecture is an innovative hardware and software co-design that clearly divides the communication task into a control plane handled by the microcontroller unit and a data plane handled by the LIN physical layer transceiver. The modules within the microcontroller unit are responsible for all high-level protocol management and data processing, while the LIN physical layer transceiver is responsible for the transmission and reception of all physical layer signals. The clear functional division between the two constitutes the implementation carrier of the embodiments of this invention, namely, the enhanced LIN device.

[0131] Figure 6 This is a schematic diagram of an enhanced LIN communication system provided in an embodiment of the present invention, as shown below. Figure 6 As shown, the enhanced LIN communication system specifically includes: a master node 610 mounted on the bus (i.e., the LIN bus), and at least one enhanced slave node 620, namely, enhanced slave node 1 (Slave1), ..., enhanced slave node N (SlaveN).

[0132] In this embodiment, the master node 610 and each enhanced slave node 620 are enhanced LIN devices as described in any one of the embodiments of the present invention.

[0133] In the enhanced LIN communication system provided in this embodiment of the invention, after the master node 610 agrees with any enhanced slave node 620, such as enhanced slave node 1, to perform high-speed digital carrier communication in high-speed communication mode, the master node 610 can convert the formatted data payload generated by the microcontroller unit into a high-frequency carrier signal via the transmit path in the high-speed modem and send it to the LIN bus for reception by enhanced slave node 1. Correspondingly, enhanced slave node 1 converts the received high-frequency carrier signal into a formatted data payload via the receive path in the high-speed modem and sends it to the microcontroller unit in enhanced slave node 1. Furthermore, the master node 610 can also perform standard LIN communication with any enhanced slave node 620 in standard communication mode.

[0134] The enhanced LIN communication system provided in this invention effectively addresses the pain point of the existing LIN bus having insufficient bandwidth, failing to meet the growing demands for firmware updates and enhanced diagnostics. Through an innovative "parasitic" communication method, it cleverly utilizes the physical characteristics of the bus to create a hidden high-speed data channel for the LIN communication network without increasing hardware costs (such as additional buses). This significantly expands the application value of the LIN bus and provides a highly cost-effective solution for vehicle manufacturers.

[0135] Furthermore, in Figure 7 The diagram shows a schematic representation of another enhanced LIN communication system provided by an embodiment of the present invention. Figure 7 As shown, based on the aforementioned enhanced LIN communication system consisting only of a master node and an enhanced slave node, the enhanced LIN communication system specifically also includes: at least one standard slave node 710 mounted on the bus, namely, standard slave node 1' (Slave1'), ..., standard slave node N' (SlaveN').

[0136] In this context, the standard slave node 710 is a standard LIN device. A standard LIN device also includes a microcontroller unit and a LIN physical layer transceiver, which includes a standard LIN transceiver. That is, the LIN physical layer transceiver of the standard slave node 710 only includes a standard LIN transceiver and does not include a high-speed modem.

[0137] The enhanced LIN communication system provided in this embodiment of the invention, in addition to enabling standard LIN communication and high-speed digital carrier communication between the master node and each enhanced slave node, as in the enhanced LIN communication system provided in the previous embodiments, can also enable standard LIN communication between the master node and each standard slave node 710.

[0138] The above settings allow for simple improvements to existing standard LIN communication systems. For example, by replacing the master node in the form of a standard LIN device with a master node in the form of an enhanced LIN device, and by adding one or more enhanced slave nodes, the standard LIN communication system can be quickly upgraded to an enhanced LIN communication system, thereby improving the effective data transmission capability of the existing LIN network at a low cost.

[0139] Figure 8 This is a flowchart illustrating a data communication method performed by a master node and an enhanced slave node in an enhanced LIN communication system, provided as an embodiment of the present invention. This embodiment is applicable to high-speed digital carrier communication between a master node and an enhanced slave node. Correspondingly, as... Figure 8 As shown, the method may include:

[0140] S810, master node and enhanced slave node perform high-speed data transmission initialization and authorization.

[0141] In a specific application scenario of this embodiment, the enhanced LIN communication system can be configured in a vehicle environment. The slave nodes (enhanced slave nodes and standard slave nodes) in the enhanced LIN communication system can be actuators such as window motors, door motors, and seat motors, or various sensors, while the master node can be a vehicle body controller.

[0142] Correspondingly, a higher-level application (also known as the first higher-level application) can be further installed in the vehicle controller (or master node). Similarly, a higher-level application (also known as the second higher-level application) can be installed in each enhanced slave node.

[0143] The upper-layer applications installed on the master node or enhanced slave node can be understood as software modules that directly meet the functional requirements of the user or the vehicle system. In a specific example, based on the coordinated execution of the first and second upper-layer applications, functions such as installing or upgrading firmware on the enhanced slave node, performing fault diagnosis on the enhanced slave node, or performing data calibration on the enhanced slave node can be achieved.

[0144] Specifically, the first upper-layer application on the master node can invoke the first standard LIN protocol stack in the master node when it determines that high-speed data communication is required, in order to use the first standard LIN protocol stack for initialization and authorization of high-speed data transmission. Furthermore, the second upper-layer application in the enhanced slave node, after receiving high-speed data sent by the master node, performs data processing operations matching that high-speed data, such as firmware upgrades or sensor calibration.

[0145] In a specific example, when performing a firmware over-the-air (FPTA) upgrade on an enhanced slave node in an enhanced LIN communication system, it's necessary to control the enhanced LIN communication system to operate in high-speed communication mode. In this case, the master node's first upper-layer application can invoke the master node's first standard LIN protocol stack to issue a firmware over-the-air upgrade command and the required firmware package as raw data (or Data), ready to be sent at high speed to the enhanced slave node. Correspondingly, when the enhanced slave node's second upper-layer application receives the complete firmware package at high speed via the enhanced slave node's second standard LIN protocol stack, it performs the matching firmware upgrade operation based on the firmware package.

[0146] Since the master node operates in standard communication mode by default, after identifying the enhanced LIN slave node with which it needs to communicate at high speed, the master node first needs to initialize and authorize high-speed data transmission with that enhanced slave node.

[0147] Accordingly, in an optional implementation of this embodiment, the initialization and authorization of high-speed data transmission between the master node and the enhanced slave node may include:

[0148] The master node initiates high-speed data transmission and calls the first standard LIN protocol stack. The first standard LIN protocol stack constructs a standard LIN control frame and sends it to the master node's first LIN physical layer transceiver. The first standard LIN transceiver of the first LIN physical layer transceiver then sends the standard LIN control frame to the bus.

[0149] The second LIN physical layer transceiver of the enhanced slave node receives and decodes the standard LIN control frame from the bus. The second standard LIN transceiver of the second LIN physical layer transceiver sends the decoded standard LIN control frame to the second standard LIN protocol stack of the enhanced slave node for parsing. The second standard LIN protocol stack constructs a ready response based on the parsing result and sends it to the bus through the second standard LIN transceiver.

[0150] The first LIN physical layer transceiver of the master node receives a ready response from the bus. The first standard LIN transceiver of the first LIN physical layer transceiver sends the ready response to the first standard LIN protocol stack. When the first standard LIN protocol stack receives the ready response, it determines that the authorization is complete.

[0151] After the S820 master node is authorized, it will send high-speed data.

[0152] In an optional implementation of this embodiment, after the master node obtains authorization, it performs high-speed data transmission, which may include:

[0153] The master node's first standard LIN protocol stack activates the first high-speed data packetizer;

[0154] When the master node determines that the bus has entered an idle period, its first standard LIN protocol stack writes an instruction to the first mode control register. The first mode control register controls the first standard LIN transceiver and the first transmit path, implements mutual exclusion operation, disables the first standard LIN transceiver, and simultaneously enables the first transmit path.

[0155] The first high-speed data packetizer extracts data packets from the original data block, encapsulates them into a formatted data payload, and sends it to the first LIN physical layer transceiver. After receiving the formatted data payload, the first transmission path modulates and converts it into a high-frequency carrier signal, and then sends it to the bus.

[0156] Furthermore, in Figure 9 The diagram illustrates a specific implementation flowchart of a high-speed data packetizer used in embodiments of the present invention to encapsulate a formatted data payload. Specifically, as shown... Figure 9 As shown, in an optional implementation of this embodiment, the process of extracting data packets from the original data block and encapsulating them into a formatted data payload using a first high-speed data packetizer may include:

[0157] After receiving the high-speed transmission authorization of the standard frame, the first high-speed data packetizer receives the packet parameters passed from the first standard LIN protocol stack. The packet parameters include the original data block (Data) to be transmitted at high speed and the agreed packet size (PacketSize).

[0158] The first high-speed data packetizer initializes the data pointer Offset to 0 and, based on the packet parameters, it iteratively extracts data packets (starting from the data pointer and with a length equal to the packet size) from the original data block, calculating the checksum (e.g., a CRC code) corresponding to each packet. Then, it concatenates the data packets with a preset preamble, start-of-frame delimiter, and the matching checksum to form a formatted data payload (Frame) corresponding to the data packet. This formatted data payload is then sent to the first high-speed modem in the first LIN physical layer transceiver, where it converts the formatted data payload into a high-frequency carrier signal before transmitting it to the bus. Afterward, the data pointer is updated to the original data pointer plus the packet size, and the process of iteratively extracting data packets of the packet size from the original data block is repeated until all data in the original data block has been transmitted.

[0159] In this optional implementation, the data packets are constructed by sequentially obtaining the packet sizes from the original data blocks using the data pointer Offset for iterative updates until all original data blocks have been processed.

[0160] S830: While the master node performs high-speed data transmission, the enhanced slave node performs high-speed data reception.

[0161] In an optional implementation of this embodiment, while the master node performs high-speed data transmission, the enhanced slave node performs high-speed data reception, which may include:

[0162] The second receive path of the second LIN physical layer transceiver in the enhanced slave node receives a high-frequency carrier signal from the bus, demodulates the high-frequency carrier signal into a formatted digital payload, and sends it to the second high-speed data unpacker of the enhanced slave node.

[0163] The second high-speed data unpacker decapsulates the formatted data payload into data packets and processes the data packets.

[0164] Furthermore, in Figure 10 The diagram illustrates a specific implementation flowchart of a high-speed data unpacker for obtaining data packets, applicable to an embodiment of the present invention. Figure 10 As shown, based on the above embodiments, the second high-speed data unpacker decapsulates the formatted data payload into data packets and processes the data packets, which may include:

[0165] After receiving a high-speed receive authorization for a standard frame, the enhanced slave node's second high-speed data unpacker, after synchronously acquiring the packet size agreed upon with the master node, sequentially reads one byte at a time from the formatted data payload output by the second high-speed modem of the second LIN physical layer transceiver into a buffer, and slides and searches for the start-of-frame delimiter (SFD) in the buffer.

[0166] When a start-of-frame delimiter is found, based on the packet size, data packets and checksums are continuously read and extracted from the formatted data payload following the start-of-frame delimiter. Typically, the checksum can be a CRC code. If no start-of-frame delimiter is found, the process needs to return to the second high-speed modem output from the second LIN physical layer transceiver and read one byte at a time into the buffer until a start-of-frame delimiter is successfully found.

[0167] Furthermore, a new checksum can be recalculated based on this data packet to obtain a recalculated checksum, for example, represented as Record_CRC. Then, the received checksum and the recalculated checksum are compared to see if they match.

[0168] If they match, an acknowledgment (ACK) signal is sent to the second upper-layer application of the enhanced slave node to indicate that the data packet was successfully received; if they do not match, the data packet is discarded and a negative acknowledgment (NACK) signal is sent to the second upper-layer application of the enhanced slave node to indicate that the data packet was not successfully received.

[0169] S840, master node and enhanced slave node perform high-speed data loop query and confirmation.

[0170] In an optional implementation of this embodiment, the high-speed data loop query and confirmation between the master node and the enhanced slave node may include:

[0171] The master node’s first standard LIN protocol stack reconstructs a standard LIN control frame and sends the standard LIN control frame to the first LIN physical layer transceiver, which then sends the standard LIN control frame to the bus.

[0172] The second LIN physical layer transceiver of the enhanced slave node receives and decodes the standard LIN control frame from the bus, and sends the decoded standard LIN control frame to the second standard LIN protocol stack of the enhanced slave node for parsing. The second standard LIN protocol stack constructs the receive status response of the previous data packet based on the parsing result. Within the receive status response time slot, the second standard LIN transceiver of the second LIN physical layer transceiver sends the receive status response to the bus.

[0173] When the master node receives the receive status response from the bus, it determines whether to continue sending the next data packet or retransmit the data packet that failed to be sent last time.

[0174] The master node and the enhanced slave node repeat the above steps in a loop until all data packets have been sent.

[0175] The technical solution of this invention can significantly improve the data transmission capability of the LIN bus without changing the existing physical topology and standard LIN communication protocol. Through an innovative "parasitic" communication method, a hidden high-speed data channel is opened for the LIN bus without significantly increasing hardware costs, thereby greatly expanding the application value of the LIN bus and providing a highly cost-effective solution for vehicle manufacturers.

[0176] To further describe the technical solutions of the various embodiments of the present invention, in Figure 11 The diagram illustrates a scenario of a data communication method implemented by a master node and an enhanced slave node, applicable to an embodiment of the present invention.

[0177] Specifically, such as Figure 11As shown in the embodiments of the present invention, a novel data communication method based on the LIN bus is proposed. This method is an ordered process that utilizes the idle time of the LIN bus for high-speed data overlay transmission based on the standard LIN bus protocol scheduling. Through hardware and software collaboration between the master node and the enhanced slave node, this method achieves the separate transmission of control signaling and data payload on different channels, ensuring complete compatibility and uninterrupted operation of the standard LIN protocol ecosystem throughout the entire process.

[0178] The entire communication method, taking a single instance of a master node sending data to an enhanced slave node as an example, involves the following steps:

[0179] (I) Initialization and Authorization Phase Figure 11 Steps 1-7 in the process:

[0180] Step 1: The first upper-layer application 1101 of the master node (e.g., FOTA manager) decides to initiate a high-speed data transmission and calls the first standard LIN protocol stack 1102 in the master node.

[0181] The first upper-layer application is pre-installed on the master node to implement various control, management, and scheduling functions related to the master node. For example, it can switch the communication mode of the enhanced LIN communication system or send firmware upgrade requests to one or more enhanced slave nodes.

[0182] Step 2: The master node's first standard LIN protocol stack 1102 constructs a standard LIN control frame (i.e., Figure 11 The high-speed transmission request frame in the standard LIN control frame contains information such as "high-speed transmission request", total data length, and packet size.

[0183] Step 3: The first LIN physical layer transceiver 1105 of the master node sends the frame header of the standard LIN control frame in standard mode.

[0184] Step 4: After receiving and decoding the frame header of the standard LIN control frame, the second LIN physical layer transceiver 1106 of the enhanced slave node (Slave A) provides it to the second standard LIN protocol stack 1108 of the enhanced slave node.

[0185] Step 5: After parsing the frame header, the second standard LIN protocol stack 1108 of the enhanced slave node determines that the standard LIN control frame is a high-speed transmission request sent to itself. After confirming that it is ready, it will construct a "ready" response data (i.e., a ready response) and provide it to the second LIN physical layer transceiver 1106 of the local machine.

[0186] Step 6: The second LIN physical layer transceiver 1106 of the enhanced slave node will generate a standard LIN response that matches the ready response within the response slot of the standard LIN control frame and send it back to the LIN bus.

[0187] Step 7: After receiving the ready response from the enhanced slave node, the master node confirms that the handshake between the two parties has been completed. At this point, the high-speed communication mode is authorized.

[0188] (II) High-speed data transmission stage Figure 11 Steps 8-11 shown in the figure:

[0189] Step 8: The master node's first standard LIN protocol stack 1102 activates the local first high-speed data packetizer 1103 and begins authorizing the sending of data packets to the first high-speed data packetizer 1103.

[0190] Step 9: After determining that the LIN bus has entered an idle period, the first standard LIN protocol stack 1102 of the master node needs to immediately switch the current communication mode to the high-speed communication mode so that the master node can communicate with the enhanced slave node via high-speed digital carrier in this high-speed communication mode.

[0191] Specifically, the master node's first standard LIN protocol stack 1102 switches the first LIN physical layer transceiver 1105 from the first standard LIN transceiver to the first transmission path (not shown in the figure) in the first high-speed modem by writing instructions to the local first mode control register 1104, that is, writing a specific value to a specific position in the first mode control register 1104, thereby switching to high-speed communication mode. This is a hardware-level mutual exclusion switch, ensuring the uniqueness of bus driving rights.

[0192] Step 10: The first high-speed data packetizer 1103 of the master node extracts a data packet from the original data block, calculates a preset check code, such as a CRC code, and constructs a complete formatted data payload together with the preamble and the start-of-frame delimiter, and sends it to the first LIN physical layer transceiver 1105 of the local machine.

[0193] Step 11: After receiving the formatted data payload, the first transmission path in the first high-speed modem inside the first LIN physical layer transceiver 1105 of the master node modulates the high-frequency carrier signal through a preset modulation method (e.g., binary frequency shift keying modulation) and then superimposes the high-frequency carrier signal onto the LIN bus idle period for transmission.

[0194] (III) High-speed data reception stage Figure 11 Steps 12-13 shown in the figure:

[0195] While the master node transmits formatted data payloads at high speed, the second receive path (not shown) in the second high-speed modem within the second LIN physical layer transceiver 1106 inside the enhanced slave node continues to operate. The second bandpass filter within the second receive path filters out the LIN baseband signal, allowing only the high-frequency carrier signal to pass through.

[0196] Step 12: After the second high-speed modem in the enhanced slave node demodulates the received high-frequency carrier signal, the recovered formatted data payload in bit stream form is sent to the second high-speed data unpacker 1107 in the microcontroller unit (not shown in the figure) inside the enhanced slave node.

[0197] Step 13: The second high-speed data unpacker 1107 in the microcontroller unit of the enhanced slave node extracts the data packets and checksums from the recovered formatted data payload by searching the start-of-frame delimiter (FOF) location frame. After confirming that the data packet passes the checksum verification, the verified data packet is stored in a buffer so that the second upper-layer application 1109 of the enhanced slave node can retrieve the data packet from the buffer for processing when needed.

[0198] The second upper-layer application is pre-installed in the enhanced slave node to implement various control and management functions related to the enhanced slave node. For example, it can install or upgrade firmware, perform fault diagnosis procedures, or perform sensor calibration.

[0199] (iv) Cycle and Confirmation Phase Figure 11 Step 14 shown in the figure:

[0200] The master node needs to sequentially intercept the raw data block to be sent into multiple data packets, and then send each data packet sequentially to the enhanced slave node in high-speed communication mode. The complete data packet sending process can be summarized as a loop of query and confirmation operations, and the core process can be described as follows:

[0201] The master node sends data packet 1 -> the enhanced slave node reports the reception status of data packet 1 (successful reception or reception failure) -> the master node determines whether to resend data packet 1 or continue sending data packet 2 based on the reception status -> ... -> the master node sends data packet N -> the enhanced slave node reports the reception status of data packet N -> the master node determines whether to resend data packet N or continue sending data packet N+1 based on the reception status -> ..., and so on, until the master node successfully sends all data packets in the original data block to the enhanced slave node, that is, the master node confirms that the enhanced slave node has correctly received all data packets.

[0202] Step 14: The master node and the enhanced slave node confirm whether the data packet has been received correctly via the next standard LIN frame.

[0203] To perform flow control (ensuring packets are received correctly), the master node will initiate the next standard LIN frame (e.g., a "status query" frame) to determine whether the packet has been received correctly. Simultaneously, the enhanced slave node will report the reception status of the previous packet in the response slot of that next standard LIN frame, i.e., an acknowledgment (ACK) or a negative acknowledgment (NACK) signal.

[0204] Then, based on the received acknowledgment or negative acknowledgment signal, the master node decides whether to send a new data packet or retransmit the previously failed data packet. This process from steps 10 to 14 is then repeated until all data has been sent (not shown in the diagram).

[0205] Through the above methods, the embodiments of the present invention achieve orderly, reliable, and efficient high-speed data transmission without changing the basic LIN bus protocol and physical topology.

[0206] Furthermore, in Figure 12 The diagram shows a schematic representation of a bus interface provided in an embodiment of the present invention. Figure 12 As shown, the bus interface includes the enhanced LIN device 1201 as described in any one of the embodiments of the present invention.

[0207] Furthermore, in Figure 13 The diagram illustrates the structure of a processor according to an embodiment of the present invention. This processor includes a bus interface 1301 as described in any embodiment of the present invention.

[0208] In some embodiments, the data communication method performed by the master node and enhanced slave node in an enhanced LIN communication system, as described in various embodiments of the present invention, can be implemented as a computer program tangibly contained in a computer-readable storage medium. In some embodiments, part or all of the computer program can be loaded and / or installed on the master node and enhanced slave node in the enhanced LIN communication system.

[0209] Various embodiments of the systems and techniques described above herein can be implemented in digital electronic circuit systems, integrated circuit systems, field-programmable gate arrays (FPGAs), application-specific integrated circuits (ASICs), application-specific standard products (ASSPs), systems-on-a-chip (SoCs), payload-programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various embodiments may include implementations in one or more computer programs that can be executed and / or interpreted on a programmable system including at least one programmable processor, which may be a dedicated or general-purpose programmable processor, capable of receiving data and instructions from a storage system, at least one input device, and at least one output device, and transmitting data and instructions to the storage system, the at least one input device, and the at least one output device.

[0210] Computer programs used to implement the methods of the present invention may be written in any combination of one or more programming languages. These computer programs may be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, such that when executed by the processor, the computer programs cause the functions / operations specified in the flowcharts and / or block diagrams to be performed. The computer programs may be executed entirely on a machine, partially on a machine, or as a standalone software package, partially on a machine and partially on a remote machine, or entirely on a remote machine or server.

[0211] In the context of this invention, a computer-readable storage medium can be a tangible medium that may contain or store a computer program for use by or in conjunction with an instruction execution system, apparatus, or device. A computer-readable storage medium may include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatus, or devices, or any suitable combination thereof. Alternatively, a computer-readable storage medium may be a machine-readable signal medium. More specific examples of machine-readable storage media include electrical connections based on one or more wires, portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fibers, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination thereof.

[0212] To provide interaction with a user, the systems and techniques described herein can be implemented on an electronic device having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and pointing device (e.g., a mouse or trackball) through which the user provides input to the electronic device. Other types of devices can also be used to provide interaction with the user; for example, feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form (including sound input, voice input, or tactile input).

[0213] The systems and technologies described herein can be implemented in computing systems that include backend components (e.g., as data servers), or middleware components (e.g., application servers), or frontend components (e.g., user computers with graphical user interfaces or web browsers through which users can interact with implementations of the systems and technologies described herein), or any combination of such backend, middleware, or frontend components. The components of the system can be interconnected via digital data communication of any form or medium (e.g., communication networks). Examples of communication networks include local area networks (LANs), wide area networks (WANs), blockchain networks, and the Internet.

[0214] A computing system can include clients and servers. Clients and servers are generally located far apart and typically interact through communication networks. The client-server relationship is created by computer programs running on the respective computers and having a client-server relationship with each other. The server can be a cloud server, also known as a cloud computing server or cloud host, which is a hosting product within the cloud computing service system to address the shortcomings of traditional physical hosts and VPS services, such as high management difficulty and weak business scalability.

[0215] It should be understood that the various forms of processes shown above can be used, with steps reordered, added, or deleted. For example, the steps described in this invention can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution of this invention can be achieved, and this is not limited herein.

[0216] The specific embodiments described above do not constitute a limitation on the scope of protection of this invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this invention should be included within the scope of protection of this invention.

Claims

1. An enhanced LIN device, characterized in that, include: The microcontroller unit and the LIN physical layer transceiver, wherein the LIN physical layer transceiver includes a high-speed modem, and the microcontroller unit includes a standard LIN protocol stack and a data communication module; A high-speed modem includes a transmit path and a receive path. The transmit path is responsible for converting the formatted data payload generated by the microcontroller unit into a high-frequency carrier signal and sending it to the bus. The receive path is responsible for obtaining the high-frequency carrier signal from the bus, converting it into a formatted data payload, and sending it to the microcontroller unit.

2. The enhanced LIN device according to claim 1, characterized in that, The LIN physical layer transceiver also includes: a standard LIN transceiver and a mode control register; the mode control register is connected to the microcontroller unit, the standard LIN transceiver, and the transmit path, respectively; The mode control register controls the standard LIN transceiver and transmit path, enabling mutual exclusion operations.

3. The enhanced LIN device according to claim 2, characterized in that, The mode control register controls the standard LIN transceiver and the transmission path to achieve mutual exclusion operations, including enabling the standard LIN transceiver and simultaneously disabling the transmission path, so that the node can send and receive standard LIN frames. The mode control register disables the standard LIN transceiver and simultaneously enables the transmit path, causing the transmit path to superimpose a high-frequency signal during the current bus idle period.

4. The enhanced LIN device according to claim 1, characterized in that, The transmission path includes interconnected modulators and programmable power amplifiers; The modulator receives the formatted data payload sent by the microcontroller unit and generates the original carrier signal; The programmable power amplifier amplifies the original carrier signal to obtain a high-frequency carrier signal, which is then sent to the bus.

5. The enhanced LIN device according to claim 1, characterized in that, The receiving path includes: a bandpass filter, a low-noise amplifier, and a demodulator. The bandpass filter is connected to the low-noise amplifier, and the low-noise amplifier is connected to the demodulator. A bandpass filter filters the high-frequency carrier signal received from the bus to obtain a bandpass carrier signal; A low-noise amplifier amplifies a bandpass carrier signal to obtain an amplified carrier signal. The demodulator performs signal demodulation processing on the carrier amplified signal to obtain a formatted data payload, which is then sent to the microcontroller unit.

6. The enhanced LIN device according to claim 1, characterized in that, The data communication module includes a high-speed data packetizer; when activated, the high-speed data packetizer extracts data packets from the original data block, encapsulates them into a formatted data payload, and provides it to the high-speed modem.

7. The enhanced LIN device according to claim 1, characterized in that, The data communication module includes a high-speed data unpacker; when activated, the high-speed data unpacker decapsulates the formatted data payload acquired by the high-speed modem into data packets and processes the data packets.

8. The enhanced LIN device according to claim 6 or 7, characterized in that, The standard LIN protocol stack controls the activation of the high-speed data packetizer and high-speed data depacker.

9. The enhanced LIN device according to claims 1-7, characterized in that, The formatted data payload is constructed by concatenating data packets, preamble, start-of-frame delimiter, and cyclic redundancy check (CRC) code.

10. An enhanced LIN communication system, characterized in that, The LIN communication system includes: a master node mounted on a bus and at least one enhanced slave node, wherein the master node and each enhanced slave node are enhanced LIN devices as described in any one of claims 1-9.

11. The enhanced LIN communication system according to claim 10, characterized in that, The communication system further includes: at least one standard slave node mounted on the bus; The standard slave node is a standard LIN device, which includes a microcontroller unit and a LIN physical layer transceiver. The LIN physical layer transceiver includes a standard LIN transceiver.

12. A data communication method, characterized in that, Applied to the enhanced LIN communication system as described in claim 10, the method includes: Initialization and authorization for high-speed data transmission between the master node and the enhanced slave node; Once the master node has been authorized, it will initiate high-speed data transmission. While the master node performs high-speed data transmission, the enhanced slave node performs high-speed data reception. The master node and the enhanced slave node perform high-speed data loop query and confirmation.

13. The method according to claim 12, characterized in that, The initialization and authorization of high-speed data transmission between the master node and the enhanced slave node includes: The master node initiates high-speed data transmission and calls the first standard LIN protocol stack. The first standard LIN protocol stack constructs a standard LIN control frame and sends it to the master node's first LIN physical layer transceiver. The first standard LIN transceiver of the first LIN physical layer transceiver then sends the standard LIN control frame to the bus. The second LIN physical layer transceiver of the enhanced slave node receives and decodes the standard LIN control frame from the bus. The second standard LIN transceiver of the second LIN physical layer transceiver sends the decoded standard LIN control frame to the second standard LIN protocol stack of the enhanced slave node for parsing. The second standard LIN protocol stack constructs a ready response based on the parsing result and sends it to the bus through the second standard LIN transceiver. The first LIN physical layer transceiver of the master node receives a ready response from the bus. The first standard LIN transceiver of the first LIN physical layer transceiver sends the ready response to the first standard LIN protocol stack. When the first standard LIN protocol stack receives the ready response, it determines that the authorization is complete.

14. The method according to claim 12, characterized in that, After the master node obtains authorization, it performs high-speed data transmission, including: The master node's first standard LIN protocol stack activates the first high-speed data packetizer; When the master node determines that the bus has entered an idle period, its first standard LIN protocol stack writes an instruction to the first mode control register. The first mode control register controls the first standard LIN transceiver and the first transmit path, implements mutual exclusion operation, disables the first standard LIN transceiver, and simultaneously enables the first transmit path. The first high-speed data packetizer extracts data packets from the original data block, encapsulates them into a formatted data payload, and sends it to the first LIN physical layer transceiver. After receiving the formatted data payload, the first transmission path modulates and converts it into a high-frequency carrier signal, and then sends it to the bus.

15. The method according to claim 12, characterized in that, While the master node performs high-speed data transmission, the enhanced slave nodes perform high-speed data reception, including: The second receive path of the second LIN physical layer transceiver in the enhanced slave node receives a high-frequency carrier signal from the bus, demodulates the high-frequency carrier signal into a formatted digital payload, and sends it to the second high-speed data unpacker of the enhanced slave node. The second high-speed data unpacker decapsulates the formatted data payload into data packets and processes the data packets.

16. The method according to claim 12, characterized in that, The master node and enhanced slave nodes perform high-speed data loop queries and confirmations, including: The master node’s first standard LIN protocol stack reconstructs a standard LIN control frame and sends the standard LIN control frame to the first LIN physical layer transceiver, which then sends the standard LIN control frame to the bus. The second LIN physical layer transceiver of the enhanced slave node receives and decodes the standard LIN control frame from the bus, and sends the decoded standard LIN control frame to the second standard LIN protocol stack of the enhanced slave node for parsing. The second standard LIN protocol stack constructs the receive status response of the previous data packet based on the parsing result. Within the receive status response time slot, the second standard LIN transceiver of the second LIN physical layer transceiver sends the receive status response to the bus. When the master node receives the receive status response from the bus, it determines whether to continue sending the next data packet or retransmit the data packet that failed to be sent last time. The master node and the enhanced slave node repeat the above steps in a loop until all data packets have been sent.

17. A bus interface, characterized in that, Includes the enhanced LIN device as described in any one of claims 1-9.

18. A processor, characterized in that, Includes the bus interface as described in claim 17.

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