Rapid detection system for hidden defects of small sample PCB (Printed Circuit Board)

Abstract

The invention provides a small sample PCB hidden defect rapid detection system, relates to the technical field of PCB defect detection, and aims to solve the problems that the existing PCB hidden defect detection depends on a large number of labeled samples, the internal defect identification precision is low, and the detection speed is difficult to adapt to the assembly line requirement. Comprising a multi-modal acquisition module, a preprocessing module, a small sample detection core module, a hardware acceleration module, a result output module and a self-calibration module. The multi-mode acquisition module synchronously acquires surface texture, heat distribution and internal ultrasonic signals of the PCB; the preprocessing module optimizes data through adaptive noise reduction and modal registration; the small sample detection core module adopts an improved MAML meta-learning framework to be combined with a cross-modal attention fusion unit and is matched with a conditional diffusion model sample enhancement technology to realize defect identification under a small sample; the hardware acceleration module realizes high-speed reasoning based on FPGA double-buffer scheduling and dynamic quantization; the self-calibration module guarantees environmental adaptability, and the result output module has the functions of defect positioning and process optimization analysis.

Description

Technical Field

[0001] This invention belongs to the field of PCB defect detection technology, and more specifically, relates to a rapid detection system for latent defects in small sample PCBs. Background Technology

[0002] As the core carrier of electronic devices, the quality of printed circuit boards (PCBs) directly determines the reliability of these devices. With the development of electronic technology towards high density and miniaturization, the spacing between lines inside PCBs is constantly shrinking, significantly increasing the incidence of latent defects such as cold solder joints, broken inner layers, and microcracks. These defects are difficult to observe directly with the naked eye and can easily cause equipment failures during use. Therefore, accurate detection of latent defects in PCBs is crucial.

[0003] Existing PCB defect detection technologies are mainly divided into two categories: traditional detection methods and machine learning-based detection methods. Traditional detection methods, such as manual visual inspection, AOI (automated optical inspection), and X-ray inspection, have significant limitations:

[0004] Manual visual inspection is inefficient, highly subjective, and lacks the ability to identify hidden defects.

[0005] AOI can only collect surface optical information and cannot penetrate the PCB surface to obtain internal structural data, leaving it helpless against defects such as broken wires in the inner layer.

[0006] Although X-ray inspection can detect internal defects, the equipment is expensive, poses a high risk of radiation, and is slow (usually ≤10fps), making it difficult to adapt to the production pace of 60 pieces / minute on a production line.

[0007] While machine learning-based detection methods offer improvements over traditional methods, key technological bottlenecks still exist:

[0008] First, it suffers from high sample dependence. Existing deep learning detection models (such as YOLO and Faster R-CNN) require hundreds to thousands of labeled defect samples to achieve stable training. However, collecting samples of latent defects in PCBs is difficult and costly, especially for new PCB products, which often face the dilemma of sample scarcity, resulting in poor model generalization ability. For example, the feature-enhanced multi-scale fusion small-sample PCB defect detection method disclosed in patent CN202211236036.0, although employing a small-sample learning approach, relies solely on a single optical image data, and its accuracy in identifying internal latent defects is less than 80%.

[0009] Secondly, there is insufficient multimodal data fusion. Some solutions attempt to combine two modalities of data, but they use a simple weighted fusion strategy without considering the response differences of different defect types in each modality, resulting in low effectiveness of the fused features.

[0010] Third, it is difficult to balance detection speed and accuracy. While existing GPU-based inference solutions can improve speed, they are power-consuming (≥75W) and costly. Software solutions without hardware acceleration typically have an inference speed of ≤15fps, which cannot meet the real-time detection requirements of pipelines.

[0011] Fourth, poor environmental adaptability. Changes in environmental factors such as temperature, humidity, and light in the production workshop can easily cause data drift in the test. The existing system lacks a dynamic calibration mechanism, and the accuracy fluctuation often exceeds 5%.

[0012] Furthermore, existing inspection systems mostly only identify and locate defects, without establishing a correlation analysis mechanism between defects and production processes. This fails to provide data support for process optimization, leading to the recurrence of defects. Therefore, developing a PCB latent defect inspection system that is low-sample-dependent, high-precision, high-speed, and environmentally adaptable has become a core issue that the industry urgently needs to address. Summary of the Invention

[0013] To address the aforementioned technical problems, this invention provides a rapid detection system for latent defects in small-sample PCBs, which solves the technical problems of existing PCB latent defect detection, such as high dependence on a large number of labeled samples, low accuracy in identifying internal defects, difficulty in adapting detection speed to production line requirements, poor environmental adaptability, and inability to provide data support for production process optimization.

[0014] A rapid detection system for latent defects in small-sample PCBs, comprising:

[0015] The multimodal acquisition module is equipped with a high-resolution optical camera, an infrared thermal imager, and an ultrasonic sensor to simultaneously acquire PCB surface texture images, thermal distribution data, and ultrasonic signals of the internal structure.

[0016] The preprocessing module, connected to the multimodal acquisition module, preprocesses the acquired data using an adaptive noise reduction algorithm and a modal registration unit to obtain standardized multimodal features;

[0017] The core module for small sample detection integrates a meta-learning framework and a cross-modal attention fusion unit. The meta-learning framework uses an improved MAML algorithm to build a basic detection model, and the cross-modal attention fusion unit dynamically allocates the weights of different modal features and outputs the fused features to achieve latent defect identification in small sample conditions.

[0018] The hardware acceleration module and the result output module are designed with FPGA architecture to optimize the model inference process, and the result output module outputs defect type, location and confidence information.

[0019] Among them, the weight allocation strategy of the cross-modal attention fusion unit is coordinated and controlled by prior knowledge of PCB defect types and real-time feature response values.

[0020] Preferably, the multimodal acquisition module further includes a light source adaptive adjustment unit. The light source adaptive adjustment unit collects and detects scene light intensity in real time through an ambient light sensor, and dynamically adjusts the brightness, color temperature and illumination angle of the ring light source in conjunction with a PCB board type database. The PCB board type database pre-stores optical reflection characteristic parameters of 12 common board types such as FR-4 and aluminum substrate.

[0021] Preferably, the small sample detection core module further includes a defect sample enhancement unit. The defect sample enhancement unit is constructed based on a conditional diffusion model. It takes a defect-free PCB image and a defect type control vector as input, and generates synthetic samples that are consistent with the texture and grayscale distribution of real defects through a defect prior modulation noise scheduling strategy. The synthetic samples and a small number of real samples are used to construct a training set at a ratio of 4:1.

[0022] Preferably, the hardware acceleration module includes a dual-buffer data scheduling unit and a quantization calculation unit; the dual-buffer data scheduling unit uses a Ping-Pong mechanism to achieve parallel execution of feature data loading and calculation, and the quantization calculation unit quantizes the 32-bit floating-point model into a 16-bit fixed-point model, and retains the key bits of the defect features through a dynamic bit width allocation strategy, thereby reducing the amount of calculation by 70% while ensuring that the detection accuracy loss is ≤2%.

[0023] Preferably, the basic detection model of the meta-learning framework adopts a visual transformer backbone network. The backbone network derives feature maps in shallow, middle and deep layers, and inputs them into the feature pyramid network after channel alignment and spatial reshaping. The backbone network is optimized through self-supervised pre-training. The pre-training task adopts PCB texture mask reconstruction to learn the general feature representation of printed circuits on unlabeled data.

[0024] Preferably, it also includes a self-calibration module, which has a built-in standard defect PCB calibration board. The self-calibration module periodically collects multimodal data from the calibration board and compares it with a preset benchmark feature library. It then fine-tunes the noise reduction parameters and cross-modal attention weights of the preprocessing module using a gradient descent algorithm to achieve detection accuracy calibration under environmental drift.

[0025] Preferably, the defect localization unit of the small sample detection core module adopts an anchorless detection head, which is combined with the super-resolution reconstruction module to improve the localization accuracy of hidden defects; the super-resolution reconstruction module adopts a lightweight RCAN network, which improves the resolution of the defect candidate area by 2 times before performing coordinate regression.

[0026] Preferably, the defective sample enhancement unit further includes a sample screening mechanism, which calculates the feature distance between the synthetic sample and the real sample, removes abnormal synthetic samples whose distance exceeds a preset threshold, uses cosine similarity to measure the feature distance, and adaptively determines the threshold by statistically analyzing the feature distribution of the real samples.

[0027] Preferably, the result output module further includes a defect trend analysis unit, which statistically analyzes the defect types and location distribution of 100 consecutive PCBs, identifies the correlation between high-incidence defect areas and process parameters through association rule mining algorithms, and outputs a process optimization suggestion report.

[0028] Preferably, the self-attention mechanism of the visual transformer backbone network adopts a local-global hybrid attention structure, using a 3×3 local attention window for dense PCB circuit areas and global attention for blank areas, thereby reducing the attention computation by 60% while ensuring the global feature capture capability.

[0029] Compared with the prior art, the present invention has the following beneficial effects:

[0030] This invention employs an improved MAML meta-learning framework, combined with defect sample augmentation technology based on a conditional diffusion model, to solve the core problem of scarce latent defect samples. High-fidelity synthetic samples are generated through a defect prior modulation noise scheduling strategy, coupled with a feature distance filtering mechanism to eliminate abnormal samples. This results in a detection accuracy of ≥85% for 5-way 1-shot tasks and ≥92% for 5-way 5-shot tasks, significantly improving accuracy compared to existing small-sample detection schemes. Stable training requires only 10-50 real samples per defect class, reducing sample requirements.

[0031] This innovative system employs a simultaneous three-modal acquisition scheme combining optical, infrared, and ultrasonic sensors, overcoming the limitations of single-modal detection. Through a cross-modal attention fusion unit, it dynamically allocates modal weights based on prior knowledge of PCB defect types and real-time feature response values, enabling optimal feature representation for different latent defects: ultrasonic signal weights are strengthened for internal defects such as inner layer breaks; and the proportion of infrared thermal distribution features is increased for heat-sensitive defects such as cold solder joints. Testing shows that this system achieves recognition accuracies of 95%, 93%, and 90% for cold solder joints, inner layer breaks, and microcracks, respectively, representing an improvement of over 40% in internal defect recognition accuracy compared to a single optical detection scheme.

[0032] The hardware acceleration module is built based on FPGA. Ping-Pong dual-buffer scheduling is used to achieve parallel data loading and computation. Combined with dynamic bit-width quantization strategy, the model is quantized from 32-bit floating point to 16-bit fixed point. While reducing the amount of computation by 70% and the power consumption by 50%, the detection speed is increased from 15fps in the traditional GPU solution to 60fps. The detection time of a single PCB is ≤1s, which is fully compatible with the production rhythm of 60 PCBs / minute in the SMT pipeline. The power consumption of the whole machine is ≤80W, which is 60% lower than that of similar GPU acceleration solutions.

[0033] The self-calibration module, which incorporates a built-in standard defect calibration board, periodically fine-tunes the preprocessing parameters and fusion weights using the gradient descent algorithm. This effectively resists accuracy drift caused by changes in ambient temperature (0-40℃), humidity (20%-80%), and lighting, resulting in accuracy fluctuations of ≤3%. Compared to similar systems without self-calibration, this improves stability by 60%, eliminates the need for frequent manual adjustments, and reduces maintenance costs.

[0034] The results output module integrates a defect trend analysis unit. Through association rule mining algorithms, it analyzes the correlation between high-incidence defect areas and process parameters, and outputs targeted process optimization suggestions. For example, when a high incidence of cold solder joints is detected in a specific area, it can accurately pinpoint the problem of insufficient soldering temperature and provide adjustment solutions, reducing the recurrence rate of similar defects by more than 30%. This achieves a shift from "passive detection" to "proactive optimization," improving the overall quality of PCB production. Attached Figure Description

[0035] Figure 1 This is a system block diagram of the present invention. Detailed Implementation

[0036] The embodiments of the present invention will be described in further detail below with reference to the accompanying drawings and examples. The following examples are for illustrative purposes only and should not be construed as limiting the scope of the invention.

[0037] Please see Figure 1 This invention provides a rapid detection system for latent defects in small-sample PCBs, aiming to solve the problems of high sample dependence, slow detection speed, and low accuracy of internal defect identification in existing PCB latent defect detection methods. The system will be described in detail below with reference to the accompanying drawings and technical details.

[0038] System overall architecture design:

[0039] This system adopts a closed-loop architecture of acquisition, preprocessing, detection, acceleration, output, and calibration. Its core components include a multimodal acquisition module, a preprocessing module, a small-sample detection module, a hardware acceleration module, a result output module, and a self-calibration module. All modules interact via a high-speed PCIe 4.0 bus and Ethernet / IP protocol, achieving an overall response latency of ≤50ms, meeting the inspection requirements of a PCB production line of 60 PCBs / minute. The system hardware is deployed in a 19-inch standard rack, occupying a floor area of ​​≤0.8㎡, and is compatible with the integration and installation requirements of SMT production lines.

[0040] Multimodal acquisition module:

[0041] This module adopts a simultaneous acquisition scheme of optical, infrared, and ultrasonic modes. The core component selection and parameters are as follows:

[0042] High-resolution optical camera: A gigabit network camera with a resolution of 2592×1944 pixels and a frame rate of 14fps is selected. It is equipped with a Computar M1620-MP2 16mm fixed-focus lens with an adjustable aperture of F1.4-F16. The acquisition range covers PCBs of different sizes from 50mm×50mm to 300mm×300mm. Data is transmitted via USB 3.0 interface, and the image format is 16-bit grayscale.

[0043] Infrared thermal imager: FLIRA655sc, resolution 640×512 pixels, thermal sensitivity ≤0.03℃, temperature measurement range -40℃-150℃, frame rate 30fps, transmits thermal distribution data through GigEVision interface, data format is 16-bit temperature value matrix, lens focal length 25mm, parallel to the optical axis of the optical camera and the distance is fixed at 15cm.

[0044] Ultrasonic sensor: Panametrics-NDT5072PR pulse receiver paired with V314-SM transducer, center frequency 10MHz, bandwidth 50%-200%, detection depth 0-50mm, sampling rate 100MHz, connected to the system via PCIe interface, the ultrasonic signal is analog, quantized into digital signal by built-in 16-bit AD converter.

[0045] The adaptive light source adjustment unit utilizes a SmartVisionSV-RL240 ring light source, comprising 36 RGBW four-color LED beads. Brightness adjustment range is 0-10000 lux, color temperature is continuously adjustable from 3000K to 6500K, and illumination angle is adjustable in steps from 15° to 60°. It is equipped with a Tektronix MS3010 ambient light sensor with a sampling rate of 10Hz and a measurement range of 0-100000 lux. A PCB board type database is stored on a 16GB SSD, containing reflectivity curves (wavelength 400-700nm), diffuse reflection coefficients, and other parameters for 12 types of boards, including FR-4, aluminum substrate, and ceramic substrate. The system automatically matches the board type of the currently inspected PCB using a board barcode scanner, triggering adaptive adjustment of the light source parameters.

[0046] Three-modal acquisition synchronous control: The synchronous trigger signal is generated by FPGA (Xilinx Kintex-7K7K325T), and the trigger interval is dynamically adjusted according to the PCB transmission speed (range 100-500ms) to ensure that the spatial position deviation of optical image, thermal distribution data and ultrasonic signal acquisition is ≤0.1mm.

[0047] Preprocessing module:

[0048] The preprocessing module is built on an Intel Core i7-12700K processor with 32GB of RAM. It optimizes multimodal data using customized image processing algorithms. The specific process is as follows:

[0049] Adaptive noise reduction processing: For optical images, an improved nonlocal mean noise reduction algorithm is adopted, which dynamically adjusts the size of the filtering window (3×3-7×7) based on the complexity of PCB circuit texture, and retains defect edge information while removing Gaussian noise (variance ≤0.02); For infrared data, a wavelet threshold noise reduction algorithm is adopted, with a decomposition of 3 layers, and the threshold is adaptively determined by noise estimation; For ultrasonic signals, an adaptive Kalman filter algorithm is adopted, and the state equation is updated in real time based on the signal frequency characteristics, resulting in a signal-to-noise ratio improvement of ≥25dB ​​after filtering.

[0050] Modal registration unit: Using optical images as a reference, multimodal data registration is achieved through SIFT feature matching and RANSAC robust fitting. First, SIFT feature points (≥500 per image) are extracted from optical and infrared images. Coarse matching is performed using a FLANN matcher, and then mismatched points are removed using the RANSAC algorithm (mismatch rate ≤5%) to obtain the spatial transformation matrix. The ultrasonic signal is mapped to coordinates using preset metal markers on the PCB. After registration, the spatial deviation of each modal data is ≤0.2mm.

[0051] Feature standardization: The registered optical image is normalized to a grayscale range of 0-255, the infrared data is converted into a temperature gradient map and normalized, the ultrasonic signal is converted into a time-frequency joint feature map, and finally a multimodal feature set of uniform size (1024×1024 pixels) is output.

[0052] Core modules for small sample testing:

[0053] This module is the core of the system, built on the NVIDIA Jetson AGXOrin edge computing platform (200 TOPS computing power). It integrates functional modules such as the meta-learning framework, cross-modal attention fusion unit, and defect sample augmentation unit. The software is developed based on the PyTorch 2.0 framework. Specific implementation details are as follows:

[0054] Meta-learning framework:

[0055] A basic detection model is constructed using an improved MAML (Model Independent Meta-Learning) algorithm, with the backbone network being an improved Visual Transformer (ViT). The specific structure is as follows:

[0056] ViT backbone network optimization: Input image size 1024×1024 pixels, block size 16×16, generating 64×64 image block embedding vectors (768 dimensions). A local-global hybrid attention structure is adopted. In densely populated PCB areas (determined by a line density threshold of ≥5 lines per square millimeter), a 3×3 local attention window is used, reducing computational complexity by 60%; in blank areas, global attention is used to ensure global feature capture capability. The backbone network is divided into shallow (layers 1-4), middle (layers 5-8), and deep (layers 9-12), deriving feature maps of 64×64×256, 32×32×512, and 16×16×1024 dimensions respectively.

[0057] Self-supervised pre-training: The pre-training task uses PCB texture mask reconstruction, randomly masking 15% of the image patches, and predicting the texture information of the masked patches through the contextual features of the masked regions. The pre-training dataset contains 10,000 unlabeled PCB images of different types, with 100 training epochs. A cosine annealing strategy is used for the learning rate (initial learning rate 1e-4, minimum 1e-6). After pre-training, the model's feature extraction capability in small sample scenarios is improved by 30%.

[0058] Meta-learning training strategy: Employing two small-sample training tasks, 5-way 1-shot and 5-way 5-shot, it supports the detection of five common latent defects: hole misalignment, cold weld, internal layer breakage, and microcracks. Meta-training phase: The training set contains 10-50 real samples for each defect type, using an adaptive learning rate (inner loop learning rate 5e-3, outer loop learning rate 1e-4), 50 training epochs, and a batch size of 8. Meta-testing phase: The test set contains 5-10 samples for each defect type. The model achieves a detection accuracy of ≥85% on the 5-way 1-shot task and ≥92% on the 5-way 5-shot task.

[0059] Cross-modal attention fusion unit:

[0060] Multimodal feature fusion is achieved using a dual-channel attention mechanism. The specific process is as follows:

[0061] ① Input optical, infrared, and ultrasonic features into the channel attention module respectively, and calculate the channel weights of each modality (adaptively adjusted based on feature variance).

[0062] ② Introduce a prior knowledge base of PCB defect types (containing response characteristic thresholds of 5 types of defects under different modes) to perform initial adjustment of channel weights;

[0063] ③ Calculate the spatial weights of the feature map through the spatial attention module, and fine-tune the weights by combining the real-time feature response values ​​(normalized using the Softmax function);

[0064] ④ A weighted summation method is used to fuse multimodal features, outputting a 1024-dimensional fused feature vector.

[0065] The weighting formula is: W = α × W + (1 - α) × W, where α is the weighting coefficient (0.3-0.7, dynamically adjusted according to the defect type).

[0066] Defect sample enhancement unit:

[0067] Synthetic samples are generated based on the Conditional Diffusion Model (CDM). The model structure includes a diffusion process (1000 steps) and a reverse diffusion process (500 steps). Specific implementation details are as follows:

[0068] ① Input defect-free PCB images (5000 images of qualified products from the production workshop) and defect type control vectors (10-dimensional unique heat vectors, corresponding to 5 types of defects and 5 types of defect severity).

[0069] ② Adopt a defect prior modulation noise scheduling strategy to dynamically adjust the noise intensity according to the defect type during the diffusion process (e.g., the noise intensity of microcrack defects is 20% higher than that of cold weld defects).

[0070] ③ The reverse diffusion process reconstructs defect features through the U-Net network, generating synthetic samples that are consistent with the texture and grayscale distribution of real defects, with a generation speed of ≥10 images / second.

[0071] Sample selection mechanism: ResNet50 is used as the feature extractor. The cosine similarity between the feature vectors (2048 dimensions) of the synthetic samples and the real samples is calculated. The similarity threshold is determined by statistically analyzing the feature distribution of the real samples (using K-means clustering, K=5), with a threshold range of 0.75-0.85. Abnormal synthetic samples with similarity below the threshold are removed to ensure the fidelity of the synthetic samples. Finally, the synthetic samples and real samples are used to construct the training set at a 4:1 ratio, which improves the generalization ability of the model by 20% after training.

[0072] Defect location unit:

[0073] High-precision positioning is achieved by using a frameless detection head combined with a super-resolution reconstruction module:

[0074] ① The anchorless detection head is based on an improvement of CenterNet. It takes a fused feature map as input, predicts the center position of the defect through a heat map, and regresses the width, height and confidence of the defect.

[0075] ② The super-resolution reconstruction module uses a lightweight RCAN network (reducing the number of channels to 64 and the number of parameters by 30%) to improve the resolution of the defect candidate region (based on heatmap threshold screening, threshold 0.5), resulting in a 40% improvement in the clarity of the defect edges after reconstruction.

[0076] ③ Coordinate regression is performed on the reconstructed candidate area, with a positioning accuracy of ±0.05mm, which meets the positioning requirements of hidden defects.

[0077] Hardware acceleration module:

[0078] A hardware acceleration module is built using Xilinx Zynq UltraScale + ZU9EG FPGA to achieve parallel optimization of the model inference process. Specific implementation details are as follows:

[0079] Dual-buffer data scheduling unit: Two buffers (A and B, each with a capacity of 1GB) are designed using the Ping-Pong mechanism. When feature data is loaded in buffer A, model inference calculation is performed simultaneously in buffer B. Data loading and calculation are executed in parallel, reducing data waiting time and shortening the single-frame data processing time from 15ms to 8ms.

[0080] Quantization computation unit: A dynamic bit-width quantization strategy is adopted to quantize the 32-bit floating-point model into a 16-bit fixed-point model. 16-bit precision is retained for key bits of defect features (such as weight bits corresponding to defect edge features), while 8-bit precision is used for non-key bits (such as weight bits corresponding to background features). The model parameters are optimized through Quantization-Aware Training (QAT). After quantization, the model size is reduced by 50%, the computational load is reduced by 70%, and the detection accuracy loss is ≤2%.

[0081] Acceleration effect verification: After FPGA acceleration, the model inference speed increased from 15fps to 60fps, meeting the real-time detection requirements of PCB pipeline. The FPGA module power consumption is ≤15W, which is 50% lower than the GPU solution (power consumption ≥75W).

[0082] Result output module:

[0083] This module includes data visualization, defect alerts, and trend analysis functions. Specific implementation details are as follows:

[0084] Data visualization: The visualization interface is developed using Qt5.15 to display PCB optical images, infrared thermal images, and ultrasonic images in real time, mark the location of defects (red rectangles), and label the defect type (such as "inner layer broken wire") and confidence level (such as "95.2%)". The interface response latency is ≤100ms.

[0085] Defect alarm: When a defect confidence level of ≥80% is detected, an audible and visual alarm is triggered (buzzer frequency 2kHz, LED flashing red light). At the same time, a signal is sent to the production line control system via RS485 interface to control the production line to pause (optional function). Alarm information is stored in a MySQL database (supports storage of 1 million records).

[0086] Defect Trend Analysis Unit: This unit statistically analyzes defect data (type, location, and confidence level) from 100 consecutive PCBs. Using the Apriori association rule mining algorithm (minimum support 2%, minimum confidence 50%), it identifies the correlation between high-incidence defect areas and process parameters (such as soldering temperature, pressure, and time). For example, when a high incidence of cold solder joint defects is detected in the upper left corner of the PCB, the analysis shows a correlation of ≥70% with a soldering temperature below 220℃. A process optimization suggestion report (PDF format) is output, including defect statistics charts, association rule analysis results, and specific optimization parameters (such as a suggested soldering temperature adjustment to 230-240℃).

[0087] Self-calibration module:

[0088] Built-in standard defect PCB calibration board (300mm×300mm, containing standard samples of 5 types of latent defects, defect parameters are metrologically certified), specific calibration process:

[0089] ① Periodic calibration (default every 2 hours, can be manually triggered), the multimodal acquisition module collects data from the calibration board;

[0090] ② Compare the collected data with the preset benchmark feature library (stored in SSD, containing standard multimodal features of the calibration board) and calculate the feature deviation (using mean square error MSE, threshold ≤ 0.01).

[0091] ③ If the deviation exceeds the threshold, the noise reduction parameters (such as filter window size and threshold) and cross-modal attention weights (adjusting the α coefficient) of the preprocessing module are fine-tuned using the gradient descent algorithm, with a fine-tuning step size of 1e-5 and 100 iterations, until the deviation is ≤ the threshold. After self-calibration, the system's detection accuracy fluctuates by ≤3% under ambient temperature changes of ±10℃ and humidity changes of ±20%, effectively resisting the influence of environmental drift.

[0092] System workflow:

[0093] Initialization phase: After the system is powered on, the self-calibration module performs the first calibration, loads the PCB board type database, the defect prior knowledge base and pre-trained model parameters, and completes the self-test of equipment such as light source and camera.

[0094] Acquisition Phase: The PCB is transported to the inspection station via the production line. The barcode scanner identifies the board type, the light source adaptive adjustment unit adjusts the light source parameters, and the multimodal acquisition module simultaneously acquires optical images, infrared thermal distribution data, and ultrasonic signals.

[0095] Preprocessing stage: The preprocessing module performs adaptive noise reduction, modality registration and standardization on the multimodal data, and outputs a standardized feature set.

[0096] Detection phase: The core module of small sample detection extracts features through a meta-learning framework, the cross-modal attention fusion unit fuses multimodal features, and the defect localization unit realizes defect identification and localization. If there are insufficient real samples, the defect sample enhancement unit generates synthetic samples to assist training.

[0097] Acceleration and Output Stage: The hardware acceleration module performs parallel optimization of the detection results, and the result output module displays the detection results, triggers alarms (if there are defects), and generates a trend analysis report by statistically analyzing defect data.

[0098] Cyclic calibration phase: The system performs self-calibration according to the set cycle to ensure the stability of detection accuracy.

[0099] Performance metrics verification:

[0100] The system performance was verified using a PCB test set (100 PCBs in total, 50 with defects and 50 without defects) containing 5 types of latent defects (20 samples of each type). The results are as follows:

[0101] Detection accuracy: ≥92% ("5-way 5-shot" task), ≥85% ("5-way 1-shot" task);

[0102] Detection speed: 60fps, single PCB detection time ≤1s;

[0103] Positioning accuracy: ±0.05mm;

[0104] Environmental adaptability: Temperature 0-40℃, humidity 20%-80%, accuracy fluctuation ≤3%;

[0105] Power consumption: Total power consumption ≤ 80W (including FPGA acceleration module).

[0106] In summary, this system effectively solves the core problem of PCB latent defect detection through multimodal fusion, few-shot learning, and hardware-software co-optimization, and has high engineering application value.

[0107] The embodiments of the present invention are given for illustrative and descriptive purposes only, and are not intended to be exhaustive or to limit the invention to the forms disclosed. Many modifications and variations will be apparent to those skilled in the art. The embodiments were chosen and described in order to better illustrate the principles and practical application of the invention, and to enable those skilled in the art to understand the invention and to design various embodiments with various modifications suitable for a particular purpose.

Claims

1. A rapid detection system for latent defects in small-sample PCBs, characterized in that, include: The multimodal acquisition module is equipped with a high-resolution optical camera, an infrared thermal imager, and an ultrasonic sensor to simultaneously acquire PCB surface texture images, thermal distribution data, and ultrasonic signals of the internal structure. The preprocessing module, connected to the multimodal acquisition module, preprocesses the acquired data using an adaptive noise reduction algorithm and a modal registration unit to obtain standardized multimodal features; The core module for small sample detection integrates a meta-learning framework and a cross-modal attention fusion unit. The meta-learning framework uses an improved MAML algorithm to build a basic detection model, and the cross-modal attention fusion unit dynamically allocates the weights of different modal features and outputs the fused features to achieve latent defect identification in small sample conditions. The hardware acceleration module and the result output module are designed with FPGA architecture to optimize the model inference process, and the result output module outputs defect type, location and confidence information. Among them, the weight allocation strategy of the cross-modal attention fusion unit is coordinated and controlled by prior knowledge of PCB defect types and real-time feature response values.

2. The system as described in claim 1, characterized in that, The multimodal acquisition module also includes a light source adaptive adjustment unit. The light source adaptive adjustment unit collects and detects scene light intensity in real time through an ambient light sensor, and dynamically adjusts the brightness, color temperature and illumination angle of the ring light source in combination with a PCB board type database. The PCB board type database pre-stores the optical reflection characteristic parameters of 12 common board types such as FR-4 and aluminum substrate.

3. The system as described in claim 1, characterized in that, The small sample detection core module also includes a defect sample enhancement unit. The defect sample enhancement unit is built based on the conditional diffusion model. It takes a defect-free PCB image and a defect type control vector as input, and generates a synthetic sample that is consistent with the texture and grayscale distribution of the real defect through a defect prior modulation noise scheduling strategy. The synthetic sample and a small number of real samples are used to construct a training set at a ratio of 4:

1.

4. The system as described in claim 1, characterized in that, The hardware acceleration module includes a dual-buffer data scheduling unit and a quantization calculation unit. The dual-buffer data scheduling unit uses a Ping-Pong mechanism to achieve parallel execution of feature data loading and calculation. The quantization calculation unit quantizes the 32-bit floating-point model into a 16-bit fixed-point model and retains the key bits of the defect features through a dynamic bit width allocation strategy, ensuring that the detection accuracy loss is ≤2% while reducing the amount of calculation by 70%.

5. The system as described in claim 1, characterized in that, The basic detection model of the meta-learning framework adopts a visual transformer backbone network. The backbone network derives feature maps in shallow, middle and deep layers, which are then input into the feature pyramid network after channel alignment and spatial reshaping. The backbone network is optimized through self-supervised pre-training. The pre-training task uses PCB texture mask reconstruction to learn general feature representations of printed circuits on unlabeled data.

6. The system as described in claim 1, characterized in that, It also includes a self-calibration module, which has a built-in standard defect PCB calibration board. It periodically collects multimodal data from the calibration board and compares it with a preset benchmark feature library. It fine-tunes the noise reduction parameters and cross-modal attention weights of the preprocessing module through the gradient descent algorithm to achieve detection accuracy calibration under environmental drift.

7. The system as described in claim 1, characterized in that, The defect localization unit of the small sample detection core module adopts an anchorless detection head, which is combined with the super-resolution reconstruction module to improve the localization accuracy of hidden defects. The super-resolution reconstruction module adopts a lightweight RCAN network to improve the resolution of the defect candidate area by 2 times before performing coordinate regression.

8. The system as described in claim 3, characterized in that, The defective sample enhancement unit also includes a sample screening mechanism, which calculates the feature distance between the synthetic sample and the real sample, removes abnormal synthetic samples whose distance exceeds a preset threshold, uses cosine similarity to measure the feature distance, and adaptively determines the threshold by statistically analyzing the feature distribution of the real samples.

9. The system as described in claim 1, characterized in that, The result output module also includes a defect trend analysis unit, which statistically analyzes the defect types and location distribution of 100 consecutive PCBs, identifies the correlation between high-incidence defect areas and process parameters through association rule mining algorithms, and outputs a process optimization suggestion report.

10. The system as described in claim 5, characterized in that, The self-attention mechanism of the visual transformer backbone network adopts a local-global hybrid attention structure. It uses a 3×3 local attention window for dense PCB circuit areas and global attention for blank areas, which reduces the attention computation by 60% while ensuring the global feature capture capability.

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