Data processing method, graphics processor, device, storage medium and program product
By dynamically allocating primitive storage space in the graphics processor and processing primitive group data in parallel, the problem of wasted storage resources under the TBR architecture is solved, and the storage space utilization and data processing efficiency are improved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-12-31
- Publication Date
- 2026-04-03
AI Technical Summary
In the Tile Based Rendering (TBR) architecture in the field of graphics processing, existing technologies suffer from the problem of wasted storage resources. In particular, due to the pre-allocation of header pointer space for all tiles, fixed memory resources are occupied regardless of whether the tiles are actually covered by primitives.
The geometric processing pipeline processes the primitive group data. The management module determines the overlay block information and dynamically allocates primitive storage space based on this information. The block divider divides the primitive group processing results into blocks for storage, avoiding the waste of storage resources for uncovered blocks.
It reduces memory usage, improves storage space utilization, and enhances data processing efficiency by processing geometric data streams in parallel.
Smart Images

Figure CN121788331A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of graphics processing technology, and in particular to a data processing method, a graphics processor, a computer device, a computer-readable storage medium, and a computer program product. Background Technology
[0002] In the field of graphics processing, graphics processing units (GPUs) can render complex scenes through efficient data processing mechanisms. Among them, tile-based rendering (TBR) is a common rendering architecture. Under this architecture, the scene to be rendered is divided into multiple tiles (also known as images or tiles), and the data is rendered tile by tile. The rendering process is characterized by low power consumption and is widely used.
[0003] In related technologies, under the TBR architecture, the geometry processing pipeline corresponding to each core will allocate the processed data to the linked list cache of each corresponding tile, and then the fragment processing pipeline will render and process the data in the linked list cache of each tile.
[0004] However, the data processing methods in related technologies suffer from the problem of wasted storage resources. Summary of the Invention
[0005] This application provides a data processing method, a graphics processor, a computer device, a computer-readable storage medium, and a computer program product, which can reduce the waste of storage resources during data processing under the TBR architecture.
[0006] The technical solution of this application embodiment is implemented as follows: On one hand, embodiments of this application provide a data processing method applied to a graphics processor, the graphics processor including at least a management module, a geometry processing pipeline, and a tiler, the method including: The corresponding primitive group data is processed through the geometry processing pipeline to obtain the primitive group processing result; the primitive group data is a part of the data in the geometry data stream. The management module determines the overlay tile information corresponding to the processing result of the primitive group, and allocates primitive storage space for the primitive group processing result based on the overlay tile information; the overlay tile information is used to characterize the information of the primitive overlay tiles in the primitive group processing result; The processing results of the primitive group are divided into blocks by the block divider and stored in the primitive storage space corresponding to the primitive group processing results.
[0007] On the other hand, this application provides a graphics processor, which includes: a management module, a geometry processing pipeline, and a tiler; The geometry processing pipeline is configured to process the corresponding primitive group data and obtain the primitive group processing result; the primitive group data is a portion of the data in the geometry data stream. The management module is configured to determine the overlay tile information corresponding to the processing result of the primitive group, and to apply for primitive storage space based on the overlay tile information; the overlay tile information is used to characterize the information of the primitive overlay tiles in the primitive group processing result; The results of primitive group processing are divided into blocks by a block divider and stored in the primitive storage space corresponding to the geometry processing pipeline.
[0008] In another aspect, embodiments of this application provide a computer device, including a memory and a processor. The memory stores a computer program that can run on the processor, and the processor executes the program to implement some or all of the steps in the above-described method.
[0009] In another aspect, embodiments of this application provide a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements some or all of the steps in the above-described method.
[0010] In another aspect, embodiments of this application provide a computer program product, including a computer program or instructions, which, when executed by a processor, implement some or all of the steps in the above-described method.
[0011] In this embodiment, the corresponding primitive group data is processed through the geometry processing pipeline to obtain the primitive group processing result, wherein the primitive group data is a portion of the data in the geometry data stream; the overlay tile information corresponding to the primitive group processing result is determined by the management module, and primitive storage space is allocated for the primitive group processing result based on the overlay tile information; the overlay tile information is used to characterize the information of the primitive overlay tiles in the primitive group processing result; the primitive group processing result is divided into blocks by the block divider and stored in the primitive storage space corresponding to the primitive group processing result. Thus, for the primitive group processing results after geometry processing pipeline, the management module determines the overlay tile information corresponding to the primitive group processing results, and dynamically requests primitive storage space for the primitive group processing results on demand based on the overlay tile information. This makes the size of the primitive storage space adapt to the data size of the primitive group processing results. Compared with the solutions in related technologies, this avoids the problem of wasted storage resources caused by invalid tiles whose primitive data in the primitive group processing results are not covered still needing to allocate their corresponding storage space in the cache space. The technical solution provided by this application reduces memory usage and improves storage space utilization.
[0012] It should be understood that the above general description and the following detailed description are merely exemplary and explanatory, and are not intended to limit the technical solutions of this application. Attached Figure Description
[0013] Figure 1 A schematic diagram of the implementation flow of a data processing method provided in this application embodiment. Figure 1 , ; Figure 2 A schematic diagram of the implementation flow of a data processing method provided in this application embodiment. Figure 2 ; Figure 3 A schematic diagram of the implementation process of a geometric processing method provided in this application embodiment. Figure 3 ; Figure 4 A schematic diagram of the implementation process of a geometric processing method provided in this application embodiment. Figure 4 ; Figure 5 A schematic diagram of the implementation process of a geometric processing method provided in this application embodiment. Figure 5 ; Figure 6 A schematic diagram of the implementation process of a geometric processing method provided in this application embodiment. Figure 6 ; Figure 7 A schematic diagram of the implementation process of a geometric processing method provided in this application embodiment. Figure 7 ; Figure 8 A schematic diagram of the logical architecture of a data processing method provided in this application embodiment. Figure 1 ; Figure 9 A schematic diagram of the logical architecture of a data processing method provided in this application embodiment. Figure 2 ; Figure 10 A schematic diagram of the composition structure of a graphics processor provided in an embodiment of this application; Figure 11 This is a schematic diagram of the hardware entity of a computer device provided in an embodiment of this application.
[0014] It should be noted that the terms "first" and "second" mentioned above are only used to distinguish between different options and do not represent the degree of superiority or inferiority of the options or their priority in the implementation process. Detailed Implementation
[0015] To make the objectives, technical solutions, and advantages of this application clearer, the technical solutions of this application are further described in detail below with reference to the accompanying drawings and embodiments. The described embodiments should not be regarded as limitations on this application. All other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.
[0016] In the following description, references to "some embodiments" refer to a subset of all possible embodiments. It is understood that "some embodiments" may be the same or different subsets of all possible embodiments and may be combined with each other without conflict. The terms "first / second / third" are used merely to distinguish similar objects and do not represent a specific ordering of objects. It is understood that "first / second / third" may be interchanged in a specific order or sequence where permitted, so that the embodiments of this application described herein can be implemented in an order other than that illustrated or described herein.
[0017] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application pertains. The terminology used herein is for descriptive purposes only and is not intended to limit the scope of this application.
[0018] Before providing a further detailed description of the embodiments of this application, the nouns and terms used in the embodiments of this application are explained, and the nouns and terms used in the embodiments of this application shall be interpreted as follows: 1) Geometric data stream: refers to the raw 3D geometric data set input to the graphics processor, including vertex information, index information, etc., used to generate primitives (such as triangles, line segments, etc.) required for graphics rendering. This data is continuously and sequentially input to the graphics processor.
[0019] 2) Primitives: The basic geometric elements that make up a 3D graphic, such as points, line segments, and triangles. Vertex data streams are broken down into multiple primitives according to a certain topological structure for use in subsequent geometric processing stages. Common primitive types include point lists, line lists, line strips, triangle lists, and triangle strips.
[0020] 3) Minimum Bounding Box: The smallest rectangular area that encloses all the primitives in a group of primitives. It is used to quickly estimate the projection range of the group of primitives on the screen in order to determine the range of the tiles it covers.
[0021] 4) Head pointer array: This refers to a data structure used to organize and access graph data, where each element corresponds to a graph tile and points to the starting address of the linked list of graph elements corresponding to that tile. Using the head pointer array, the fragment processing pipeline can quickly locate and read the required graph data.
[0022] 5) TBR architecture (Tile-Based Rendering): refers to a graphics rendering architecture whose core idea is to divide the entire rendering target into multiple tiles, and to complete rasterization and pixel processing operations within each tile, thereby reducing bandwidth requirements and improving rendering efficiency.
[0023] 6) Geometry processing pipeline: This is a graphics rendering pipeline and the core front-end stage of the computer graphics rendering process. It is responsible for performing geometric transformations such as coordinate space transformation, primitive assembly, clipping and culling on the original geometric data stream, and finally outputting a sequence of primitives to be rendered onto each tile.
[0024] 7) Fragment processing pipeline: This is a graphics rendering pipeline that is responsible for the complete data processing flow of converting primitives (triangles) output by the geometry processing pipeline into the final screen pixel colors.
[0025] 8) Tile: can also be called image block, tile, etc.
[0026] In the field of graphics processing, graphics processing units (GPUs) can render complex scenes through efficient data processing mechanisms. Among them, tile-based rendering (TBR) is a common rendering architecture. Under this architecture, the scene to be rendered is divided into multiple tiles (also known as images or tiles), and the data is rendered tile by tile. The rendering process is characterized by low power consumption and is widely used.
[0027] In related technologies, the input data is processed by geometry processing pipelines of different cores, and the processed data is sent to the corresponding buffers. The fragment processing pipeline will retrieve the required data for processing.
[0028] It is understandable that when the processed data segment is sent to the corresponding cache, the cache will include the head pointer array corresponding to all the tiles on the screen. That is, each tile on the screen needs a minimum storage unit to store the processed data.
[0029] In other words, under the TBR architecture, the geometry processing pipeline writes the processed graph data into different buffers to form a linked list structure, which is then read and reordered in the subsequent fragment rendering stage. At the same time, in order to manage these linked lists, a head pointer array is usually pre-allocated in the cache space corresponding to the core to store the head address of the linked list corresponding to each tile.
[0030] However, existing methods pre-allocate header pointer space for all tiles, which consumes fixed memory resources regardless of whether the tile is actually covered by primitives, resulting in resource waste.
[0031] This application provides a data processing method applied to a graphics processor (GPU). The GPU includes at least a management module, a geometry processing pipeline, and a tiler. In this method, the geometry processing pipeline processes corresponding primitive group data to obtain primitive group processing results, wherein the primitive group data is a portion of the data in the geometry data stream. The management module determines the overlay tile information corresponding to the primitive group processing results and allocates primitive storage space for the primitive group processing results based on the overlay tile information. The overlay tile information is used to characterize the information of primitive overlay tiles in the primitive group processing results. The tiler divides the primitive group processing results into blocks and stores them in the primitive storage space corresponding to the primitive group processing results. Thus, on the one hand, for the primitive group processing results after the geometry processing pipeline, the management module determines the overlay tile information corresponding to the primitive group processing results, and dynamically applies for primitive storage space for the primitive group processing results on demand based on the overlay tile information, so that the size of the primitive storage space is adapted to the data size of the primitive group processing results. Compared with the solutions in related technologies, this avoids the problem of wasted storage resources caused by invalid tiles whose primitive data in the primitive group processing results are not covered still needing to allocate their corresponding storage space in the cache space. The technical solution provided by this application reduces memory occupation and improves storage space utilization. On the other hand, when there are at least two geometry processing pipelines, by dividing the geometry data stream into primitive group data and distributing it to each geometry processing pipeline, at least two geometry processing pipelines can process the geometry data stream in parallel, improving data processing efficiency.
[0032] Figure 1 A schematic diagram of the implementation flow of a data processing method provided in this application embodiment. Figure 1 This method is applied to a graphics processing unit (GPU), which includes at least a management module, a geometry processing pipeline, and a tiler. For example... Figure 1 As shown, the method includes the following steps S101 to S103: Step S101: Process the corresponding primitive group data through the geometry processing pipeline to obtain the primitive group processing result.
[0033] The graph tuple data is a portion of the data in the geometric data stream.
[0034] In some embodiments, when at least two geometry processing pipelines are included, by dividing the geometry data stream into primitive group data and distributing it to each geometry processing pipeline, the at least two geometry processing pipelines can process the geometry data stream in parallel, thereby improving data processing efficiency.
[0035] Here, primitive data may refer to, but is not limited to, a set of primitive data segmented from the geometry data stream. Each primitive data segment is a processing unit processed by the geometry processing pipeline. In some embodiments, primitive data may contain multiple primitives.
[0036] Here, the geometry processing pipeline may be, but is not limited to, hardware or software components responsible for performing geometric processing on primitive data, and the geometric processing methods may include, but are not limited to, vertex processing, vertex transformation, etc.
[0037] In some embodiments, after the graphics processor acquires a segment of geometric data stream to be rendered, it can perform geometric processing on the primitive group data in the geometric data stream through the geometry processing pipeline to obtain the primitive group processing result corresponding to the primitive group data. Here, the primitive group processing result may refer to the primitive group data after processing by the geometry processing pipeline, and the primitive group processing result includes multiple geometrically processed primitives.
[0038] Regarding the process by which the geometry processing pipeline processes the data of each primitive group, in one possible implementation, the number of geometry processing pipelines can be one. The geometry processing pipeline can determine the amount of data corresponding to the primitive group data processed each time based on a preset data amount, and then process the data in the geometry data stream sequentially.
[0039] In another possible implementation, the number of geometry processing pipelines can be at least two, so that the primitive group data corresponding to each geometry processing pipeline can be read from the geometry data stream through each geometry processing pipeline; or, the geometry data stream can be read through the global distribution module in the graphics processor, the primitive group data corresponding to each geometry processing pipeline can be determined from the geometry data stream, and the primitive group data corresponding to each geometry processing pipeline can be distributed to each geometry processing pipeline.
[0040] When there are at least two geometry processing pipelines, there are two ways to enable the geometry processing pipelines to read primitive data for geometry processing.
[0041] In some examples, each geometry processing pipeline can proactively read the corresponding primitive data from the geometry data stream according to a preset read order, and perform geometric processing on the corresponding primitive data to obtain the corresponding primitive processing result. This preset read order can be, but is not limited to, polling or other preset strategies.
[0042] In some examples, the graphics processor may also include a global allocation module, which is a hardware or software module for sequentially partitioning data in a geometric data stream into multiple groups of primitive data.
[0043] Here, the global allocation module can be, but is not limited to, a hardware or software component that divides the geometric data stream according to time sequence. In this embodiment, the global allocation module can divide the data of each primitive group and allocate each divided data segment to the corresponding geometric processing pipeline for processing according to a preset allocation strategy. It can be understood that each data segment has its corresponding order in the geometric data stream.
[0044] In this way, the input geometric data stream is divided into fine-grained segments in time through the geometric processing pipeline. Geometric processing is then performed on the segmented primitive data, and the resulting primitive processing results can be processed in parallel, reducing latency and greatly improving throughput in the data processing process.
[0045] Step S102: The management module determines the overlay tile information corresponding to the processing result of the primitive group, and applies for primitive storage space for the processing result of the primitive group based on the overlay tile information.
[0046] Among them, the overlay tile information can be used to characterize the information of the overlay tiles in the processing results of the primitive group.
[0047] Here, the management module can be, but is not limited to, a unified resource scheduling and allocation center, and can be a hardware or software component deployed on a graphics processor.
[0048] In this embodiment of the application, in order to avoid unnecessary waste of storage resources, the management module can apply for primitive storage space as needed for the processing results of primitive groups based on primitive coverage information, thereby realizing the dynamic allocation of primitive storage space and avoiding the problem of storage resource waste in related technologies where invalid primitive blocks whose primitive data is not covered still need to retain their linked list head pointers in the cache space.
[0049] Here, the primitive storage space may be, but is not limited to, the storage space used to store the processing results of the processed primitive group. It can be understood that each storage location in the primitive storage space corresponds to the head pointer of the block corresponding to each primitive in the primitive group processing result.
[0050] In this embodiment of the application, the primitive storage space may belong to the storage space corresponding to the geometry processing pipeline, and the storage space may be, but is not limited to, a cache.
[0051] Regarding the process of determining the overlay tile information through the management module, in one possible implementation, the minimum bounding box corresponding to each tile in the tile group processing result can be calculated. In this way, all tiles covered by the minimum bounding box can be used as overlay tile information through the management module.
[0052] Regarding the process of calculating the minimum bounding box, for example, in some embodiments, all primitives in the primitive group processing result are traversed, the coordinate values of each primitive in the coordinate system are obtained, and the minimum and maximum coordinate values of all primitives in the horizontal direction (x-axis direction on the screen) and the minimum and maximum coordinate values in the vertical direction (y-axis direction on the screen) are found respectively. The minimum and maximum coordinate values in the horizontal direction are used as the left and right boundaries of the minimum bounding box, and the minimum and maximum coordinate values in the vertical direction are used as the top and bottom boundaries of the minimum bounding box, thus determining the minimum bounding box. For example, consider a set of primitives including a triangle and a rectangle. The vertex coordinates of the triangle are (1,2), (3,5), and (4,3), and the vertex coordinates of the rectangle are (2,1), (5,1), (5,4), and (2,4). By iterating through the coordinates of these primitives, we find the minimum x-axis coordinate value of 1 and the maximum x-axis coordinate value of 5; and the minimum y-axis coordinate value of 1 and the maximum y-axis coordinate value of 5. The minimum bounding box is then a rectangle with the bottom left corner coordinate (1,1) and the top right corner coordinate (5,5).
[0053] All tiles covered by the rectangle with the smallest bounding box having the bottom left corner coordinates (1, 1) and the top right corner coordinates (5, 5) can be used as the covering tile information.
[0054] In another possible implementation, after calculating the minimum bounding box corresponding to each element in the element group processing result, the management module can determine the specific block corresponding to each element in the element group processing result, and the specific block corresponding to each element can be used as overlay block information.
[0055] In some embodiments, all primitives in the primitive group processing result are traversed to obtain the coordinate value of each primitive in the coordinate system. Based on the coordinates corresponding to the vertex of each primitive, it can be understood that for each primitive, once the coordinates of its vertex on the screen are determined, the coverage area corresponding to the primitive can be determined. In this way, the coverage area of each primitive on the screen and the tiles in the coverage area can be accurately found. In the embodiments of this application, the tiles in the coverage area of each primitive on the screen can be used as coverage tile information.
[0056] In the embodiments of this application, when calculating the minimum bounding box, it is understood that it is necessary to first remove the invisible primitives in the primitive group processing result, and then calculate the minimum bounding box based on the visible primitives. This can avoid unnecessary processing overhead.
[0057] After determining the overlay tile information corresponding to the processing result of the primitive group, the management module can apply for primitive storage space as needed based on the overlay tile information for the processing result of the primitive group.
[0058] In this embodiment of the application, the corresponding size of primitive storage space can be requested based on the number of tiles corresponding to the overlay tile information.
[0059] In one possible implementation, the number of minimum bounding box covering blocks can be determined based on the covering block information. The management module can apply for a corresponding size of primitive storage space based on the number of minimum bounding box covering blocks, and allocate a head pointer corresponding to each block to each position in the primitive storage space based on the minimum bounding box covering blocks.
[0060] In another possible implementation, the corresponding blocks of each element in the element processing result can be determined based on the overlay block information. Based on the number of blocks corresponding to each element, the management module can apply for a corresponding size of element storage space and allocate head pointers corresponding to each block to different positions in the element storage space according to the blocks corresponding to each element.
[0061] In this way, based on the overlay tile information, the management module allocates an appropriate amount of primitive storage space as needed for the primitive group processing results, avoiding unnecessary waste of storage resources.
[0062] Step S103: Divide the processing result of the primitive group into blocks using a block divider and store them in the primitive storage space corresponding to the processing result of the primitive group.
[0063] Here, a chunker can be, but is not limited to, a hardware or software component deployed on a graphics processor for chunking and storing primitives in the result of primitive group processing into primitive storage space.
[0064] In this embodiment of the application, the processing result of the graphic element group includes multiple graphic elements, and each graphic element in the processing result of the graphic element group can be stored in blocks by a block divider.
[0065] It is understood that in the embodiments of this application, the size of the primitive storage space corresponds to the number of blocks corresponding to each primitive, and different storage locations in the primitive storage space correspond to each block. The block divider can fill each primitive into the primitive storage space according to its corresponding block.
[0066] In this embodiment of the application, the primitive storage space can correspond to a set of head pointer arrays. Different storage locations correspond to different head pointers. Therefore, the block divider can determine the block corresponding to each primitive and then determine the head pointer corresponding to each block in the primitive storage space. In this way, the block divider can store each primitive in the primitive storage space according to the block corresponding to each primitive and the head pointer corresponding to each block, so as to facilitate subsequent reading and processing.
[0067] In this embodiment of the application, after the processing result of a group of primitives is stored in the corresponding primitive storage space, a fragment processing pipeline will process it.
[0068] For each primitive group processing result, when each primitive in the primitive group processing result is distributed to the corresponding block for rendering, it can be determined that the primitive group processing result has been completed. At this time, the primitive storage space corresponding to the primitive group processing result is invalid.
[0069] To improve storage space utilization and avoid memory overflow, in this embodiment of the application, the graphics processor further includes a fragment processing pipeline. In response to the fragment processing pipeline completing the processing of the primitive group processing result, the management module releases the primitive storage space corresponding to the primitive group processing result.
[0070] It is understandable that the management module can manage the primitive storage space and the corresponding head pointer array. In this embodiment, when all primitives in the primitive group processing result have been processed by the fragment processing pipeline, the primitive storage space and the corresponding head pointer array corresponding to the primitive group processing result will be released, thereby improving the utilization rate of storage space.
[0071] Regarding the timing of the management module releasing the primitive storage space, in one possible implementation, the management module releases the primitive storage space and the corresponding head pointer array after the last primitive in the primitive storage space is read. In another possible implementation, the management module releases the primitive storage space and the corresponding head pointer array after the last primitive in the primitive storage space is read and sent to the corresponding tile for rendering.
[0072] In this way, after the fragment processing pipeline finishes processing the primitive group, the management module releases the corresponding primitive storage space, thereby avoiding memory overflow and improving the utilization of storage space.
[0073] In the above embodiments, on the one hand, for the primitive group processing results processed by the geometry processing pipeline, the management module determines the overlay tile information corresponding to the primitive group processing results, and dynamically applies for primitive storage space for the primitive group processing results on demand based on the overlay tile information, so that the size of the primitive storage space is adapted to the data size of the primitive group processing results. Compared with the solutions in related technologies, this avoids the problem of wasted storage resources caused by invalid tiles whose primitive data in the primitive group processing results are not covered still needing to allocate their corresponding storage space in the cache space. The technical solution provided by this application reduces memory occupation and improves storage space utilization. On the other hand, when there are at least two geometry processing pipelines, by dividing the geometry data stream into primitive group data and distributing it to each geometry processing pipeline, at least two geometry processing pipelines can process the geometry data stream in parallel, improving data processing efficiency.
[0074] Figure 2 A schematic diagram of the implementation flow of a data processing method provided in this application embodiment. Figure 2 This method can be executed by the processor of a computer device. Based on Figure 1 The graphics processor also includes a fragment processing pipeline, and the number of geometry processing pipelines is at least two. The primitive storage space corresponding to the primitive group processing results processed by the geometry processing pipeline is allocated from the cache space corresponding to the geometry processing pipeline. Based on Figure 1 The data processing method provided in this application further includes steps S201 and S202, which combine... Figure 2 The steps shown are explained.
[0075] Step S201: The management module determines the target primitive group data based on the order of each primitive group data in the geometric data stream.
[0076] Step S202: In the cache space corresponding to each geometry processing pipeline, determine the target tuple processing result corresponding to the target tuple data.
[0077] Step S203: Process the target tuple processing result through the fragment processing pipeline.
[0078] In this embodiment of the application, the number of geometry processing pipelines is at least two. Different geometry processing pipelines correspond to different cache spaces and also to different cores. Here, a core may be, but is not limited to, a basic stream processor unit in a graphics processor that can perform general computing or graphics shading tasks in parallel. Different cores manage different geometry processing pipelines.
[0079] It is understandable that for each geometry processing pipeline, after performing geometry processing on a segment of primitive data, the primitive storage space corresponding to the generated primitive processing result is located in the cache space. Therefore, the management module can read the primitive processing result from the cache space corresponding to each geometry processing pipeline.
[0080] After reading the processing results of the primitive group, the management module needs to send the primitive group processing results to the fragment processing pipeline for processing. It is understandable that there is an order among the primitive group data in the geometric data stream. Therefore, there is also a corresponding order among the processing results of each primitive group waiting to be processed.
[0081] In this embodiment, the management module can determine the processing order of each primitive group's processing result based on the data of each primitive group in the geometric data stream. In this way, the management module can continuously query the cache space corresponding to each geometric processing pipeline until it finds the processing result of the target primitive group to be processed in the current order.
[0082] In this embodiment of the application, after the processing result of the target primitive group is determined by the management module, the processing result of the target primitive group can be processed by the fragment processing pipeline. After the fragment processing pipeline finishes processing the processing result of the primitive group, the next target primitive group processing result can be found by the management module according to the processing order, and the fragment processing pipeline can continue to process it.
[0083] Regarding the process of processing the target primitive group processing result through the fragment processing pipeline, in one possible implementation, the number of fragment processing pipelines is one. After the target primitive group processing result is determined, the fragment processing pipeline can send each primitive in the target primitive group processing result to the corresponding block for processing.
[0084] In another possible implementation, there are at least two fragment processing pipelines, each corresponding to a different associated block. This is understood to be a design for parallel processing of primitives. That is, different fragment processing pipelines only read and process the primitives corresponding to their associated blocks. Therefore, in this architecture, for each fragment processing pipeline, it can simultaneously read whether the primitives in the target primitive group processing result correspond to their associated blocks. If so, the primitives are sent to the corresponding associated blocks for processing. If not, it waits for other fragment processing pipelines to finish processing the primitives in the target primitive group processing result before the management module determines the next target primitive group processing result and continues processing.
[0085] In the above embodiments, parallel processing and ordered output of primitive group data are achieved through scheduling of multiple geometry processing pipelines in conjunction with a management module. In actual implementation, the management module dynamically allocates primitive storage space corresponding to the processing results of each primitive group in the cache space of each geometry processing pipeline based on the overlay tile information corresponding to the processing results of each primitive group. This storage space is used to save the primitives and corresponding tiles in the primitive group processing results. Subsequently, the fragment processing pipeline, guided by the management module, sequentially reads and processes the primitives in the processing results of the target primitive group to complete the final rendering. The entire process not only improves processing efficiency but also significantly optimizes resource utilization and system stability.
[0086] Figure 3 A schematic diagram of the implementation process of a geometric processing method provided in this application embodiment. Figure 3 This method can be executed by a graphics processor. The fragment processing pipeline handles the rendering tasks of primitives in associated tiles. The primitive storage space is determined based on a head pointer array, where each head pointer corresponds to a target tile in the overlay tile information. Figure 2 S203 in the middle can be updated to S301, which will combine Figure 3 The steps shown are explained.
[0087] Step S301: Determine the head pointer of the associated block in the head pointer array corresponding to the processing result of the target primitive group through the fragment processing pipeline, and read the target primitive corresponding to the associated block in the primitive storage space corresponding to the processing result of the target primitive group based on the head pointer and process it.
[0088] In this embodiment of the application, the fragment processing pipeline is used to process the rendering task of primitives in the associated tiles. The primitive storage space is a storage space determined based on the head pointer array, and each head pointer in the head pointer array corresponds to each target tile in the overlay tile information.
[0089] Here, the head pointer array is used to record the starting address of the storage location of each tile in the primitive storage space.
[0090] In this embodiment, the head pointer array is dynamically allocated by the management module as needed based on the overlay tile information, thereby avoiding the waste of storage space.
[0091] In this embodiment, the fragment processing pipeline has its corresponding associated tiles. The fragment processing pipeline is used to process only the rendering tasks of the primitives in the associated tiles. Therefore, in this embodiment, when the management module determines the processing result of the target primitive group, the fragment processing pipeline can determine the head pointer array corresponding to the primitive storage space corresponding to the processing result of the target primitive group through the management module, and read the target primitive corresponding to the associated tiles according to the head pointer array and perform subsequent processing.
[0092] In this embodiment, the fragment processing pipeline can detect whether there is a head pointer corresponding to an associated tile in the head pointer array.
[0093] In some examples, when the fragment processing pipeline detects that there is a head pointer corresponding to an associated tile in the head pointer array, the fragment processing pipeline can attempt to read the target primitive based on the storage address indicated by the head pointer corresponding to the associated tile. If the target primitive is read, the fragment processing pipeline can send the target primitive to the corresponding associated tile for processing.
[0094] In some examples, when the fragment processing pipeline does not detect the head pointer corresponding to the associated tile in the head pointer array, or cannot read the target primitive based on the head pointer, the fragment processing pipeline can directly skip the processing of the result of the target primitive group and wait for the management module to determine the processing result of the next target primitive group before processing.
[0095] In the above embodiments, the fragment processing pipeline uses a head pointer array to accurately locate whether there is a target primitive corresponding to an associated tile in the target primitive group processing result. If it exists, it is processed; otherwise, it is skipped. The fragment processing pipeline accurately manages some associated tiles. When multiple fragment processing pipelines exist, the target primitive group processing result can be processed in parallel and quickly, improving rendering efficiency and rendering performance.
[0096] Figure 4 A schematic diagram of the implementation process of a geometric processing method provided in this application embodiment. Figure 4 This method can be executed by a graphics processor. Based on Figure 3 The data processing method may further include step S302. This will be combined with... Figure 4 The steps shown are explained.
[0097] Step S302: If there is no head pointer corresponding to the associated tile in the head pointer array, skip the processing of the fragment processing pipeline for the target primitive group; or, if the target primitive cannot be read based on the head pointer corresponding to the associated tile, complete the processing of the fragment processing pipeline for the target primitive group.
[0098] In this embodiment of the application, when the head pointer array does not have a head pointer corresponding to the associated block, it indicates that the primitives in the target primitive group processing result do not cover the associated block. At this time, the fragment processing pipeline can skip the processing of the target primitive group processing result until the management module determines the next target primitive group processing result.
[0099] In some examples, if the fragment processing pipeline cannot read the corresponding primitive from the primitive storage space based on the primitive when the head pointer array contains a head pointer corresponding to the associated primitive, it can be characterized that all primitives corresponding to the associated primitive in the target primitive group processing result have been read and processed.
[0100] In some examples, the coverage tile information includes all tiles in the minimum bounding box. In the primitive storage space, the primitives in the target primitive group processing result may cover all associated tiles or may not cover them completely. In this scenario, if the fragment processing pipeline cannot read the primitives, it can indicate that the primitives in the target primitive group processing result do not cover the associated tiles.
[0101] Therefore, whenever the fragment processing pipeline detects that the target primitive cannot be read based on the head pointer corresponding to the associated block, it can be determined that the primitive in the target primitive group processing result does not cover the associated block. At this time, the fragment processing pipeline can directly complete the processing process of the target primitive group processing result and wait for the management module to determine the next target primitive group processing result.
[0102] In the above embodiments, the fragment processing pipeline quickly determines whether it needs to participate in the processing based on the head pointer array. If the associated block does not need to be processed, it is skipped directly. If the head pointer exists but reading fails, the fragment processing pipeline is directly executed to process the target tuple, reducing unnecessary computational overhead.
[0103] Figure 5 A schematic diagram of the implementation process of a geometric processing method provided in this application embodiment. Figure 5 This method can be executed by a graphics processor. Based on Figures 1 to 4 The process of "determining the overlay tile information corresponding to the processing result of the primitive group through the management module" in step S102 above can be replaced by steps S501 and S502. This will be combined with... Figure 5 The steps shown are explained.
[0104] Step S501: Based on the processing result of the primitive group, determine the minimum bounding box corresponding to all primitives in the primitive group processing result. It is understandable that the screen is divided into multiple tiles, but the tiles in the processing result of a tile group may not be able to cover all tiles. In this embodiment, the tile storage space of the tiles in the processing result of the tile group will be applied for as needed based on the coverage tile information corresponding to the processing result of the tile group, and the coverage tile information is determined based on the minimum bounding box. Here, the minimum bounding box can refer to the smallest rectangle (in two-dimensional space) that covers all primitives in the processing result of the bounding primitive group, and its boundary is parallel to the coordinate axis. In some embodiments, all primitives in the primitive group processing result are traversed, and the coordinate values of each primitive in the coordinate system are obtained. The minimum and maximum coordinate values of all primitives in the horizontal direction (x-axis direction) and the minimum and maximum coordinate values in the vertical direction (y-axis direction) are found respectively. The minimum and maximum coordinate values in the horizontal direction are used as the left and right boundaries of the minimum bounding box, and the minimum and maximum coordinate values in the vertical direction are used as the upper and lower boundaries of the minimum bounding box, so that the minimum bounding box can be determined. For example, consider a set of primitives including a triangle and a rectangle. The vertex coordinates of the triangle are (1,2), (3,5), and (4,3), and the vertex coordinates of the rectangle are (2,1), (5,1), (5,4), and (2,4). By iterating through the coordinates of these primitives, we find the minimum x-axis coordinate value of 1 and the maximum x-axis coordinate value of 5; and the minimum y-axis coordinate value of 1 and the maximum y-axis coordinate value of 5. The minimum bounding box is then a rectangle with the bottom left corner coordinate (1,1) and the top right corner coordinate (5,5). Step S502: Determine at least one target tile among all tiles based on the minimum bounding box, wherein the overlay tile information includes at least one target tile. In some embodiments, the position and size information of all tiles under the TBR architecture can be obtained, along with the position and size information of the minimum bounding box determined in step S501. Each tile is traversed sequentially to determine if there is an overlapping area between the tile and the minimum bounding box. If an overlap exists, the tile is marked as a target tile. Finally, at least one target tile is obtained, forming overlay tile information. For example, the boundary coordinates of the tile can be compared with the boundary coordinates of the minimum bounding box to determine if there is an overlapping area between the tile and the minimum bounding box. For example, suppose that in a TBR architecture, the screen is divided into multiple square tiles with a side length of 10. The minimum bounding box determined in step S501 is a rectangle with the lower left corner coordinates (15, 20) and the upper right corner coordinates (35, 40). When traversing the tiles, it is found that four tiles with coordinates in the range of (10, 20) to (20, 30), (20, 20) to (30, 30), (10, 30) to (20, 40), and (20, 30) to (30, 40) overlap with the minimum bounding box. These four tiles are the target tiles, and the overlay tile information contains the relevant information of these four target tiles.
[0105] In the above embodiments, the spatial distribution characteristics (minimum bounding box) of the primitives in the primitive group processing result are first determined, and then the target primitive to be processed is located according to the characteristics. Thus, the effective target primitive to be processed is selected from all the primitives. Based on the overlay primitive information including at least one target primitive, primitive storage space is dynamically allocated, reducing unnecessary waste of space resources.
[0106] Figure 6 A schematic diagram of the implementation process of a geometric processing method provided in this application embodiment. Figure 6 This method can be executed by a graphics processor. Based on Figures 1 to 4 The overlay tile information includes at least one target tile, and the primitive storage space is a storage space determined based on the head pointer array. The process of "requesting primitive storage space based on overlay tile information" in step S102 can be replaced by step S601. This will be combined with... Figure 6 The steps shown are explained.
[0107] Step S601: Based on the number of target tiles in the overlay tile information, request the primitive storage space corresponding to the header pointer array.
[0108] Each head pointer in the head pointer array corresponds to each target tile in the overlay tile information.
[0109] Here, the overlay tile information includes at least one target tile, and the primitive storage space is a storage space determined based on the head pointer array.
[0110] In this embodiment of the application, the overlay tile information can be used to characterize the information of each tile overlay tile in the tile group processing result. That is, there is a relationship between the number of target tiles and the number of each tile in the tile group processing result. Therefore, tile storage space can be dynamically allocated based on the target tiles as the tile group processing result. The size of the tile storage space is related to the amount of tile data in the tile group processing result, thus avoiding unnecessary waste of storage space resources.
[0111] In this embodiment, when the management module requests primitive storage space based on the number of target blocks included in the overlay block information, it can determine the number of blocks that need to be covered. Different storage locations in the primitive storage space need to have their corresponding head pointers, so that the primitives corresponding to the blocks can be read according to the head pointers of the blocks during subsequent processing. Therefore, in this embodiment, when requesting primitive storage space of the corresponding size based on the number of target blocks in the overlay block information, it is necessary to first allocate the head pointer array (including the head pointers corresponding to each target block) for each target block, and then request the corresponding primitive storage space based on the head pointers of each target block.
[0112] In some examples, primitive storage space may be located in the cache space corresponding to the geometry processing pipeline, while in other examples, primitive storage space may be located in a pre-defined memory space.
[0113] For example, if the number of target tiles included in the overlay tile information corresponding to the primitive group processing result is 5, the management module will only allocate corresponding head pointers to these 5 target tiles. The head pointers of these 5 target tiles form the head pointer array corresponding to the primitive group processing result. The management module can allocate primitive storage space of the corresponding size from the cache space corresponding to the geometry processing pipeline that processes the primitive group processing result based on the 5 head pointers in the head pointer array, or allocate primitive storage space of the corresponding size from the preset storage space. It can be understood that different storage locations in the primitive storage space correspond to the head pointers of different target tiles.
[0114] In the above embodiments, the head pointer array and primitive storage space are dynamically allocated based on the number of target blocks, which realizes the management module's precise memory management of each primitive in the processed primitive group. Compared with the problem of having to allocate head pointers for all blocks in related technologies, the technical solution provided by this application reduces the waste of storage space resources.
[0115] Figure 7 A schematic diagram of the implementation process of a geometric processing method provided in this application embodiment. Figure 7This method can be executed by a graphics processor. Based on Figure 6 The process of "dividing the processing result of the primitive group into blocks using a block divider and storing them in the primitive storage space corresponding to the processing result of the primitive group" in step S103 can be replaced by steps S701 and S702. This will be combined with... Figure 7 The steps shown are explained.
[0116] Step S701: The block divider determines the block corresponding to each element in the element group processing result.
[0117] Step S702: Based on the blocks corresponding to each graphic element and the head pointers corresponding to each target block in the head pointer array, store each graphic element in the graphic element storage space in the graphic element processing result.
[0118] Here, a chunker can be, but is not limited to, a hardware or software component deployed on a graphics processor for chunking and storing primitives in the result of primitive group processing into primitive storage space.
[0119] In this embodiment, the block divider can read the head pointer array corresponding to the primitive storage space to determine the storage location corresponding to each target block, so as to accurately store each primitive in the primitive group processing result into the storage location corresponding to each primitive.
[0120] In the embodiments of this application, the block divider can determine the block corresponding to each element in the element group processing result. In some examples, the block divider can determine the block corresponding to each element based on the overlay block information; in some examples, the block divider can directly determine the block corresponding to each element based on the element information corresponding to each element.
[0121] After determining the corresponding blocks for each graphic element in the graphic element group processing result, for each graphic element, the corresponding head pointer can be found from the head pointer corresponding to each target graphic element according to its block. Based on the head pointer, the block divider can determine the storage location in the graphic element storage space where the graphic element should be stored, and thus store the graphic element in that storage location.
[0122] In the above embodiments, the block divider determines the block corresponding to each primitive in the primitive group processing result, and the dynamically allocated head pointer array stores each primitive in the primitive group processing result to the primitive storage space, avoiding redundant allocation of the full-screen head pointer array, thereby reducing the consumption of storage space.
[0123] The technical solution of this disclosure is described in detail below.
[0124] Related technical content: In the existing TBR architecture, the input data (equivalent to the aforementioned geometric data stream) is segmented and sent to the geometry processing pipelines of different cores. After processing, the data is processed separately (resulting in geometrically processed results) and sent to the corresponding caches. The segment processing pipeline will retrieve the required data from the caches for processing. For each cache of each core (corresponding to the aforementioned geometry processing pipeline), their head pointer array needs to cover the entire screen. That is, each tile on the screen (equivalent to the aforementioned tile) requires a minimum storage unit.
[0125] Based on the above, it can be determined that the technical problems to be solved by this application include the following: (1) The current TBR architecture cannot achieve fast rendering and there is a certain delay. This is because the fragment processing pipeline needs to sort the data segments before distributing the primitives in the data segments to the tiles.
[0126] (2) The current TBR architecture may cause memory overflow problems. This is because after the geometry processing pipeline of each core outputs the geometry-processed data segment, it needs to directly allocate the buffer corresponding to all tiles, but not all tiles are covered by the data segment, resulting in low buffer utilization.
[0127] In view of this, this application provides a data processing method, which may specifically include the following: Figure 8 A schematic diagram of the logical architecture of a data processing method provided in this application embodiment. Figure 1 The following is for reference only. Figure 8 The technical solution provided in this application is described below: 1. The geometric data stream is segmented through a unified management and allocation module, referring to... Figure 8 The input geometric data stream is divided into multiple small data segments (equivalent to the aforementioned primitive data), and each data segment has its own processing order.
[0128] 2. Each data segment is sent to the geometry processing pipeline 801 corresponding to each core (component of the graphics processor) for data processing as needed, and the geometrically processed data segments (equivalent to the aforementioned primitive group processing results) are output by each geometry processing pipeline 801.
[0129] 3. For each geometrically processed data segment output by the geometry processing pipeline 801, its bounding box can be calculated to determine the tile range covered by each primitive in the data segment (equivalent to the aforementioned overlay tile information).
[0130] 4. The unified module requests the corresponding storage space 802 (equivalent to the aforementioned primitive storage space) for this data segment through the bounding box.
[0131] 5. Fill the primitives in the processed data segment into the storage space 802 whose size is limited by the bounding box. This storage space includes multiple sub-storage spaces corresponding to each tile (corresponding to different blocks), and fill the primitives accordingly.
[0132] 6. When reading primitives, the fragment processing pipeline 803 corresponding to each core reads a data segment (the result of the target primitive group processing) that is filled into the storage space 802 in sequence (the geometric processing order mentioned above). It also checks whether its corresponding tile corresponds to each sub-storage space in the storage space 802 corresponding to the data segment. If they correspond, the corresponding primitive is read and distributed to the tile for rendering.
[0133] 7. Once all primitives in the storage space corresponding to a data segment have been rendered to tiles, the storage space is released.
[0134] Understandable, Figure 8 The process of retrieving a processed data segment and having it read by the corresponding segment processing pipeline in each core is an abstract logic. For practical application scenarios, please refer to... Figure 9 , Figure 9 A schematic diagram of the logical architecture of a data processing method provided in this application embodiment. Figure 2 , refer to Figure 9 In practical applications, in order to improve processing efficiency, the fragment processing pipelines corresponding to each core will find the data segment to be processed in parallel from the storage space corresponding to each data segment, and read the primitive that covers the tile corresponding to the fragment processing pipeline. After reading, the fragment processing pipeline will send the primitive to the corresponding tile for rendering processing.
[0135] Based on the above, it can be determined that the technical solution provided in this application has some key technical points: 1. Calculate the minimum bounding box for all visible primitives within the input data segment before tile conversion; that is, calculate the bounding box after outputting the data segment from the geometry processing pipeline.
[0136] 2. Each data segment requests a header pointer array as needed based on the actual bounding box size, dynamically allocating resources to avoid wasting storage resources.
[0137] 3. A unified module allocates / releases the header pointer array for all core geometry pipeline processors.
[0138] 4. Each data segment has an independent header pointer array, and each independent header pointer array has a base address. The fragment pipeline processor can complete the rendering of each data segment by reading the base address of each header pointer array in sequence.
[0139] The beneficial effects of the technical solution provided in this application may include: 1. It eliminates the need to allocate a full-screen array of head pointers every time, reducing the wasted space of the head pointer array.
[0140] 2. For multi-core systems, each segment processing pipeline can directly complete the reordering by reading the base address of each head pointer array in sequence without needing to obtain the reordering signal by parsing the linked list.
[0141] 3. Once the fragment processing pipeline has finished processing a data segment, all resources of that data segment can be released, namely the head pointer array and the data linked list.
[0142] Based on the foregoing embodiments, this application provides a graphics processor, which includes various modules, pipelines, and units included in each module. It can be implemented by a processor in a computer device; of course, it can also be implemented by specific logic circuits. In the implementation process, the processor can be a central processing unit (CPU), a microprocessor unit (MPU), a digital signal processor (DSP), or a field programmable gate array (FPGA), etc.
[0143] Figure 10 This is a schematic diagram of the composition structure of a graphics processor provided in an embodiment of this application, such as... Figure 10 As shown, the graphics processor 1000 includes a management module 1001, a geometry processing pipeline 1002, and a tiler 1003; wherein, The geometry processing pipeline 1002 is configured to process the corresponding primitive group data to obtain the primitive group processing result; the primitive group data is a portion of the data in the geometry data stream. The management module 1001 is configured to determine the overlay tile information corresponding to the processing result of the primitive group, and to apply for primitive storage space based on the overlay tile information; the overlay tile information is used to characterize the information of the primitive overlay tiles in the processing result of the primitive group. The block divider 1003 is configured to divide the processing result of the primitive group into blocks and store them in the primitive storage space corresponding to the geometry processing pipeline.
[0144] In some embodiments, the graphics processor further includes a fragment processing pipeline, and the management module is configured to release the primitive storage space corresponding to the primitive group processing result in response to the fragment processing pipeline completing the processing of the primitive group processing result.
[0145] In some embodiments, the number of geometry processing pipelines is at least two; each geometry processing pipeline is configured to read primitive group data corresponding to each geometry processing pipeline from the geometry data stream; or, it is configured to read the geometry data stream through a global distribution module in the graphics processor, determine primitive group data corresponding to each geometry processing pipeline from the geometry data stream, and distribute the primitive group data corresponding to each geometry processing pipeline to each geometry processing pipeline.
[0146] In some embodiments, the graphics processor further includes a fragment processing pipeline, and the number of geometry processing pipelines is at least two. The primitive storage space corresponding to the primitive group processing result processed by the geometry processing pipeline is obtained from the cache space corresponding to the geometry processing pipeline. The management module is configured to determine the target primitive group data based on the order of each primitive group data in the geometry data stream; and to determine the target primitive group processing result corresponding to the target primitive group data in the cache space corresponding to each geometry processing pipeline. The fragment processing pipeline is configured to process the processing results of the target primitive group.
[0147] In some embodiments, the fragment processing pipeline is used to process the rendering task of primitives in the associated tile; the primitive storage space is a storage space determined based on the head pointer array; each head pointer in the head pointer array corresponds to each target tile in the overlay tile information; The fragment processing pipeline is configured to determine the head pointer corresponding to the associated block in the head pointer array corresponding to the processing result of the target primitive group, and read the target primitive corresponding to the associated block in the primitive storage space corresponding to the processing result of the target primitive group based on the head pointer and process it.
[0148] In some embodiments, if the head pointer array does not contain a head pointer corresponding to the associated tile, the fragment processing pipeline is configured to skip the processing of the result of the fragment processing pipeline on the target primitive group; or, if the target primitive cannot be read based on the head pointer corresponding to the associated tile, the fragment processing pipeline is configured to complete the processing of the result of the fragment processing pipeline on the target primitive group.
[0149] In some embodiments, the overlay tile information includes at least one target tile; the management module is configured to determine a minimum bounding box corresponding to all tiles in the processing result of the tile group based on the processing result of the tile group; and the management module is configured to determine the at least one target tile among all tiles based on the minimum bounding box.
[0150] In some embodiments, the overlay tile information includes at least one target tile, and the primitive storage space is a storage space determined based on a head pointer array; the management module is configured to apply for primitive storage space corresponding to the head pointer array based on the number of target tiles in the overlay tile information; each head pointer in the head pointer array corresponds to each of the target tiles in the overlay tile information.
[0151] In some embodiments, the block divider divides the processing result of the primitive group into blocks: The block divider is configured to determine the blocks corresponding to each element in the processing result of the element group. The block divider is configured to store each element in the element group processing result in the element storage space based on the element corresponding to each element and the head pointer corresponding to each target element in the head pointer array.
[0152] The description of the graphics processor above is similar to the description of the method embodiments above, and has similar beneficial effects. In some embodiments, the functions or modules included in the apparatus provided in this application can be used to perform the methods described in the method embodiments above. For technical details not disclosed in the apparatus embodiments of this application, please refer to the description of the method embodiments of this application for understanding.
[0153] It should be noted that, in the embodiments of this application, if the above-described data processing method is implemented as a software functional module and sold or used as an independent product, it can also be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the embodiments of this application, or the part that contributes to the related technology, can be embodied in the form of a software product. This software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, mobile hard drives, read-only memory (ROM), magnetic disks, or optical disks. Thus, the embodiments of this application are not limited to any specific hardware, software, or firmware, or any combination of hardware, software, and firmware.
[0154] This application provides a computer device including a memory and a processor. The memory stores a computer program that can run on the processor. When the processor executes the program, it implements some or all of the steps in the above-described method.
[0155] This application provides a computer-readable storage medium storing a computer program thereon, which, when executed by a processor, implements some or all of the steps in the above-described method. The computer-readable storage medium can be transient or non-transient.
[0156] This application provides a computer program including computer-readable code, wherein when the computer-readable code is executed in a computer device, a processor in the computer device performs some or all of the steps in the above-described method.
[0157] This application provides a computer program product, which includes a non-transitory computer-readable storage medium storing a computer program. When the computer program is read and executed by a computer, it implements some or all of the steps in the above-described method. This computer program product can be implemented specifically through hardware, software, or a combination thereof. In some embodiments, the computer program product is specifically embodied as a computer storage medium; in other embodiments, the computer program product is specifically embodied as a software product, such as a software development kit (SDK), etc.
[0158] It should be noted that the descriptions of the various embodiments above tend to emphasize the differences between them, while their similarities or commonalities can be referred to interchangeably. The descriptions of the above embodiments of the device, storage medium, computer program, and computer program product are similar to the descriptions of the above method embodiments and have similar beneficial effects. For technical details not disclosed in the embodiments of the device, storage medium, computer program, and computer program product of this application, please refer to the descriptions of the method embodiments of this application for understanding.
[0159] Figure 11 This application provides a hardware entity diagram of a computer device as an embodiment of the present application, such as... Figure 11 As shown, the hardware entity of the computer device 1100 includes a processor 1101 and a memory 1102, wherein the memory 1102 stores a computer program that can run on the processor 1101, and the processor 1101 executes the program to implement the steps in the method of any of the above embodiments.
[0160] The memory 1102 stores computer programs that can run on the processor. The memory 1102 is configured to store instructions and applications that can be executed by the processor 1101. It can also cache data to be processed or already processed (e.g., image data, audio data, voice communication data, and video communication data) in the processor 1101 and various modules in the computer device 1100. It can be implemented by flash memory or random access memory (RAM).
[0161] The processor 1101 executes the steps of the fragment task processing method described above when executing the program. The processor 1101 typically controls the overall operation of the computer device 1100.
[0162] This application provides a computer storage medium that stores one or more programs, which can be executed by one or more processors to implement the steps of the fragment task processing method as described in any of the above embodiments.
[0163] It should be noted that the descriptions of the storage medium and device embodiments above are similar to the descriptions of the method embodiments above, and have similar beneficial effects. For technical details not disclosed in the storage medium and device embodiments of this application, please refer to the descriptions of the method embodiments of this application for understanding.
[0164] The aforementioned processor can be at least one of the following: Application Specific Integrated Circuit (ASIC), Digital Signal Processor (DSP), Digital Signal Processing Device (DSPD), Programmable Logic Device (PLD), Field Programmable Gate Array (FPGA), Central Processing Unit (CPU), Controller, Microcontroller, and Microprocessor. It is understood that other electronic devices can also implement the functions of the aforementioned processor, and this application does not specifically limit the specific implementation.
[0165] The aforementioned computer storage media / memory can be read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), magnetic random access memory (FRAM), flash memory, magnetic surface memory, optical disc, or compact disc read-only memory (CD-ROM), etc.; or it can be various terminals that include one or any combination of the above-mentioned memories, such as mobile phones, computers, tablet devices, personal digital assistants, etc.
[0166] It should be understood that the phrase "one embodiment" or "an embodiment" throughout the specification means that a specific feature, structure, or characteristic related to the embodiment is included in at least one embodiment of this application. Therefore, "in one embodiment" or "in an embodiment" appearing throughout the specification does not necessarily refer to the same embodiment. Furthermore, these specific features, structures, or characteristics can be combined in any suitable manner in one or more embodiments. It should be understood that in the various embodiments of this application, the sequence numbers of the above steps / processes do not imply a sequential order of execution; the execution order of each step / process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application. The sequence numbers of the above embodiments of this application are merely descriptive and do not represent the superiority or inferiority of the embodiments.
[0167] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element.
[0168] In the several embodiments provided in this application, it should be understood that the disclosed devices and methods can be implemented in other ways. The device embodiments described above are merely illustrative. For example, the division of units is only a logical functional division, and in actual implementation, there may be other division methods, such as: multiple units or components can be combined, or integrated into another system, or some features can be ignored or not executed. In addition, the coupling, direct coupling, or communication connection between the various components shown or discussed can be through some interfaces, and the indirect coupling or communication connection between devices or units can be electrical, mechanical, or other forms.
[0169] The units described above as separate components may or may not be physically separate. The components shown as units may or may not be physical units. They may be located in one place or distributed across multiple network units. Some or all of the units may be selected to achieve the purpose of this embodiment according to actual needs.
[0170] Furthermore, in the various embodiments of this application, all functional units can be integrated into one processing unit, or each unit can be a separate unit, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or in a combination of hardware and software functional units. Those skilled in the art will understand that all or part of the steps of the above method embodiments can be implemented by hardware related to program instructions. The aforementioned program can be stored in a computer-readable storage medium. When the program is executed, it performs the steps of the above method embodiments. The aforementioned storage medium includes various media capable of storing program code, such as mobile storage devices, read-only memory (ROM), magnetic disks, or optical disks.
[0171] Alternatively, if the integrated units described above are implemented as software functional modules and sold or used as independent products, they can also be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, or the part that contributes to related technologies, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as mobile storage devices, ROM, magnetic disks, or optical disks.
[0172] The above description is merely an embodiment of this application, but the scope of protection of this application is not limited thereto. Any changes or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application.
Claims
1. A data processing method, characterized in that, Applied to a graphics processing unit (GPU), the GPU includes at least a management module, a geometry processing pipeline, and a tiler; the method includes: The corresponding primitive group data is processed through the geometry processing pipeline to obtain the primitive group processing result; the primitive group data is a portion of the data in the geometry data stream. The management module determines the overlay tile information corresponding to the processing result of the primitive group, and applies for primitive storage space for the processing result of the primitive group based on the overlay tile information; the overlay tile information is used to characterize the information of the primitive overlay tiles in the processing result of the primitive group. The processing result of the primitive group is divided into blocks by a block divider and stored in the primitive storage space corresponding to the processing result of the primitive group.
2. The data processing method according to claim 1, characterized in that, The graphics processor further includes a fragment processing pipeline, and the method further includes: In response to the fragment processing pipeline completing the processing of the primitive group, the primitive storage space corresponding to the primitive group processing result is released through the management module.
3. The data processing method according to claim 1, characterized in that, The number of geometry processing pipelines is at least two, and the method further includes: The primitive group data corresponding to each of the geometry processing pipelines is read from the geometry data stream through each of the geometry processing pipelines; or, The graphics processor reads the geometry data stream through the global distribution module, determines the primitive group data corresponding to each geometry processing pipeline from the geometry data stream, and distributes the primitive group data corresponding to each geometry processing pipeline to each geometry processing pipeline.
4. The data processing method according to claim 1, characterized in that, The graphics processor further includes a fragment processing pipeline, and the number of geometry processing pipelines is at least two. The primitive storage space corresponding to the primitive group processing result processed by the geometry processing pipeline is obtained from the cache space corresponding to the geometry processing pipeline. The method further includes: The management module determines the target primitive group data based on the order of each primitive group data in the geometric data stream. In the cache space corresponding to each of the geometry processing pipelines, the target primitive group processing result corresponding to the target primitive group data is determined; The processing results of the target primitive group are processed through the fragment processing pipeline.
5. The data processing method according to claim 4, characterized in that, The fragment processing pipeline is used to process the rendering tasks of primitives in the associated tiles; the primitive storage space is a storage space determined based on the head pointer array; each head pointer in the head pointer array corresponds to each target tile in the overlay tile information; The processing of the target tuple result through the fragment processing pipeline includes: The fragment processing pipeline determines the head pointer corresponding to the associated block in the head pointer array corresponding to the processing result of the target primitive group, and reads the target primitive corresponding to the associated block in the primitive storage space corresponding to the processing result of the target primitive group based on the head pointer and processes it.
6. The data processing method according to claim 5, characterized in that, The method further includes: If the head pointer array does not contain a head pointer corresponding to the associated tile, skip the processing of the fragment processing pipeline for the target tuple; or, If the target primitive cannot be read based on the head pointer corresponding to the associated primitive, the processing process of the fragment processing pipeline for the target primitive group is completed.
7. The data processing method according to any one of claims 1 to 6, characterized in that, The overlay tile information includes at least one target tile; the step of determining the overlay tile information corresponding to the processing result of the tile group through the management module includes: Based on the processing result of the primitive group, determine a minimum bounding box corresponding to all primitives in the processing result of the primitive group; The at least one target tile is determined among all tiles based on the minimum bounding box.
8. The data processing method according to any one of claims 1 to 6, characterized in that, The overlay tile information includes at least one target tile, and the primitive storage space is a storage space determined based on the head pointer array; The step of requesting primitive storage space based on the overlay tile information includes: Based on the number of target tiles in the coverage tile information, allocate primitive storage space corresponding to the head pointer array; Each head pointer in the head pointer array corresponds to each of the target tiles in the overlay tile information.
9. The data processing method according to claim 8, characterized in that, The step of dividing the processing result of the primitive group into blocks using a block divider and storing them in the primitive storage space corresponding to the processing result of the primitive group includes: The block divider determines the block corresponding to each element in the element group processing result; Based on the blocks corresponding to each of the said primitives and the head pointers corresponding to each of the target blocks in the head pointer array, each primitive in the primitive group processing result is stored in the primitive storage space.
10. A graphics processor, characterized in that, The graphics processor includes: a management module, a geometry processing pipeline, and a tiler; The geometry processing pipeline is configured to process the corresponding primitive group data to obtain primitive group processing results; the primitive group data is a portion of the data in the geometry data stream. The management module is configured to determine the overlay tile information corresponding to the processing result of the primitive group, and to apply for primitive storage space based on the overlay tile information; the overlay tile information is used to characterize the information of the primitive overlay tiles in the processing result of the primitive group. The processing results of the primitive group are divided into blocks by a block divider and stored in the primitive storage space corresponding to the geometry processing pipeline.
11. A computer device comprising a memory and a processor, the memory storing a computer program executable on the processor, the processor executing the computer program to implement the steps of the method of any one of claims 1 to 9.
12. A computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the steps of the method according to any one of claims 1 to 9.
13. A computer program product, comprising a computer program or instructions, characterized in that, When the computer program or instructions are executed by a processor, they implement the steps of the method according to any one of claims 1 to 9.
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