Transverse PIN photoelectric detector based on surface plasmon enhancement

Abstract

The invention provides a transverse PIN photoelectric detector based on surface plasmon enhancement, which belongs to the technical field of photoelectric detectors and comprises a substrate, a back enhanced reflection film layer, a semiconductor device layer, a plasmon array and an antireflection film layer from bottom to top in sequence. A P + region and an N + region of the semiconductor device layer are symmetrically distributed on two sides of the non-doped intrinsic layer to form a transverse PIN junction; the plasmon array is of a metal grating structure matched with the 660 nm / 940 nm dual-band, resonance is generated by coupling with incident light, and a light field is localized near a depletion region of the non-doped intrinsic layer. The carrier transport path is shortened through the transverse structure, the response speed is increased, meanwhile, dual-band light absorption is enhanced through the light local effect of surface plasmons, cooperation of high responsivity, high quantum efficiency and high response speed is achieved, the preparation technology is compatible with the CMOS technology, and the device is suitable for the scenes such as blood oxygen detection.

Description

Technical Field

[0001] This invention belongs to the field of photodetector technology, and more specifically, relates to a lateral PIN photodetector based on surface plasmon enhancement. Background Technology

[0002] As one of the core components of semiconductor optoelectronic devices, PIN photodetectors have significant advantages such as fast response speed, low dark current, and operation under zero bias voltage due to their structural design of "intrinsic layer sandwiched between heavily doped P-type and N-type semiconductors". They are widely used in ultraviolet detection, optical communication, environmental monitoring, biomedicine and other fields. Especially in the field of smart bracelet applications, their blood oxygenation modules usually adopt a 640nm+960nm dual-wavelength PIN photodetector solution.

[0003] Traditional semiconductor photodetectors mostly employ a vertical structure. Because short-wavelength incident light has a short absorption length inside semiconductor materials, it is usually absorbed at the material surface and cannot form a photocurrent inside the detector, resulting in a low response of the detector to short-wavelength signals.

[0004] Existing technology discloses a lateral photodetector that forms a lateral PIN junction through an anode region, an isolation platform, and a cathode region. Photogenerated carriers do not need to traverse the substrate longitudinally, significantly shortening the transport path and enabling rapid formation of photocurrent upon incident light irradiation. However, lateral incident light is prone to reflection at the device surface or air-semiconductor interface, and unabsorbed light is directly transmitted, further weakening the photoresponsivity.

[0005] Surface plasmon resonance (SPR) technology offers a direction for overcoming bottlenecks: it can localize light field intensity at the nanoscale through electronic oscillations at the metal-dielectric interface, and the resonant wavelength can be flexibly controlled by adjusting the metal structure parameters. However, existing solutions have significant drawbacks: most structures are designed for a single wavelength band and cannot adapt to dual-band requirements; some dual-band structures employ multi-layer stacking designs, resulting in high metal losses and poor compatibility with planar structures of lateral pins, making it difficult to meet practical application requirements. Therefore, there is an urgent need to develop a photodetector that can achieve high light absorption efficiency and low light reflection loss in both 640 / 960nm wavelength bands, thereby promoting technological upgrades in related fields. Summary of the Invention

[0006] In view of the above-mentioned defects or improvement needs of the existing technology, the present invention provides a transverse PIN photodetector based on surface plasmon resonance enhancement, thereby solving the technical problems of insufficient light absorption and large light reflection loss of the existing detector.

[0007] To achieve the above objectives, according to one aspect of the present invention, a lateral PIN photodetector based on surface plasmon enhancement is provided, comprising: a substrate, a back reflective coating layer, a semiconductor device layer, a plasmon array, and an antireflection coating layer; The back reflective coating is disposed on the upper surface of the substrate, and the semiconductor device layer is disposed on the upper surface of the back reflective coating; The semiconductor device layer includes a P+ region, an undoped intrinsic layer, and an N+ region. The P+ region and the N+ region are symmetrically distributed on both sides of the undoped intrinsic layer to form a lateral PIN junction. The plasmon array is disposed on the upper surface of the undoped intrinsic layer and is used to couple with the incident light to generate surface plasmon resonance, thereby localizing the light field within the undoped intrinsic layer. The antireflection coating is disposed on the upper surface of the undoped intrinsic layer and covers the plasmon array.

[0008] Preferably, the substrate is a semi-insulating or conductive semiconductor material, and the substrate material is Si, Ge, SiC, GaN, AlN, InP or sapphire.

[0009] More preferably, the substrate is selected with a resistivity of approximately 10,000 ohm-cm and a doping concentration of approximately 5 × 10⁻⁶. 11 cm -3 n-type silicon wafers.

[0010] Preferably, the plasmon array comprises a plurality of periodically arranged metal grating units, with the period between adjacent metal grating units being 0.3 to 0.8 μm.

[0011] Preferably, the material of the metal grating unit is Au, Al, Cu or Ag.

[0012] More preferably, the metal grating unit is made of Au, the interval between adjacent metal grating units is 0.5 μm, the height of each metal grating unit is 100 nm, the width of each metal grating unit is 100 nm, and the slit width between adjacent metal grating units is 0.2 μm.

[0013] Preferably, the shape of the metal grating unit is rectangular, cylindrical, spherical, trapezoidal, or stepped.

[0014] Preferably, the thickness of the plasmon array is 50–250 nm.

[0015] Preferably, the back reflective coating is a single-layer SiO film or a three-layer Bragg reflector; when the back reflective coating is a single-layer SiO film, its thickness is 180-200 nm; when the back reflective coating is a three-layer Bragg reflector, its total thickness is 300-350 nm.

[0016] Preferably, the antireflective coating is made of SiO2 or Si3N4, has a thickness of 120–180 nm, and has a reflectivity of ≤5% in the 600 nm / 940 nm band.

[0017] Preferably, the P+ region is formed by boron ion implantation at a dose of 3.0 × 10⁻⁶. 14 ~4.0×10 14 cm -2 The injection energy is 30–40 keV, and the peak doping concentration is 3.5 × 10⁻⁶. 19 ~5.0×10 19 cm -3 The junction depth is 0.3–0.5 μm; the N+ region is formed by phosphorus ion implantation at a dose of 0.8 × 10⁻⁶. 14 ~1.2×10 14 cm -2 The injection energy is 30–40 keV, and the peak doping concentration is 3.5 × 10⁻⁶. 19 ~5.0×10 19 cm -3 The junction depth is 0.3–0.5 μm.

[0018] Preferably, the thickness of the semiconductor device layer is 450–550 nm, and the width of the undoped intrinsic layer is 800–1200 nm; the width of the P+ region is the same as the width of the N+ region, which is 250–350 nm.

[0019] According to another aspect of the present invention, an application of a lateral PIN photodetector based on surface plasmon enhancement in a dual-band 640 / 960nm is provided.

[0020] In summary, compared with the prior art, the above-described technical solutions conceived by this invention can achieve the following beneficial effects: 1. The lateral PIN photodetector based on surface plasmon enhancement proposed in this invention forms a lateral PIN junction structure by symmetrically distributing the P+ and N+ regions on both sides of the undoped intrinsic layer. This avoids the problem of excessive recombination of photogenerated carriers caused by incident light having to pass through the highly doped P region in the longitudinal structure, thereby improving the photocurrent collection efficiency.

[0021] 2. The lateral PIN photodetector based on surface plasmon enhancement proposed in this invention enhances light absorption by placing a plasmon array on the upper surface of an undoped intrinsic layer and utilizing its photon trapping properties to localize the incident light near the depletion region.

[0022] 3. The lateral PIN photodetector based on surface plasmon enhancement proposed in this invention reduces light loss caused by surface reflection by setting an antireflection film layer, allowing more photons to enter the device and increasing the number of photogenerated carriers; a reflective layer is set on the back to reduce light transmission, suppress photon leakage, and increase the optical path of light in the Si absorption layer, thus realizing the design of a double light trapping structure on the top and bottom.

[0023] 4. The lateral PIN photodetector based on surface plasmon enhancement proposed in this invention has a simple structure, its fabrication process is compatible with existing CMOS processes, and it is easy to mass-produce. Attached Figure Description

[0024] Figure 1 This is a schematic diagram of the structure of the transverse PIN photodetector based on surface plasmon enhancement according to the present invention.

[0025] Figure 2 This is an absorption spectrum curve of the photodetector provided in an embodiment of the transverse PIN photodetector based on surface plasmon resonance enhancement of the present invention.

[0026] In all the figures, the same reference numerals are used to denote the same elements or structures, wherein: 100-substrate; 101-backside antireflection coating; 102-semiconductor device layer; 103-P+ region; 104-undoped intrinsic layer; 105-N+ region; 106-p-type ohmic electrode; 107-n-type ohmic electrode; 108-plasmoelectric array; 109-antireflection coating. Detailed Implementation

[0027] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention. Furthermore, the technical features involved in the various embodiments of this invention described below can be combined with each other as long as they do not conflict with each other.

[0028] like Figure 1 As shown, the present invention proposes a lateral PIN photodetector based on surface plasmon enhancement, comprising a substrate 100, a back reflective coating layer 101, a semiconductor device layer 102, a P+ region 103, an undoped intrinsic layer 104, an N+ region 105, a p-type ohmic electrode 106, an n-type ohmic electrode 107, a plasmon array 108, and an antireflection coating layer 109.

[0029] Specifically, the back reflective coating 101 is formed on the substrate 100, the semiconductor device layer 102 is formed above the back reflective coating 101, the P+ region 103 and the N+ region 105 are formed on both sides of the upper surface of the semiconductor device layer 102, and the middle region is an undoped intrinsic layer 104, forming a lateral PIN junction. A p-type ohmic electrode 106 is formed on the P+ region 103, and an n-type ohmic electrode 107 is formed on the N+ region 105. The plasmon array 108 is formed above the undoped intrinsic layer 104, and the antireflection coating 109 covers the region except for the p-type ohmic electrode 106 and the n-type ohmic electrode 107.

[0030] To further clarify, in this embodiment, the substrate 100 has a resistivity of approximately 10,000 ohm-cm and a doping concentration of approximately 5 × 10⁻⁶. 11 cm -3 The n-type silicon wafer. The back antireflection coating 101 is made of SiO2 and has a thickness of 200 nm. The plasmon array 108 consists of multiple Au metal grating units with a period of 0.5 μm, a height of 100 nm, a width of 100 nm, and a slit width of 0.2 μm. The antireflection coating 109 is made of SiO2 and Si3N4 and has a thickness of 150 nm.

[0031] To further explain, such as Figure 2 The absorption spectrum curve of the photodetector shown illustrates that when incident light shines on the detector surface, the antireflection film 109 reduces light reflection, and the plasmon array 108 couples with the incident light to generate surface plasmon resonance, localizing the light near the undoped intrinsic layer 104, enhancing light absorption, and generating a large number of photogenerated carriers. Under the influence of the built-in electric field of the lateral PIN junction, the photogenerated carriers separate and move towards the poles, forming a photocurrent, thus achieving photodetection.

[0032] Those skilled in the art will readily understand that the above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A lateral PIN photodetector based on surface plasmon resonance enhancement, characterized in that, include: Substrate (100), back antireflection coating (101), semiconductor device layer (102), plasmon array (108) and antireflection coating (109). The back reflective coating layer (101) is disposed on the upper surface of the substrate (100), and the semiconductor device layer (102) is disposed on the upper surface of the back reflective coating layer (101); The semiconductor device layer (102) includes a P+ region (103), an undoped intrinsic layer (104), and an N+ region (105). The P+ region (103) and the N+ region (105) are symmetrically distributed on both sides of the undoped intrinsic layer (104) to form a lateral PIN junction. The plasmon array (108) is disposed on the upper surface of the undoped intrinsic layer (104) and is used to couple with the incident light to generate surface plasmon resonance, thereby localizing the light field in the undoped intrinsic layer (104). The antireflection film (109) is disposed on the upper surface of the undoped intrinsic layer (104) and covers the plasmon array (108).

2. The lateral PIN photodetector based on surface plasmon resonance enhancement according to claim 1, characterized in that, The substrate (100) is a semi-insulating or conductive semiconductor material, and the material of the substrate (100) is Si, Ge, SiC, GaN, AlN, InP or sapphire.

3. A lateral PIN photodetector based on surface plasmon resonance enhancement according to claim 1, characterized in that, The plasmon array (108) includes multiple periodically arranged metal grating units, with a period of 0.3 to 0.8 μm between adjacent metal grating units.

4. A lateral PIN photodetector based on surface plasmon resonance enhancement according to claim 3, characterized in that, The material of the metal grating unit is Au, Al, Cu or Ag.

5. A lateral PIN photodetector based on surface plasmon resonance enhancement according to claim 3, characterized in that, The shape of the metal grating unit is rectangular, cylindrical, spherical, trapezoidal, or stepped.

6. A lateral PIN photodetector based on surface plasmon resonance enhancement according to claim 1, characterized in that, The thickness of the plasmon array is 50–250 nm.

7. A lateral PIN photodetector based on surface plasmon resonance enhancement according to claim 1, characterized in that, The back reflective coating (101) is a single-layer SiO film or a three-layer Bragg reflector; when the back reflective coating (101) is a single-layer SiO film, its thickness is 180-200 nm; when the back reflective coating (101) is a three-layer Bragg reflector, its total thickness is 300-350 nm.

8. A lateral PIN photodetector based on surface plasmon resonance enhancement according to claim 1, characterized in that, The antireflective coating (109) is made of SiO2 or Si3N4, with a thickness of 120-180 nm and a reflectivity of ≤5% in the 600 nm / 940 nm band.

9. A lateral PIN photodetector based on surface plasmon resonance enhancement according to claim 1, characterized in that, The P+ region (103) was formed by boron ion implantation at a dose of 3.0 × 10⁻⁶. 14 ~4.0×10 14 cm -2 The injection energy is 30–40 keV, and the peak doping concentration is 3.5 × 10⁻⁶. 19 ~5.0×10 19 cm -3 The junction depth is 0.3–0.5 μm; the N+ region (105) is formed by phosphorus ion implantation at a dose of 0.8 × 10⁻⁶. 14 ~1.2×10 14 cm -2 The injection energy is 30–40 keV, and the peak doping concentration is 3.5 × 10⁻⁶. 19 ~5.0×10 19 cm -3 The junction depth is 0.3–0.5 μm.

10. A lateral PIN photodetector based on surface plasmon resonance enhancement according to claim 1, characterized in that, The thickness of the semiconductor device layer is 450-550 nm, and the width of the undoped intrinsic layer (104) is 800-1200 nm; the width of the P+ region (103) is the same as the width of the N+ region (105), which is 250-350 nm.

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