Implementation method and application of routing inductor

Abstract

The invention provides an implementation method and application of a routing inductor. The method is used for arranging the wiring inductor in the inner layer of the PCB to form the buried wiring inductor. The implementation method comprises the following steps: determining a required inductance value; the method comprises the following steps of: designing a routing inductor in each inner layer of a PCB according to a laminated structure, plate characteristics and an inductance value of the PCB; and connecting the wiring inductors in different inner layers to form buried layer wiring inductors with inductance values. The buried layer wiring inductor can provide electromagnetic shielding, reduce signal crosstalk and facilitate high integration.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of front-end design of radio frequency communication systems, and in particular to a realization method of a wiring inductance and application thereof. BACKGROUND

[0002] With the development of communication technology, a communication system needs to support multiple frequency bands at the same time to meet different application requirements and improve spectrum utilization. In this case, it is particularly important to combine electrical signals of different frequency bands.

[0003] In the related art, a communication device uses discrete capacitors and inductors to realize the combining function, which is difficult to construct a small and light communication device. SUMMARY

[0004] The present application provides a realization method of a wiring inductance and application thereof, which can provide electromagnetic shielding, reduce signal crosstalk, and facilitate high integration.

[0005] In a first aspect, the present application provides a realization method of a wiring inductance, comprising:

[0006] determining a required inductance value;

[0007] designing a wiring inductance in each inner layer of a PCB according to a layer structure, material properties and the inductance value of the PCB;

[0008] connecting the wiring inductances in different inner layers to form a buried wiring inductance with the inductance value.

[0009] In a possible implementation, designing a wiring inductance in each inner layer of a PCB according to a layer structure, material properties and a required inductance value of the PCB comprises:

[0010] determining a wiring width of each inner layer of the PCB that meets a characteristic impedance requirement according to the layer structure and the material properties of the PCB;

[0011] constructing a reference wiring inductance value corresponding to each inner layer according to the layer structure and the required inductance value;

[0012] for each inner layer, designing a wiring inductance in the inner layer according to the reference wiring inductance value corresponding to the inner layer and the wiring width.

[0013] In a possible implementation, determining a wiring width of each inner layer of a PCB that meets a characteristic impedance requirement according to a layer structure and material properties of the PCB comprises:

[0014] obtaining a material dielectric constant and a wiring thickness according to the material properties of the PCB;

[0015] According to the layer structure of the PCB, material medium layer thicknesses of each inner layer in the PCB are obtained;

[0016] For each inner layer, based on the material dielectric constant, the trace thickness and the material medium layer thickness of the inner layer, a trace width satisfying the characteristic impedance requirement is calculated by applying a trace theory formula.

[0017] In a possible implementation, according to the reference trace inductance value corresponding to the inner layer and the trace width, a trace inductance is designed in the inner layer, including:

[0018] According to the reference trace inductance value corresponding to the inner layer and the trace width, an inductance length and an inductance shape satisfying the reference trace inductance value corresponding to the inner layer are designed in the inner layer, to obtain the reference trace inductance corresponding to the inner layer, and to layout and distribute signal lines and ground lines;

[0019] Based on the reference trace inductance corresponding to the inner layer and the layout of the signal lines and the ground lines, signal loss is determined;

[0020] If the signal loss does not satisfy the signal loss requirement, the step of designing an inductance length and an inductance shape satisfying the reference trace inductance value corresponding to the inner layer according to the reference trace inductance value corresponding to the inner layer and the trace width is performed, or the signal lines and the ground lines are re-laid out and distributed;

[0021] If the signal loss satisfies the signal loss requirement, the trace inductance corresponding to the inner layer is obtained.

[0022] In a possible implementation, the trace inductances in different inner layers are connected to form a buried layer trace inductance with an inductance value, including:

[0023] The trace inductances in different inner layers are connected through a via on the PCB to form a buried layer trace inductance with an inductance value.

[0024] In a second aspect, the application provides an implementation device of a trace inductance, including:

[0025] A determination module is configured to determine a required inductance value;

[0026] A design module is configured to design a trace inductance in each inner layer of a PCB according to a layer structure of the PCB, a board material characteristic and the inductance value;

[0027] A connection module is configured to connect trace inductances in different inner layers to form a buried layer trace inductance with an inductance value.

[0028] In a possible implementation, the design module is specifically configured to:

[0029] According to the layer structure of the PCB and the board material characteristic, a trace width of each inner layer in the PCB satisfying a characteristic impedance requirement is determined;

[0030] According to the layer structure and the inductance value, a reference trace inductance value corresponding to each inner layer is configured;

[0031] According to the reference trace inductance value corresponding to each inner layer and the trace width, a trace inductance in the inner layer is designed.

[0032] In a possible implementation, the design module is further configured to: obtain a material dielectric constant and a trace thickness according to a board material characteristic of the PCB; obtain a material medium layer thickness of each inner layer in the PCB according to a layer structure of the PCB; and for each inner layer, calculate a trace width that meets a characteristic impedance requirement based on the material dielectric constant, the trace thickness, and the material medium layer thickness of the inner layer, by using a trace theoretical formula.

[0033] In a possible implementation, the design module is further configured to: design, according to the reference trace inductance value corresponding to each inner layer and the trace width, an inductance length and an inductance shape that meet the reference trace inductance value corresponding to the inner layer, to obtain a reference trace inductance corresponding to the inner layer, and to layout and distribute signal lines and ground lines; determine signal loss based on the reference trace inductance corresponding to the inner layer and the layout of the signal lines and the ground lines; if the signal loss does not meet a signal loss requirement, perform the step of designing, according to the reference trace inductance value corresponding to each inner layer and the trace width, an inductance length and an inductance shape that meet the reference trace inductance value corresponding to the inner layer, or re-layout and distribute the signal lines and the ground lines; and if the signal loss meets the signal loss requirement, obtain a trace inductance corresponding to the inner layer.

[0034] In a possible implementation, the connection module is specifically configured to: connect the trace inductances in different inner layers through a via on the PCB to form a buried layer trace inductance with the inductance value as described above.

[0035] In a third aspect, the present application provides a buried layer trace inductance, comprising: the buried layer trace inductance obtained by the first aspect and / or various possible implementations of the first aspect.

[0036] In a fourth aspect, the present application provides a combiner, comprising: the buried layer trace inductance obtained by the first aspect and / or various possible implementations of the first aspect, and a capacitor arranged on a surface of a PCB, the buried layer trace inductance being electrically connected to the capacitor.

[0037] In a fifth aspect, the present application provides a communication device, comprising: a signal source and the combiner obtained by the fourth aspect and / or various possible implementations of the fourth aspect. Wherein:

[0038] The signal source is configured to emit signals of multiple frequency bands;

[0039] The combiner is configured to combine the signals of the multiple frequency bands into one signal.

[0040] In a sixth aspect, the present application provides an electronic device, comprising: a memory, a processor;

[0041] The memory stores computer-executable instructions.

[0042] The processor executes the computer-executable instructions stored in the memory, so that the processor executes the first aspect and / or various possible implementation manners of the first aspect.

[0043] The implementation method and application of the trace inductance provided by the present application determine the required inductance value according to the actual requirement, design the trace inductance in the inner layer of the PCB according to the characteristics of the PCB and the inductance value, and form the buried trace inductance corresponding to the inductance value by connecting the trace inductances in different inner layers. Since the buried trace inductance utilizes the redundant space in the PCB to arrange the trace inductance, compared with arranging a separate inductance on the PCB, the overall space and cost can be saved, and the integration is higher. In addition, the electromagnetic shielding effect of the buried trace inductance is better, signal crosstalk is reduced, and better signal transmission quality can be provided. The buried trace inductance is applied to structures such as combiners, which can increase the design flexibility and facilitate high integration. The buried trace inductance can help and is easier to construct a small-sized and light-weight communication device. BRIEF DESCRIPTION OF DRAWINGS

[0044] The drawings of the embodiments herein are incorporated into the specification and form a part of the specification, show the embodiments consistent with the present application, and together with the specification serve to explain the principles of the present application.

[0045] Figure 1 Flowchart of the implementation method of the trace inductance provided by the embodiments of the present application Figure 1 ;

[0046] Figure 2 Flowchart of the implementation method of the trace inductance provided by the embodiments of the present application Figure 2 ;

[0047] Figure 3 Structure diagram of the implementation device of the trace inductance provided by the embodiments of the present application;

[0048] Figure 4 Structure diagram of the implementation device of the trace inductance provided by the embodiments of the present application;

[0049] Figure 5 Structure diagram of the combiner provided by the embodiments of the present application;

[0050] Figure 6 Structure diagram of the combiner provided by the embodiments of the present application;

[0051] Figure 7 Performance simulation result diagram of the combiner provided by the embodiments of the present application;

[0052] Figure 8 A structural schematic diagram of a communication device provided for an embodiment of the present application is shown in the following figure.

[0053] Figure 9 A structural schematic diagram of an electronic device provided for an embodiment of the present application is shown in the following figure.

[0054] The specific embodiments of the present application have been shown through the above figures, and will be described in more detail hereinafter. These figures and the written description are not intended to limit the scope of the present application in any way, but to illustrate the present application to those skilled in the art by referring to specific embodiments. DETAILED DESCRIPTION

[0055] The exemplary embodiments will be described in detail herein with reference to the attached drawings. The following description is made with reference to the accompanying drawings in which like reference numerals represent like elements, unless the context of use indicates otherwise. The following description of exemplary embodiments is not representative of all embodiments consistent with the present application. Rather, they are merely examples of apparatuses and methods consistent with some aspects of the present application as detailed in the appended claims.

[0056] First, the terms involved in the present application are explained:

[0057] The wire inductance is an inductance made of "wire inductance". The structure of the wire inductance is simple, mainly composed of wire winding and magnetic conductor. The wire inductance is widely used in circuits, which can filter out high-frequency noise, and can also be used as an element of power transformer or a current limiter to protect power supply. In the switching power supply and semiconductor industry, wire inductance has important applications, such as flyback switching power supply, boost, buck, flyback, exchange and other circuits.

[0058] Printed circuit board, also known as circuit board, is a support for connecting electronic components and circuits together, used to realize the layout design of complex circuits and electrical signal transmission in electrical and electronic equipment. The circuit board is a basic electronic device composed of multiple layers, including: one or more metal layers, plastic layers, insulating medium layers and control layers. These layers have perforations and / or plated conductors for connection and conduction. The function of the circuit board is to carry and play the function of the circuit system, provide fixed electrical connection points, effectively isolate continuity influence, reduce line length and interference, improve the noise immunity of the circuit, and simplify the circuit wiring and component layout process, and reduce design cost.

[0059] Combiner is an electronic device that can combine two or more signals. In a communication system, a combiner is usually used to combine signals from different antennas into one signal, thereby enhancing the sensitivity of the receiver and improving the quality of communication. The combiner uses phase adjustment technology to add different input signals and then outputs them to a main port. It separates and identifies the signals on each input port by destructive interference, ensuring the signal isolation of each port.

[0060] High-pass filter is a filter device that allows high-frequency signals to pass normally, while low-frequency signals below the set threshold are blocked or weakened. High-pass filtering is the opposite of low-pass filtering and is mainly used to eliminate low-frequency noise, also known as low-cut filter. A high-pass filter is composed of a combination of capacitors, inductors, and resistors, and its characteristics can be described in the time domain and frequency domain by impulse response and frequency response, respectively.

[0061] Low-pass filter is an electronic filter device that allows signals below the cutoff frequency to pass through, but signals above the cutoff frequency cannot pass through. It is commonly used in signal processing, data transmission, and interference suppression.

[0062] In related technologies, when the current flowing through the inductor changes, the magnetic field also changes. This change may cause the surrounding other circuits or devices to emit mutual interaction, resulting in electromagnetic interference problems in the process of electrical signal transmission. When multiple inductors are arranged adjacent to each other, the inductors will affect each other, resulting in signal crosstalk problems in the process of electrical signal transmission. Since the discrete inductors and / or combiners are relatively large in size, the communication device uses discrete capacitors and inductors to achieve the combiner function, making it difficult to build a small and lightweight communication device.

[0063] The implementation method of the wiring inductor provided in the present application uses the extra space in the PCB to arrange the wiring inductor. Compared with the discrete inductor installed on the PCB, it can save space and cost and has higher integration. By optimizing the layout and shape of the wiring inductor, the buried wiring inductor has better electromagnetic shielding effect during electrical signal transmission. By arranging the wiring inductor on different inner layers of the PCB, the signal crosstalk problem caused by the adjacent arrangement of inductors is solved, providing better signal transmission quality.

[0064] The technical solutions of the present application and how the technical solutions of the present application solve the above technical problems will be described in detail below with specific examples. The following specific examples can be combined with each other, and the same or similar concepts or processes may not be described again in some examples. The embodiments of the present application will be described below with reference to the accompanying drawings.

[0065] Figure 1 Flowchart of the implementation method of the wiring inductor provided in the embodiments of the present application Figure 1The embodiment of the present application provides a realization method of a wiring inductance, which is used for arranging a wiring inductance in an inner layer of a PCB to form a buried wiring inductance, as shown in the following figure. Figure 1 The realization method comprises the following steps.

[0066] S101, determining a required inductance value.

[0067] The inductance value, also known as inductance, is an important parameter for describing inductance performance. Inductance is an electronic component that can store electrical energy and release energy in the form of a magnetic field. When current passes through the inductance, a magnetic field is generated inside the inductance, which hinders the change of current, that is, the inductance has a resistance to the change of current. This property is called inductance. The size of the inductance value determines the strength of the resistance of the inductance to the change of current. In a filter circuit, the main function of the inductance is to prevent high-frequency signals from passing through and allow low-frequency signals to pass through. Therefore, when high-frequency noise needs to be filtered out, a larger inductance value may provide better filtering effect, while an excessively large inductance value may have a negative impact on reducing the corresponding speed, so it is necessary to balance the filtering effect and the passband width.

[0068] In this step, the size of the required inductance value is determined according to the actual requirement.

[0069] In one possible implementation, the size of the inductance value of the inductance L9, the inductance L10, the inductance L12 and the inductance L13 required by two filters with working frequency bands of 600-960MHz and 1710-5000MHz respectively is determined. First, the required inductance value is calculated according to the filter index, wherein the filter index can include: bandwidth, insertion loss and / or out-of-band rejection; the calculation method can use the design formula of the filter or the software tool. Then, simulation verification is performed to calculate whether the filter response curve of the corresponding inductance value meets the requirement; in this process, different inductance values can be tried, and non-ideal factors in the actual circuit are considered; wherein the circuit simulation software can be used to calculate the filter response curve of the corresponding inductance value, and the inductance value is adaptively adjusted according to the filter response curve. Finally, the appropriate inductance values of the inductance L9, the inductance L10, the inductance L12 and the inductance L13 are obtained as 5.0nH, 2.0nH, 6.8nH and 2.0nH respectively.

[0070] S102, designing a wiring inductance in each inner layer of the PCB according to the layer structure of the PCB, the characteristics of the board material and the inductance value.

[0071] The layer structure of the PCB refers to the layer design of the circuit board, which is formed by stacking multiple single-layer boards and double-layer boards through precise processes. This layer structure design can increase the signal transmission quality and reliability of the PCB, while realizing high-density assembly, which is beneficial to reducing the volume and weight of electronic products. In the layer structure of the PCB, it usually includes: top layer, bottom layer and inner layer. Among them:

[0072] The top layer refers to the topmost layer of the PCB board, which contains the mounting position of electronic components, wiring path and pad information, and is the layer directly contacted with the outside world.

[0073] The bottom layer refers to the bottommost layer of the PCB board, which usually contains the layout of the circuit board ground, ground plane and other signal lines, and provides the grounding and shielding function of the circuit.

[0074] The inner layer refers to the layer between the top layer and the bottom layer. Multi-layer PCBs may contain multiple inner layers, which are used to conduct signals and power supply, realize complex circuit networks and cross-layer circuit connectivity.

[0075] In addition, the PCB may also contain other auxiliary layers. Such as pad layer, solder mask layer, silk screen layer, etc. for providing additional protection and identification function. PCB board material as a commonly used basic material in electronic products, its characteristic parameters have important influence on the stability, reliability of the circuit and the performance of the electronic product. Main characteristics include: thermal expansion coefficient, glass transition temperature, material dielectric constant, temperature resistance, flammability, thermal conductivity, trace thickness and mechanical properties.

[0076] Due to the problems of trace length limit and trace spacing influence, the trace inductance arranged only on the single layer of the PCB may not form the required inductance value; and wiring on the multi-layer circuit board can avoid interference between different signals, improve the anti-electromagnetic interference ability, and also can utilize the spare space of different layers to improve the space resource utilization. Therefore, in this step, the internal space of the PCB is utilized, and the trace inductance corresponding to the required inductance value is arranged in each inner layer according to the layer structure and material characteristics of the PCB. The inductance value of the trace inductance corresponding to each inner layer can be obtained through PCB software simulation.

[0077] Optionally, the inner layer in which the trace inductance is designed can be any inner layer or at least two inner layers of the PCB, which is determined according to the required inductance value.

[0078] Optionally, the inductance values of the trace inductance corresponding to different inner layers can be the same or different; further, the inductance shapes of the trace inductance corresponding to different inner layers can be the same or different, which can be determined according to the layer structure and / or material characteristics of the PCB, etc.

[0079] S103, connecting the trace inductance in different inner layers to form a buried trace inductance with an inductance value.

[0080] In this step, the traces of each inner layer are electrically connected to obtain the buried trace inductance with the required inductance value.

[0081] The implementation method of the trace inductance provided by the embodiments of the present application obtains the required inductance value, and designs the trace inductance in different inner layers according to the layer structure of the PCB, and connects the trace inductances in different inner layers to form the buried trace inductance with the required inductance value. Since the buried trace inductance utilizes the excess space in the PCB to arrange the trace inductance, compared with arranging a separate inductance on the PCB, it can provide electromagnetic shielding and efficient use of space resources, has higher integration, and can provide better signal transmission quality. The buried trace inductance can be applied to structures such as combiners, which can increase the flexibility of design and facilitate high integration. The buried trace inductance can help and is easier to build a small and light communication device.

[0082] Figure 2 Flowchart of the implementation method of the trace inductance provided by the embodiments of the present application Figure 2 As shown in Figure 2 , the embodiments of the present application are based on Figure 1 the embodiments, and for step S102, designing the trace inductance in each inner layer of the PCB according to the layer structure of the PCB, the board material characteristics and the inductance value, can further include:

[0083] S201, determining the trace width of each inner layer of the PCB that meets the characteristic impedance requirement according to the layer structure of the PCB and the board material characteristics.

[0084] Optionally, this step can further include:

[0085] S2011, obtaining the material dielectric constant and the trace thickness according to the board material characteristics of the PCB.

[0086] The material dielectric constant refers to the measurement of the capacitance performance of the insulating material used in the PCB in the electric field relative to the vacuum or air, which reflects the response ability of the material to the electric field, and the insulating material includes glass fiber reinforced resin. The dielectric constant is also called relative dielectric constant or relative permittivity, usually represented by εr or κ. The trace thickness refers to the thickness of the conductor or trace on the PCB, that is, the thickness of the copper foil on the PCB. The trace thickness has a significant impact on the resistance, signal transmission rate, reliability, etc. of the circuit board; the greater the trace thickness, the smaller the resistance, and the faster the signal transmission rate. The trace thickness is usually expressed in terms of the thickness of the copper foil per unit length, and the commonly used units include mils or millimeters, where 1 mil = 0.001 inch.

[0087] In this step, the material dielectric constant can be obtained by consulting the PCB specification and / or data sheet, or by standard test methods such as resonant cavity method, transmission line method, back calculation method, etc. The trace thickness can be obtained from the PCB specification, or from the data explicitly marked in the PCB design file, or by actual measurement.

[0088] S2012, according to the layer structure of the PCB, the material medium layer thickness of each inner layer of the PCB is obtained.

[0089] The material medium layer thickness generally refers to the thickness of the glass fiber cloth or other special material used to cover the two surfaces of the circuit board during PCB manufacturing.

[0090] In this step, the material medium layer thickness of each inner layer of the PCB is obtained from the PCB specification and / or the data explicitly marked in the PCB design file.

[0091] S2013, for each inner layer, based on the material dielectric constant, the trace thickness and the material medium layer thickness of the inner layer, the trace width satisfying the characteristic impedance requirement is calculated by applying the trace theory formula.

[0092] Characteristic impedance refers to the ratio between current and voltage on a transmission line, indicating the relationship between current and voltage on a transmission line. The requirement of characteristic impedance needs to be determined according to the specific design requirements to ensure the stability and reliability of signal transmission. In high-speed, high-frequency circuit design, matching of characteristic impedance can ensure the integrity of the signal and reduce signal reflection.

[0093] In this step, based on the material dielectric constant Er, the trace thickness T, the characteristic impedance requirement Zo and the material medium layer thickness H of the inner layer, the trace width is obtained by the following trace theory formula:

[0094]

[0095] Where W is the trace width; the characteristic impedance requirement Zo is generally 50Ω, and can also be set to other values according to actual needs. In this trace theory formula, only the trace width W is unknown, and the corresponding value of W can be obtained by calculation.

[0096] Alternatively, the relevant PCB software can also be used to calculate the trace width in engineering, such as using PolarSI9000 to determine the trace width W value satisfying the characteristic impedance requirement by inputting the layer structure and the required related parameters.

[0097] S202, according to the layer structure and inductance value, the reference trace inductance value corresponding to each inner layer is constructed.

[0098] In this step, according to the obtained layer structure and inductance value, the reference trace inductance value corresponding to each inner layer is constructed. The reference trace inductance value describes the distribution of inductance value in each layer, and the required inductance value can be formed by integrating the trace inductance value of one layer and / or multiple layers.

[0099] S203, for each inner layer, according to the reference trace inductance value corresponding to the inner layer and the trace width, designing the trace inductance in the inner layer.

[0100] Considering the difference between the PCB layers, the trace inductance of any inner layer and / or at least two inner layers in the PCB is set according to the corresponding reference trace inductance value and the trace width, that is, the trace inductance can be set in any inner layer, or the trace inductance can be set in at least two inner layers, which is determined according to the actual demand.

[0101] Optionally, step S203 can include:

[0102] S2031, according to the reference trace inductance value corresponding to the inner layer and the trace width, designing the inductance length and inductance shape that meet the reference trace inductance value corresponding to the inner layer in the inner layer, obtaining the reference trace inductance corresponding to the inner layer, and distributing and allocating the signal line and the ground line.

[0103] The PCB signal line is a metal conductor on the printed circuit board for transmitting electrical signals, carrying various signals in the circuit, including but not limited to power signals, control signals and data signals, etc. The PCB ground line is an important element in the electronic circuit board, which provides a return path for current and eliminates interference. The ground line is connected to the negative pole of the power supply in the circuit, and plays the role of connecting electronic components, conductive wires and external devices.

[0104] In this step, according to the reference trace inductance value and the calculated trace width, the inductance length and inductance shape that meet the corresponding reference trace inductance value are designed in the inner layer, and the reference trace inductance corresponding to the inner layer is obtained, wherein the inductance shape includes the trace shape, the trace spacing and the trace winding mode. At the same time, the appropriate signal line and ground line distribution for the PCB board is determined.

[0105] S2032, based on the reference trace inductance corresponding to the inner layer and the layout of the signal line and the ground line, determining the signal loss.

[0106] Signal loss is the attenuation, distortion and crosstalk of signals in the transmission process, and the layout of PCB trace inductance will affect the transmission of electrical signals or cause electromagnetic interference. In order to reduce the influence on the transmission of electrical signals or electromagnetic interference as much as possible, it is necessary to optimize the PCB trace inductance through signal loss.

[0107] In this step, the reference trace inductance and the signal lines and ground lines of the layout are introduced into the PCB, the signal attenuation, distortion and crosstalk are obtained through simulation calculation and / or testing, and the signal loss is determined.

[0108] In S2033, it is determined whether the signal loss meets the signal loss requirement.

[0109] If the signal loss does not meet the signal loss requirement, i.e., no, return to perform S2031 to re-perform the step of designing the inductance length and inductance shape of the trace inductance that meets the reference trace inductance value corresponding to the inner layer according to the reference trace inductance value corresponding to the inner layer and the trace width, or re-distributing the signal lines and ground lines. By re-distributing and adjusting the trace inductance, the signal transmission quality in actual use can be improved.

[0110] If the signal loss meets the signal loss requirement, i.e., yes, the process is ended, and the trace inductance corresponding to the inner layer is obtained.

[0111] The trace inductance corresponding to the inner layer can be obtained through the above steps.

[0112] In this step, the trace inductance that forms the inductance value can be located in the same layer or different layers in the PCB. For the trace inductance located in different layers, it is necessary to connect them into a whole through electrical connection to form the buried trace inductance of the required inductance value.

[0113] Optionally, connecting the trace inductance in different inner layers to form the buried trace inductance of the inductance value can include: connecting the trace inductance in different inner layers through a via on the PCB to form the buried trace inductance of the inductance value. Through the via between different layers, the electrical connection of the trace inductance in different inner layers can be realized, thereby forming the buried trace inductance of the inductance value.

[0114] The trace inductance implementation method provided by the embodiment of the application can realize the effects of reducing signal crosstalk, providing electromagnetic shielding and reducing space waste by using the excess space in the PCB to arrange the buried trace inductance and by optimizing the layout and shape of the trace inductance.

[0115] Figure 3 The structure of the trace inductance implementation device provided by the embodiment of the application is shown in the figure. The embodiment of the application provides a trace inductance implementation device for arranging the trace inductance in the inner layer of the PCB to form the buried trace inductance. As shown in the figure, Figure 3 The trace inductance implementation device 30 includes:

[0116] The determination module 301 is configured to determine the required inductance value.

[0117] The design module 302 is configured to design the trace inductance in each inner layer of the PCB according to the layer structure of the PCB, the material characteristics of the PCB, and the inductance value.

[0118] The connection module 303 is configured to connect the trace inductance in different inner layers to form the buried layer trace inductance of the inductance value.

[0119] In a possible implementation, the design module 302 is specifically configured to:

[0120] determine the trace width of each inner layer of the PCB that meets the characteristic impedance requirement according to the layer structure of the PCB and the material characteristics of the PCB;

[0121] construct the reference trace inductance value corresponding to each inner layer according to the layer structure and the inductance value;

[0122] design the trace inductance in each inner layer according to the reference trace inductance value corresponding to the inner layer and the trace width of the inner layer.

[0123] In a possible implementation, the design module 302 is further configured to: obtain the material dielectric constant and the trace thickness according to the material characteristics of the PCB; obtain the material dielectric layer thickness of each inner layer of the PCB according to the layer structure of the PCB; and for each inner layer, calculate the trace width that meets the characteristic impedance requirement based on the material dielectric constant, the trace thickness, and the material dielectric layer thickness of the inner layer by using a trace theoretical formula.

[0124] In a possible implementation, the design module 302 is further configured to: design the inductance length and the inductance shape that meet the reference trace inductance value corresponding to the inner layer according to the reference trace inductance value corresponding to the inner layer and the trace width of the inner layer, obtain the reference trace inductance corresponding to the inner layer, and layout and distribute the signal line and the ground line; determine the signal loss based on the reference trace inductance corresponding to the inner layer and the layout of the signal line and the ground line; if the signal loss does not meet the signal loss requirement, perform the step of designing the inductance length and the inductance shape that meet the reference trace inductance value corresponding to the inner layer according to the reference trace inductance value corresponding to the inner layer and the trace width of the inner layer, or re-layout and distribute the signal line and the ground line; and if the signal loss meets the signal loss requirement, obtain the trace inductance corresponding to the inner layer.

[0125] In a possible implementation, the connection module 303 is specifically configured to: connect the trace inductance in different inner layers by using a via on the PCB to form the buried layer trace inductance of the inductance value.

[0126] The trace inductance implementation device provided in this embodiment can perform the method provided in the method embodiments, and has similar implementation principles and technical effects, which will not be described here in detail.

[0127] Figure 4The buried layer wiring inductance provided by the embodiment of the present application is shown in the schematic diagram of the implementation structure of the board. Figure 4 The buried layer wiring inductance provided by the embodiment of the present application can be obtained by the method provided by the above embodiment. The implementation method of the wiring inductance of the inductance L9, the inductance L10, the inductance L12 and the inductance L13 in different inner layers exemplified in the above embodiment is described in detail, wherein:

[0128] The via holes include via holes 401-414, wherein the via holes 402, 404, 406, 407, 408, 409, 410, 412 and 413 are via holes between the top layer of the PCB and one layer, and the via holes 401, 403, 405, 414 and 411 are via holes between one layer and two layers of the PCB board.

[0129] The wiring inductance includes wiring inductance 420-429. By connecting the wiring inductance of different layers, the obtained buried layer wiring inductance can meet the required inductance value.

[0130] For the inductance L9, the corresponding buried layer wiring inductance includes the wiring inductance 420 and the wiring inductance 425, wherein the wiring inductance 420 is connected with the wiring inductance 425 through the via hole 401, and the wiring inductance 425 is located in the second layer.

[0131] For the inductance L10, the corresponding buried layer wiring inductance includes the wiring inductance 423, the wiring inductance 427 and the wiring inductance 429, wherein the wiring inductance 423 is connected with the wiring inductance 427 through the via hole 414, and the wiring inductance 427 is connected with the wiring inductance 429 through the via hole 405. It can be seen that the wiring inductance connected between the via holes 413 and 404 is the buried layer wiring inductance corresponding to the inductance L10.

[0132] For the inductance L12, the corresponding buried layer wiring inductance includes the wiring inductance 424 and the wiring inductance 428, wherein the wiring inductance 424 is connected with the wiring inductance 428 through the via hole 403. It can be seen that the wiring inductance connected between the via holes 404 and 402 is the buried layer wiring inductance corresponding to the inductance L10.

[0133] For the inductance L13, the corresponding buried layer wiring inductance includes the wiring inductance 422 and the wiring inductance 426, wherein the wiring inductance 422 is connected with the wiring inductance 426 through the via hole 411.

[0134] The buried layer wiring inductance provided by the embodiment of the present application is realized by the method provided by the above wiring inductance implementation device, and its implementation principle and technical effects are similar. This embodiment will not be described here.

[0135] Figure 5The structure schematic diagram of the combiner provided by the embodiment of the present application is shown in the figure. Figure 5 As shown in the figure, the combiner provided by the embodiment of the present application comprises the buried trace inductance obtained by the method provided by the above method embodiment and the capacitor arranged on the surface of the PCB, and the buried trace inductance is electrically connected with the capacitor.

[0136] Port 1 is the output end of the combiner, and the combined signal is output through port 1; the circuit connected between port 3 and port 1 is a low-pass filter, which allows low-frequency signals to pass through while preventing high-frequency signals from passing through. The circuit between port 2 and port 1 is a high-pass filter, which allows high-frequency signals to pass through while preventing low-frequency signals from passing through.

[0137] In a possible implementation manner, the combiner function of f1 and f2 frequency bands is implemented, wherein f1 frequency band is 600-960MHz, and f2 frequency band is 1710-5000MHz. The combiner of discrete inductance / capacitance devices is designed through derivation and software optimization, and the discrete inductance therein is replaced by buried trace inductance. As shown in the figure. Figure 6 Among them, C6, C7, C8 and C9 represent capacitors; the capacitance corresponding to C6 is 2.7pF, the capacitance corresponding to C7 is 3.9pF, the capacitance corresponding to C8 is 2.0pF, and the capacitance corresponding to C9 is 4.7pF; L9, L10, L12 and L13 represent the buried trace inductance corresponding to the inductance.

[0138] Through the electrical connection of the capacitor C6 and the inductance L10, L12 and L13 as shown in the figure, a low-frequency filter capable of allowing the f1 frequency band transmitted by port 3 to pass through is formed; through the electrical connection of the capacitors C7, C8 and C9 and the inductance L9 as shown in the figure, a high-frequency filter capable of allowing the f2 frequency band transmitted by port 2 to pass through is formed; the electrical signals output by the low-frequency filter and the high-frequency filter are combined and output from port 1.

[0139] Figure 6 The on-board implementation schematic diagram of the combiner provided by the embodiment of the present application is shown in the figure. Figure 6 As shown in the figure, the position of the buried inductance in the combiner is explained in detail, the combiner 60 provided by the embodiment of the present application comprises capacitors C6-C8, vias 401-414 and trace inductances 420-429. The connection combination of the vias 401-414 and the trace inductances 420-429 can constitute the buried trace inductance corresponding to the inductances L9, L10, L12 and L13, which are described in detail in the embodiment of the present application Figure 4 and will not be described here again.

[0140] For the circuit between port 1 and port 3: firstly, the inductor L12 is connected to port 1 through via 413, and then connected to port 3 through via 402, realizing the series connection between port 1 and port 3; secondly, for the circuit between inductor L12 and inductor L10, the inductor L12 is connected to capacitor C6 through via 404, and then connected to inductor L13 through via 406; as can be seen from the figure, the corresponding trace inductance 426 in the buried trace inductance in inductor L13 is grounded.

[0141] For the circuit between port 1 and port 2: for the series circuit between port 1 and port 2, firstly, capacitor C8 is connected to port 1 through via 413, and then connected to trace inductance 421 through via 412. Then the trace inductance 421 is connected to capacitor C7 through via 409, and then connected to port 2 through capacitor C7 and via 410. For the circuit between capacitor C8 and capacitor C9, capacitor C8 is connected to capacitor C9 through via 407, and then connected to inductor L9 through via 408; as can be seen from the figure, the corresponding trace inductance 425 in the buried trace inductance in inductor L9 is grounded.

[0142] The combiner provided by the embodiment realizes the implementation of the above-mentioned capacitors and buried trace inductors and the method provided by the combiner.

[0143] In order to show the transmission characteristics and quality of the combiner using buried inductors in the transmission process in detail, the embodiment of the present application further provides Figure 7 , Figure 7 The performance simulation result diagram of the combiner provided by the embodiment of the present application is shown, which shows the reverse transmission characteristics of the combiner at different frequencies. Two key points M1 and M2 are mainly involved.

[0144] For M1, the transmitted signal is 1.710 GHz. Among them:

[0145] dB(S(1,2))=-0.418dB represents that the reverse transmission attenuation of the signal from port 1 to port 2 is-0.418dB; it is shown that at the frequency of 1.710 GHz, the reverse transmission attenuation of the signal from port 1 to port 2 is very small, and it can be considered that the signal is transmitted without attenuation.

[0146] dB(S(1,3))=-31.144dB represents that the reverse transmission attenuation of the signal from port 1 to port 3 is-31.144dB; it is shown that at the frequency of 1.710 GHz, the reverse transmission attenuation of the signal from port 1 to port 3 is relatively large, which indicates that the signal experiences a large attenuation when transmitted to port 3.

[0147] For M2, the transmitted signal is 960.0 MHz. Among them:

[0148] dB(S(1, 2)) = -41.059dB, which means that the reverse transmission attenuation of the signal from port 1 to port 2 is -41.059dB; it is indicated that the reverse transmission attenuation of the signal from port 1 to port 2 is relatively large at the frequency of 960.0MHz, which means that the signal experiences a large attenuation when being transmitted to port 2.

[0149] dB(S(1, 3)) = -0.811dB, which means that the reverse transmission attenuation of the signal from port 1 to port 3 is -0.811dB; it is indicated that the reverse transmission attenuation of the signal from port 1 to port 3 is very small at the frequency of 960.0MHz, and it can be considered that the signal is transmitted without attenuation.

[0150] Figure 8 A structural schematic diagram of a communication apparatus provided by an embodiment of the present application is shown in FIG. 8. As shown in FIG. 8, the communication apparatus 80 provided by the embodiment of the present application comprises: Figure 8

[0151] a signal source 801 configured to send signals of multiple frequency bands;

[0152] a combiner 802 configured to combine the signals of the multiple frequency bands into one signal.

[0153] Optionally, the signal source 801 and the combiner 802 are connected through electricity, and the combiner 802 receives the signals of the multiple frequency bands sent by the signal source 801 and combines them into one signal output.

[0154] Figure 9 A structural schematic diagram of an electronic device provided by an embodiment of the present application is shown in FIG. 9. As shown in FIG. 9, the electronic device 90 provided by the embodiment of the present application comprises at least one processor 901 and a memory 902. Optionally, the device 90 further comprises a communication component 903. Wherein, the processor 901, the memory 902 and the communication component 903 are connected through a bus 904. Figure 9

[0155] In the specific implementation process, the at least one processor 901 executes the computer execution instructions stored in the memory 902, so that the at least one processor 901 executes the above-mentioned method.

[0156] The specific implementation process of the processor 901 can refer to the above-mentioned method embodiments, which have similar implementation principles and technical effects, and will not be described here in detail.

[0157] ​​In the above embodiments, it should be understood that the processor can be a central processing unit (CPU), and can also be other general-purpose processors, digital signal processors (DSP), application specific integrated circuits (ASIC), etc. The general-purpose processor can be a microprocessor or the processor can also be any conventional processor. The steps of the method disclosed in combination with the application can be directly embodied as hardware processor execution, or executed by a combination of hardware and software modules in the processor.

[0158] The memory can include a random access memory (RAM), and can also include a non-volatile memory (NVM), such as at least one disk memory.

[0159] The bus can be an industry standard architecture (ISA) bus, a peripheral component (PCI) bus, an extended industry standard architecture (EISA) bus, etc. The bus can be divided into an address bus, a data bus, a control bus, etc. For ease of representation, the bus in the drawings of the present application does not limit to only one bus or one type of bus.

[0160] Finally, it should be noted that: other embodiments of the application will be readily apparent to those skilled in the art in view of the description and practice of the application disclosed herein. The application is intended to cover any variations, uses or adaptive changes of the application that follow the general principles of the application and include common knowledge or conventional technical means in the art that are not disclosed in the application, and are not limited to the precise structure described above and shown in the drawings, and various modifications and changes can be made without departing from the scope thereof. The scope of the application is only limited by the appended claims.

Claims

1. A method for implementing trace inductance, characterized in that, The method for laying buried layer trace inductance in the inner layer of a printed circuit board (PCB) includes: Determine the required inductance value; Based on the PCB's layer stack-up structure, board material characteristics, and inductance value, routing inductance is designed in each inner layer of the PCB. By connecting the trace inductors in different inner layers, a buried trace inductor with the stated inductance value is formed.

2. The implementation method according to claim 1, characterized in that, The step of designing trace inductance in each inner layer of the PCB based on the PCB's layer stack-up structure, board material characteristics, and inductance value includes: Based on the PCB's layer stack-up structure and board material characteristics, determine the trace width of each inner layer in the PCB that meets the characteristic impedance requirements; Based on the layered structure and inductance values, construct the reference trace inductance values ​​corresponding to each inner layer; For each inner layer, the trace inductance is designed in the inner layer according to the reference trace inductance value and trace width.

3. The method according to claim 2, characterized in that, The step of determining the trace width of each inner layer in the PCB that meets the characteristic impedance requirements based on the PCB's layer stack-up structure and board material characteristics includes: Based on the board material characteristics of the PCB, the dielectric constant of the material and the trace thickness are obtained; Based on the PCB's layer stack-up structure, the material dielectric layer thickness of each inner layer in the PCB is obtained; For each inner layer, based on the dielectric constant of the material, the trace thickness, and the dielectric layer thickness of the inner layer, the trace width that meets the characteristic impedance requirements is calculated using trace theory formulas.

4. The method according to claim 2, characterized in that, The step of designing the trace inductance in the inner layer based on the reference trace inductance value and trace width includes: Based on the reference trace inductance value and trace width of the inner layer, design the inductor length and inductor shape in the inner layer to meet the reference trace inductance value of the inner layer, obtain the reference trace inductance of the inner layer, and lay out and allocate signal lines and ground lines. Based on the reference trace inductance and the layout of signal and ground lines in the inner layer, determine the signal loss; If the signal loss does not meet the signal loss requirements, perform the following steps: design the inductor length and inductor shape in the inner layer according to the reference trace inductance value and trace width of the inner layer, and then rearrange and redistribute the signal lines and ground lines. If the signal loss meets the signal loss requirements, the corresponding trace inductance of the inner layer is obtained.

5. The method according to any one of claims 1 to 4, characterized in that, The buried trace inductance that connects the traces in different inner layers to form the inductance value includes: By connecting the trace inductors in different inner layers through vias on the PCB, buried trace inductors with the specified inductance value are formed.

6. A device for implementing trace inductance, characterized in that, The apparatus for forming buried layer trace inductance by laying trace inductance in the inner layer of a printed circuit board (PCB) includes: The determination module is used to determine the required inductance value; The design module is used to design trace inductance in each inner layer of the PCB based on the PCB's layer stack-up structure, board material characteristics, and inductance value. A connection module is used to connect the trace inductors in different inner layers to form a buried trace inductor with the inductance value.

7. A buried trace inductor, characterized in that, The buried trace inductance is obtained by any one of claims 1 to 5.

8. A combiner, characterized in that, include: The buried trace inductor obtained by any one of claims 1 to 5, and the capacitor mounted on the PCB surface, wherein the buried trace inductor is electrically connected to the capacitor.

9. A communication device, characterized in that, include: The signal source and the combiner as described in claim 8, wherein: The signal source is used to emit signals in multiple frequency bands; The combiner is used to combine signals from the multiple frequency bands into a single signal.

10. An electronic device, characterized in that, include: Memory, processor; The memory stores computer-executed instructions; The processor executes the computer execution instructions, causing the processor to perform the method as described in any one of claims 1 to 5.

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