Method and device for accelerating memory access in chip verification platform
By generating an initreg_random_value.txt file and automatically concatenating absolute memory paths in the chip verification platform, the problem of long memory access paths is solved, enabling efficient memory access and automated maintenance, and improving the quality and efficiency of chip verification.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- JIANGSU HUACHUANG MICROSYSTEM CO LTD
- Filing Date
- 2025-12-25
- Publication Date
- 2026-04-10
AI Technical Summary
In existing technologies, the memory access path is long, which leads to excessively long chip verification process and reduced efficiency as the memory scale increases. Conventional methods are difficult to automate the maintenance of the absolute memory path, which consumes a lot of manpower.
By generating an initreg_random_value.txt file during chip simulation, the absolute path of the memory is automatically extracted and combined with the memory design document to automatically concatenate the path and generate access functions, thus realizing the automated maintenance of the absolute path.
It speeds up memory access efficiency, avoids vulnerabilities caused by incomplete verification, improves verification quality and efficiency, reduces maintenance costs, and enhances the reusability and portability of the verification platform.
Smart Images
Figure CN121835541A_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the field of chip verification platform, and in particular to a method and device for accelerating memory access in a chip verification platform. BACKGROUND
[0002] With the continuous progress of integrated circuit technology, the complexity of chip design has increased significantly, especially in the fields of high-performance processors, SOC and artificial intelligence chips. The increase in chip complexity has also brought a significant increase in the size and access requirements of memory (memory), which has also posed new challenges to the interaction efficiency of memory in the chip verification process. The conventional memory access method is generally to issue an access instruction through the CPU core, and the instruction is transmitted to the memory controller through the bus, and finally the controller realizes the access operation of the memory simulation model. Although this conventional memory access method is closest to the actual access process of the chip, the access path is long and a lot of simulation time is required. Moreover, when the memory size gradually increases, the efficiency of the conventional memory access method will be significantly reduced. To solve this problem, an absolute path access method is introduced. However, the absolute path of the memory needs to be manually arranged and is closely related to the verification platform and design. Once there is a change, it needs to be re-maintained, which requires a lot of manpower. Therefore, how to realize the automatic maintenance of the absolute path of the memory, meet the demand of accelerating memory access, and improve the efficiency and quality of chip verification has become a technical problem to be solved. SUMMARY
[0003] To solve the existing technical problems, the present application provides a method and device for accelerating memory access in a chip verification platform.
[0004] The specific content of the present application is as follows: a method for accelerating memory access in a chip verification platform, opening the initreg option during chip simulation, automatically outputting the initreg_random_value.txt file after simulation is completed, initreg assigning initial values to all registers and memories in the simulation environment at time 0 by default, and outputting all paths and corresponding initial values to the initreg_random_value.txt file, the path extraction script extracting the required memory absolute path from the initreg_random_value.txt file, and accelerating memory access.
[0005] Further, when accessing the memory, the script inputs the required module instance name, automatically matches the path according to the instance name, extracts the required path from the matching result, and realizes the automatic maintenance of the absolute path.
[0006] Further, if the memory depth or width is too large, the memory can be spliced in combination with the size of the memory bank used, and the splicing rule is provided by the memory design document. The script inputs the design document and automatically splices the memory according to the splicing rule, and finally outputs the complete memory absolute path and access function.
[0007] Further, the specific extraction process of the spliced memory absolute path and access function includes: the absolute path is extracted by the path extraction script, the access function is generated by the access function generation script, and the subsequent verification platform directly accesses the memory by calling the access function.
[0008] Further, when there is a design change, the initreg_random_value.txt file and the memory design document need to be provided again, and the script automatically maintains the memory absolute path.
[0009] The application also provides a device for accelerating memory access in a chip verification platform, comprising a processor and a computer program storage memory, and the processor realizes the method for accelerating memory access in the chip verification platform when executing the computer program.
[0010] The application accelerates the memory access efficiency through absolute path access. Compared with the conventional single path verification, a new access path is added, which can avoid some undiscovered vulnerabilities caused by incomplete verification and improve the verification quality. BRIEF DESCRIPTION OF DRAWINGS
[0011] The application will be further clarified in combination with the drawings.
[0012] Figure 1 The generation process of the initreg_random_value.txt file;
[0013] Figure 2 The working process of the path extraction module;
[0014] Figure 3 The working process of the access function generation module;
[0015] Figure 4 The splicing mode of the memory;
[0016] Figure 5 The specific extraction process of the memory absolute path and access function of the 4 bank depth splicing. DETAILED DESCRIPTION
[0017] In combination withFigures 1-5 The application provides a method for accelerating memory access in a chip verification platform. The method realizes accelerated memory access through a memory absolute path access method.
[0018] The memory absolute path is extracted from an initreg_random_value.txt file output by chip simulation. In the process of chip simulation, the initreg option is opened, and the initreg_random_value.txt file can be automatically output after the simulation is completed. The function of initreg is to assign initial values to all registers and memories in the simulation environment at 0 time by default, and output all paths and corresponding initial values to the initreg_random_value.txt file. Therefore, the required memory absolute path can be extracted from the initreg_random_value.txt file through an automated script. The script inputs the required module instance name, and the script automatically performs path matching according to the instance name, extracts the required path from the matching result, and thus realizes automatic maintenance of the absolute path. In chip design, if the memory depth or width is too large, the memory is generally spliced in combination with the size of the used memory library. The specific splicing rule can be provided by the memory design document, the script inputs the design document, and the memory is automatically spliced according to the splicing rule, and finally the complete memory absolute path and access function are output. By calling the access function, the verification platform can realize fast memory access and improve verification efficiency. When there is a design change, only the initreg_random_value.txt file and the memory design document need to be provided again, and the script can automatically maintain the memory absolute path. Thus, a large amount of repetitive work is reduced, and errors that may occur in manual maintenance are avoided.
[0019] Figure 1 A generation process of an initreg_random_value.txt file is shown. Taking a VCS verification platform as an example, the vcs_initreg_random_value.txt file is obtained by opening the initreg option, and the file contains the absolute path of the memory. Figure 2 A working process of a path extraction module is shown. Figure 3 A working process of an access function generation module is shown. Figure 4A memory splicing mode is shown, such as a memory depth of 4096 and a width of 32 bits, while the standard unit of the memory is 1024 in depth and 32 bits in width, so that 4 standard memory units (4 banks) are required to splice in depth during design. Figure 5 The absolute path and access function of the 4-bank depth spliced memory are shown, the absolute path is extracted by a path extraction script, and the access function is generated by a function generation script, and the subsequent verification platform can directly access the memory by calling the access.
[0020] The application further provides a device for accelerating memory access in a chip verification platform, comprising a processor and a memory for storing a computer program, and the processor realizes the method for accelerating memory access in the chip verification platform when executing the computer program.
[0021] The application provides an automatic extraction method of memory absolute path, which accelerates the memory access efficiency through absolute path access. Compared with the conventional single path verification, a new access path is added, which can avoid some vulnerabilities that are not easy to find due to incomplete verification, and improves the verification quality. The automatic extraction of memory absolute path greatly reduces the maintenance cost, and the script can automatically complete the maintenance by only inputting the initreg_random_value.txt file each time, thereby improving the efficiency of the verification platform. Meanwhile, according to the splicing rule provided by the design document, the script can also automatically complete the splicing of the memory path and output the access function. Through the form of calling function, the reusability and portability of the verification platform are improved, so that the verification platform can be quickly deployed in a new project and the efficiency is improved. The establishment of the automatic process reduces the risk of manual extraction and avoids the verification platform problems caused by human errors.
[0022] In the above description, many specific details are set forth in order to provide a thorough understanding of the present application. However, the above description is only a preferred embodiment of the present application, and the present application can be implemented in many other ways different from the description. Therefore, the present application is not limited by the specific implementation disclosed above. Meanwhile, any person skilled in the art can make many possible changes and modifications to the technical solutions of the present application, or modify equivalent embodiments, without departing from the scope of the technical solutions of the present application. Any simple modification, equivalent change and modification made to the above embodiments according to the technical essence of the present application, without departing from the scope of the present application, still belongs to the protection scope of the present application.
Claims
1. A method for accelerating access to memory in a chip verification platform, the method comprising: In the process of chip simulation, the initreg option is opened, and the initreg_random_value.txt file is automatically output after the simulation is completed. The initreg randomly assigns initial values to all registers and memories in the simulation environment at time 0, and outputs all paths and corresponding initial values to the initreg_random_value.txt file. The path extraction script extracts the required memory absolute path from the initreg_random_value.txt file to accelerate the access to the memory.
2. The method for accelerating accessing memory in a chip verification platform according to claim 1, wherein: When accessing the memory, the script inputs the required module instance name, automatically performs path matching according to the instance name, extracts the required path from the matching result, and realizes the automatic maintenance of the absolute path.
3. The method for accelerating access to memory in a chip verification platform of claim 1, wherein: If the memory depth or width is too large, the memory can be spliced in combination with the size of the memory library used. The specific splicing rule is provided by the memory design document. After the script inputs the design document, the memory is automatically spliced according to the splicing rule, and finally the complete memory absolute path and access function are output.
4. The method for accelerating accessing memory in a chip verification platform according to claim 3, wherein: The specific extraction process of the spliced memory absolute path and access function includes: the absolute path is extracted by the path extraction script, the access function is generated by the access function generation script, and the subsequent verification platform directly accesses the memory by calling the access function.
5. The method for accelerating access to memory in a chip verification platform of claim 1, wherein: When there is a design change, the initreg_random_value.txt file and the memory design document need to be provided again, and the script automatically maintains the memory absolute path.
6. An apparatus for accelerating access to memory in a chip verification platform, the apparatus comprising: The memory stores a computer program, and the processor implements the method of accelerating the access to the memory in the chip verification platform according to any one of claims 1 to 5 when executing the computer program.