Boost charging chip control circuit, boost charging chip and power supply device

Abstract

The invention is suitable for the technical field of boost charging chips, and provides a boost charging chip control circuit, a boost charging chip and a power supply device. The boost charging chip control circuit comprises a system loop module, a current loop module and a boost driving module, the current loop module is electrically connected with the boost driving module, and the boost driving module is used for being electrically connected with a grid electrode of a first power tube and a grid electrode of a second power tube in the boost charging circuit. The system loop module is electrically connected with a source electrode of a second power tube, a grid electrode of a third power tube and a drain electrode of the third power tube in the boost charging circuit. The source electrode of the third power tube is used for being electrically connected with a battery. According to the boost charging chip control circuit provided by the embodiment of the invention, in the whole process of switching from low current temperature to high current fast charging, the current loop module always dominates and controls the boost driving module, the system loop module dominates and controls the third power tube, and switching of any loop control is not needed.

Description

Technical Field

[0001] This application belongs to the field of boost charging chip technology, and particularly relates to a boost charging chip control circuit, a boost charging chip, and a power supply device. Background Technology

[0002] In the power supply systems of portable electronic devices and energy storage devices, boost charging chips are the core components for achieving efficient power supply from low-voltage power sources to batteries. The charging characteristics of lithium batteries dictate the need for a segmented charging strategy: when the battery is over-discharged and in a low-voltage vulnerable state, it needs to be gently replenished with a small current to avoid battery damage; once the battery voltage rises to the fast charging threshold, it can switch to high-current fast charging to improve charging efficiency.

[0003] To achieve the aforementioned segmented charging, existing boost charging chips generally employ a "loop switching" control mode. In the low-voltage, low-current stage, the system voltage loop primarily controls the boost drive module, adjusting the duty cycle to maintain the output node voltage at a fixed value higher than the input voltage. Simultaneously, a constant current loop controls the gate of the charging power transistor to ensure the charging current remains stable at the low-current target value. Once the battery voltage reaches the fast-charging threshold, the gate of the charging power transistor needs to be pulled high to fully conduct, and the boost drive module needs to be switched to constant current loop control, i.e., switching charging. The transition from the low-voltage, low-current linear charging state to the fast-charging switching charging state involves loop switching, typically requiring additional design of special timing adaptation, signal buffering, and parameter matching mechanisms, making the switching process quite complex. Summary of the Invention

[0004] This application provides a boost charging chip control circuit and power supply device, which can solve the problem that current boost charging chip control circuits require loop switching and the switching process is relatively complex.

[0005] In a first aspect, embodiments of this application provide a boost charging chip control circuit, including a system loop module, a current loop module, and a boost drive module. The current loop module is electrically connected to the boost drive module. The boost drive module is used to be electrically connected to the gate of a first power transistor and the gate of a second power transistor in the boost charging circuit, respectively. The system loop module is electrically connected to the source of the second power transistor, the gate of a third power transistor, and the drain of the third power transistor in the boost charging circuit, respectively. The source of the third power transistor is used to be electrically connected to a battery.

[0006] When the battery voltage is less than the fast charging threshold, the system loop module outputs a first loop control signal to the gate of the third power transistor based on the node voltage, a first preset voltage, and a second preset voltage. The node voltage is the voltage at the drain of the third power transistor, and the node voltage is the maximum value of the first preset voltage and the second preset voltage. The current loop module outputs a second loop control signal to the boost drive module based on the received charging current of the battery and a first preset current. The boost drive module adjusts the duty cycle of the first power transistor and the second power transistor based on the second loop control signal to adjust the node voltage. When the battery voltage is greater than or equal to the fast charging threshold, the current loop module is used to output a third loop control signal to the boost drive module according to the battery charging current and a second preset current. The boost drive module is used to increase the duty cycle of the first power transistor and the second power transistor according to the third loop control signal to increase the node voltage. The system loop module increases the gate voltage of the third power transistor according to the increased node voltage. The second preset current is greater than the first preset current.

[0007] In one possible implementation of the first aspect, the first preset voltage is the sum of the input voltage of the boost charging circuit and the first voltage difference, the second preset voltage is the sum of the battery voltage and the second voltage difference, and the first voltage difference is greater than the second voltage difference.

[0008] In one possible implementation of the first aspect, when the battery voltage is greater than or equal to the fast charging threshold, if the product of the battery charging current and the on-resistance of the third power transistor is greater than the second voltage difference, the system loop module continuously pulls up the gate voltage of the third power transistor until the third power transistor is fully turned on; if the product of the battery charging current and the on-resistance of the third power transistor is less than or equal to the second voltage difference, the system loop module continuously pulls up the gate voltage of the third power transistor to a preset value, the third power transistor is not fully turned on, the battery charging current reaches the target current, and the node voltage stabilizes at the second preset voltage.

[0009] In one possible implementation of the first aspect, the system loop module includes a first amplification unit and a second amplification unit, both of which are electrically connected to the source of the second power transistor, the gate of the third power transistor, and the drain of the third power transistor, respectively. The first amplification unit is used to output the first loop control signal according to the node voltage and the first preset voltage when the node voltage is equal to the second preset voltage; the second amplification unit is used to output the first loop control signal according to the node voltage and the second preset voltage when the node voltage is equal to the first preset voltage.

[0010] In one possible implementation of the first aspect, the first amplification unit includes a first error amplifier, the non-inverting input of the first error amplifier being electrically connected to the source of the second power transistor and the drain of the third power transistor, the inverting input of the first error amplifier being used to receive the first preset voltage, and the output of the first error amplifier being electrically connected to the gate of the third power transistor.

[0011] In one possible implementation of the first aspect, the second amplification unit includes a second error amplifier, the non-inverting input of the second error amplifier being electrically connected to the source of the second power transistor and the drain of the third power transistor, the inverting input of the second error amplifier being used to receive the second preset voltage, and the output of the second error amplifier being electrically connected to the gate of the third power transistor.

[0012] In one possible implementation of the first aspect, the current loop module includes a conversion unit and a third error amplifier. The conversion unit is electrically connected to the battery, the non-inverting input terminal of the third error amplifier, and the inverting input terminal of the third error amplifier, respectively. It is used to convert the charging current of the battery into a first voltage, and also to convert the first preset current into a second voltage and the second preset current into a third voltage. The non-inverting input of the third error amplifier is used to receive the second voltage when the battery voltage is less than the fast charging threshold, and also to receive the third voltage when the battery voltage is greater than or equal to the fast charging threshold. The inverting input of the third error amplifier is used to receive the first voltage, and the output of the third error amplifier is electrically connected to the boost drive module.

[0013] Secondly, embodiments of this application provide a boost charging chip, including a boost charging circuit and a boost charging chip control circuit as described in the first aspect. The gates of the first power transistor and the second power transistor in the boost charging circuit are both electrically connected to the boost drive module in the boost charging chip control circuit. The gate, drain, and source of the third power transistor in the boost charging circuit are all electrically connected to the system loop module in the boost charging chip control circuit. The source of the third power transistor is used for electrical connection to a battery.

[0014] In one possible implementation of the second aspect, the boost charging circuit further includes an input inductor, a first end of which is electrically connected to a power supply, and a second end of which is electrically connected to the drain of the first power transistor and the drain of the second power transistor, respectively.

[0015] Thirdly, embodiments of this application provide a power supply device including the boost charging chip described in any one of the second aspects.

[0016] The beneficial effects of the embodiments in this application compared with the prior art are: This application provides a boost charging chip control circuit, including a system loop module, a current loop module, and a boost drive module. The current loop module is electrically connected to the boost drive module. The boost drive module is used to be electrically connected to the gate of a first power transistor and the gate of a second power transistor, respectively. The system loop module is electrically connected to the source of the second power transistor, the gate of a third power transistor, and the drain of the third power transistor, respectively. The source of the third power transistor is used to be electrically connected to a battery.

[0017] When the battery voltage is below the fast-charging threshold, it indicates that the battery is over-discharged and in a low-voltage vulnerable state, requiring gentle charging with a small current. At this time, the battery system loop module outputs a first loop control signal to the gate of the third power transistor based on the node voltage, a first preset voltage, and a second preset voltage. The node voltage is the voltage at the drain of the third power transistor and is always maintained at the maximum value of the first and second preset voltages. The current loop module collects the battery charging current in real time and outputs a second loop control signal to the boost drive module based on the battery charging current and the first preset current (small current). The boost drive module adjusts the duty cycle of the first and second power transistors according to the second loop control signal to regulate the node voltage, ensuring that the charging current is stable near the first preset current, and the battery is in a linear charging state.

[0018] When the battery voltage is greater than or equal to the fast charging threshold, it indicates that the battery has left the low-voltage vulnerable state and can switch to high-current fast charging. At this time, the current loop module outputs a third loop control signal to the boost drive module based on the battery charging current and a second preset current (high current). The boost drive module adjusts the duty cycle of the first and second power transistors according to the third loop control signal to increase the node voltage. The system loop module increases the gate voltage of the third power transistor based on the increased node voltage to increase the charging current and adapt to the current requirements of the fast charging stage.

[0019] Therefore, it can be seen that the boost charging chip control circuit provided in this application embodiment, throughout the entire process of switching from low-current gentle charging to high-current fast charging, is always dominated by the current loop module controlling the boost drive module and the system loop module controlling the third power transistor, without the need for any loop control switching. This design not only avoids the cumbersome process caused by loop switching in traditional solutions, but also eliminates additional hardware structures such as loop selection switches, timing adaptations, and signal buffers, significantly reducing the complexity of the circuit architecture and the chip layout area.

[0020] It is understood that the beneficial effects of the second and third aspects mentioned above can be found in the relevant descriptions in the first aspect mentioned above, and will not be repeated here. Attached Figure Description

[0021] To more clearly illustrate the technical solutions in the embodiments of this application, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0022] Figure 1 This is a circuit diagram of a traditional boost charger chip charging at low voltage. Figure 2 This is a circuit diagram of a traditional boost charger chip charging high voltage circuit. Figure 3 This is a schematic diagram of the traditional boost charging process; Figure 4 This is a schematic block diagram of a boost charging chip control circuit provided in one embodiment of this application; Figure 5 This is a circuit diagram of a boost charging chip control circuit provided in an embodiment of this application; Figure 6 This is a schematic diagram of the boost charging process provided in an embodiment of this application.

[0023] In the diagram: 10, boost charging chip control circuit; 101, system loop module; 1011, first amplification unit; 1012, second amplification unit; 102, current loop module; 103, boost drive module; 20, boost charging circuit. Detailed Implementation

[0024] In the following description, specific details such as particular system architectures and techniques are set forth for illustrative purposes and not for limitation, in order to provide a thorough understanding of the embodiments of this application. However, those skilled in the art will understand that this application may also be implemented in other embodiments without these specific details. In other instances, detailed descriptions of well-known systems, apparatuses, circuits, and methods have been omitted so as not to obscure the description of this application with unnecessary detail.

[0025] It should be understood that, when used in this application specification and the appended claims, the term "comprising" indicates the presence of the described features, integrals, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components and / or a collection thereof.

[0026] It should also be understood that the term “and / or” as used in this application specification and the appended claims means any combination of one or more of the associated listed items and all possible combinations, and includes such combinations.

[0027] As used in this application specification and the appended claims, the term "if" may be interpreted, depending on the context, as "when," "once," "in response to determination," or "in response to detection." Similarly, the phrase "if determined" or "if [the described condition or event] is detected" may be interpreted, depending on the context, as "once determined," "in response to determination," "once [the described condition or event] is detected," or "in response to detection of [the described condition or event]."

[0028] Furthermore, in the description of this application and the appended claims, the terms "first," "second," "third," etc., are used only to distinguish descriptions and should not be construed as indicating or implying relative importance.

[0029] References to "one embodiment" or "some embodiments" as described in this specification mean that one or more embodiments of this application include a specific feature, structure, or characteristic described in connection with that embodiment. Therefore, the phrases "in one embodiment," "in some embodiments," "in other embodiments," "in still other embodiments," etc., appearing in different parts of this specification do not necessarily refer to the same embodiment, but rather mean "one or more, but not all, embodiments," unless otherwise specifically emphasized. The terms "comprising," "including," "having," and variations thereof mean "including but not limited to," unless otherwise specifically emphasized.

[0030] In the power supply systems of portable electronic devices and energy storage devices, boost charging chips are the core components for efficiently supplying power from low-voltage sources to batteries. The charging characteristics of lithium batteries necessitate a segmented charging strategy: when the battery is over-discharged and in a low-voltage, vulnerable state of around 2V, it needs to be gently replenished with a small current of around 100mA to avoid battery damage; once the battery voltage rises to the fast charging threshold of around 3V, it can switch to a high-current fast charging of 1-2A to improve charging efficiency.

[0031] To achieve the aforementioned segmented charging, existing boost charging chips generally employ a "loop switching" control mode. For example... Figure 1 As shown, in the low-voltage, low-current stage, the system voltage loop (SYSREG loop) dominates the control of the boost drive module (BOOST). By adjusting the duty cycles of Q1 and Q2, the output node (SYS node) voltage is maintained at a fixed value approximately 1V higher than the input voltage. Simultaneously, the constant current loop (CC current loop) controls the gate of Q3 to ensure that the charging current Ichg remains stable at the low-current target value. Figure 2 As shown, when the battery voltage VBAT reaches the fast charging threshold, the gate of Q3 needs to be pulled high to fully conduct. Simultaneously, the boost drive module needs to be switched to constant current loop control, i.e., switching charging. The charging flowchart can be found here. Figure 3 As shown, during the low-current charging stage, the battery is in a linear charging state, and the SYS node voltage remains constant. During the high-current fast charging stage, the SYS node voltage increases with the increase of the battery voltage. The transition from the low-voltage, low-current linear charging state to the fast-charging switching charging state involves loop switching, which usually requires the design of special timing adaptation, signal buffering, and parameter matching mechanisms, making the switching process quite complex. In addition, the switching process involves multiple actions such as control authority transfer, current reference abrupt changes, and power transistor state switching, resulting in transient transition phases that can easily cause fluctuations in the SYS node voltage, instantaneous jitter in the charging current, and even charging gaps, affecting charging stability.

[0032] To address the aforementioned issues, this application provides a boost charging chip control circuit, comprising a system loop module, a current loop module, and a boost drive module. The current loop module is electrically connected to the boost drive module. The boost drive module is used to electrically connect to the gate of a first power transistor and the gate of a second power transistor, respectively. The system loop module is electrically connected to the source of the second power transistor, the gate of a third power transistor, and the drain of the third power transistor, respectively. The source of the third power transistor is used to electrically connect to a battery.

[0033] When the battery voltage is below the fast-charging threshold, it indicates that the battery is over-discharged and in a low-voltage vulnerable state, requiring gentle charging with a small current. At this time, the battery system loop module outputs a first loop control signal to the gate of the third power transistor based on the node voltage, a first preset voltage, and a second preset voltage. The node voltage is the voltage at the drain of the third power transistor and is always maintained at the maximum value of the first and second preset voltages. The current loop module collects the battery charging current in real time and outputs a second loop control signal to the boost drive module based on the battery charging current and the first preset current (small current). The boost drive module adjusts the duty cycle of the first and second power transistors according to the second loop control signal to regulate the node voltage, ensuring that the charging current is stable near the first preset current, and the battery is in a linear charging state.

[0034] When the battery voltage is greater than or equal to the fast charging threshold, it indicates that the battery has left the low-voltage vulnerable state and can switch to high-current fast charging. At this time, the current loop module outputs a third loop control signal to the boost drive module based on the battery charging current and a second preset current (high current). The boost drive module adjusts the duty cycle of the first and second power transistors according to the third loop control signal to increase the node voltage. The system loop module increases the gate voltage of the third power transistor based on the increased node voltage to increase the charging current and adapt to the current requirements of the fast charging stage.

[0035] Therefore, it can be seen that the boost charging chip control circuit provided in this application embodiment, throughout the entire process of switching from low-current gentle charging to high-current fast charging, is always dominated by the current loop module controlling the boost drive module and the system loop module controlling the third power transistor, without the need for any loop control switching. This design not only avoids the cumbersome process caused by loop switching in traditional solutions, but also eliminates additional hardware structures such as loop selection switches, timing adaptations, and signal buffers, significantly reducing the complexity of the circuit architecture and the chip layout area.

[0036] To illustrate the technical solution described in this application, specific embodiments are provided below.

[0037] Figure 4 A schematic block diagram of a boost charging chip control circuit 10 according to an embodiment of this application is shown. See also Figure 4As shown, the boost charging chip control circuit 10 includes a system loop module 101, a current loop module 102, and a boost drive module 103. The current loop module 102 is electrically connected to the boost drive module 103. The boost drive module 103 is used to be electrically connected to the gate of the first power transistor Q1 and the gate of the second power transistor Q2 in the boost charging circuit 20, respectively. The system loop module 101 is electrically connected to the source of the second power transistor Q2, the gate of the third power transistor Q3, and the drain of the third power transistor Q3 in the boost charging circuit 20, respectively. The source of the third power transistor Q3 is used to be electrically connected to the battery BAT.

[0038] Specifically, when the voltage of the battery BAT is less than the fast charging threshold, it indicates that the battery BAT is over-discharged and in a low-voltage vulnerable state, requiring gentle charging with a small current. At this time, the battery BAT system loop module 101 outputs a first loop control signal to the gate of the third power transistor Q3 based on the node voltage, the first preset voltage V1, and the second preset voltage V2. The node voltage is the voltage at the drain of the third power transistor Q3, and it is always maintained at the maximum value of the first preset voltage V1 and the second preset voltage V2. The current loop module 102 collects the charging current Ichg of the battery BAT in real time, and outputs a second loop control signal to the boost drive module 103 based on the charging current Ichg of the battery BAT and the first preset current (small current). The boost drive module 103 adjusts the duty cycle of the first power transistor Q1 and the second power transistor Q2 according to the second loop control signal to adjust the node voltage and ensure that the charging current Ichg is stable near the first preset current, and the battery BAT is in a linear charging state.

[0039] When the voltage of battery BAT is greater than or equal to the fast charging threshold, it indicates that battery BAT has escaped the low-voltage vulnerable state and can switch to high-current fast charging. At this time, the current loop module 102 outputs a third loop control signal to the boost drive module 103 based on the charging current Ichg of battery BAT and a second preset current (high current). The boost drive module 103 adjusts the duty cycle of the first power transistor Q1 and the second power transistor Q2 according to the third loop control signal to increase the node voltage. The system loop module 101 increases the gate voltage of the third power transistor Q3 according to the increased node voltage to increase the charging current Ichg and adapt to the current requirements of the fast charging stage.

[0040] Therefore, it can be seen that the boost charging chip control circuit 10 provided in this application embodiment, throughout the entire process of switching from low-current gentle charging to high-current fast charging, is always dominated by the current loop module 102 controlling the boost drive module 103 and the system loop module 101 controlling the third power transistor Q3, without the need for any loop control switching. This design not only avoids the cumbersome process caused by loop switching in traditional solutions, but also eliminates additional hardware structures such as loop selection switches, timing adaptations, and signal buffers, significantly reducing the complexity of the circuit architecture and the chip layout area.

[0041] Furthermore, the control circuit of this application does not require loop switching, and can avoid charging gaps that may occur during the switching process, as well as unstable phenomena such as voltage fluctuations and current jitters, effectively improving charging continuity and stability, reducing pulse impacts on the battery BAT, and helping to extend the battery BAT cycle life. In addition, there is no need to design a separate timing logic and parameter matching mechanism for loop switching, which significantly simplifies the development and production debugging process of the chip control algorithm and reduces design costs and power consumption.

[0042] It should be noted that the first preset voltage V1 is the sum of the input voltage VIN of the boost charging circuit 20 and the first voltage difference ΔV1, and the second preset voltage V2 is the sum of the voltage of the battery BAT and the second voltage difference ΔV2. The first voltage difference ΔV1 is greater than the second voltage difference ΔV2.

[0043] This design precisely adapts to the core requirements of two-stage charging and forms a synergistic advantage. Specifically, in the low-voltage charging stage, the first voltage difference ΔV1 (slightly below 1V) makes VIN+ΔV1 naturally higher than VBAT+ΔV2 (the second voltage difference ΔV2 is on the order of tens of mV). This satisfies the structural limitation that the output voltage of the boost charging chip must be higher than the input voltage, providing a stable SYS node voltage reference for low-current charging, while also preventing the low-voltage battery BAT from being subjected to overcharging stress through a larger voltage difference, achieving gentle charging protection. After entering the fast charging stage, as the battery BAT voltage increases, VBAT+ΔV2 gradually exceeds VIN+ΔV1. At this time, the smaller second voltage difference ΔV2 can significantly reduce the voltage difference across the third power transistor Q3, reducing the heat generation power during charging and significantly improving the energy utilization efficiency in the fast charging stage. Meanwhile, this differential voltage design allows the SYS node voltage to automatically switch to the maximum value of both as the charging process progresses, without the need for additional logic control. This achieves a switching-free architecture where "current loop controls boost drive module 103 and system loop module 101 controls third power transistor Q3", ensuring a smooth transition between the two charging stages and further simplifying the circuit design, while also taking into account battery BAT protection, charging efficiency, and control stability.

[0044] It should be noted that when the voltage of battery BAT is greater than or equal to the fast charging threshold, if the product of the charging current Ichg of battery BAT and the on-resistance of the third power transistor Q3 (i.e., Ichg) When Rdson (Q3) is greater than the second voltage difference ΔV2, the system loop module 101 continuously pulls up the gate voltage of the third power transistor Q3 until Q3 is fully turned on, and then maintains this state until charging is complete. This minimizes the VDS voltage drop across it, reduces power loss and heat generation during fast charging, significantly improves charging efficiency, and meets the requirement of low on-resistance for high-current fast charging.

[0045] When the voltage of battery BAT is greater than or equal to the fast charging threshold, if the product of the charging current Ichg of battery BAT and the on-resistance of the third power transistor Q3 is less than or equal to the second voltage difference ΔV2, the system loop module 101 continuously pulls up the gate voltage of the third power transistor Q3 to a preset value. The third power transistor Q3 is not fully turned on, the charging current Ichg of battery BAT reaches the target current, and the node voltage stabilizes at the second preset voltage V2. This state is then maintained until charging is complete. This ensures that the charging current Ichg stably reaches the target fast charging value, avoiding damage to battery BAT and power transistors caused by current overload.

[0046] In summary, the adaptive control logic of this application does not require additional switching modules or timing control circuits, and is compatible with the core architecture of loop-free switching. It not only ensures charging stability and efficiency under different fast charging current scenarios, but also simplifies circuit design, reduces device losses, and helps extend the lifespan of the chip and battery BAT.

[0047] The following section provides a detailed description of this application, combining the implementation of the control circuit and the charging flowchart.

[0048] In one embodiment of this application, such as Figure 5 As shown, the system loop module 101 (SYS REG loop) includes a first amplification unit 1011 and a second amplification unit 1012. The first amplification unit 1011 and the second amplification unit 1012 are respectively electrically connected to the source of the second power transistor Q2, the gate of the third power transistor Q3 and the drain of the third power transistor Q3.

[0049] Specifically, the low-voltage charging stage is divided into a first stage and a second stage. In the first stage, the first preset voltage V1 is greater than the second preset voltage V2. At this time, the node voltage is equal to the first preset voltage V1, the first amplification unit 1011 is inactive, and the second amplification unit 1012 outputs the first loop control signal based on the node voltage and the second preset voltage V2. As the charging process progresses, the voltage of the battery BAT gradually increases, causing the second preset voltage V2 to catch up with and exceed the first preset voltage V1, i.e., the second stage. At this time, the node voltage is equal to the second preset voltage V2, the second amplification unit 1012 is inactive, and the first amplification unit 1011 outputs the first loop control signal based on the node voltage and the first preset voltage V1.

[0050] During the two charging stages, the two amplification units can monitor the matching status of the node voltage and the corresponding preset voltage in real time, and automatically output the appropriate first loop control signal. Without switching the loop control authority, the node voltage can achieve a natural transition between different preset voltages, realize loop-free switching, and ensure a smooth connection between the two charging stages.

[0051] In one embodiment of this application, such as Figure 5 As shown, the first amplification unit 1011 includes a first error amplifier EA1. The non-inverting input terminal of the first error amplifier EA1 is electrically connected to the source of the second power transistor Q2 and the drain of the third power transistor Q3, respectively. The inverting input terminal of the first error amplifier EA1 is used to receive a first preset voltage V1. The output terminal of the first error amplifier EA1 is electrically connected to the gate of the third power transistor Q3.

[0052] Specifically, the first error amplifier EA1 can accurately capture the difference between the node voltage and the first preset voltage V1. During the low-voltage power replenishment stage, when the second preset voltage V2 is the maximum value of the two preset voltages, the first error amplifier EA1 can amplify the difference through high gain and output a targeted first loop control signal to adjust the gate voltage of the third power transistor Q3, so as to ensure that the node voltage is stably maintained at the second preset voltage V2.

[0053] In one embodiment of this application, such as Figure 5 As shown, the second amplification unit 1012 includes a second error amplifier EA2. The non-inverting input terminal of the second error amplifier EA2 is electrically connected to the source of the second power transistor Q2 and the drain of the third power transistor Q3, respectively. The inverting input terminal of the second error amplifier EA2 is used to receive a second preset voltage V2. The output terminal of the second error amplifier EA2 is electrically connected to the gate of the third power transistor Q3.

[0054] Specifically, the second error amplifier EA2 can accurately capture the difference between the node voltage and the second preset voltage V2. During the low-voltage power-up phase, when the first preset voltage V1 is the maximum value of the two preset voltages, the second error amplifier EA2 can amplify the difference through high gain and output a targeted first loop control signal to adjust the gate voltage of the third power transistor Q3, ensuring that the node voltage is stably maintained at the first preset voltage V1.

[0055] In one embodiment of this application, such as Figure 5 As shown, the current loop module 102 (CC / CV REG loop) includes a conversion unit and a third error amplifier. The conversion unit is electrically connected to the battery BAT, the non-inverting input terminal of the third error amplifier, and the inverting input terminal of the third error amplifier, respectively. It is used to convert the charging current Ichg of the battery BAT into a first voltage, and also to convert the first preset current into a second voltage and the second preset current into a third voltage.

[0056] The non-inverting input of the third error amplifier is used to receive the second voltage when the voltage of the battery BAT is less than the fast charging threshold, and also to receive the third voltage when the voltage of the battery BAT is greater than or equal to the fast charging threshold. The inverting input of the third error amplifier is used to receive the first voltage. The output of the third error amplifier is electrically connected to the boost drive module 103.

[0057] Specifically, the conversion unit (which can be composed of sampling resistors) is connected in series in the battery BAT charging circuit to convert the actual charging current Ichg into a first voltage proportional to it. In addition, the conversion unit can also convert the first preset current in the low-current replenishment stage and the second preset current in the fast charging stage into the corresponding second voltage and third voltage, respectively (providing current references for different charging stages). The third error amplifier, through precise input configuration, receives the second voltage as the in-phase input reference in the low-voltage replenishment stage and switches to receive the third voltage as the in-phase input reference in the fast charging stage (the receiving of one of the second and third voltages can be achieved by setting a switching switch). At the same time, the inverting input of the third error amplifier continuously receives the first voltage (the voltage representation of the actual charging current Ichg). By amplifying the difference between the two through high gain, a targeted control signal is output to the boost drive module 103, which in turn adjusts the duty cycle of the first power transistor Q1 and the second power transistor Q2 to achieve dynamic adjustment of the output energy, ensuring the stability of the charging current Ichg and the smooth transition of the two-stage charging.

[0058] In one embodiment of this application, such as Figure 5As shown, the boost drive module 103 includes a BOOST, which is used to adjust the duty cycle of the first power transistor Q1 and the second power transistor Q2 according to the second loop control signal / third loop control signal output by the current loop module 102, so as to adjust the SYS node voltage.

[0059] This application embodiment also provides a boost charging chip, including a boost charging circuit 20 and the aforementioned boost charging chip control circuit 10. The boost charging circuit 20 includes an input inductor L1, a first power transistor Q1, a second power transistor Q2, and a third power transistor Q3. The first terminal of the input inductor L1 is electrically connected to a power supply to receive an input voltage VIN. The second terminal of the input inductor L1 is electrically connected to the drain of the first power transistor Q1 and the drain of the second power transistor Q2. The gates of the first power transistor Q1 and the second power transistor Q2 are both electrically connected to the boost drive module 103 in the boost charging chip control circuit 10. The gate, drain, and source of the third power transistor Q3 are all electrically connected to the system loop module 101 in the boost charging chip control circuit 10. The source of the third power transistor Q3 is electrically connected to the battery BAT, and the source of the first power transistor Q1 is grounded.

[0060] Specifically, the input inductor L1 serves as the energy storage device in the boost charging circuit 20, providing the energy basis for boosting through periodic energy storage and release. The first power transistor Q1 and the second power transistor Q2 form complementary switches, alternating on and off according to a preset duty cycle under the control signal output by the boost drive module 103. That is, when the first power transistor Q1 is on, the input inductor L1 stores energy; when the second power transistor Q2 is on, the energy released by the inductor is superimposed on the input voltage VIN, forming an output voltage higher than the input voltage VIN at the source of the second power transistor Q2 (i.e., the SYS node), thus completing the boosting process. The third power transistor Q3 serves as the charging control and regulation device. Its gate is controlled by the system loop module 101. By dynamically adjusting its gate voltage, it changes its conduction state, stabilizing the SYS node voltage at the maximum values ​​of VIN+ΔV1 and BAT+ΔV2. It can also precisely regulate the charging current Ichg flowing from the SYS node to the battery BAT. The three power transistors and the input inductor L1 work together with the control circuit described above. During the low-current charging stage, the complementary switching of the low duty cycle and the moderate conduction of the third power transistor Q3 achieve gentle charging. During the fast charging stage, the duty cycle is increased to increase the voltage of the SYS node, and the adaptive conduction (complete or incomplete conduction) of the third power transistor Q3 achieves high-current and efficient charging. The two-stage charging can be completed without switching the loop, ensuring the stability and continuity of charging.

[0061] For example, the designer can select the types of the first power transistor Q1, the second power transistor Q2, and the third power transistor Q3. For instance, the first power transistor Q1, the second power transistor Q2, and the third power transistor Q3 can all be NMOS transistors.

[0062] In the two-stage charging process of this application, there is no need to switch loop control permissions throughout the entire process. Only through the coordinated linkage of the current loop module 102 (CC / CVREG loop) and the system loop module 101 (SYSREG loop) and the adaptive voltage difference adjustment, a smooth transition from low-voltage, low-current charging to high-voltage, high-current fast charging can be achieved. Figure 6 As shown, the specific control process is as follows: Stage t1 is the low-voltage, low-current charging stage: At this time, the battery BAT is in a low-voltage, vulnerable state due to over-discharge and needs to be gently charged with a small current. Because the battery BAT voltage is low at this stage, the first preset voltage V1 (VIN + ΔV1, where ΔV1 is on the order of slightly less than 1V) is greater than the second preset voltage V2 (VBAT + ΔV2, where ΔV2 is on the order of tens of mV). The system loop module 101 adjusts the gate voltage of the third power transistor Q3 to stably maintain the SYS node voltage (VSYS) at VIN + ΔV1, satisfying the structural constraint that the output voltage of the boost charging circuit 20 must be higher than the input voltage VIN, while also preventing the low-voltage battery BAT from experiencing overcharging stress. Simultaneously, the current reference signal of the current loop module 102 is set to a small current target value on the order of 100mA (the first preset current), and the current loop module 102 collects the actual charging current Ichg of the battery BAT in real time. When the actual charging current Ichg obtained from sampling is lower than the small current reference value, the current loop drives the boost drive module 103 to increase the complementary duty cycle of the first power transistor Q1 and the second power transistor Q2, so that the SYS node voltage increases synchronously. After the SYS node voltage fluctuation is captured in real time by the system loop module 101, the system loop module 101 further increases the gate voltage of the third power transistor Q3 to increase the charging current Ichg and reduce the charge at the SYS node, until both the charging current Ichg and the SYS node voltage reach the target value to match the MOS transistor current formula.

[0063] Where I is the on-state current of the third power transistor Q3, i.e., the charging current Ichg, β is the transconductance parameter of the MOSFET, a constant related to the material and the dimensions of the third power transistor Q3, and V GS V is the gate-source voltage of the third power transistor Q3. TH V is the threshold voltage of the third power transistor Q3, λ is the channel length modulation coefficient, a process-dependent constant. DS This is the drain-source voltage of the third power transistor Q3.

[0064] Conversely, if the actual charging current Ichg obtained by sampling is higher than the small current reference value, the current loop drives the boost drive module 103 to reduce the duty cycle, and the system loop synchronously reduces the gate voltage of the third power transistor Q3, eventually causing the charging current Ichg to fall back to the target value.

[0065] When the charging process enters stage t2: As the battery BAT continues to be charged, the voltage of the battery BAT gradually rises, causing the second preset voltage V2 to gradually catch up with and exceed the first preset voltage V1. At this time, the system loop module 101 automatically switches the control target to stabilize the voltage of the SYS node at VBAT+ΔV2, realizing a natural transition between the two preset voltages without the need for additional switching logic or hardware modules.

[0066] Entering stage t3: The voltage of battery BAT further increases to the preset fast charging threshold, indicating that battery BAT has escaped the low-voltage vulnerable state. At this time, the current reference signal of the current loop module 102 gradually increases to the target value (second preset current) corresponding to high-current fast charging. Based on the difference between the increased current reference signal and the actual charging current Ichg, the current loop module 102 drives the boost drive module 103 to significantly increase the duty cycle of the first power transistor Q1 and the second power transistor Q2, continuously increasing the SYS node voltage. The system loop responds in real time to the rising trend of the SYS node voltage, synchronously increasing the gate voltage of the third power transistor Q3, providing adaptation conditions for high-current fast charging.

[0067] Based on the control foundation of stage t3, the charging process enters stage t4. At this time, according to the matching between the conduction state of the third power transistor Q3 and the charging current Ichg, two working scenarios are adaptively formed: Case 1 (corresponding to) Figure 6 (Red curve in the image): If the charging current Ichg gradually increases to the fast charging target value, the V of the third power transistor Q3 will... GS Since the threshold for full conduction has not yet been reached, Rdson remains adjustable, and the third power transistor Q3 continues to be under the constraint control of the system loop module 101. At this time, the system loop module 101 will precisely regulate the gate voltage of the third power transistor Q3, so that the SYS node voltage is stabilized again at VBAT+ΔV2, and the charging current Ichg is stably maintained at the fast charging target value, achieving efficient and stable high-current fast charging; Scenario 2: If the VGS of the third power transistor Q3 reaches full conduction first (Rdson, Q3 drops to a fixed value Rdson that can no longer be reduced), but the actual charging current Ichg still has not reached the fast charging target value, then the system loop module 101's control capability over the gate voltage of the third power transistor Q3 reaches its limit, and it cannot further adjust VGS. GSIncreasing the current cannot constrain the SYS node voltage to match VBAT+ΔV2, causing the SYS node voltage to break free from the control of the system loop. The current loop module 102 will continue to drive the boost driver module 103 to enhance its output based on the difference between the increased current reference and the actual current, until the actual charging current Ichg reaches the fast-charging target value. At this point, the SYS node voltage becomes uncontrolled, its value formed by the superposition of the battery BAT voltage and the voltage drop after the third power transistor Q3 is fully turned on, i.e., VSYS=VBAT+Ichg. Rdson is designed to meet the energy demands of high-current fast charging.

[0068] The charging process then enters stage t5, and the system continues to maintain the fast charging working state corresponding to stage t4 until the battery BAT is fully charged. Throughout the process, the core architecture of current loop control boost module and system loop control third power transistor Q3 is maintained without any switching of loop control authority.

[0069] This application also provides a power supply device including the aforementioned boost charging chip. By employing this boost charging chip, the power supply device eliminates the need for complex loop switching timing control and hardware adaptation, significantly simplifying the overall circuit architecture and reducing design, production, and debugging costs. It also avoids the charging gaps, voltage fluctuations, and current jitter issues caused by switching in traditional solutions, ensuring a continuous and stable charging experience for the battery. Simultaneously, it enables gentle charging during the low-voltage replenishment phase to protect over-discharged batteries, and reduces power loss and improves charging efficiency during fast charging, effectively extending the battery's BAT cycle life and the power supply device's endurance. Furthermore, the chip's streamlined hardware structure helps reduce the size and space occupied by the power supply device, lowering its static power consumption, making it more suitable for applications requiring miniaturization, high stability, and low power consumption, such as portable electronic devices, energy storage devices, and power banks, significantly enhancing the power supply device's market competitiveness.

[0070] In the above embodiments, the descriptions of each embodiment have different focuses. For parts that are not described in detail or recorded in a certain embodiment, please refer to the relevant descriptions of other embodiments.

[0071] The above-described embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be included within the protection scope of this application.

Claims

1. A boost charging chip control circuit, characterized in that, The device includes a system loop module, a current loop module, and a boost drive module. The current loop module is electrically connected to the boost drive module. The boost drive module is used to be electrically connected to the gate of the first power transistor and the gate of the second power transistor in the boost charging circuit, respectively. The system loop module is electrically connected to the source of the second power transistor, the gate of the third power transistor, and the drain of the third power transistor in the boost charging circuit, respectively. The source of the third power transistor is used to be electrically connected to the battery. When the battery voltage is less than the fast charging threshold, the system loop module is used to output a first loop control signal to the gate of the third power transistor according to the node voltage, the first preset voltage, and the second preset voltage. The node voltage is the voltage at the drain of the third power transistor, and the node voltage is the maximum value of the first preset voltage and the second preset voltage. The current loop module is used to output a second loop control signal to the boost drive module according to the received charging current of the battery and a first preset current. The boost drive module is used to adjust the duty cycle of the first power transistor and the second power transistor according to the second loop control signal to adjust the node voltage. When the battery voltage is greater than or equal to the fast charging threshold, the current loop module is used to output a third loop control signal to the boost drive module according to the battery charging current and a second preset current. The boost drive module is used to increase the duty cycle of the first power transistor and the second power transistor according to the third loop control signal to increase the node voltage. The system loop module increases the gate voltage of the third power transistor according to the increased node voltage. The second preset current is greater than the first preset current.

2. The boost charging chip control circuit according to claim 1, characterized in that, The first preset voltage is the sum of the input voltage of the boost charging circuit and the first voltage difference, and the second preset voltage is the sum of the battery voltage and the second voltage difference, wherein the first voltage difference is greater than the second voltage difference.

3. The boost charging chip control circuit according to claim 2, characterized in that, When the battery voltage is greater than or equal to the fast charging threshold, if the product of the battery charging current and the on-resistance of the third power transistor is greater than the second voltage difference, the system loop module continuously pulls up the gate voltage of the third power transistor until the third power transistor is fully turned on; if the product of the battery charging current and the on-resistance of the third power transistor is less than or equal to the second voltage difference, the system loop module continuously pulls up the gate voltage of the third power transistor to a preset value, the third power transistor is not fully turned on, the battery charging current reaches the target current, and the node voltage stabilizes at the second preset voltage.

4. The boost charging chip control circuit according to any one of claims 1-3, characterized in that, The system loop module includes a first amplification unit and a second amplification unit, both of which are electrically connected to the source of the second power transistor, the gate of the third power transistor, and the drain of the third power transistor, respectively. The first amplification unit is used to output the first loop control signal according to the node voltage and the first preset voltage when the node voltage is equal to the second preset voltage; The second amplification unit is used to output the first loop control signal according to the node voltage and the second preset voltage when the node voltage is equal to the first preset voltage.

5. The boost charging chip control circuit according to claim 4, characterized in that, The first amplification unit includes a first error amplifier. The non-inverting input terminal of the first error amplifier is electrically connected to the source of the second power transistor and the drain of the third power transistor, respectively. The inverting input terminal of the first error amplifier is used to receive the first preset voltage. The output terminal of the first error amplifier is electrically connected to the gate of the third power transistor.

6. The boost charging chip control circuit according to claim 4, characterized in that, The second amplification unit includes a second error amplifier. The non-inverting input of the second error amplifier is electrically connected to the source of the second power transistor and the drain of the third power transistor, respectively. The inverting input of the second error amplifier is used to receive the second preset voltage. The output of the second error amplifier is electrically connected to the gate of the third power transistor.

7. The boost charging chip control circuit according to any one of claims 1-3, characterized in that, The current loop module includes a conversion unit and a third error amplifier. The conversion unit is electrically connected to the battery, the non-inverting input terminal of the third error amplifier, and the inverting input terminal of the third error amplifier, respectively. It is used to convert the charging current of the battery into a first voltage, and also to convert the first preset current into a second voltage and the second preset current into a third voltage. The non-inverting input of the third error amplifier is used to receive the second voltage when the battery voltage is less than the fast charging threshold, and also to receive the third voltage when the battery voltage is greater than or equal to the fast charging threshold. The inverting input of the third error amplifier is used to receive the first voltage, and the output of the third error amplifier is electrically connected to the boost drive module.

8. A boost charging chip, characterized in that, The device includes a boost charging circuit and a boost charging chip control circuit as described in any one of claims 1-7. The gates of the first power transistor and the second power transistor in the boost charging circuit are both electrically connected to the boost drive module in the boost charging chip control circuit. The gate, drain, and source of the third power transistor in the boost charging circuit are all electrically connected to the system loop module in the boost charging chip control circuit. The source of the third power transistor is used for electrical connection to the battery.

9. The boost charging chip according to claim 8, characterized in that, The boost charging circuit also includes an input inductor, the first end of which is electrically connected to the power supply, and the second end of which is electrically connected to the drain of the first power transistor and the drain of the second power transistor, respectively.

10. A power supply device, characterized in that, Includes the boost charging chip as described in any one of claims 8-9.

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