Method and system for constructing QC-LDPC code based on Logistic chaotic mapping, medium and equipment

Abstract

The invention discloses a QC-LDPC code construction method and system based on Logistic chaotic mapping, a medium and equipment, and belongs to the technical field of communication, and the method comprises the steps: obtaining the number of rows, the number of columns and an expansion factor of a basis matrix according to a code length and a code rate; generating a chaos sequence according to the Logistic mapping parameters, performing displacement value quantization in combination with an expansion factor to obtain an initial basis matrix, performing four-ring detection and elimination in combination with the expansion factor to obtain an optimized basis matrix, constructing a check matrix in combination with the expansion factor, and performing performance check: if not, performing four-ring detection and elimination according to the initial basis matrix and the expansion factor; a QC-LDPC code is constructed according to the basis matrix after iteration; and if so, constructing the QC-LDPC code according to the optimized basis matrix. According to the invention, the problems of poor security, performance-limited short loop and inflexible code rate adjustment caused by the structural regularity of the existing QC-LDPC code construction method are solved.

Description

Technical Field

[0001] This invention relates to a method, system, medium, and device for constructing QC-LDPC codes based on Logistic chaotic mapping, belonging to the field of communication technology. Background Technology

[0002] Low-density parity-check (LDPC) codes, as a channel coding technique approaching the Shannon limit, occupy an important position in the field of communications. Among them, quasi-cyclic low-density parity-check (QC-LDPC) codes are widely used in storage systems and wireless communications due to their advantages such as low encoding and decoding complexity and simple hardware implementation. Currently, the construction methods of QC-LDPC codes can be mainly divided into two categories: one is the random or pseudo-random construction method based on computer search, such as generating the basis matrix and shift coefficients based on the original model diagram or a fixed sequence; the other is the algebraic construction method based on mathematical theory, such as using finite fields, combinatorial design, or specific sequences, such as the Lucas sequence, to systematically construct the parity-check matrix. The core goal of these traditional methods is to obtain good error correction performance and to reduce implementation complexity by using structured design.

[0003] Despite the widespread adoption of existing construction methods, they suffer from significant shortcomings in security, performance optimization, and flexibility. Firstly, regarding security, both random construction methods based on fixed rules and algebraic construction methods relying on specific mathematical structures generate parity-check matrices with inherent structural regularities. Attackers can analyze the distribution of non-zero elements in the codewords or parity-check matrices to deduce the construction rules, thereby enabling codeword forgery or algebraic attacks, such as Gaussian elimination, posing a serious risk in security-sensitive scenarios like encrypted communication. Secondly, in terms of performance, existing methods struggle to balance short-loop elimination with flexibility. While pseudo-random construction methods are relatively flexible, they lack sufficient control over performance-constrained short loops such as 4-rings and 6-rings, resulting in numerous trap sets in the Tanner graph and causing error plateauing in high signal-to-noise ratio regions, failing to meet the stringent requirements of extremely low uncorrectable error rates in scenarios like flash memory. Although algebraic construction methods can systematically eliminate short loops, their performance optimization comes at the cost of flexibility. Finally, algebraic construction methods are particularly lacking in flexibility. Its matrix parameters, such as code rate and code length, heavily rely on a pre-defined mathematical structure, with limited adjustment space, making it difficult to quickly adapt to dynamically changing service requirements, such as in 5G communication. Furthermore, existing technologies generally lack dynamic security mechanisms. Even though chaotic systems like Logistic mapping possess initial value sensitivity and random generation characteristics, they have not been effectively integrated to achieve a secure construction link of "random generation + dynamic reconstruction," leaving the system vulnerable to long-term monitoring and decryption of construction parameters during long-cycle communication.

[0004] In summary, existing QC-LDPC codes suffer from poor security, performance limitations such as short loops, and inflexible code rate adjustment due to the structural regularity of their construction methods. Summary of the Invention

[0005] The purpose of this invention is to provide a method, system, medium, and device for constructing QC-LDPC codes based on Logistic chaotic mapping. By utilizing the randomness and ergodicity of chaotic sequences to dynamically generate a parity check matrix, this invention addresses the problems of poor security, performance limitations such as short loops, and inflexible code rate adjustment in existing QC-LDPC codes due to the structural regularity of their construction methods.

[0006] To solve the above-mentioned technical problems, the present invention is implemented using the following technical solution.

[0007] In a first aspect, the present invention provides a method for constructing QC-LDPC codes based on Logistic chaotic mapping, comprising:

[0008] The number of rows, columns, and spread factor of the basis matrix are obtained by configuring and initializing the parameters based on the code length and code rate of the QC-LDPC code to be constructed.

[0009] Based on the Logistic mapping, a length of [length missing] is generated according to the preset Logistic mapping parameters. OK A chaotic sequence of columns, where, This represents the row number of the basis matrix. Indicates the number of columns in the basis matrix;

[0010] The initial basis matrix is ​​obtained by quantizing the displacement values ​​of the chaotic sequence and the expansion factor.

[0011] Based on the initial basis matrix and the expansion factor, a four-ring detection and elimination process is performed to obtain the optimized basis matrix;

[0012] Construct a verification matrix based on the optimized base matrix and the expansion factor;

[0013] Performance verification is performed using an iterative method based on the verification matrix:

[0014] If the performance verification fails, then perform 4-ring detection and elimination based on the initial basis matrix and the expansion factor until the maximum number of iterations is reached, and construct a QC-LDPC code based on the iterated basis matrix.

[0015] If the performance verification passes, a QC-LDPC code is constructed based on the optimized base matrix.

[0016] Furthermore, the Logistic mapping is represented as:

[0017] ;

[0018] In the formula, Indicates the first The state values ​​of the chaotic sequence in the next iteration. Indicates the first The state values ​​of the chaotic sequence in the next iteration. This represents the preset Logistic mapping parameters, wherein the parameter configuration includes the preset Logistic mapping parameters. The range of state values ​​for the chaotic sequence in the first iteration is: .

[0019] Further, the initial basis matrix is ​​obtained by shift-value quantization based on the chaotic sequence and the expansion factor, including:

[0020] The displacement value of each element in the chaotic sequence is calculated based on the expansion factor;

[0021] Fill the initial basis matrix with the displacement value of each element.

[0022] Furthermore, the expression for calculating the displacement value of each element in the chaotic sequence is as follows:

[0023] ;

[0024] In the formula, Represents the first in the chaotic sequence element displacement value, Indicates the expansion factor, " indicates the floor function, This represents the modulo operation. This represents the density threshold of non-zero elements. Indicates the remaining cases.

[0025] Further, based on the initial basis matrix and the expansion factor, 4-ring detection and elimination are performed to obtain the optimized basis matrix, including:

[0026] Iterate through all 2-row, 2-column submatrices in the initial basis matrix;

[0027] Repeat the following steps until the 4-ring cycle is eliminated or the maximum number of iterations is reached:

[0028] For each 2x2 submatrix, if all four elements in the submatrix are non-zero displacement values ​​and satisfy the short-cycle elimination condition, then randomly select one of the four elements and reset it to a random integer between 0 and z-1 to obtain the optimized base matrix.

[0029] Furthermore, the short-loop elimination condition is expressed as:

[0030] ;

[0031] In the formula, This represents the element in the first row and first column of the submatrix. This represents the element in the first row and second column of the submatrix. This represents the element in the second row and first column of the submatrix. This represents the element in the second row and second column of the submatrix.

[0032] Further, a verification matrix is ​​constructed based on the optimized basis matrix and the expansion factor, including:

[0033] Iterate through each element of the optimized basis matrix:

[0034] If the current element is -1, then replace and expand the element to... OK A matrix of all zeros in the columns;

[0035] If the current element is not -1, then replace and expand the element by shifting it to the right by the current element value by units. OK The identity matrix of columns;

[0036] After traversing all elements of the basis matrix, we obtain OK The check matrix of the column.

[0037] Secondly, the present invention provides a system for constructing QC-LDPC codes based on Logistic chaotic mapping, comprising:

[0038] The parameter initialization module is used to configure and initialize parameters based on the code length and code rate of the QC-LDPC code to be constructed, and obtain the number of rows, columns and spread factor of the basis matrix.

[0039] The chaotic sequence generation module is used to generate sequences of length based on the Logistic mapping and according to preset Logistic mapping parameters. OK A chaotic sequence of columns, where, This represents the row number of the basis matrix. Indicates the number of columns in the basis matrix;

[0040] The displacement quantization module is used to quantize the displacement values ​​based on the chaotic sequence and the expansion factor to obtain the initial basis matrix.

[0041] The ring detection and elimination module is used to perform 4-ring detection and elimination based on the initial basis matrix and the expansion factor to obtain the optimized basis matrix;

[0042] A verification matrix construction module is used to construct a verification matrix based on the optimized base matrix and the expansion factor.

[0043] The performance verification module is used to perform performance verification based on the verification matrix using an iterative method: if the performance verification fails, then 4-ring detection and elimination are performed based on the initial base matrix and the expansion factor until the maximum number of iterations is reached, and a QC-LDPC code is constructed based on the iterated base matrix; if the performance verification passes, then a QC-LDPC code is constructed based on the optimized base matrix.

[0044] Thirdly, the present invention provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the method for constructing QC-LDPC codes based on Logistic chaotic mapping as described in the first aspect.

[0045] Fourthly, the present invention provides a computer device, characterized in that it comprises:

[0046] Memory, used to store instructions;

[0047] A processor is configured to execute the instructions, causing the device to perform operations implementing the method for constructing QC-LDPC codes based on Logistic chaotic maps as described in the first aspect.

[0048] Compared with the prior art, the beneficial effects achieved by the present invention are as follows:

[0049] 1. This invention generates chaotic sequences based on Logistic mapping and constructs initial basis matrices accordingly. It fully leverages the inherent randomness and initial value sensitivity of chaotic systems, resulting in a basis matrix structure with no fixed pattern. Even for the same code length and code rate parameters, minute changes in initial parameters will produce drastically different chaotic sequences and basis matrices. This fundamentally avoids the risk of being deciphered by attackers through statistical analysis or algebraic attacks due to fixed construction rules, significantly improving system security.

[0050] 2. This invention performs 4-ring detection and elimination based on the initial basis matrix and the expansion factor, and constructs a check matrix based on the optimized basis matrix and the expansion factor. It uses an iterative method to perform performance verification based on the check matrix, which can systematically identify and eliminate performance-limiting short rings in the check matrix, effectively optimize the Tanner graph structure, reduce the number of trap sets, and thus significantly reduce the error floor under high signal-to-noise ratio, improving the error correction performance and reliability of QC-LDPC codes.

[0051] 3. This invention eliminates short cycles within the maximum number of iterations by traversing all 2×2 submatrices in the initial basis matrix and randomly resetting elements that satisfy non-zero shift values ​​and form 4-cycles based on the short cycle elimination condition. This reduces the linear dependence of the parity check matrix, thereby reducing the error propagation probability of LDPC codes in iterative decoding and improving codeword error correction capability and convergence speed. Attached Figure Description

[0052] Figure 1 This is a flowchart illustrating a method for constructing a QC-LDPC code based on a Logistic chaotic mapping, as provided in an embodiment of the present invention.

[0053] Figure 2 This is a schematic diagram of the distribution of non-zero elements in the parity check matrix of the QC-LDPC code provided in this embodiment of the invention;

[0054] Figure 3 This is a simulation comparison diagram of the performance of the LOG-QC-LDPC code with a code rate of 0.75 provided in the embodiments of the present invention with other QC-LDPC codes with the same code rate. Detailed Implementation

[0055] The technical solution of the present invention will be described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the embodiments of the present invention and the specific features in the embodiments are detailed descriptions of the technical solution of the present invention, rather than limitations thereof. In the absence of conflict, the embodiments of the present invention and the technical features in the embodiments can be combined with each other.

[0056] Example 1

[0057] like Figure 1 As shown, this embodiment introduces a method for constructing QC-LDPC codes based on Logistic chaotic mapping, including:

[0058] Step 1: Configure and initialize the parameters according to the code length and code rate of the QC-LDPC code to be constructed to obtain the number of rows, columns and spread factor of the basis matrix.

[0059] This invention directly determines the number of rows, columns, and expansion factor z of the base matrix by using the code length and code rate, establishing a mathematical mapping relationship with the encoding requirements. This ensures that the dimensions of the base matrix are accurately adapted to the code parameters of the target QC-LDPC code, providing a structured foundation for subsequent chaotic sequence quantization and avoiding encoding efficiency loss due to dimension mismatch.

[0060] Step 2: Based on the Logistic mapping, generate a logistic mapping of length according to the preset Logistic mapping parameters. OK A chaotic sequence of columns, where, This represents the row number of the basis matrix. This indicates the number of columns in the basis matrix.

[0061] This invention utilizes Logistic mapping parameters to generate a chaotic sequence of length m×n, ensuring that the chaotic sequence has high sensitivity dependence and ergodicity. After quantization, the generated chaotic sequence forms an unpredictable distribution of the initial basis matrix shift values, enhancing the randomness of the codewords to resist channel noise interference.

[0062] Step 3: Quantize the displacement values ​​based on the chaotic sequence and the expansion factor to obtain the initial basis matrix.

[0063] This invention transforms the state values ​​of a chaotic sequence into displacement values ​​under the constraint of an expansion factor. This preserves the randomness of the chaotic sequence while ensuring that the displacement values ​​are strictly limited to the integer range of [0, z-1]. This makes each element of the initial basis matrix correspond to an implementable cyclic shift operation, which conforms to the cyclic permutation matrix construction specification of QC-LDPC codes.

[0064] Step 4: Perform 4-ring detection and elimination based on the initial basis matrix and the expansion factor to obtain the optimized basis matrix.

[0065] This invention employs a short-loop elimination condition to traverse all elements in all 2-row, 2-column submatrices of the initial base matrix. For 4-loop structures that meet the condition, non-zero displacement values ​​are randomly reset. Over-optimization is avoided by limiting the maximum number of iterations. While maintaining the randomness of the base matrix, short loops of length 4 are eliminated, reducing error propagation in iterative decoding and improving error correction performance.

[0066] Step 5: Construct a verification matrix based on the optimized base matrix and expansion factor.

[0067] This invention maps each element of the optimized base matrix to a value that is cyclically shifted to the right by units of the current element value. OK The identity matrix of columns or OK The QC-LDPC code constructs a parity check matrix by using a zero-matrix matrix and cyclic shifting the identity matrix. This reduces storage complexity by leveraging the properties of cyclic matrices while maintaining the sparsity of the parity check matrix, giving the QC-LDPC code a low computational complexity advantage in hardware implementation.

[0068] Step Six: Perform performance verification based on the verification matrix using an iterative method:

[0069] If the performance verification fails, then perform 4-ring detection and elimination based on the initial base matrix and the expansion factor until the maximum number of iterations is reached, and construct a QC-LDPC code based on the iterated base matrix.

[0070] If the performance verification passes, a QC-LDPC code is constructed based on the optimized base matrix.

[0071] This invention establishes a feedback optimization loop between the base matrix and the parity check matrix through an iterative performance verification mechanism. When the bit error rate of the parity check matrix fails to meet the standard, a four-loop detection and elimination process is automatically triggered until the maximum number of iterations is reached or the performance passes the test. This ensures that the final constructed QC-LDPC code meets the bit error rate requirement under the target signal-to-noise ratio, achieving a balance between coding performance and computational efficiency.

[0072] Example 2

[0073] Based on the same inventive concept as Embodiment 1, this embodiment introduces a method for constructing QC-LDPC codes based on Logistic chaotic mapping, including:

[0074] Step 1: Configure and initialize the parameters according to the code length and code rate of the QC-LDPC code to be constructed to obtain the number of rows, columns and spread factor of the basis matrix.

[0075] In this embodiment, a base matrix with m=2 rows and n=8 columns is constructed, resulting in a code rate R of 0.75. This is suitable for enhanced mobile broadband scenarios in 5G New Radio and meets the requirements for high-speed data transmission. The base matrix's expansion factor z=72, generating a QC-LDPC code with a code length N=576, conforms to the short code block design specification in the 3GPP standard and supports low-latency communication.

[0076] Step 2: Based on the Logistic mapping, generate a logistic mapping of length according to the preset Logistic mapping parameters. OK A chaotic sequence of columns, where, This represents the row number of the basis matrix. This indicates the number of columns in the basis matrix.

[0077] In this embodiment, the Logistic mapping is represented as:

[0078] ;

[0079] In the formula, Indicates the first The state values ​​of the chaotic sequence in the next iteration. Indicates the first The state values ​​of the chaotic sequence in the next iteration. This represents the preset Logistic mapping parameters, wherein the parameter configuration includes the preset Logistic mapping parameters. The range of state values ​​for the chaotic sequence in the first iteration is: .

[0080] In this embodiment, the preset Logistic mapping parameters Being in a chaotic region ensures the ergodicity and unpredictability of the chaotic sequence. In this embodiment, the range of state values ​​for the chaotic sequence in the first iteration is set to... After 1000 preheating iterations to eliminate transient effects, the generated chaotic sequence passes the Kolmogorov-Smirnov test and meets the uniform distribution characteristics. In this embodiment, the non-zero value density threshold is set to 0.2 to control the density of non-zero elements in the basis matrix. Theoretically, this embodiment can generate a sparse matrix with a density of 20%, which is much lower than the density of traditional LDPC codes. The parity check matrix density is extremely low, which can significantly reduce the decoding computation.

[0081] Step 3: Quantize the displacement values ​​according to the chaotic sequence and the expansion factor to obtain the initial basis matrix.

[0082] Step 3.1: Calculate the displacement value of each element in the chaotic sequence based on the expansion factor.

[0083] In this embodiment, the expression for calculating the displacement value of each element in the chaotic sequence is:

[0084] ;

[0085] In the formula, Represents the first in the chaotic sequence element displacement value, Indicates the expansion factor, " indicates the floor function, This represents the modulo operation. Indicates the non-zero density threshold. Indicates the remaining cases.

[0086] Step 3.2: Fill the initial basis matrix with the displacement value of each element.

[0087] Step 4: Perform 4-ring detection and elimination based on the initial basis matrix and the expansion factor to obtain the optimized basis matrix.

[0088] Step 4.1: Traverse all 2-row, 2-column submatrices in the initial base matrix;

[0089] Step 4.2: Repeat the following steps until the 4-ring cycle is eliminated or the maximum number of iterations is reached:

[0090] Step 4.2.1: For each 2x2 submatrix, if all four elements in the submatrix are non-zero displacement values ​​and satisfy the short cycle elimination condition, then randomly select one element from the four elements and reset it to a random integer between 0 and z-1 to obtain the optimized base matrix.

[0091] In this embodiment, the short loop elimination condition is expressed as:

[0092] ;

[0093] In the formula, This represents the element in the first row and first column of the submatrix. This represents the element in the first row and second column of the submatrix. This represents the element in the second row and first column of the submatrix. This represents the element in the second row and second column of the submatrix.

[0094] Step 5: Construct a verification matrix based on the optimized base matrix and the expansion factor.

[0095] Step 5.1: Traverse each element in the optimized basis matrix:

[0096] If the current element is -1, then replace and expand the element to... OK A matrix of all zeros in the columns;

[0097] If the current element is not -1, then replace and expand the element by shifting it to the right by the current element value by units. OK The identity matrix of columns;

[0098] After traversing all elements of the basis matrix, we obtain OK The check matrix of the column.

[0099] Step 6: Perform performance verification based on the verification matrix using an iterative method:

[0100] If the performance verification fails, then perform 4-ring detection and elimination based on the initial basis matrix and the expansion factor until the maximum number of iterations is reached, and construct a QC-LDPC code based on the iterated basis matrix.

[0101] If the performance verification passes, a QC-LDPC code is constructed based on the optimized base matrix.

[0102] Step 7: Simulation verification.

[0103] To verify that the constructed QC-LDPC code has superior error correction performance, this embodiment uses MATLAB for simulation. After steps 1-5, the resulting parity-check matrix is ​​as follows: Figure 2 As shown, the distribution of non-zero elements in the QC-LDPC parity-check matrix is ​​illustrated. Row indices 1-144 correspond to three 48-row parity blocks, and column indices 1-576 correspond to twelve 48-column variable blocks. The black diagonal lines in the figure represent the non-zero elements of the parity-check matrix, reflecting the quasi-cyclic (QC) structure. The diagonal lines are evenly spaced, and the minimum cycle length has been verified to be 12. The overall structure intuitively reflects the characteristics of the quasi-cyclic sparse matrix generated by the chaotic mapping, consistent with the parameters of the embodiment, and serves as a visual verification of the correctness and performance optimization of the parity-check matrix.

[0104] This embodiment uses MATLAB simulation to verify the error correction performance of the constructed LOG-QC-LDPC code. The channel uses additive white Gaussian noise (AWGN) and binary phase shift keying (BPSK) modulation. The decoding algorithm is a min-sum decoding algorithm, with a maximum of 50 decoding iterations. The constructed LOG-QC-LDPC code is compared with an IEEE 802.16e standard-compliant IEE-QC-LDPC code of the same code length and code rate. The simulation curves comparing the bit error rate (BER) and signal-to-noise ratio (SNR) of different QC-LDPC codes under the same parameters are shown in the attached figure. Figure 3 As shown. By Figure 2 As can be seen, the BER of both decreases with increasing SNR. Compared with traditional LDPC codes, the performance in the high SNR region is better in this embodiment, which demonstrates the effectiveness of chaotic mapping and matrix optimization in LDPC code design.

[0105] Example 3

[0106] Based on the same inventive concept as other embodiments, this embodiment introduces a construction system for QC-LDPC codes based on Logistic chaotic mapping, including:

[0107] The parameter initialization module is used to configure and initialize parameters based on the code length and code rate of the QC-LDPC code to be constructed, and obtain the number of rows, columns and spread factor of the basis matrix.

[0108] The chaotic sequence generation module is used to generate sequences of length based on the Logistic mapping and according to preset Logistic mapping parameters. OK A chaotic sequence of columns, where, This represents the row number of the basis matrix. Indicates the number of columns in the basis matrix;

[0109] The displacement quantization module is used to quantize the displacement values ​​based on the chaotic sequence and the expansion factor to obtain the initial basis matrix.

[0110] The ring detection and elimination module is used to perform 4-ring detection and elimination based on the initial basis matrix and the expansion factor to obtain the optimized basis matrix;

[0111] A verification matrix construction module is used to construct a verification matrix based on the optimized base matrix and the expansion factor.

[0112] The performance verification module is used to perform performance verification based on the verification matrix using an iterative method: if the performance verification fails, then 4-ring detection and elimination are performed based on the initial base matrix and the expansion factor until the maximum number of iterations is reached, and a QC-LDPC code is constructed based on the iterated base matrix; if the performance verification passes, then a QC-LDPC code is constructed based on the optimized base matrix.

[0113] The specific functions of each module described above are explained in the relevant content of the method in Embodiment 1, and will not be repeated here.

[0114] Example 4

[0115] Based on the same inventive concept as other embodiments, this embodiment introduces a computer-readable storage medium storing a computer program thereon, characterized in that, when the computer program is executed by a processor, it implements the method for constructing QC-LDPC codes based on Logistic chaotic mapping as described in Embodiment 1 or 2.

[0116] Example 5

[0117] Based on the same inventive concept as other embodiments, this embodiment describes a computer device, including:

[0118] Memory, used to store instructions;

[0119] A processor is configured to execute the instructions, causing the device to perform operations that implement the method for constructing QC-LDPC codes based on Logistic chaotic mapping as described in Embodiment 1 or 2.

[0120] In summary, this invention generates chaotic sequences based on Logistic mappings and constructs initial basis matrices accordingly. This fully leverages the inherent randomness and initial value sensitivity of chaotic systems, resulting in a basis matrix structure with no fixed pattern. Even for the same code length and code rate parameters, minute changes in initial parameters will produce drastically different chaotic sequences and basis matrices. This fundamentally avoids the risk of being deciphered by attackers through statistical analysis or algebraic attacks due to fixed construction rules, significantly improving system security.

[0121] This invention performs 4-ring detection and elimination based on the initial basis matrix and the expansion factor, and constructs a check matrix based on the optimized basis matrix and the expansion factor. It uses an iterative method to perform performance verification based on the check matrix, which can systematically identify and eliminate performance-limiting short rings in the check matrix, effectively optimize the Tanner graph structure, reduce the number of trap sets, and thus significantly reduce the error floor under high signal-to-noise ratio, improving the error correction performance and reliability of QC-LDPC codes.

[0122] This invention eliminates short cycles within the maximum number of iterations by traversing all 2×2 submatrices in the initial basis matrix and randomly resetting elements that satisfy non-zero shift values ​​and form 4-cycles based on the short cycle elimination condition. This reduces the linear dependence of the parity check matrix, thereby lowering the error propagation probability of LDPC codes in iterative decoding and improving codeword error correction capability and convergence speed.

[0123] Those skilled in the art will understand that embodiments of the present invention can be provided as methods, systems, or computer program products. Therefore, the present invention can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present invention can take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0124] This invention is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart illustrations and / or block diagrams. Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0125] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0126] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0127] The embodiments of the present invention have been described above with reference to the accompanying drawings. However, the present invention is not limited to the specific embodiments described above. The specific embodiments described above are merely illustrative and not restrictive. Those skilled in the art can make many other forms under the guidance of the present invention without departing from the spirit and scope of the claims. All of these forms are within the protection scope of the present invention.

Claims

1. A method for constructing QC-LDPC codes based on Logistic chaotic mapping, characterized in that, include: The number of rows, columns, and spread factor of the basis matrix are obtained by configuring and initializing the parameters based on the code length and code rate of the QC-LDPC code to be constructed. Based on the Logistic mapping, a length of [length missing] is generated according to the preset Logistic mapping parameters. OK A chaotic sequence of columns, where, This represents the row number of the basis matrix. Indicates the number of columns in the basis matrix; The initial basis matrix is ​​obtained by quantizing the displacement values ​​of the chaotic sequence and the expansion factor. Based on the initial basis matrix and the expansion factor, a four-ring detection and elimination process is performed to obtain the optimized basis matrix; Construct a verification matrix based on the optimized base matrix and the expansion factor; Performance verification is performed using an iterative method based on the verification matrix: If the performance verification fails, then perform 4-ring detection and elimination based on the initial basis matrix and the expansion factor until the maximum number of iterations is reached, and construct a QC-LDPC code based on the iterated basis matrix. If the performance verification passes, a QC-LDPC code is constructed based on the optimized base matrix.

2. The method for constructing QC-LDPC codes based on Logistic chaotic mapping according to claim 1, characterized in that, The Logistic mapping is represented as follows: ； In the formula, Indicates the first The state values ​​of the chaotic sequence in the next iteration. Indicates the first The state values ​​of the chaotic sequence in the next iteration. This represents the preset Logistic mapping parameters, wherein the parameter configuration includes the preset Logistic mapping parameters. The range of state values ​​for the chaotic sequence in the first iteration is: .

3. The method for constructing QC-LDPC codes based on Logistic chaotic mapping according to claim 1, characterized in that, The initial basis matrix is ​​obtained by shift-value quantization based on the chaotic sequence and the spread factor, including: The displacement value of each element in the chaotic sequence is calculated based on the expansion factor; Fill the initial basis matrix with the displacement value of each element.

4. The method for constructing QC-LDPC codes based on Logistic chaotic mapping according to claim 3, characterized in that, The expression for calculating the displacement value of each element in the chaotic sequence is: ； In the formula, Represents the first in the chaotic sequence element displacement value, Indicates the expansion factor, " indicates the floor function, This represents the modulo operation. This represents the density threshold of non-zero elements. Indicates the remaining cases.

5. The method for constructing QC-LDPC codes based on Logistic chaotic mapping according to claim 4, characterized in that, Based on the initial basis matrix and the expansion factor, a four-ring detection and elimination process is performed to obtain the optimized basis matrix, including: Iterate through all 2-row, 2-column submatrices in the initial basis matrix; Repeat the following steps until the 4-ring cycle is eliminated or the maximum number of iterations is reached: For each 2x2 submatrix, if all four elements in the submatrix are non-zero displacement values ​​and satisfy the short-cycle elimination condition, then randomly select one of the four elements and reset it to a random integer between 0 and z-1 to obtain the optimized base matrix.

6. The method for constructing QC-LDPC codes based on Logistic chaotic mapping according to claim 5, characterized in that, The short-loop elimination condition is expressed as follows: ； In the formula, This represents the element in the first row and first column of the submatrix. This represents the element in the first row and second column of the submatrix. This represents the element in the second row and first column of the submatrix. This represents the element in the second row and second column of the submatrix.

7. The method for constructing QC-LDPC codes based on Logistic chaotic mapping according to claim 6, characterized in that, Construct a verification matrix based on the optimized basis matrix and the expansion factor, including: Iterate through each element of the optimized basis matrix: If the current element is -1, then replace and expand the element to... OK A matrix of all zeros in the columns; If the current element is not -1, then replace and expand the element by shifting it to the right by the current element value by units. OK The identity matrix of columns; After traversing all elements of the basis matrix, we obtain OK The check matrix of the column.

8. A system for constructing QC-LDPC codes based on Logistic chaotic mapping, characterized in that, include: The parameter initialization module is used to configure and initialize parameters based on the code length and code rate of the QC-LDPC code to be constructed, and obtain the number of rows, columns and spread factor of the basis matrix. The chaotic sequence generation module is used to generate sequences of length based on the Logistic mapping and according to preset Logistic mapping parameters. OK A chaotic sequence of columns, where, This represents the row number of the basis matrix. Indicates the number of columns in the basis matrix; The displacement quantization module is used to quantize the displacement values ​​based on the chaotic sequence and the expansion factor to obtain the initial basis matrix. The ring detection and elimination module is used to perform 4-ring detection and elimination based on the initial basis matrix and the expansion factor to obtain the optimized basis matrix; A verification matrix construction module is used to construct a verification matrix based on the optimized base matrix and the expansion factor. The performance verification module is used to perform performance verification based on the verification matrix using an iterative method: if the performance verification fails, then 4-ring detection and elimination are performed based on the initial base matrix and the expansion factor until the maximum number of iterations is reached, and a QC-LDPC code is constructed based on the iterated base matrix; if the performance verification passes, then a QC-LDPC code is constructed based on the optimized base matrix.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the method for constructing QC-LDPC codes based on Logistic chaotic mapping as described in any one of claims 1-7.

10. A computer device, characterized in that, include: Memory, used to store instructions; A processor for executing the instructions, causing the device to perform operations implementing the method for constructing QC-LDPC codes based on Logistic chaotic mapping as described in any one of claims 1-7.

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