Backboard bus system, method and marine engine room control equipment
Through the integrated design of multi-level power supply network, digital communication and hot-swappable protection modules, the communication rate and scalability issues of backplane bus architecture in complex environments are solved, achieving high reliability and stability of the backplane bus system and supporting intelligent diagnostics and safe operation.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-11-27
- Publication Date
- 2026-04-10
AI Technical Summary
Existing backplane bus architectures are unable to meet the demands of real-time, massive data exchange in high-reliability, high-density expansion, and harsh industrial environments. They suffer from low communication rates, poor topology scalability, rudimentary hot-swapping capabilities, and a lack of refined management, which can easily lead to system failures and low reliability.
The system employs a multi-level power supply network module, a digital communication network module, a board and slot detection module, and a hot-swappable control and protection module to achieve a vertically distributed power supply network, real-time status monitoring, and multi-level safety protection. Through functional modular design, the system resource allocation and fault isolation of each board and slot are optimized.
It improves the system's safety, stability, and reliability, enabling stable operation under complex working conditions. It supports communication between multiple master devices, realizes intelligent diagnosis of board and slot status and hot-swappable, and prevents fault propagation.
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Figure CN121841886A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of automation control technology, specifically to a backplane bus system, method, and ship engine room control equipment. Background Technology
[0002] In hardware systems for ship engine room automation, industrial control, and communication equipment, the backplane bus serves as the core infrastructure connecting various functional boards such as the main control board, signal acquisition board, and data exchange board. Its performance and reliability directly determine the stability, scalability, and maintainability of the entire hardware platform. Currently, such systems commonly adopt a backplane design based on a multi-slot architecture to achieve centralized power supply and data communication between boards.
[0003] However, when facing the application requirements of high reliability, high-density expansion, and harsh industrial environments, the communication rate of related backplane bus architecture designs is low, making it difficult to meet the real-time massive data exchange needs of modern distributed control systems. Furthermore, their bus topology scalability is poor, failing to effectively support the arbitration strategies required for multi-master device communication. Simultaneously, the hot-swapping function design is rudimentary, lacking fine-grained management of board status and in-situ detection mechanisms. During insertion and removal, boards are easily damaged by surge currents or voltage spikes, potentially jeopardizing the stable operation of other operating boards. Moreover, when a single board or slot power supply fails, the anomaly can easily propagate through the shared power network and communication bus, leading to system-level cascading failures and significantly reducing the system's fault tolerance and availability. Therefore, the reliability of related backplane bus architecture designs is low. Summary of the Invention
[0004] This invention provides a backplane bus system, method, and ship engine room control equipment, aiming to solve problems such as low reliability in related backplane bus architecture designs.
[0005] In a first aspect, a backplane bus system is provided, the backplane bus including multiple slots, and at least one board is disposed in each slot, the backplane bus system including a power supply network module, and a digital communication network module, a board and slot detection module and a hot-swap control and protection module disposed on the same backplane as the power supply network module and electrically connected to it respectively. The power supply network module is used to supply power to the backplane, the slot and the board through a multi-power network; The digital communication network module is used to provide a channel for data communication between the boards; The board and slot detection module is used to collect the power network loop current and the general input and output levels of the detection channels of the board in real time, and to monitor the physical connection status and operating status between each board and the corresponding slot. The hot-swap control and protection module is used to provide multi-level safety protection for the power supply network module and the digital communication network module in the event of hot-swapping of the board.
[0006] In some embodiments, the power supply network module includes a backplane-level power network unit, a slot-level power network unit, and a board-level power network unit; The backplane-level power network unit is equipped with power lines and an array of electrolytic capacitors that match the rated voltage of each slot, providing a low-impedance, high-current power supply channel for the backplane. The slot-level power network unit is used to provide a power supply channel with high-frequency noise isolation and instantaneous current response capability for each slot based on the deployment of ceramic capacitor arrays and magnetic beads in each slot. The board-level power network unit is used to provide a stable input voltage to each board by setting decoupling capacitors at the power input of each board.
[0007] In some embodiments, the electrolytic capacitor array is configured to combine resistors and electrolytic capacitors of different capacitance values in series and parallel in a matrix form to suppress the ripple voltage of the backplane power network unit.
[0008] In some embodiments, the ceramic capacitor array is configured to combine multiple ceramic capacitors that meet preset temperature characteristics in series and parallel in a matrix form to store energy and filter noise for the slot-level power network unit.
[0009] In some embodiments, the hot-swap control protection module includes a first-level protection unit, a second-level protection unit, and a third-level protection unit; The first-level protection unit is equipped with a bleed resistor network to divert high-frequency interference current from the board in the hot-swappable state. The second-level protection unit is equipped with an electrostatic discharge protection diode array to suppress surge current of boards in a hot-swappable state; The third-level protection unit is configured to be connected to ground to provide a current discharge path for boards in a hot-swappable state.
[0010] In some embodiments, the board and slot detection module is used to collect the power network loop current and the general input / output level of the detection channel of the board in real time, and to detect the physical connection status and operating status between each board and the corresponding slot, including: The board and slot detection module is used to collect the power network loop current and the general input and output levels of the detection channel of the board in real time. If the general input / output level of the detection channel of the board is high, and the power network loop current is greater than zero and does not exceed the rated current of the slot, the physical connection between the board and the corresponding slot is determined to be normal. If the general input / output level of the detection channel of the board is high and the power network loop current exceeds a preset ratio of the rated current of the slot, the board is determined to be faulty and the slot is valid. If the general input / output level of the detection channel of the board is low and the power network loop current exceeds the rated current of the slot, the slot is determined to be faulty.
[0011] In some embodiments, the digital communication network module includes a low-speed serial bus unit and a high-speed serial bus unit; The low-speed serial bus unit is configured with several pairs of independent and symmetrically arranged differential buses of equal length, which are used to provide a low-speed communication channel for the board. The high-speed serial bus unit is configured with several pairs of independent and symmetrically arranged differential buses of equal length, used to detect the ripple voltage in the power network loop of the high-speed serial bus.
[0012] In some embodiments, the high-speed serial bus unit is further configured to adjust the parameters of the decision feedback equalizer at the communication channel receiver of the high-speed serial bus based on the ripple voltage.
[0013] In some embodiments, the system further includes: Fault isolation module; The fault isolation module is used to isolate faulty slots based on the status signals of each board and corresponding slot detected by the board and slot detection module, the loop current of the slot-level power network unit, and the ripple voltage in the power network loop of the high-speed serial bus unit.
[0014] In some embodiments, the fault isolation module is used to isolate faulty slots based on the status signals of each board and corresponding slot detected by the board and slot detection module, the loop current of the slot-level power network unit, and the ripple voltage in the power network loop of the high-speed serial bus unit, including: The fault isolation module is used to collect the status signals of each board and the corresponding slot detected by the board and slot detection module, the loop current of the slot-level power network unit, and the ripple voltage in the power network loop of the high-speed serial bus unit. When the current in the slot-level power network unit loop exceeds a preset ratio of the slot's rated current, the corresponding slot is determined to be faulty, and the corresponding slot is isolated, the slot-level power network loop is shut down, and the digital communication network module is bypassed. When the current in the slot-level power network loop does not exceed a preset ratio of the slot's rated current, and the ripple voltage in the power network loop of the high-speed serial bus unit exceeds a preset ripple voltage threshold, the slot-level power network is determined to be faulty, and the corresponding slot is isolated.
[0015] Secondly, a hot-swap safety control method for a backplane bus system is provided, applied to a backplane bus system comprising multiple slots and boards respectively deployed in each slot, wherein the backplane bus system includes a power supply network module, a digital communication network module, a board and slot detection module, and a hot-swap control and protection module; the method includes: The backplane, the slot, and the board are powered by multiple power networks in the power supply network module. The board and slot detection module collects the power network loop current corresponding to each slot and the general input / output level of the board detection channel in real time. Based on the combined state of the power network loop current and the general input / output level, monitor the physical connection status and operating status between each board and the corresponding slot; In the event of hot-swapping of the board, the hot-swapping control and protection module is triggered to provide multi-level safety protection for the power supply network module and the digital communication network module. The digital communication network module is used to provide a channel for data communication between the boards.
[0016] Thirdly, a ship engine room control device includes a memory and a processor, wherein the memory stores a computer program that, when executed by the processor, implements the steps of the above-described method.
[0017] Beneficial effects: The backplane bus system in this application provides shared system resources for each board slot through a vertically distributed power supply network, board and slot monitoring, digital communication network, and hot-swap control and protection functional layers. Once a board is inserted into a slot, the power supply network module on the backplane stably provides power of various specifications, the digital communication network module provides different communication rates for data communication between boards, the board and slot detection module monitors the connection and operating status of each board and slot in real time, and the hot-swap control and protection module provides multi-level safety protection for the system. This enables intelligent diagnosis of board and slot status and safe hot-swap operation, allowing the system to operate stably under complex conditions with the collaborative protection of multiple modules, significantly improving the system's safety, stability, and reliability. Attached Figure Description
[0018] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0019] Figure 1 This is a schematic diagram of the backplane bus system architecture provided by an exemplary embodiment of this disclosure; Figure 2 This is a schematic diagram of the principle of a multi-level power supply network provided by an exemplary embodiment of this disclosure; Figure 3 This is a schematic diagram illustrating the diagnostic principle of the board and slot detection module provided in an exemplary embodiment of this disclosure; Figure 4 This is a schematic diagram of the fault isolation mechanism provided in an exemplary embodiment of this disclosure; Figure 5 This is a schematic diagram of the structure of a ship engine room control device provided in an exemplary embodiment of this disclosure. Detailed Implementation
[0020] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.
[0021] In the description of this application, it should be understood that the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," and "outer," etc., indicating orientation or positional relationships based on the orientation or positional relationships shown in the accompanying drawings, are used only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, features defined with "first" and "second" may explicitly or implicitly include one or more of the stated features. In the description of this application, "a plurality of" means two or more, unless otherwise explicitly specified.
[0022] "A and / or B" includes the following three combinations: A only, B only, and a combination of A and B.
[0023] The use of "applies to" or "configured to" in this application implies open and inclusive language, which does not exclude the applicability to or configuration to devices performing additional tasks or steps. Additionally, the use of "based on" implies openness and inclusivity, because processes, steps, calculations, or other actions "based on" one or more of the stated conditions or values may in practice be based on additional conditions or values beyond those stated.
[0024] In this application, the term "exemplary" is used to mean "used as an example, illustration, or description." Any embodiment described as "exemplary" in this application is not necessarily to be construed as being more preferred or advantageous than other embodiments. The following description is provided to enable any person skilled in the art to make and use this application. Details are set forth in the following description for purposes of explanation. It should be understood that those skilled in the art will recognize that this application can be made without using these specific details. In other instances, well-known structures and processes are not described in detail to avoid obscuring the description of this application with unnecessary detail. Therefore, this application is not intended to be limited to the embodiments shown, but is consistent with the broadest scope of the principles and features disclosed in this application.
[0025] This embodiment provides a backplane bus system, which is mainly applied to the hardware architecture of automated control equipment in ship engine rooms. It aims to solve the shortcomings of existing multi-slot acquisition board bus general architecture in terms of communication speed, scalability, hot-swap security, and fault isolation, and meet the requirements for stable operation of multi-board systems in harsh industrial environments such as high electromagnetic interference and mechanical vibration in ship engine rooms.
[0026] On the one hand, the backplane bus system provided in this embodiment has the following hardware architecture: Figure 1 As shown, the details are as follows: The backplane bus system in this embodiment adopts a functional modular and hierarchical collaborative hardware architecture design concept, dividing the system into five core functional modules, including a power supply network module, and a digital communication network module, a board and slot detection module, and a hot-swap control and protection module, which are located on the same backplane as the power supply network module and are electrically connected to the digital communication network module, the board and slot detection module, and the hot-swap control and protection module through standardized interfaces (such as power connectors and differential signal pin definitions). Each module achieves low-coupling connection through standardized interfaces, which not only facilitates independent optimization and replacement of each module, but also ensures the accuracy and timeliness of information transmission between modules.
[0027] The power supply network module provides stable, low-noise, multi-specification power to the backplane, slots, and boards via multiple power networks, ensuring a high-quality system. The digital communication network module provides channels for data communication between boards via low-speed and high-speed serial buses, handling data interaction between boards in different slots and supporting communication at various speeds. The board and slot detection module collects real-time data from the power network loop current and the general-purpose input / output levels of the board's detection channels, and monitors each board (e.g., board 1, board 2, board 3, board 4, ...). The backplane bus monitors the physical connection status (i.e., in-situ status) and operating status between the card (n) and its corresponding slot (e.g., slot 1, slot 2, slot 3, slot 4, ..., slot n) to perform fault diagnosis and power control of the card's operating status, and to provide basic data for fault diagnosis. The hot-swap control and protection module provides multi-level safety protection for the power supply network module and digital communication network module in the event of hot-swapping of the card, preventing damage to the equipment from instantaneous current, static electricity, etc. The fault isolation module achieves rapid isolation of faulty slots by comprehensively judging the status of each module, preventing fault propagation. The backplane bus includes multiple slots, and each slot has at least one card.
[0028] Therefore, the backplane bus system in this embodiment provides shared system resources for each board slot through vertically distributed power supply networks, board and slot monitoring, digital communication networks, hot-swap control and protection, fault isolation, and other functional layers. Once a board is inserted into a slot, it can reliably obtain power through these vertical functional layers on the backplane and perform high-speed data exchange and low-speed control communication with the main control unit or other boards. Simultaneously, under the management of on-site monitoring and hot-swap protection mechanisms, the entire system achieves intelligent diagnosis of board and slot status and safe hot-swap operation, enabling the system to operate stably under complex conditions with the collaborative protection of multiple modules, and facilitating system hardware maintenance.
[0029] In some embodiments, the specific functional implementation and coordination logic of each module in the backplane bus system are as follows: In some embodiments, the power supply network module includes a backplane-level power supply network unit, a slot-level power supply network unit, and a board-level power supply network unit. A three-level power supply network optimization strategy (backplane, slot, and board levels) is employed. Through component selection, printed circuit board (PCB) layout optimization, and electromagnetic simulation verification, low impedance, low ripple, and high stability of the power supply network are achieved. Figure 2 As shown, the specific implementation process is as follows: As an example, the backplane-level power network unit is equipped with power lines of copper thickness that match the rated voltage of each slot, as well as an array of electrolytic capacitors of different capacitance values, to provide a low-impedance, high-current power supply path for the backplane, enabling high-current, low-loss transmission while suppressing low-frequency ripple.
[0030] Optionally, the electrolytic capacitor array is configured to combine multiple ceramic capacitors that meet preset temperature characteristics in series and parallel in a matrix form to store energy and filter noise in the slot-level power network unit. For example, a 2oz thick copper layer is used as the power routing layer. Compared with a conventional 1oz copper layer, the resistance of a 2oz thick copper layer is reduced by 50%, which can significantly reduce power consumption during current transmission. During the PCB design stage, impedance analysis of the power network is performed through electromagnetic simulation, and the width and spacing of the thick copper layer wiring are adjusted to ensure that the DC voltage impedance is not greater than 1mΩ and to meet the transmission requirement of a maximum power supply current of 10A. This ensures that the voltage of each slot board is closer to the nominal value and avoids voltage drop or undervoltage operation in slots and boards far from the power module.
[0031] Furthermore, an electrolytic capacitor matrix with ultra-low equivalent series resistance (ESR) is deployed at the power input of the backplane and at each power branch node in the slots to suppress low-frequency ripple and reduce voltage fluctuations. Ultra-low equivalent series resistance refers to a resistance value less than or equal to 50mΩ. For example, electrolytic capacitors with different capacitance values and ultra-low ESR are selected to ensure that the filtering range covers both high-frequency bands (e.g., above 100MHz) and low-frequency bands (e.g., below 30MHz). Electrolytic capacitors of different capacitance values are combined in series and parallel in a matrix configuration to balance the branch current using the inductive characteristics of the capacitors when there is high-frequency ripple input, achieving voltage and current equalization. Parallel electrolytic capacitors reduce the overall ESR of the electrolytic capacitor matrix, thereby suppressing power supply ripple voltage and ensuring stable power supply to each board. As can be seen, in this embodiment, by laying a 2oZ thick copper layer for power supply and an electrolytic capacitor matrix with ultra-low ESR, the filter frequency band is dynamically matched in the marine engine room application environment under different operating conditions, thereby improving the system's adaptability and scalability to complex power supply environments.
[0032] As an exemplary example, the slot-level power network unit is used to provide a power supply channel with high-frequency noise isolation and instantaneous current response capability for each slot based on the deployment of ceramic capacitor arrays and ferrite beads in each slot, thereby achieving high-frequency noise isolation and instantaneous current response.
[0033] Optionally, the ceramic capacitor array is configured to combine multiple ceramic capacitors that meet preset temperature characteristics in a matrix arrangement in series and parallel to perform energy storage and noise filtering for the slot-level power network unit. For example, near the power connector in each slot, an array of 0402-packaged X7R ceramic capacitors and ferrite beads (such as ferrite beads) are placed close together. Here, 0402 package refers to a surface mount device (SMD) package size standard for electronic components; 0402 indicates that the component's length is approximately 0.04 inches and its width is approximately 0.02 inches; X7R is an industry standard code characterizing the temperature characteristics of the dielectric material in ceramic capacitors. As an exemplary example, a 0402-packaged X7R ceramic capacitor array is obtained by connecting two 1nF, two 10nF, two 100nF, and two 100pF capacitors of the same capacitance in parallel.
[0034] The ceramic capacitor array is connected in parallel between the power supply network and the ground. Since CPUs, FPGAs, MCUs and other devices require instantaneous voltage build-up upon power-up to quickly start the core, the current demand of the board is relatively large at the moment of power-up. In this embodiment, the ceramic capacitor array stores energy, which can not only release charge and quickly respond to the instantaneous current compensation demand when the board is inserted, but also filter out low-frequency noise, reduce noise reflection, and reduce EMI radiation.
[0035] The ferrite bead is connected in series in the power input path of the slot, such as... Figure 3 As shown, this effectively suppresses high-frequency noise, preventing high-frequency noise generated by a single board from being conducted to other slots through the power lines and interfering with the boards in other slots, thus achieving electrical isolation between slots. At the same time, by absorbing high-frequency noise, it can reduce noise reflection, reduce electromagnetic interference (EMI) radiation, improve the electromagnetic compatibility of the entire system, and improve environmental adaptability.
[0036] As an example, the board-level power network unit is used to provide a stable input voltage to each board by setting decoupling capacitors at the power input of each board, preventing voltage fluctuations caused by load changes.
[0037] Optionally, decoupling capacitors (e.g., by matching a set of 100nF + 1nF capacitors) can be placed at the power input of the board near the connector pins between the board and the backplane to minimize the length of the wiring. This isolates noise from the slot and noise generated by the internal circuitry of the board. At the same time, when there is a momentary current change in the load at the back end of the board (such as the CPU or sensor module), the stored energy is quickly released to replenish the momentary current demand, stabilize the input voltage, prevent the voltage from dropping instantly, and ensure the stable operation of the core components of the board, thereby effectively improving the power supply of the board and the stability of the system.
[0038] It should be noted that the implementation of the three-level power supply network is not a simple stacking of existing components in layers. Instead, through thermal management and fluid flow simulation of the electronic system, as well as joint simulation of signal integrity, power integrity, and EMI radiation of the PCB and package, the impedance fluctuation range of the entire frequency band is limited. The layout of capacitors and ferrite beads on the PCB and the wiring length between each component and its corresponding pin are optimized to overcome technical obstacles such as impedance mismatch caused by the stacking of multiple levels of components and the conduction of high-frequency noise across levels, thus ensuring the stability of the power supply network in the entire frequency band.
[0039] In some embodiments, the hot-swap control and protection module includes a first-level protection unit, a second-level protection unit, and a third-level protection unit, that is, it adopts a three-level protection design, constructing a protection system from three dimensions: high-frequency interference suppression, electrostatic surge protection, and grounding discharge, to ensure the safety of the board during hot-swapping. The specific implementation scheme is as follows: Optionally, a bleeder resistor network can be configured for the first-level protection unit to divert high-frequency interference current from boards that are hot-swapped. As an example, near the power and signal connectors in each slot of the backplane, an RC bleeder network consisting of resistors and capacitors is connected in parallel between the power supply and ground. When a board is inserted or removed, the high-frequency interference current generated can be quickly discharged to ground through the RC bleeder network, preventing high-frequency interference from being conducted along the power or signal lines and affecting the normal operation of other boards.
[0040] Optionally, an ESD protection diode array can be configured for the second-level protection unit to suppress inrush current from boards in a hot-swappable state. As an example, ESD protection diodes are connected in series on the power and signal pins of each slot to quickly conduct during ESD or surge impacts, discharging the discharge current to ground and clamping the pin voltage within a safe range. Simultaneously, a Transient Voltage Suppressor (TVS) diode is connected in series at the backplane power network mains inlet to further enhance the surge protection capability of the power network module.
[0041] Optionally, the third-level protection unit is configured to be connected to ground to provide a current discharge path for hot-swappable boards. As an example, electrical connections are made between the ground plane layer on the backplane and the mounting screws. The mounting screws are connected to the external equipment housing via multi-strand copper wires, forming a low-impedance grounding discharge loop from the backplane ground plane layer to the mounting screws and then to the equipment housing. This allows for the rapid discharge of static charge and interference current accumulated on the backplane to ground, while simultaneously reducing the potential difference between the backplane and the housing, thus reducing electromagnetic radiation and meeting the electrostatic protection requirements of the ship's engine room.
[0042] In some embodiments, the board and slot detection module is used to detect the physical connection status and operating status between each board and its corresponding slot based on the power network loop current and the general-purpose input / output (GPIO) levels of the board's detection channels. This employs a dual-mode detection method combining GPIO level detection and power loop current sampling, combining board presence and operating status diagnosis to achieve accurate judgment of the slot and board status. Simultaneously, it provides trigger signals for hot-swap protection and fault isolation. The specific implementation logic is as follows: As an exemplary example, for GPIO-level-based presence detection, an independent presence detection pin is provided on the connector of each slot. When the board is inserted into the slot, a pull-up resistor is input through the presence detection channel on the backplane to pull the GPIO pin high; when the board is removed from the slot, a pull-down resistor is input through the presence detection channel on the backplane to pull the GPIO pin low. It is easy to understand that by setting an appropriate sampling period for the GPIO signal, a fast response to changes in presence status is ensured.
[0043] For power network loop current sampling, a current sampling resistor is connected in series in the power input loop of each slot. The voltage across the sampling resistor is collected by a current and voltage monitoring chip to calculate the real-time current of the slot power loop. The current detection range and detection accuracy are set according to design requirements. The current data is transmitted to the microcontroller via the I2C bus and stored and analyzed synchronously with the GPIO level data.
[0044] For example, such as Figure 3As shown, when board 1 is inserted into slot 1, the GPIO pin is pulled high by the pull-up resistor input through the presence detection channel on the backplane; when board 1 is pulled out of slot 1, the GPIO pin is pulled low by the pull-down resistor input through the presence detection channel on the backplane. Simultaneously, a current sampling resistor is connected in series in the power supply circuit of slot 1 to collect the real-time current signal of the circuit and convert it into current data. Subsequently, the GPIO level of slot 1 is detected by pin a of the microcontroller, the power supply circuit current of slot 1 is detected by pin b, and the slot power protection module is controlled by pin c to perform logical judgment. If the GPIO is high and the power supply circuit current is greater than zero and less than the rated current of slot 1, it is determined that the physical connection between the board and slot 1 is normal and the operation is normal, triggering the power supply of slot 1 to be enabled. If the GPIO is high and the power supply circuit current is greater than zero and less than a preset proportion (e.g., 120%) of the rated current of slot 1, it is determined that the board is faulty and slot 1 is valid, triggering the slot power protection module to cut off the power supply of slot 1. If the GPIO is low and the power supply circuit current is greater than zero, it is determined that the power supply circuit of slot 1 is faulty, and the slot power protection module is also triggered to cut off the power supply. Finally, through the actions of enabling power supply normally or cutting off power supply due to fault, the accurate monitoring and safe control of the operating status of slot 1 is achieved.
[0045] Furthermore, based on the collected GPIO level and current data, the microcontroller determines the working status of the slot and the board according to the following preset logic: When the GPIO level of the detection channel of the board is high and the power network loop current is greater than zero and does not exceed the rated current of the slot, the physical connection between the board and the corresponding slot is determined to be normal. At this time, the microcontroller determines that the physical connection of the board is normal and the operating status is healthy, and sends a normal presence signal to the system main control module.
[0046] If the general input / output level of the detection channel of the board is high and the power network loop current exceeds the preset ratio of the slot's rated current (e.g., the power network loop current is greater than 120% of the slot's rated current), it is determined that the board has a short circuit, overload, or other fault and the slot is valid. The microcontroller immediately triggers the corresponding alarm signal and sends a slot power cut-off command to the hot-swap control and protection module to cut off the power supply to the slot and prevent the fault from escalating.
[0047] If the general input / output level of the detection channel on the board is low and the power network loop current exceeds the rated current of the slot, it is determined that there is a fault such as leakage or short circuit in the power supply loop of the slot. The microcontroller immediately triggers the corresponding alarm signal and triggers the slot power protection to cut off the power supply to the slot. At the same time, the fault information is uploaded to the fault isolation module.
[0048] In some embodiments, the digital communication network module includes a low-speed serial bus unit and a high-speed serial bus unit. A dual-link design using both low-speed and high-speed serial buses is employed to meet the communication requirements of different types of boards, such as low-speed sensor acquisition boards and high-speed data processing boards. Differential signal design, impedance matching, and adaptive equalization techniques ensure high-speed and reliable data transmission. The specific implementation is as follows: As an example, the low-speed serial bus unit is configured with several pairs of independent and symmetrically arranged differential buses of equal length to provide a low-speed communication channel for the board to transmit control commands, status information and other data with a transmission rate of less than or equal to 1 Mbps. The types of low-speed serial buses in this example include, but are not limited to, the Recommended Standard 485 (RS485), Controller Area Network (CAN), Inter-Integrated Circuit (IIC), and Serial Peripheral Interface (SPI). Specifically, the physical layer communication protocol standard for RS485 is EIA / TIA-485-A; the physical layer communication protocol standard for CAN is ISO 11898; the physical layer communication protocol standard for IIC is a technical standard document published by a certain company defining the electrical characteristics, timing requirements, protocol format, arbitration mechanism, addressing mode, etc., of the IIC serial communication bus; and the physical layer communication protocol standard for SPI is a technical standard document initially developed and published by a certain company, including the timing diagram, data frame format, clock polarity and phase mode, master-slave working mechanism, etc.
[0049] Optionally, four pairs of differential buses can be configured for the low-speed serial bus unit. Each pair of differential lines uses symmetrical equal-length routing on the PCB, and each pair of differential lines is equipped with an independent complete ground plane to reduce crosstalk between adjacent differential lines and lower noise, thereby meeting the reliability requirements of low-speed data transmission. It is easy to understand that during the symmetrical equal-length routing of the differential lines, it is ensured that the length deviation of the symmetrical equal-length routing and the spacing between the ground plane and the differential lines meet the design accuracy requirements.
[0050] As an exemplary example, the high-speed serial bus unit is configured with several pairs of independent and symmetrically arranged differential buses of equal length, used to detect ripple voltage in the power network loop of the high-speed serial bus to transmit control commands, status information, and other data at a transmission rate greater than or equal to 100 Mbps. The low-speed serial bus types in this example include, but are not limited to, Peripheral Component Interconnect Express (PCIe) and Low-Voltage Differential Signaling (LVDS). PCIe uses the core foundation document 3.0 (PCI ExpressBase Specification 3.0) of the high-speed serial bus standard widely used in modern computers and embedded systems for its physical layer communication protocol; LVDS primarily follows the TIA / EIA-644 standard for its physical layer communication protocol.
[0051] Optionally, four pairs of differential buses can be configured for the high-speed serial bus unit. The difference from the low-speed serial bus unit is that the high-speed differential signals employ strict characteristic impedance matching, for example, a strict characteristic impedance matching of 100Ω ± 10%. During the PCB design phase, impedance calculations are performed using integrated electronic system simulation software. The line width and spacing of the differential lines are adjusted to be controlled within the required error range. A grounding routing method is adopted, with grounding copper foil or grounding vias placed adjacent to or around each pair of differential signal lines to isolate the differential pairs from nearby signals, thereby reducing the impact of external interference on high-speed signals.
[0052] Furthermore, the high-speed serial bus unit is also used to adjust the parameters of the decision feedback equalizer at the communication channel receiver of the high-speed serial bus based on the ripple voltage. For example, a high-precision (e.g., ±1%) current sampling resistor is connected in series in the high-speed bus power supply network loop. The voltage across the sampling resistor is collected by a high common-mode voltage, bidirectional, high-voltage side current sensor to calculate the ripple voltage of the power supply loop. The sampling frequency is set to 1MHz, and the ripple detection resolution reaches 0.2mV to meet the design requirement of a ripple detection resolution of less than 0.5mV.
[0053] When the ripple in the high-speed bus power supply circuit exceeds 5mV, the current sensor transmits the abnormal signal to the microcontroller on the board. The microcontroller adjusts parameters such as the tap coefficients of the decision feedback equalization (DFE) at the receiving end based on the degree of ripple abnormality, forming a closed-loop control for power stability and bus equalization. This significantly improves signal jitter and noise reduction. Simulation tests show that this closed-loop control is suitable for backplane differential links with multiple board slots and a ripple detection resolution of less than 0.5mV and a transmission rate greater than 2Gb / s.
[0054] As an exemplary example, the fault isolation module is used to isolate faulty slots based on the status signals of each board and corresponding slot detected by the board and slot detection module, the loop current of the slot-level power network unit, and the ripple voltage in the power network loop of the high-speed serial bus unit. That is, it employs a multi-module status linkage logic design, achieving accurate identification and rapid isolation of faulty slots through comprehensive analysis of the status data from the power supply network module, digital communication network module, board and slot detection module, and hot-swap control and protection module. Specifically, the fault isolation logic includes, for example... Figure 4 As shown, the implementation process is as follows: The backplane bus system collects status data of each module in real time through the main control module interface. For example, it collects voltage, current, and ripple data of each slot power supply in the power supply network module according to a preset sampling period via the I2C bus; it collects bit error rate and signal jitter data of the high-speed serial bus unit in the digital communication network module via the PCIe bus; it collects communication status data such as frame error and parity error of the low-speed serial bus unit in the digital communication network module via the IIC bus; it collects GPIO level, current sampling data and status judgment results in the board and slot detection module via the RS485 bus; and it collects protection status data such as ESD trigger count and surge voltage peak value in the hot-swap control and protection module via the SPI bus.
[0055] The main control module analyzes the collected status data based on preset fault judgment thresholds, such as voltage fluctuation threshold, bit error rate threshold, and ESD trigger count threshold. If it determines that a fault exists in a certain slot, such as a short circuit in a board, excessive power ripple, or communication abnormality, it will initiate one or more of the following isolation procedures: When the current in the slot-level power network unit loop exceeds a preset proportion of the slot's rated current, it is determined that an overcurrent fault has occurred in the corresponding slot. A command is then sent via the CAN bus to the power control chip of that slot to promptly isolate the corresponding slot, shut down the slot-level power network loop, and bypass the digital communication network module. If the current in the slot-level power network loop does not exceed a preset proportion of the slot's rated current, it indicates that an overcurrent fault has occurred in the corresponding slot, and the slot is considered valid. Further checks are then performed on the communication channel status of that slot and the ripple voltage of the high-speed serial bus signal power supply. If the ripple voltage in the power network loop of the high-speed serial bus unit exceeds a preset ripple voltage threshold, a slot-level power network fault is determined. The microcontroller configures the switching chip of the digital communication network module to isolate the differential signal connection between the corresponding slot and other slots, achieving communication link isolation and preventing the fault from propagating through the communication link. Otherwise, the corresponding slot is considered to be operating normally, and the same monitoring process continues to monitor the next slot until all slots and boards on the backplane are monitored, ensuring timely and accurate fault isolation and system fault tolerance protection.
[0056] Furthermore, information such as the faulty slot number, fault type, and fault occurrence time is stored in local storage and uploaded to the ship's engine room monitoring system via Ethernet to remind maintenance personnel to perform maintenance. After fault isolation, the main control module repeatedly checks the GPIO level and power circuit insulation resistance of the slot at preset time intervals to perform status checks on the slot. If the test results return to normal, a recovery suggestion is sent to the maintenance personnel. After confirmation, power is restored to the slot and the communication link is reconnected.
[0057] The fault isolation mechanism in this embodiment can isolate the fault in a timely manner after it occurs, without affecting the operation of other normal slots, thus effectively improving the fault tolerance of the system.
[0058] In some embodiments, to further improve the reliability and intelligence of the system, this embodiment adopts a hardware-software co-design approach. Through the linkage of software algorithms and hardware circuit parameters, it achieves accurate quantification and dynamic adjustment of the system's operating state. Specific optimization measures are as follows: The software dynamically adjusts key parameters of the hardware circuit through interfaces such as I2C and SPI. For example, based on the power consumption requirements of different boards, the software adjusts the output current limit of the power management chip in the power supply network module to avoid wasting power resources; based on the ripple monitoring data of the high-speed bus, the software automatically optimizes the tap coefficient of the DFE in the digital communication network module, which can adapt to changes in the power supply environment without manual intervention; based on the ESD trigger frequency, the software dynamically adjusts the resistance value of the RC discharge network in the hot-swap control and protection module to optimize the high-frequency interference suppression effect.
[0059] Furthermore, the software transforms the discrete data collected by the hardware into intuitive quantitative indicators of operational status. For example, by combining data such as voltage fluctuations, current ripple, and power supply duration, power supply stability indicators are calculated, such as calculating a power supply stability score, and triggering an alert when the power supply stability score falls below a preset threshold. Based on bit error rate, signal jitter, and number of communication interruptions, communication quality indicators are calculated, such as calculating a communication quality level, and initiating a communication link switch when the level falls below a preset level. Combining board operating temperature, current fluctuations, and on-premises time, board health indicators are calculated, such as calculating a board health score, and prompting board replacement when the board health score falls below a preset threshold.
[0060] In this embodiment, through hardware and software co-design and digital and intelligent improvements, loop detection, closed-loop control, and fault diagnosis logic are added and linked with hardware circuit parameters. This achieves a change from the conventional backplane's single-function mode of only providing slot connection and fixation, and accurately quantifies the system's operating status. As a result, the backplane bus system not only has a stable hardware foundation, but can also achieve adaptive adjustment and intelligent diagnosis through software. This further improves the system's applicability, safety, and reliability in the harsh environment of ship engine rooms.
[0061] This embodiment also provides a hot-swap safety control method for a backplane bus system, applied to a backplane bus system including multiple slots and boards respectively deployed in each slot. The backplane bus system includes a power supply network module, a digital communication network module, a board and slot detection module, and a hot-swap control and protection module; the method includes: The backplane, the slot, and the board are powered by multiple power networks in the power supply network module. The board and slot detection module collects the power network loop current corresponding to each slot and the general input / output level of the board detection channel in real time. Based on the combined state of the power network loop current and the general input / output level, monitor the physical connection status and operating status between each board and the corresponding slot; In the event of hot-swapping of the board, the hot-swapping control and protection module is triggered to provide multi-level safety protection for the power supply network module and the digital communication network module. The digital communication network module is used to provide a channel for data communication between the boards.
[0062] This embodiment also provides a ship engine room control device, such as... Figure 5 As shown, it includes a memory and a processor. In a specific example, the memory stores a computer program, which, when executed by the processor, implements the method described in the above embodiments.
[0063] This embodiment also provides a computer-readable storage medium having a computer program stored thereon, the computer program being loaded by a processor to perform the steps of any of the methods in the above embodiments.
[0064] In the embodiments of this application, the storage medium may be a magnetic disk, an optical disk, a read-only memory (ROM), or a random access memory (RAM), etc.
[0065] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.
[0066] The foregoing has provided a detailed description of a backplane bus system, method, and ship engine room control equipment provided in the embodiments of this application. Specific examples have been used to illustrate the principles and implementation methods of this application. The descriptions of the above embodiments are only for the purpose of helping to understand the method and core ideas of this application. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of this application. Therefore, the content of this specification should not be construed as a limitation of this application.
Claims
1. A backplane bus system, characterized by The backplane bus comprises a plurality of slots, and at least one board is arranged on each slot, the backplane bus system comprises a power supply network module, a digital communication network module, a board and slot detection module and a hot plug control protection module which are arranged on the same backplane and are electrically connected respectively; The power supply network module is used for supplying power to the backplane, the slot and the board through a plurality of power supply networks respectively; The digital communication network module is used for providing a channel for data communication between the boards; The board and slot detection module is used for collecting the power supply network loop current and the general input and output level of the detection channel of the board in real time, and monitoring the physical connection state and the running state between each board and the corresponding slot; The hot plug control protection module is used for providing multi-level safety protection for the power supply network module and the digital communication network module in the case of hot plug of the board.
2. The backplane bus system of claim 1, wherein, The power supply network module comprises a backplane level power supply network unit, a slot level power supply network unit and a board level power supply network unit; The backplane level power supply network unit is paved with a power supply line and an electrolytic capacitor array matched with the rated voltage of each slot, and is used for providing a low impedance and large current power supply channel for the backplane; The slot level power supply network unit is used for providing a power supply channel with high frequency noise isolation and transient current response capability for each slot based on arranging a ceramic capacitor array and a magnetic bead in each slot; The board level power supply network unit is used for providing a stable inlet voltage for each board based on arranging a decoupling capacitor at the power inlet of each board.
3. The backplane bus system of claim 2, wherein, The electrolytic capacitor array is configured to combine resistors and electrolytic capacitors of different capacitance values in matrix form in series and parallel to suppress the ripple voltage of the backplane level power supply network unit.
4. The backplane bus system of claim 2, wherein, The ceramic capacitor array is configured to combine a plurality of ceramic capacitors satisfying preset temperature characteristics in matrix form in series and parallel to store energy and filter noise for the slot level power supply network unit.
5. The backplane bus system of claim 1, wherein, The hot plug control protection module comprises a first level protection unit, a second level protection unit and a third level protection unit; The first level protection unit is configured with a bleed resistor network for diverting high frequency interference current of the board in the hot plug state; The second level protection unit is configured with an array of static protection diodes for suppressing inrush current of the board in the hot plug state; The third level protection unit is configured to be connected to the ground for providing a current discharge channel for the board in the hot plug state.
6. The backplane bus system of claim 1, wherein, The board and slot detection module is used for collecting the power supply network loop current and the general input and output level of the detection channel of the board in real time, and detecting the physical connection state and the running state between each board and the corresponding slot, comprising: The board and slot detection module is used for collecting the power supply network loop current and the general input and output level of the detection channel of the board in real time; In the case that the general input and output level of the detection channel of the board is high, and the power supply network loop current is greater than zero and does not exceed the slot rated current, it is determined that the physical connection state between the board and the corresponding slot is normal; In a case that the general input and output level of the detection channel of the board card is high level and the power network loop current exceeds a preset proportion of the slot rated current, it is determined that the board card is faulty and the slot is valid; In a case that the general input and output level of the detection channel of the board card is low level and the power network loop current exceeds the slot rated current, it is determined that the slot is faulty.
7. The backplane bus system of claim 6, wherein, The digital communication network module comprises a low-speed serial bus unit and a high-speed serial bus unit; The low-speed serial bus unit is configured with a plurality of pairs of independent and symmetrically equal-length differential buses, which are used to provide a low-speed communication channel for the board card; The high-speed serial bus unit is configured with a plurality of pairs of independent and symmetrically equal-length differential buses, which are used to detect a ripple voltage in a power network loop of a high-speed serial bus.
8. The backplane bus system of claim 7, wherein, The high-speed serial bus unit is further used to adjust parameters of a decision feedback equalizer at a receiving end of a communication channel of the high-speed serial bus based on the ripple voltage.
9. The backplane bus system of claim 7, wherein, The system further comprises: a fault isolation module; The fault isolation module is used to isolate a faulty slot based on the state signals of each board card and corresponding slot detected by the board card and slot detection module, the slot-level power network unit loop current and the ripple voltage in the power network loop of the high-speed serial bus unit.
10. The backplane bus system of claim 9, wherein, The fault isolation module is used to isolate a faulty slot based on the state signals of each board card and corresponding slot detected by the board card and slot detection module, the slot-level power network unit loop current and the ripple voltage in the power network loop of the high-speed serial bus unit, comprising: The fault isolation module is used to collect the state signals of each board card and corresponding slot detected by the board card and slot detection module, the slot-level power network unit loop current and the ripple voltage in the power network loop of the high-speed serial bus unit; When it is detected that the slot-level power network unit loop current exceeds a preset proportion of the slot rated current, it is determined that the corresponding slot is faulty, and the corresponding slot is isolated, the slot-level power network loop is closed and the digital communication network module is bypassed; When it is detected that the slot-level power network unit loop current does not exceed a preset proportion of the slot rated current and the ripple voltage in the power network loop of the high-speed serial bus unit exceeds a preset ripple voltage threshold, it is determined that the slot-level power network is faulty, and the corresponding slot is isolated.
11. A hot plug safety control method of a backplane bus system, characterized by, The method is applied to a backplane bus system comprising a plurality of slots and board cards respectively arranged on the slots, and the backplane bus system comprises a power supply network module, a digital communication network module, a board card and slot detection module and a hot plug control protection module; the method comprises: The power supply network module is used to supply power to the backplane, the slots and the board cards through a plurality of power supply networks; The board card and slot detection module is used to collect the power network loop current of each slot and the general input and output level of the detection channel of the board card in real time; According to the combination state of the power network loop current and the general input and output level, the physical connection state and the running state between each board card and corresponding slot are monitored; The power supply network module is used to supply power to the backplane, the slots and the board cards through a plurality of power supply networks; In the case of hot plug of the board card, the hot plug control protection module is triggered to provide multi-level safety protection for the power supply network module and the digital communication network module, and the digital communication network module is used to provide a channel for data communication between the board cards.
12. A marine engine room control apparatus, characterized by, The computer program is stored in the memory and is executed by the processor to implement the steps of the method in claim 11.