MIM capacitor structure and its fabrication method

Abstract

This application provides a MIM capacitor structure and its fabrication method, belonging to the field of semiconductor technology. The fabrication method includes: forming a first insulating layer on a substrate, and performing a first photolithography and etching process using a preset photomask to form trenches in the first insulating layer; sequentially forming a first conductive layer, a first dielectric layer, a second conductive layer, and a second dielectric layer; performing a second photolithography and etching process on the second dielectric layer, the second conductive layer, and the first dielectric layer using a preset photomask to form a protrusion structure and expose the surfaces of the first conductive layer on both sides of the trench; forming a first sidewall structure to cover the sidewalls of the protrusion structure; and sequentially forming a third conductive layer and a second insulating layer, wherein the third conductive layer conformally covers the surfaces of the first conductive layer, the first sidewall structure, and the protrusion structure, and the second insulating layer covers the surface of the third conductive layer. This application can improve the capacitance density of the MIM capacitor structure.

Description

Technical Field

[0001] This application relates to the field of semiconductor technology, specifically to a MIM capacitor structure and its fabrication method. Background Technology

[0002] MIM capacitors, or metal-insulator-metal capacitors, are an extremely important passive component in integrated circuits.

[0003] Figure 1 This is a schematic diagram of a MIM capacitor. Figure 1 As shown, the MIM capacitor is located on the substrate 11 and includes two metal electrodes 12 and a dielectric layer 13 located between the two metal electrodes 12. To obtain a higher capacitance value, common approaches include: increasing the area, but sacrificing chip area and increasing cost; or reducing the dielectric layer thickness, but leading to reliability risks.

[0004] Therefore, there is a need for a method to effectively increase the capacitance density of MIM capacitor structures without increasing the substrate area occupied by the chip. Summary of the Invention

[0005] In view of this, this application aims to provide a MIM capacitor structure and its fabrication method, so as to effectively improve the capacitance density of the MIM capacitor structure without increasing the substrate area occupied by the chip.

[0006] The method for fabricating the MIM capacitor structure provided in this application includes:

[0007] A substrate is provided, a first insulating layer is formed on the substrate, and a first photolithography process and an etching process are performed using a preset photomask to form trenches in the first insulating layer;

[0008] A first conductive layer, a first dielectric layer, a second conductive layer, and a second dielectric layer are sequentially formed. The first conductive layer conformally covers the surface of the first insulating layer and the inner wall of the trench. The first dielectric layer conformally covers the surface of the first conductive layer. The second conductive layer covers the surface of the first dielectric layer and fills the remaining portion of the trench. The second dielectric layer covers the surface of the second conductive layer.

[0009] The second photolithography process and etching process are performed on the second dielectric layer, the second conductive layer and the first dielectric layer using the preset photomask to form a protrusion structure and expose the surface of the first conductive layer on both sides of the trench. The protrusion structure includes the first dielectric layer, the second conductive layer and the second dielectric layer located above the trench. The photoresist type of the second photolithography process is opposite to that of the first photolithography process.

[0010] A first sidewall structure is formed to cover the sidewall of the protruding structure;

[0011] A third conductive layer and a second insulating layer are formed sequentially. The third conductive layer conformally covers the surfaces of the first conductive layer, the first sidewall structure, and the protruding structure, and the second insulating layer covers the surface of the third conductive layer.

[0012] Optionally, when forming the protrusion structure, the critical dimension of the protrusion structure along the substrate surface direction is larger than the critical dimension of the trench along the substrate surface direction.

[0013] Optionally, the steps for forming the first sidewall structure include:

[0014] A third dielectric layer is formed to conformally cover the surface of the first conductive layer and the outer wall of the protruding structure;

[0015] Anisotropic dry etching is performed to remove the first conductive layer and the third dielectric layer on the surface of the protrusion structure. The remaining third dielectric layer located on the sidewall of the protrusion structure serves as the first sidewall structure.

[0016] Optionally, after forming the third dielectric layer, a hard material layer is also formed to cover the surface of the third dielectric layer, and the remaining third dielectric layer and hard material layer located on the sidewall of the protrusion structure after etching are used as the first sidewall structure. The material of the hard material layer includes silicon nitride or metal.

[0017] Optionally, after performing the second photolithography and etching processes, the second conductive layer includes a first portion located within the trench and a second portion located within the protrusion structure. The first portion is semi-enclosed, and the second portion is planar. The first portion and the second portion are connected to form a closed structure. The step of forming the first portion includes:

[0018] A first sub-conductive layer is formed to conformally cover the surface of the first dielectric layer;

[0019] A third insulating layer is formed to cover the surface of the first sub-conductive layer and fill the remaining portion of the trench;

[0020] A polishing process is performed to remove part of the third insulating layer and the first sub-conductive layer outside the trench, exposing the surface of the first dielectric layer. The remaining first sub-conductive layer in the trench serves as the first part.

[0021] Optionally, the steps for forming the second part include:

[0022] A second sub-conductive layer is formed to cover the surfaces of the first dielectric layer, the first sub-conductive layer, and the third insulating layer;

[0023] A second dielectric layer is formed to cover the surface of the second sub-conductive layer;

[0024] Perform the second photolithography and etching process to remove part of the second dielectric layer, part of the second sub-conductive layer and part of the first dielectric layer, exposing the surface of the first conductive layer, and the remaining second sub-conductive layer serves as the second part.

[0025] Optionally, a first plug is formed to lead out the second conductive layer, and a second plug is formed to lead out the third conductive layer and the first conductive layer. The steps of forming the first plug and the second plug include:

[0026] A first contact hole is formed that penetrates the second insulating layer, the third conductive layer, and the second dielectric layer, exposing the surface of the second conductive layer; and a second contact hole is formed that penetrates the second insulating layer, exposing the surface of the third conductive layer.

[0027] A second sidewall structure is formed to cover the sidewalls of the first contact hole and the second contact hole;

[0028] The first plug is formed in the first contact hole, and the second plug is formed in the second contact hole.

[0029] Based on another aspect of this application, a MIM capacitor structure is also provided, comprising:

[0030] A substrate, wherein a first insulating layer is provided on the surface of the substrate, and the first insulating layer has trenches therein;

[0031] A first conductive layer covers the surface of the first insulating layer and the inner wall of the trench;

[0032] The third conductive layer has a portion located on the surface of the first conductive layer outside the trench, and another portion protruding away from the trench, forming a closed structure with the first conductive layer inside the trench.

[0033] The second conductive layer is located within the enclosed structure;

[0034] A dielectric layer is filled between the second conductive layer and the enclosed structure.

[0035] Optionally, the second conductive layer includes a first part located within the trench and a second part located above the trench, the first part being semi-enclosed and the second part being planar, the first part and the second part being connected to form a closed structure.

[0036] Optionally, the dielectric layer includes a first dielectric layer, a sidewall structure, and a second dielectric layer. The first dielectric layer is located between a first conductive layer and a second conductive layer within the trench. The second dielectric layer is located between a third conductive layer and a second conductive layer above the trench. The sidewall structure is located on the sidewall of the second conductive layer.

[0037] In summary, the unexpected effect of this application is that only one photomask (preset photomask) is needed to form the three conductive layers (electrodes) of the MIM capacitor provided in this application, which helps to reduce the manufacturing cost of the MIM capacitor structure and improve the manufacturing efficiency of the MIM capacitor. Moreover, in this application, the first conductive layer and the third conductive layer form a closed structure through trenches, and the second conductive layer is located inside the closed structure. Each side of the second conductive layer facing the closed structure constitutes a capacitor, thereby increasing the area of ​​the capacitor in the MIM capacitor structure with the same substrate area, thereby increasing the capacitance value of the MIM capacitor structure and improving the capacitance density of the MIM capacitor structure. Attached Figure Description

[0038] Figure 1 This is a schematic diagram of a MIM capacitor.

[0039] Figure 2 This is a flowchart illustrating a method for fabricating a MIM capacitor structure according to an embodiment of this application.

[0040] Figure 3 This is a schematic diagram of a trench formed on a first insulating layer of a substrate, provided as an embodiment of this application.

[0041] Figure 4 This is a schematic diagram of the formation of the first conductive layer and the first dielectric layer provided in an embodiment of this application.

[0042] Figure 5 This is a schematic diagram illustrating the formation of a first sub-conductive layer and a third insulating layer, provided for an embodiment of this application.

[0043] Figure 6 This is a schematic diagram of the third insulating layer and the first sub-conductive layer after grinding, as provided in an embodiment of this application.

[0044] Figure 7 This is a schematic diagram illustrating the formation of a second sub-conductive layer and a second dielectric layer, provided for an embodiment of this application.

[0045] Figure 8 This is a schematic diagram illustrating the formation of a patterned photoresist layer using a second photolithography process performed with a preset photomask, as provided in an embodiment of this application.

[0046] Figure 9 This is a schematic diagram of the formation of a protruding structure provided in an embodiment of this application.

[0047] Figure 10This is a schematic diagram illustrating the formation of a third dielectric layer and a rigid material layer, provided for an embodiment of this application.

[0048] Figure 11 This is a schematic diagram of the formation of the first sidewall structure provided in an embodiment of this application.

[0049] Figure 12 This is a schematic diagram illustrating the formation of the third conductive layer and the second insulating layer, provided for an embodiment of this application.

[0050] Figure 13 This is a schematic diagram illustrating the formation of the first contact hole and the second contact hole, provided in an embodiment of this application.

[0051] Figure 14 This is a schematic diagram of the formation of the second sidewall structure provided in an embodiment of this application.

[0052] Figure 15 This is a schematic diagram illustrating the formation of the first plug and the second plug, provided for an embodiment of this application.

[0053] exist Figure 1 In the middle: 11-substrate; 12-metal electrode; 13-dielectric layer.

[0054] exist Figures 3-15 In the middle: 100-substrate; 110-first insulating layer; 120-trench; 210-first conductive layer; 220-first dielectric layer; 230-first sub-conductive layer; 240-third insulating layer; 231-first part; 250-second sub-conductive layer; 251-second part; 252-etch stop layer; 260-second dielectric layer; 270-second conductive layer; 310-patterned photoresist layer; 320-bump structure; 331-third dielectric layer; 332-hard material layer; 330-first sidewall structure; 340-third conductive layer; 350-second insulating layer; 360-first contact hole; 370-second contact hole; 361-second sidewall structure; 362-first plug; 371-second plug. Detailed Implementation

[0055] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0056] This application provides a method for fabricating a MIM capacitor structure. Figure 2 This is a flowchart illustrating a method for fabricating a MIM capacitor structure according to an embodiment of this application. Figure 2As shown, a method for fabricating a MIM capacitor structure according to an embodiment of this application includes:

[0057] S100: Provide a substrate, form a first insulating layer on the substrate, and perform a first photolithography process and an etching process using a preset photomask to form trenches in the first insulating layer;

[0058] S200: A first conductive layer, a first dielectric layer, a second conductive layer, and a second dielectric layer are formed sequentially. The first conductive layer conformally covers the surface of the first insulating layer and the inner wall of the trench. The first dielectric layer conformally covers the surface of the first conductive layer. The second conductive layer covers the surface of the first dielectric layer and fills the remaining portion of the trench. The second dielectric layer covers the surface of the second conductive layer.

[0059] S300: The second photolithography process and etching process are performed on the second dielectric layer, the second conductive layer and the first dielectric layer using the preset photomask to form a protrusion structure and expose the surface of the first conductive layer on both sides of the trench. The protrusion structure includes the first dielectric layer, the second conductive layer and the second dielectric layer located above the trench. The photoresist type of the second photolithography process is opposite to that of the first photolithography process.

[0060] S400: Form a first sidewall structure to cover the sidewall of the protruding structure;

[0061] S500: A third conductive layer and a second insulating layer are formed sequentially, wherein the third conductive layer conformally covers the surfaces of the first conductive layer, the first sidewall structure, and the protruding structure, and the second insulating layer covers the surface of the third conductive layer.

[0062] Figures 3-15 This is a schematic diagram of the corresponding steps in the fabrication method of the MIM capacitor structure provided in an embodiment of this application. Next, we will combine... Figures 3-15 The method for fabricating the MIM capacitor structure provided in this application will be described in detail.

[0063] First, such as Figure 3 As shown, in step S100, a substrate 100 is provided, a first insulating layer 110 is formed on the substrate 100, and a first photolithography process and an etching process are performed using a preset photomask to form a trench 120 in the first insulating layer 110.

[0064] The substrate 100 may be made of silicon (Si), germanium (Ge), silicon-germanium (GeSi), silicon-on-insulator (SOI), germanium-on-insulator (GOI), gallium arsenide (GaAs), silicon carbide (SiC), gallium nitride (GaN), indium phosphide (InP), zinc sulfide (ZnS), cadmium sulfide (CdS), or cadmium telluride (CdTe), or may be an organic semiconductor material or other semiconductor materials known in the art. Integrated circuits may also be present on the surface of or within the substrate 100. These integrated circuits may be semiconductor elements such as transistors, diodes, and triodes, or semiconductor interconnect structures such as plugs and interconnects.

[0065] The first insulating layer 110 may include silicon oxide, silicon oxynitride, silicon nitride, or any combination thereof. In addition, the first insulating layer 110 may be formed alone or may reuse other insulating layers on the surface of the substrate 100, such as interlayer dielectric layers or intermetallic dielectric layers.

[0066] In one example, the pattern of the preset photomask may be the opposite (complementary) to the pattern of the trench 120 to be defined, and a first photolithography process is performed using a positive photoresist layer. Next, an etching process is performed to form the trench 120 in the first insulating layer 110, and then the photoresist layer is removed. The trench 120 has a first critical dimension in a planar direction (e.g., the substrate surface direction). It is possible for the trench 120 to penetrate or not penetrate the first insulating layer 110.

[0067] Next, as Figures 4-7 As shown, in step S200, a first conductive layer 210, a first dielectric layer 220, a second conductive layer 270, and a second dielectric layer 260 are formed sequentially. The first conductive layer 210 conformally covers the surface of the first insulating layer 110 and the inner wall of the trench 120. The first dielectric layer 220 conformally covers the surface of the first conductive layer 210. The second conductive layer 270 covers the surface of the first dielectric layer 220 and fills the remaining part of the trench 120. The second dielectric layer 260 covers the surface of the second conductive layer 270.

[0068] like Figure 4 As shown, a first conductive layer 210 and a first dielectric layer 220 are formed sequentially. The first conductive layer 210 conformally covers the surface of the first insulating layer 110 and the inner wall of the trench 120, and the first dielectric layer 220 conformally covers the surface of the first conductive layer 210. The material of the first conductive layer 210 can be any suitable conductive material, such as copper, aluminum, tungsten, or titanium. The material of the first dielectric layer 220 may include silicon oxide or a suitable high-k dielectric layer, and the thickness of the first dielectric layer 220 can be set according to the spacing (gap) between the electrodes in the MIM capacitor structure.

[0069] like Figure 5 As shown, a first sub-conductive layer 230 is formed to conformally cover the surface of the first dielectric layer 220, and a third insulating layer 240 is formed to cover the surface of the first sub-conductive layer 230 and fill the remaining portion of the trench 120. The material of the first sub-conductive layer 230 can be any suitable conductive material, and the material of the third insulating layer 240 can be, for example, silicon oxide.

[0070] like Figure 6 As shown, a polishing process is performed to remove part of the third insulating layer 240 and the first sub-conductive layer 230 outside the trench 120, exposing the surface of the first dielectric layer 220 outside the trench 120. The remaining first sub-conductive layer 230 in the trench 120 serves as the first part 231. The first part 231 may be semi-closed (e.g., U-shaped or bowl-shaped), similar to the shape of the trench 120. The end surface of the first part 231 away from the trench 120 is exposed to the surfaces of the first dielectric layer 220 and the third insulating layer 240.

[0071] like Figure 7 As shown, a second sub-conductive layer 250 is formed to cover the surfaces of the first dielectric layer 220, the first sub-conductive layer 230, and the third insulating layer 240, and a second dielectric layer 260 is formed to cover the surface of the second sub-conductive layer 250. The second sub-conductive layer 250 is in contact (electrically connected) with the first sub-conductive layer 230.

[0072] In an optional embodiment of this application, after forming the second sub-conductive layer 250, an etch stop layer 252 may be formed to cover the surface of the second sub-conductive layer 250, and then a second dielectric layer 260 may be formed to cover the surface of the etch stop layer 252. The material of the second sub-conductive layer 250 may be the same as or similar to the material of the first sub-conductive layer 230, and the material of the second dielectric layer 260 may be the same as or similar to the material of the first dielectric layer 220, and may have the same thickness as the first dielectric layer 220. In one example, the material of the etch stop layer 252 may be a conductive material, such as a metallic material like titanium nitride or tantalum carbide. In other examples, the material of the etch stop layer 252 may also be an insulating material different from the second dielectric layer 260, such as silicon nitride.

[0073] Next, as Figures 8-9 As shown, in step S300, a second photolithography and etching process is performed on the second dielectric layer 260, the second conductive layer 270 and the first dielectric layer 220 using a preset photomask to form a protrusion structure 320 and expose the surface of the first conductive layer 210 on both sides of the trench 120. The protrusion structure 320 includes the first dielectric layer 220, the second conductive layer 270 and the second dielectric layer 260 located above the trench 120. The photoresist type of the second photolithography process is opposite to that of the first photolithography process.

[0074] like Figure 8As shown, a patterned photoresist layer 310 is formed on the second dielectric layer 260 using a preset photomask and a second photolithography process. This patterned photoresist layer 310 covers the second dielectric layer 260 above the trench 120 and exposes the surfaces of the second dielectric layer 260 on both sides of the trench 120. The photoresist type in the second photolithography process is opposite to that in the first photolithography process. Taking the photoresist layer in the first photolithography process as positive as an example, in this example, a negative photoresist layer can be used in the second photolithography process. Furthermore, the critical dimension (second critical dimension) of the second photolithography process can be made larger than the critical dimension (first critical dimension) of the first photolithography process by adjusting the exposure parameters or development parameters. For example, the second critical dimension may be 0-10% larger than the first critical dimension.

[0075] like Figure 9 As shown, a dry etching process is performed to remove a portion of the second dielectric layer 260, a portion of the etch stop layer 252, a portion of the second sub-conductive layer, and a portion of the first dielectric layer 220 to form a protrusion structure 320, exposing the surface of the first conductive layer 210. Then, the patterned photoresist layer 310 is removed. The protrusion structure 320 includes the remaining second dielectric layer 260, etch stop layer 252, second sub-conductive layer, and first dielectric layer 220 after the aforementioned etching. The remaining second sub-conductive layer serves as the second part 251, and the remaining first sub-conductive layer in the trench 120 serves as the first part 231. The first part 231 extends from the trench 120 and contacts the second part 251, forming an electrical connection and a closed structure. The closed structure is filled with a third insulating layer 240. Furthermore, the first part 231 and the second part 251 together form the second conductive layer 270. At this time, the side of the second part 251 is exposed from the side (end) of the protrusion structure 320.

[0076] In addition to the second photolithography process, the critical dimension of the protrusion structure 320 can also be adjusted by adjusting the dry etching process so that the critical dimension of the protrusion structure 320 is larger than the first critical dimension.

[0077] Next, as Figures 10-11 As shown, step S400 is executed to form a first sidewall structure 330, which covers the sidewall of the protruding structure 320.

[0078] like Figure 10 As shown, a third dielectric layer 331 and a hard material layer 332 are sequentially formed to cover the surface of the first conductive layer 210 and the outer wall of the protruding structure 320. The material of the third dielectric layer 331 can be the same as or similar to that of the second dielectric layer 260, and the thickness of the third dielectric layer 331 can also be the same as or similar to that of the second dielectric layer 260. The material of the hard material layer 332 can be different from that of the third dielectric layer 331, and a suitable material for the hard material layer 332 can be selected so that the third dielectric layer 331 has a larger etching selectivity than the hard material layer 332 during etching.

[0079] like Figure 11 As shown, anisotropic dry etching is performed to remove the third dielectric layer 331 and hard material layer 332 on the surfaces of the first conductive layer 210 and the protrusion structure 320. The remaining third dielectric layer 331 and hard material layer 332 located on the sidewalls of the protrusion structure 320 serve as the first sidewall structure 330. Of course, the etching processes for the hard material layer 332 and the third dielectric layer 331 can be different. When etching the third dielectric layer 331, the remaining hard material layer 332 (near the sidewalls of the protrusion structure 320) is used to protect the third dielectric layer 331 located on the sidewalls of the protrusion structure 320, preventing the thickness of the third dielectric layer 331 on the sidewalls of the protrusion structure 320 (second conductive layer 270) from being too thin or exposed. In one example, the hard material layer 332 can be made of a metallic material, such as titanium nitride or tantalum nitride. In another example, the rigid material layer 332 may be made of an insulating material different from the third dielectric layer 331, such as silicon nitride.

[0080] In an alternative example of this application, it is also feasible to not form the aforementioned hard material layer 332 on the surface of the third dielectric layer 331, so that the etched first sidewall structure 330 includes only the third dielectric layer 331.

[0081] Next, as Figure 12 As shown, in step S500, a third conductive layer 340 and a second insulating layer 350 are formed sequentially. The third conductive layer 340 conformally covers the surfaces of the first conductive layer 210, the first sidewall structure 330, and the protrusion structure 320, while the second insulating layer 350 covers the surface of the third conductive layer 340.

[0082] The material of the third conductive layer 340 may be the same as or similar to that of the first conductive layer 210. The third conductive layer 340 conformally covers the surfaces of the first conductive layer 210, the first sidewall structure 330, and the protruding structure 320. Specifically, a portion of the third conductive layer 340 contacts the surface of the first conductive layer 210 outside the trench 120, making the third conductive layer 340 electrically connected to the first conductive layer 210. Another portion of the third conductive layer 340 protrudes away from the trench 120, covering the sidewall of the first sidewall structure 330 and the surface of the protruding structure 320, so that this portion of the third conductive layer 340 and the first conductive layer 210 inside the trench 120 form a closed structure. This closed structure surrounds the second conductive layer 270 along a portion of the first dielectric layer 220, the first sidewall structure 330, and a portion of the second dielectric layer 260, forming a MIM capacitor structure.

[0083] In this MIM capacitor structure, each surface of the second conductive layer 270 facing the first conductive layer 210 and the third conductive layer 340 forms part of the capacitor with the closed structure, making the area that can be used as a capacitor in the MIM capacitor structure much larger than the area of ​​the trench 120 on the substrate surface, effectively improving the capacitance density of the MIM capacitor structure.

[0084] Next, as Figures 13-15 As shown, a first plug 362 and a second plug 371 are formed. The first plug 362 electrically leads out the second conductive layer 270, and the second plug 371 electrically leads out the first conductive layer 210.

[0085] like Figure 13 As shown, a first contact hole 360 ​​is formed penetrating the second insulating layer 350, the third conductive layer 340, and the second dielectric layer 260, exposing the surface of the second conductive layer 270. A second contact hole 370 is formed penetrating the second insulating layer 350, exposing the surface of the first conductive layer 210. Wherein, after the first contact hole 360 ​​penetrates the third conductive layer 340, a portion of the third conductive layer 340 is exposed on the side of the first contact hole 360. In some examples, the surface of the first portion 231 of the second conductive layer 270 is covered with a conductive etch stop layer 252, and it is also feasible for the bottom wall of the first contact hole 360 ​​to expose this etch stop layer 252.

[0086] like Figure 14 As shown, a second sidewall structure 361 is formed, covering the sidewalls of the first contact hole 360 ​​and the second contact hole 370. In one example, the step of forming the second sidewall structure 361 may include: forming an insulating material layer conformally covering the surface of the second insulating layer 350 and the inner walls of the first contact hole 360 ​​and the second contact hole 370; performing an anisotropic etching process (dry etching process) to remove the insulating material layer on the surface of the second insulating layer 350 and the bottom walls of the first contact hole 360 ​​and the second contact hole 370; and the remaining insulating material layer covering the sidewalls of the first contact hole 360 ​​and the second contact hole 370 serves as the second sidewall structure 361.

[0087] like Figure 15 As shown, a first plug 362 is formed in the first contact hole 360 ​​for electrically leading out the second conductive layer 270, and a second plug 371 is formed in the second contact hole 370 for electrically leading out the first conductive layer 210 and the third conductive layer 340.

[0088] This application also provides a MIM capacitor structure. Figure 15 This is a schematic diagram of a MIM capacitor structure provided in an embodiment of this application. This MIM capacitor structure can be obtained using the fabrication method described above. Figure 15As shown, an embodiment of this application provides a MIM capacitor structure that may include a substrate 100, a first insulating layer 110, a trench 120, a first conductive layer 210, a third conductive layer 340, a second conductive layer 270, and a dielectric layer. The first insulating layer 110 is disposed on the surface of the substrate 100, and a trench 120 is disposed within the first insulating layer 110. The first conductive layer 210 covers the surface of the first insulating layer 110 and the inner wall of the trench 120. A portion of the third conductive layer 340 is located on the surface of the first conductive layer 210 outside the trench 120, and another portion protrudes away from the trench 120, forming a closed structure with the first conductive layer 210 within the trench 120. The second conductive layer 270 is located within the closed structure. A dielectric layer fills the space between the second conductive layer 270 and the closed structure.

[0089] Please continue to refer to Figure 15 The second conductive layer 270 may include a first portion 231 and a second portion 251. The first portion 231 is located within the trench 120 and is semi-closed and similar in shape to the trench 120 (e.g., bowl-shaped). The second portion 251 is located above the trench 120, is planar, and is fitted onto the opening of the first portion 231, so that the first portion 231 and the second portion 251 are connected to form a closed shape. The closed first portion 231 and the second portion 251 may also be filled with a third insulating layer 240. The dimension of the second portion 251 along the surface direction of the substrate 100 is larger than the dimension of the first portion 231 along the surface direction of the substrate 100, so that the two ends of the second portion 251 extend beyond the edge of the first portion 231. In one example, as shown... Figure 15 As shown, the dimension of the second part 251 along the surface direction of the substrate 100 is larger than the dimension of the trench 120 along the surface direction of the substrate 100, so that both ends of the second part 251 extend above the substrate 100 on both sides of the trench 120. An etch stop layer 252 is also provided on the surface of the second part 251. The etch stop layer 252 may be, for example, a conductive metal material, such as titanium nitride or tantalum nitride.

[0090] Please continue to refer to Figure 15 Within the enclosed structure formed by the first conductive layer 210 and the third conductive layer 340, the dielectric layer includes a first dielectric layer 220, a sidewall structure, and a second dielectric layer 260. The first dielectric layer 220 is located between the first conductive layer 210 and the second conductive layer 270 within the trench 120. The second dielectric layer 260 is located between the third conductive layer 340 and the second conductive layer 270 above the trench 120. The sidewall structure is located on the sidewall of the second conductive layer 270, that is, between the sidewall of the second part 251 and the third conductive layer 340.

[0091] Please continue to refer to Figure 15The first contact hole 360 ​​penetrates the second insulating layer 350, the third conductive layer 340, and the second dielectric layer 260 to expose the surface of the second conductive layer 270 (etch stop layer 252). The second contact hole 370 penetrates the second insulating layer 350 to expose the surface of the first conductive layer 210. The second sidewall structure 361 covers the sidewalls of the first contact hole 360 ​​and the second contact hole 370. The first plug 362 is located inside the first contact hole 360, and the sidewall of the first plug 362 is covered by the second sidewall structure 361 for electrically leading out the second conductive layer 270. The second plug 371 is located inside the second contact hole 370, and the sidewall of the second plug 371 is covered by the second sidewall structure 361 for electrically leading out the third conductive layer 340 (first conductive layer 210).

[0092] In summary, this application provides a MIM capacitor structure and its fabrication method. The fabrication method includes: providing a substrate; forming a first insulating layer on the substrate; and performing a first photolithography process and an etching process using a preset photomask to form trenches in the first insulating layer; sequentially forming a first conductive layer, a first dielectric layer, a second conductive layer, and a second dielectric layer, wherein the first conductive layer conformally covers the surface of the first insulating layer and the inner wall of the trench, the first dielectric layer conformally covers the surface of the first conductive layer, the second conductive layer covers the surface of the first dielectric layer and fills the remaining portion of the trench, and the second dielectric layer covers the surface of the second conductive layer. A second photolithography and etching process is performed on the second dielectric layer, the second conductive layer, and the first dielectric layer using a preset photomask to form a raised structure and expose the surface of the first conductive layer on both sides of the trench. The raised structure includes the first dielectric layer, the second conductive layer, and the second dielectric layer located above the trench. The photoresist type of the second photolithography process is opposite to that of the first photolithography process. A first sidewall structure is formed to cover the sidewall of the raised structure. A third conductive layer and a second insulating layer are formed sequentially. The third conductive layer conformally covers the surface of the first conductive layer, the first sidewall structure, and the raised structure, and the second insulating layer covers the surface of the third conductive layer. An unexpected effect of this application is that the three conductive layers (electrodes) of the MIM capacitor provided in this application can be formed using only one photomask (preset photomask), which helps to reduce the manufacturing cost of the MIM capacitor structure and improve the manufacturing efficiency of the MIM capacitor. Moreover, in this application, the first conductive layer and the third conductive layer form a closed structure through trenches, and the second conductive layer is located inside the closed structure. Each side of the second conductive layer facing the closed structure constitutes a capacitor, thereby increasing the area of ​​the capacitor in the MIM capacitor structure with the same substrate area, thereby increasing the capacitance value of the MIM capacitor structure and improving the capacitance density of the MIM capacitor structure.

[0093] It should be noted that the various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. For the systems disclosed in the embodiments, since they correspond to the methods disclosed in the embodiments, the descriptions are relatively simple, and relevant parts can be referred to the method section.

[0094] It should also be noted that although preferred embodiments have been disclosed above, these embodiments are not intended to limit this application. Any person skilled in the art can make many possible variations and modifications to the technical solutions of this application, or modify them into equivalent embodiments, without departing from the scope of the technical solutions of this application. Therefore, any simple modifications, equivalent changes, and modifications made to the above embodiments based on the technical essence of this application, without departing from the content of the technical solutions of this application, shall still fall within the scope of protection of the technical solutions of this application.

[0095] It should also be understood that, unless otherwise specified or indicated, the terms “first,” “second,” “third,” etc., in the specification are used only to distinguish the various components, elements, and steps in the specification, and not to indicate the logical or sequential relationships between the various components, elements, and steps.

[0096] Furthermore, it should be recognized that the terminology described herein is used only to describe particular embodiments and is not intended to limit the scope of this application. It must be noted that the singular forms “a” and “an” as used herein include plural bases unless the context clearly indicates the opposite. For example, a reference to “a step” or “an apparatus” means a reference to one or more steps or apparatuses, and may include secondary steps and secondary apparatuses. All conjunctions used should be understood in the broadest sense. Also, the word “or” should be understood as having the definition of logical “or”, not logical “exclusive OR”, unless the context clearly indicates the opposite. Furthermore, implementations of the methods and / or devices in the embodiments of this application may include performing selected tasks manually, automatically, or in combination.

Claims

1. A method for fabricating a MIM capacitor structure, characterized in that, include: A substrate is provided, a first insulating layer is formed on the substrate, and a first photolithography process and an etching process are performed using a preset photomask to form trenches in the first insulating layer; A first conductive layer, a first dielectric layer, a second conductive layer, and a second dielectric layer are sequentially formed. The first conductive layer conformally covers the surface of the first insulating layer and the inner wall of the trench. The first dielectric layer conformally covers the surface of the first conductive layer. The second conductive layer covers the surface of the first dielectric layer and fills the remaining portion of the trench. The second dielectric layer covers the surface of the second conductive layer. The second photolithography process and etching process are performed on the second dielectric layer, the second conductive layer and the first dielectric layer using the preset photomask to form a protrusion structure and expose the surface of the first conductive layer on both sides of the trench. The protrusion structure includes the first dielectric layer, the second conductive layer and the second dielectric layer located above the trench. The photoresist type of the second photolithography process is opposite to that of the first photolithography process. A first sidewall structure is formed to cover the sidewall of the protruding structure; A third conductive layer and a second insulating layer are formed sequentially. The third conductive layer conformally covers the surfaces of the first conductive layer, the first sidewall structure, and the protruding structure, and the second insulating layer covers the surface of the third conductive layer.

2. The method for preparing the MIM capacitor structure according to claim 1, characterized in that, When forming the protrusion structure, the critical dimension of the protrusion structure along the substrate surface direction is greater than the critical dimension of the trench along the substrate surface direction.

3. The method for fabricating a MIM capacitor structure according to claim 1, characterized in that, The steps for forming the first sidewall structure include: A third dielectric layer is formed to conformally cover the surface of the first conductive layer and the outer wall of the protruding structure; Anisotropic dry etching is performed to remove the first conductive layer and the third dielectric layer on the surface of the protrusion structure. The remaining third dielectric layer located on the sidewall of the protrusion structure serves as the first sidewall structure.

4. The method for preparing the MIM capacitor structure according to claim 3, characterized in that, After the third dielectric layer is formed, a hard material layer is also formed to cover the surface of the third dielectric layer, and the third dielectric layer and the hard material layer remaining on the sidewall of the protrusion structure after etching are used as the first sidewall structure. The material of the hard material layer includes silicon nitride or metal.

5. The method for fabricating a MIM capacitor structure according to claim 1, characterized in that, After performing the second photolithography and etching processes, the second conductive layer includes a first portion located within the trench and a second portion located within the protrusion structure. The first portion is semi-enclosed, and the second portion is planar. The first portion and the second portion are connected to form a closed structure. The step of forming the first portion includes: A first sub-conductive layer is formed to conformally cover the surface of the first dielectric layer; A third insulating layer is formed to cover the surface of the first sub-conductive layer and fill the remaining portion of the trench; A polishing process is performed to remove part of the third insulating layer and the first sub-conductive layer outside the trench, exposing the surface of the first dielectric layer. The remaining first sub-conductive layer in the trench serves as the first part.

6. The method for preparing the MIM capacitor structure according to claim 5, characterized in that, The steps for forming the second part include: A second sub-conductive layer is formed to cover the surfaces of the first dielectric layer, the first sub-conductive layer, and the third insulating layer; A second dielectric layer is formed to cover the surface of the second sub-conductive layer; Perform the second photolithography and etching process to remove part of the second dielectric layer, part of the second sub-conductive layer and part of the first dielectric layer, exposing the surface of the first conductive layer, and the remaining second sub-conductive layer serves as the second part.

7. The method for fabricating a MIM capacitor structure according to claim 1, characterized in that, A first plug is formed to lead out the second conductive layer, and a second plug is formed to lead out the third conductive layer and the first conductive layer. The steps of forming the first plug and the second plug include: A first contact hole is formed that penetrates the second insulating layer, the third conductive layer, and the second dielectric layer, exposing the surface of the second conductive layer; and a second contact hole is formed that penetrates the second insulating layer, exposing the surface of the third conductive layer. A second sidewall structure is formed to cover the sidewalls of the first contact hole and the second contact hole; The first plug is formed in the first contact hole, and the second plug is formed in the second contact hole.

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