Method for improving wet etching angle of dielectric layer, dielectric layer and semiconductor device

Abstract

The invention discloses a method for improving a wet etching angle of a dielectric layer, the dielectric layer and a semiconductor device. The method comprises the following steps: forming the dielectric layer on the surface of a substrate; carrying out plasma treatment on the surface of one side, far away from the substrate, of the dielectric layer so as to regulate and control the compactness of the surface and obtain a modified surface; a mask layer is formed on the modified surface, an opening is formed in the mask layer, and at least part of the dielectric layer is exposed; the mask layer is used as a mask, the dielectric layer is etched, an etching bottom face and an etching side face are formed, the included angle between the etching side face and the etching bottom face is a preset angle, adjustment and control over the included angle between the side wall of the etching pattern of the dielectric layer and the surface of the substrate are achieved, and the etching angle requirements of different semiconductor technologies can be met.

Description

TECHNICAL FIELD

[0001] Embodiments of the present application relate to the technical field of semiconductor technology, and particularly relate to a method for improving the wet etching angle of a dielectric layer, a dielectric layer and a semiconductor device. BACKGROUND

[0002] In a semiconductor chip manufacturing process, it is often necessary to etch a dielectric material. Existing etching techniques include wet etching and dry etching. Dry etching is a technique that uses plasma or reactive gas to etch the surface of a wafer. Dry etching can achieve high directionality, thereby obtaining a vertical sidewall and a high aspect ratio. However, dry etching has poor material selectivity and can easily damage the surface of the underlying substrate.

[0003] Wet etching is a technique that uses a chemical solution to etch a dielectric material. Wet etching has material selectivity, but the isotropic characteristics of wet etching make the lateral etching width and the longitudinal etching depth substantially consistent. This characteristic makes it very difficult to control the specific angle or morphology of the sidewall of a trench pattern using wet etching. SUMMARY

[0004] The present application provides a method for improving the wet etching angle of a dielectric layer, a dielectric layer and a semiconductor device. The method can control the included angle between the sidewall of the etching pattern of the dielectric layer and the surface of the substrate, and can meet the etching angle requirements of different semiconductor processes.

[0005] In a first aspect, the present application provides a method for improving the wet etching angle of a dielectric layer, comprising: forming a dielectric layer on the surface of a substrate; performing plasma treatment on the surface of the dielectric layer away from the substrate to control the compactness of the surface and obtain a modified surface; forming a mask layer on the modified surface, the mask layer being provided with an opening and exposing at least part of the dielectric layer; performing etching on the dielectric layer using the mask layer as a mask to form an etching bottom surface and an etching sidewall, wherein the included angle between the etching sidewall and the etching bottom surface is a preset angle.

[0006] Optionally, the plasma treatment on the surface of the dielectric layer away from the substrate comprises: selecting a suitable plasma source gas according to the material type of the dielectric layer to perform plasma treatment on the surface to change the surface compactness.

[0007] Optionally, selecting a suitable plasma source gas according to the material type of the dielectric layer to perform plasma treatment on the surface to change the surface compactness comprises: The flow rate and chamber pressure of the plasma source gas are set to preset values, and the density of the surface is controlled by adjusting the processing time of the plasma source gas.

[0008] Optionally, the material of the dielectric layer is silicon oxide or silicon nitride.

[0009] Optionally, when the dielectric layer is silicon oxide, the plasma source gas is a reactive gas including silane and nitrous oxide, with nitrous oxide as the main plasma gas source; when the dielectric layer is silicon nitride, the plasma source gas is a reactive gas including silane and ammonia, with ammonia as the main plasma gas source.

[0010] Optionally, the plasma treatment duration is monotonically increasing with the preset angle of the etched side.

[0011] Optionally, the preset angle Y and the processing time X satisfy the empirical relationship: Y = 6.3945X + 17.164.

[0012] Optionally, the preset angle between the etched side surface and the etched bottom surface is in the range of 18°-60°.

[0013] Secondly, embodiments of the present invention provide a dielectric layer fabricated using a method for improving the wet etching angle of the dielectric layer as described in any embodiment of the present invention.

[0014] Thirdly, according to an embodiment of the present invention, a semiconductor device includes: a substrate, and a dielectric layer as described in any embodiment of the present invention formed on the substrate.

[0015] The technical solution provided by this invention involves plasma treatment of the surface of the dielectric layer to control the density of the dielectric layer surface, thereby creating a difference in the longitudinal and lateral etching rate ratios at different film depths during wet etching. This allows for the control of the angle between the sidewalls of the etched pattern of the dielectric layer and the substrate surface, thus meeting the etching angle requirements of different semiconductor processes. Attached Figure Description

[0016] Figure 1 This invention is for the purpose of this invention; Figures 2-5 This is a schematic diagram of the intermediate structure provided in an embodiment of the present invention; Figures 6-9 Slice structure diagrams with different plasma processing times and wet etching angles are provided for embodiments of the present invention; Figure 10 The curve showing the relationship between processing time X and etching angle Y is provided for an embodiment of the present invention. Detailed Implementation

[0017] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0018] Figure 1 This invention provides a flowchart of a method for improving the wet etching angle of a dielectric layer, applicable to semiconductor device fabrication. The method specifically includes the following steps: S110, A dielectric layer 120 is formed on the surface of the substrate 110; Specifically, the dielectric layer 120 can be formed using plasma-enhanced chemical vapor deposition (PECVD), low-pressure chemical vapor deposition (LPCVD), atmospheric pressure chemical vapor deposition (APCVD), or atomic layer deposition (ALD). For example, the dielectric layer 120 can be a shallow trench isolation fill layer, passivation layer, interlayer dielectric (ILD), or sacrificial layer in a semiconductor device, and its material is typically silicon oxide (SiO2) or silicon nitride (Si3N4). This is suitable for process scenarios where wet etching is required to pattern or trim the dielectric layer 120, enabling precise control of the etching sidewall angles.

[0019] S120. Plasma treatment is performed on the surface of the dielectric layer 120 away from the substrate 110 to control the surface density and obtain a modified surface 121; its structure is as follows: Figure 2 As shown; Specifically, after the dielectric layer 120 is formed, to avoid exposure to the atmospheric environment, plasma treatment can be performed directly on the surface of the dielectric layer 120 away from the substrate 110 within the same process chamber. This means the process is performed continuously on the same equipment platform used for depositing the dielectric layer 120, preventing surface contamination or oxidation caused by wafer exposure to air, thus ensuring the stability of the plasma modification effect. The plasma treatment process can alter the surface density of the dielectric layer 120. Specifically, during plasma treatment, oxygen vacancies on the surface of the dielectric layer 120 are reduced, thereby decreasing the interface porosity and improving the surface density of the dielectric layer 120. Higher density helps suppress the lateral etching rate during wet etching, thus increasing the angle of the etched side.

[0020] S130, a mask layer 130 is formed on the modified surface 121. The mask layer 130 has openings and exposes at least a portion of the dielectric layer 120. Its structure is as follows: Figure 3 As shown; Specifically, a mask layer 130 is formed on the modified surface 121. The mask layer 130 can be made of photoresist material, and openings are formed after exposure and development. The openings can expose a portion of the modified surface 121.

[0021] S140. Using mask layer 130 as a mask, the dielectric layer 120 is etched to form an etched bottom surface and an etched side surface, wherein the angle between the etched side surface and the etched bottom surface is a preset angle. Its structure is as follows: Figure 4 As shown; Specifically, using the mask layer 130 as a mask, wet etching is performed on the exposed modified surface 121. Due to the adjusted density of the modified surface 121, a difference in the longitudinal and transverse etching rates of the etching solution on the dielectric layer 120 is created, thereby achieving control over the preset angle. Finally, the mask layer 130 is removed, and its structure is as follows: Figure 5 As shown; The technical solution provided by the embodiments of the present invention controls the density of the surface of the dielectric layer 120 by performing plasma treatment on the surface of the dielectric layer 120, thereby creating a difference in the longitudinal and transverse etching rate ratios at different film depths during wet etching, and achieving control over the angle between the sidewalls of the etched pattern of the dielectric layer 120 and the surface of the substrate 110 to meet the etching angle requirements of different semiconductor processes.

[0022] To avoid introducing new impurities into the dielectric layer 120 during plasma treatment, optionally, plasma treatment is performed on the surface of the dielectric layer 120 away from the substrate 110. This includes selecting a suitable plasma source gas according to the material type of the dielectric layer 120 and performing plasma treatment on the surface to change its surface density. In this embodiment of the invention, the original reactive gas from the dielectric layer 120 deposition process is used as the plasma source gas. For example, the material of the dielectric layer 120 can be silicon oxide or silicon nitride. When the dielectric layer 120 is silicon oxide, the plasma source gas is a reactive gas containing silane (Si3N4) and nitrous oxide (N2O), with nitrous oxide (N2O) as the main plasma gas source. When the dielectric layer 120 is silicon nitride, the plasma source gas is a reactive gas containing silane (Si3N4) and ammonia (NH3), with ammonia (NH3) as the main plasma gas source. Since the process only involves intrinsic elements such as Si, O, N, and H, it does not introduce foreign impurities such as metals, carbon, and fluorine onto the surface of dielectric layer 120, thus ensuring the cleanliness of the interface for subsequent wet etching and the long-term reliability of the device.

[0023] Furthermore, during plasma treatment, the flow rate of the plasma source gas and the chamber pressure can be set to preset values, and the surface density can be controlled by adjusting the treatment time of the plasma source gas.

[0024] Specifically, during plasma processing, the flow rate, pressure, and processing time of the plasma source gas all affect the surface density. As time increases, and the flow rate and pressure also increase, the surface becomes denser, thereby suppressing the lateral etching rate. In this embodiment of the invention, after selecting a suitable plasma source gas, the flow rate and chamber pressure can be fixed, and the surface density of the dielectric layer 120 can be controlled by adjusting the plasma processing time. For example, Figures 6-9 This invention provides sliced ​​structural diagrams with different plasma treatment times and wet etching angles for embodiments of the invention. After selecting a suitable plasma source gas, the gas type and flow rate, chamber pressure, and RF power can be fixed, with only the plasma treatment time adjusted. For example, at a temperature of 400°C, a chamber pressure of 2.7 Torr, an RF power of 200W, and an N2O flow rate of 3900 SCCM, the treatment times are 0s, 2s, 3.5s, and 5s, respectively. A treatment time of 0s indicates that the surface of dielectric layer 120 is not subjected to plasma treatment. After wet etching, sliced ​​diagrams are obtained, and the etching angles are measured. The corresponding times are recorded as a=18.2°, b=29.8°, c=40.2°, and d=50°, respectively. It can be seen that, under the premise of preset gas flow rate and pressure, the degree of surface modification can be precisely controlled by adjusting the treatment time, thereby regulating the etching angle.

[0025] Based on experimental tests, the relationship curve between processing time X and etching angle Y can be obtained. Figure 10 The curve showing the relationship between processing time X and etching angle Y provided in this embodiment of the invention shows that the plasma processing time and the preset angle of the etched side are monotonically increasing. That is, as the processing time increases, the surface density of the dielectric layer 120 increases, and the lateral etching rate is lower than the longitudinal etching rate. Therefore, increasing the preset angle of the etched side can obtain more vertical sidewalls and a higher aspect ratio. The correlation coefficient R is obtained by linear fitting based on the test data. 2 = 0.9985, yielding the empirical formula: Y = 6.3945X + 17.164. This empirical formula can be used for reverse engineering; for example, after determining the etching angle, parameters for the plasma treatment time can be obtained through reverse engineering.

[0026] Optionally, the angle between the etched side surface and the etched bottom surface in this embodiment of the invention ranges from 18° to 60°. The lower limit of 18° corresponds to an untreated sample, close to the limit of conventional wet etching. By optimizing plasma parameters (such as extending the processing time), an angle of 60° can be achieved. An angle exceeding 60° can easily lead to photoresist erosion or etching cessation. This range covers the requirements for moderately steep sidewalls in advanced integrated circuit manufacturing.

[0027] This invention also provides a dielectric layer 120, which is fabricated by the method for improving the wet etching angle of the dielectric layer 120 provided in this invention. The etching side angle of the dielectric layer 120 in this invention ranges from 18° to 60°.

[0028] This invention also provides a semiconductor device, including a substrate 110 and a dielectric layer 120 formed on the substrate 110. The dielectric layer 120 can be a shallow trench isolation filling layer, passivation layer, interlayer dielectric (ILD), or sacrificial layer in the semiconductor device, and its material is typically silicon oxide (SiO2) or silicon nitride (Si3N4). This is applicable to process scenarios where wet etching is required to pattern or trim the dielectric layer 120, enabling precise control of the etching sidewall angles.

[0029] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A method for improving the wet etching angle of a dielectric layer, wherein the dielectric layer is located on one side of a substrate, characterized in that, include: Plasma treatment is performed on the surface of the dielectric layer away from the substrate to regulate the density of the surface and obtain a modified surface; A mask layer is formed on the modified surface, the mask layer having openings and exposing at least a portion of the dielectric layer; Using the mask layer as a mask, the dielectric layer is etched to form an etched bottom surface and an etched side surface, wherein the angle between the etched side surface and the etched bottom surface is a preset angle.

2. The method for improving the wet etching angle of the dielectric layer according to claim 1, characterized in that, Plasma treatment is performed on the surface of the dielectric layer away from the substrate, including: Based on the material type of the dielectric layer, a suitable plasma source gas is selected to perform plasma treatment on the surface to change its surface density.

3. The method for improving the wet etching angle of the dielectric layer according to claim 2, characterized in that, Based on the material type of the dielectric layer, a suitable plasma source gas is selected to perform plasma treatment on the surface to change its surface density, including: The flow rate and chamber pressure of the plasma source gas are set to preset values, and the density of the surface is controlled by adjusting the processing time of the plasma source gas.

4. The method for improving the wet etching angle of the dielectric layer according to any one of claims 2-3, characterized in that, The dielectric layer is made of silicon oxide or silicon nitride.

5. The method for improving the wet etching angle of the dielectric layer according to claim 4, characterized in that, When the dielectric layer is silicon oxide, the plasma source gas is a reactive gas including silane and nitrous oxide, with nitrous oxide as the main plasma gas source; when the dielectric layer is silicon nitride, the plasma source gas is a reactive gas including silane and ammonia, with ammonia as the main plasma gas source.

6. The method for improving the wet etching angle of the dielectric layer according to claim 3, characterized in that, The plasma treatment duration increases monotonically with the preset angle of the etched side.

7. The method according to claim 6, characterized in that, Under specific process conditions, the preset angle Y and the processing time X satisfy the empirical relationship: Y = 6.3945X + 17.

164.

8. The method for improving the wet etching angle of the dielectric layer according to claim 1, characterized in that, The preset angle range between the etched side surface and the etched bottom surface is 18°-60°.

9. A dielectric layer, characterized in that, It is fabricated using any one of claims 1-8, employing the method of improving the wet etching angle of the dielectric layer.

10. A semiconductor device, characterized in that, include: A substrate, and a dielectric layer as described in claim 9 formed on the substrate.

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