Terahertz frequency modulation continuous wave radar signal processing system and method based on FPGA

Abstract

The invention discloses a terahertz frequency modulation continuous wave radar signal processing system and method based on an FPGA. The system comprises an A / D acquisition control module, a digital down-conversion module, a fast two-dimensional Fourier transform module, a non-coherent accumulation module and a constant false alarm detection module. The method comprises the following steps that: the A / D acquisition control module samples an analog echo signal; the digital down-conversion module performs digital down-conversion processing on the sampling signal to obtain baseband echo I and Q data; the fast two-dimensional Fourier transform module is used for carrying out FFT (Fast Fourier Transform) on baseband echo I and Q data to obtain a range profile of a target, and the non-coherent accumulation module is used for carrying out amplitude accumulation and averaging on a plurality of target range profiles in different periods in the same wave beam; and the constant false alarm detection module compares and judges the signal amplitude of the detection unit with a set threshold to obtain a false alarm detection result. The method has the advantages of being high in real-time performance, high in reliability, simple in design, high in adaptive capacity and wide in application range.

Description

Technical Field

[0001] This invention relates to the field of radar signal processing technology, and in particular to a terahertz frequency-modulated continuous wave radar signal processing system and method based on FPGA. Background Technology

[0002] Ship collision avoidance and early warning systems are key technologies for ensuring navigational safety. By monitoring the surrounding environment in real time, predicting potential collision risks, and issuing timely warnings, they effectively reduce safety hazards caused by human error. Existing ship collision avoidance and early warning systems generally employ multi-source sensing technologies such as radar, AIS, and high-definition cameras.

[0003] The terahertz band is currently a frequency band of great international interest. It refers to electromagnetic waves with frequencies ranging from 0.1 THz to 10 THz and wavelengths between 3 mm and 30 μm. Compared to microwave radar, terahertz radar has unique advantages such as shorter wavelength, larger bandwidth, higher resolution, Doppler sensitivity, and stronger anti-interference capabilities. The high spatial resolution and large bandwidth of terahertz radar are beneficial for target imaging and acquiring detailed structural features of targets, thereby enabling more accurate contour recognition of targets.

[0004] Currently, terahertz radar is widely used in battlefield environment monitoring, security image inspection, non-destructive target detection, and radar 3D imaging. However, its application in long-range moving target detection and ship collision avoidance early warning is limited. Existing terahertz high-resolution radar signal processing systems cannot meet the requirements for detecting and warning of long-range, high-speed moving targets. Therefore, there is an urgent need to develop a terahertz frequency-modulated continuous wave radar signal processing system to solve the problems of detecting long-range, high-speed moving targets and achieving refined target imaging, thereby meeting the needs of ship collision avoidance early warning. Summary of the Invention

[0005] The purpose of this invention is to provide a terahertz frequency modulated continuous wave radar signal processing system and method based on FPGA, which is simple in design, has high resolution, a wide range of radar signal processing capabilities, flexible control, convenient adjustment, strong adaptability, strong real-time performance, and high reliability.

[0006] The technical solution to achieve the purpose of this invention is: a terahertz frequency-modulated continuous wave radar signal processing system based on FPGA, including an A / D acquisition and control module, a digital down-conversion module, a fast two-dimensional Fourier transform module, a non-coherent accumulation module, and a constant false alarm rate detection module;

[0007] The A / D acquisition and control module is used to sample the analog echo signal, convert the sampled data into a digital signal, and send it to the digital down-conversion module in the FPGA.

[0008] The digital downconversion module is used to perform digital downconversion processing on the sampled intermediate frequency echo signal of one channel to obtain baseband echo I and Q data of one channel.

[0009] The fast two-dimensional Fourier transform module is used to perform fast two-dimensional Fourier transform processing on the baseband echo I and Q signal data to obtain the range image of the target.

[0010] The noncoherent accumulation module is used to accumulate and average the target range images obtained after processing several fast two-dimensional Fourier transforms between different repetition periods within the same beam.

[0011] The constant false alarm rate (CFAR) detection module is used to compare the signal amplitude of the detection unit with a set threshold to make a judgment. If the signal amplitude exceeds the threshold, there is a target; otherwise, there is no target.

[0012] Furthermore, the A / D acquisition and control module uses the AD9694 chip from Analog Devices, which is a four-channel, 14-bit, 500MSPS analog-to-digital converter with built-in on-chip buffer and sample-and-hold circuit. The AD9694 is configured via SPI to sample the analog intermediate frequency echo signal.

[0013] A terahertz frequency-modulated continuous wave radar signal processing method based on FPGA, the method being based on the aforementioned FPGA-based terahertz frequency-modulated continuous wave radar signal processing system, includes the following steps:

[0014] Step 1: The A / D acquisition and control module samples the analog echo signal, converts the sampled data into a digital signal, and sends it to the digital down-conversion module in the FPGA.

[0015] Step 2: Perform digital down-conversion processing on the sampled intermediate frequency echo signal of one channel to obtain the baseband echo I and Q data of one channel;

[0016] Step 3: The fast two-dimensional Fourier transform module performs fast two-dimensional Fourier transform on the baseband echo I and Q signal data to obtain the range image of the target.

[0017] Step 4: The noncoherent accumulation module performs amplitude accumulation and averaging on the target range images obtained after processing several fast two-dimensional Fourier transforms between different repetition periods within the same beam.

[0018] Step 5: The constant false alarm detection module compares the signal amplitude of the detection unit with the set threshold to make a judgment and obtain the false alarm detection result.

[0019] Furthermore, the digital down-conversion processing described in step 2 includes two parts: digital quadrature baseband transformation and filtering extraction.

[0020] The intermediate frequency echo signal is sampled using undersampling. The intermediate frequency signal is 375MHz and the signal bandwidth is 50MHz. A numerically controlled oscillator is generated using a 300MHz coherent clock to generate digital sequences of real and imaginary parts. The digital signal obtained by undersampling is digitally mixed with the digital sequence of the numerically controlled oscillator. The high-frequency part is filtered out by an FIR low-pass filter to obtain a digital zero intermediate frequency signal.

[0021] The filtering and decimation uses a direct decimation method, and the decimated data rate is 100MHz.

[0022] Furthermore, the fast two-dimensional Fourier transform module described in step 3 performs fast two-dimensional Fourier transform processing on the baseband echo I and Q signal data to obtain the range image of the target, as follows:

[0023] Step 3.1: The data order transformation unit uses the ping-pong read / write of the BlockRam IP core of the Xilinx FFPGA to divide the baseband echo I and Q signal data stream at point L in one repetition cycle into N rows of M points of parallel baseband echo I and Q signal data streams.

[0024] Step 3.2: Simultaneously perform Fast Fourier Transform (FFT) processing on the N rows of M-point baseband echo I and Q signal data streams using N Xilinx FFPGA FFT IP cores;

[0025] Step 3.3: Complex multiplication processing. Using hinge factors read from N Xilinx FFPGAs, the N rows of M-point FFT results are multiplied by the hinge factors. After the N rows of M-point FFT transformations are completed, each value is multiplied by... To form a new sequence of N rows and M columns;

[0026] This is called the rotation factor or hinge factor, and its calculation formula is:

[0027]

[0028] In the formula, , ;

[0029] Step 3.4: The data order transformation unit performs a matrix transpose on the complex multiplication result to obtain an M-row N-column matrix;

[0030] Step 3.5: M rows N-point FFT processing, by configuring M Xilinx FFPGA FFT IP cores to perform N-point FFT transformations on the M rows of data respectively;

[0031] Step 3.6: The data order transformation unit transposes the M-row N-point FFT processing result to obtain an N-row M-column matrix, and outputs the one-dimensional FFT result in ascending order according to the order of rows 1-N.

[0032] Furthermore, the fast two-dimensional Fourier transform processing abstracts the sequence of complex points to be calculated into a two-dimensional matrix for processing, divides the calculation of large points into multiple small-point FFT calculations, and the processing of small points does not affect each other, thus enabling parallel execution on the FPGA.

[0033] Furthermore, the constant false alarm detection module described in step 5 compares the signal amplitude of the detection unit with a set threshold to make a decision and obtain the false alarm detection result, as follows:

[0034] The constant false alarm rate (CFAR) detection module takes 16 distance units in the reference window after removing one protection unit on each side of the detection unit, adds them together, averages them, and selects the largest value. The result of the largest value is multiplied by a coefficient to obtain the CFAR detection threshold. The signal amplitude of the detection unit is compared with the threshold to make a judgment. If the signal amplitude exceeds the threshold, there is a target; otherwise, there is no target.

[0035] An electronic device includes a memory and a processor, the memory and the processor being communicatively connected to each other, the memory storing computer instructions, and the processor executing the computer instructions to perform the FPGA-based terahertz frequency-modulated continuous wave radar signal processing method.

[0036] A computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the steps in the FPGA-based terahertz frequency-modulated continuous wave radar signal processing method.

[0037] A computer program product includes computer instructions for causing a computer to execute the FPGA-based terahertz frequency-modulated continuous wave radar signal processing method.

[0038] Compared with the prior art, the present invention has the following significant advantages: (1) It solves the problem of detecting long-distance high-speed moving targets and fine imaging of targets, and meets the needs of ship collision avoidance and early warning; (2) It increases the signal processing range of terahertz echo signals and improves the real-time performance and reliability of radar digital signal processing; (3) It is simple in design, flexible in control, easy to adjust, highly adaptable, and has a wide range of applications. Attached Figure Description

[0039] Figure 1 This is a flowchart illustrating a terahertz frequency-modulated continuous wave radar signal processing method based on FPGA according to the present invention.

[0040] Figure 2 This is a schematic diagram of the digital down-conversion process in an embodiment of the present invention.

[0041] Figure 3This is a schematic diagram of the fast two-dimensional Fourier transform processing in an embodiment of the present invention.

[0042] Figure 4 This is a schematic diagram of the constant false alarm detection process in an embodiment of the present invention. Detailed Implementation

[0043] The present invention will now be described in further detail with reference to the accompanying drawings and specific embodiments.

[0044] This invention discloses a terahertz frequency-modulated continuous wave radar signal processing system based on FPGA, comprising an A / D acquisition and control module, a digital down-conversion module, a fast two-dimensional Fourier transform module, a non-coherent accumulation module, and a constant false alarm rate detection module;

[0045] The A / D acquisition and control module is used to sample the analog echo signal, convert the sampled data into a digital signal, and send it to the digital down-conversion module in the FPGA.

[0046] The digital downconversion module is used to perform digital downconversion processing on the sampled intermediate frequency echo signal of one channel to obtain baseband echo I and Q data of one channel.

[0047] The fast two-dimensional Fourier transform module is used to perform fast two-dimensional Fourier transform processing on the baseband echo I and Q signal data to obtain the range image of the target.

[0048] The noncoherent accumulation module is used to accumulate and average the target range image obtained after processing several fast two-dimensional Fourier transforms between different repetition periods within the same beam, thereby eliminating the influence of clutter and noise and improving the signal-to-noise ratio.

[0049] The constant false alarm rate (CFAR) detection module is used to compare the signal amplitude of the detection unit with a set threshold to make a judgment. If the signal amplitude exceeds the threshold, there is a target; otherwise, there is no target.

[0050] As a specific example, the A / D acquisition control module uses the AD9694 chip from Analog Devices, which is a four-channel, 14-bit, 500MSPS analog-to-digital converter with built-in on-chip buffer and sample-and-hold circuit. The AD9694 is configured via SPI to sample analog intermediate frequency echo signals.

[0051] like Figure 1 As shown, the present invention provides a terahertz frequency-modulated continuous wave radar signal processing method based on FPGA, comprising the following steps:

[0052] Step 1: The A / D acquisition and control module samples the analog echo signal, converts the sampled data into a digital signal, and sends it to the digital down-conversion module in the FPGA.

[0053] Step 2: Perform digital down-conversion processing on the sampled intermediate frequency echo signal of one channel to obtain the baseband echo I and Q data of one channel;

[0054] As a specific example, the digital down-conversion processing includes two parts: digital quadrature baseband transformation and filtering extraction.

[0055] like Figure 2 As shown, the intermediate frequency echo signal is sampled using undersampling. The intermediate frequency signal is 375MHz and the signal bandwidth is 50MHz. A digitally controlled oscillator is generated using a 300MHz coherent clock to generate digital sequences of real and imaginary parts. The digital signal obtained by undersampling is digitally mixed with the digital sequence of the digitally controlled oscillator. The high-frequency part is filtered out by an FIR low-pass filter to obtain a digital zero intermediate frequency signal.

[0056] The data extraction uses a direct extraction method, and the extracted data rate is 100MHz.

[0057] As a specific example, the digital down-conversion process not only converts the intermediate frequency to the baseband, but also performs orthogonalization, avoiding the problem of poor orthogonality in analog devices and achieving better orthogonality.

[0058] Step 3: The Fast Two-Dimensional Fourier Transform (FTFT) module performs FTFT on the baseband echo I and Q signal data to obtain the target range image, such as... Figure 3 As shown, the details are as follows:

[0059] Step 3.1: The data order transformation unit uses the ping-pong read / write of the BlockRam IP core of the Xilinx FFPGA to divide the baseband echo I and Q signal data stream at point L in one repetition cycle into N rows of M points of parallel baseband echo I and Q signal data streams.

[0060] Step 3.2: Simultaneously perform Fast Fourier Transform (FFT) processing on the N rows of M-point baseband echo I and Q signal data streams using N Xilinx FFPGA FFT IP cores;

[0061] Step 3.3: Complex multiplication processing. Hinge factors are read from N Xilinx FFPGA (BlockRom IP cores). The N rows of M-point FFT results are multiplied by the hinge factors. After the N rows of M-point FFT transformations are completed, each value is multiplied by the hinge factor. To form a new sequence of N rows and M columns;

[0062] This is called the rotation factor or hinge factor, and its calculation formula is:

[0063]

[0064] In the formula, , ;

[0065] Step 3.4: The data order transformation unit performs a matrix transpose on the complex multiplication result to obtain an M-row N-column matrix;

[0066] Step 3.5: M rows N-point FFT processing, by configuring M Xilinx FFPGA FFT IP cores to perform N-point FFT transformations on the M rows of data respectively;

[0067] Step 3.6: The data order transformation unit transposes the M-row N-point FFT processing result to obtain an N-row M-column matrix, and outputs the one-dimensional FFT result in ascending order according to the order of rows 1-N.

[0068] As a specific example, the Fast Two-Dimensional Fourier Transform (FFT) process abstracts the sequence of complex points to be calculated into a two-dimensional matrix for processing, divides the calculation of large points into multiple FFT calculations of small points, and the processing of small points does not affect each other, thus enabling parallel execution on the FPGA and improving the real-time performance of radar signal processing.

[0069] Step 4: The noncoherent accumulation module accumulates and averages the target range images obtained after processing several fast two-dimensional Fourier transforms between different repetition periods within the same beam, thereby eliminating the influence of clutter and noise and improving the signal-to-noise ratio.

[0070] Step 5: The constant false alarm rate (CFAR) detection module compares the signal amplitude of the detection unit with the set threshold to make a decision and obtain the false alarm detection result, such as... Figure 4 As shown, the details are as follows:

[0071] The constant false alarm rate (CFAR) detection module sums and averages the 16 distance units in the reference window after removing one protection unit on each side of the detection unit, and selects the largest value. The result of the largest value is multiplied by a coefficient to obtain the CFAR detection threshold. The signal amplitude of the detection unit is compared with the threshold to make a judgment. If the signal amplitude exceeds the threshold, there is a target; otherwise, there is no target.

[0072] In one specific embodiment, the present invention also provides an electronic device, including: a processor, a memory, and a computer program stored in the memory and executable on the processor, such as a terahertz frequency-modulated continuous wave radar signal processing method program. When the processor executes the computer program, it implements the steps in the various terahertz frequency-modulated continuous wave radar signal processing method embodiments described above. Alternatively, when the processor executes the computer program, it implements the functions of each module / unit in the various device embodiments described above.

[0073] In one specific embodiment, the present invention also provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the steps in the FPGA-based terahertz frequency-modulated continuous wave radar signal processing method.

[0074] In one specific embodiment, the present invention also provides a computer program product, including computer instructions for causing a computer to execute the FPGA-based terahertz frequency-modulated continuous wave radar signal processing method.

[0075] For example, the computer program may be divided into one or more modules / units, which are stored in the memory and executed by the processor to complete the present invention. The one or more modules / units may be a series of computer program instruction segments capable of performing a specific function, which describe the execution process of the computer program in the electronic device.

[0076] The electronic device may be a desktop computer, laptop, handheld computer, or smart tablet, etc. The electronic device may include, but is not limited to, a processor and memory. Those skilled in the art will understand that the above components are merely examples of electronic devices and do not constitute a limitation on the electronic device. It may include more or fewer components than described above, or combine certain components, or different components. For example, the electronic device may also include input / output devices, network access devices, buses, etc.

[0077] The processor can be a Central Processing Unit (CPU), or other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. A general-purpose processor can be a microprocessor or any conventional processor. The processor is the control center of the electronic device, connecting all parts of the electronic device via various interfaces and lines.

[0078] The memory can be used to store the computer programs and / or modules. The processor implements various functions of the electronic device by running or executing the computer programs and / or modules stored in the memory and by calling data stored in the memory. The memory may mainly include a program storage area and a data storage area. The program storage area may store the operating system, at least one application program required for a function (such as sound playback function, image playback function, etc.), etc.; the data storage area may store data created according to the use of the mobile phone (such as audio data, phonebook, etc.). In addition, the memory may include high-speed random access memory, and may also include non-volatile memory, such as hard disk, memory, plug-in hard disk, smart media card (SMC), secure digital (SD) card, flash card, at least one disk storage device, flash memory device, or other volatile solid-state storage device.

[0079] Wherein, if the modules / units integrated in the electronic device are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, all or part of the processes in the methods of the above embodiments of the present invention can also be implemented by a computer program instructing related hardware. The computer program can be stored in a computer-readable storage medium, and when executed by a processor, it can implement the steps of the various method embodiments described above. The computer program includes computer program code, which can be in the form of source code, object code, executable files, or certain intermediate forms. The computer-readable medium can include: any entity or device capable of carrying the computer program code, recording media, USB flash drives, portable hard drives, magnetic disks, optical disks, computer memory, read-only memory (ROM), random access memory (RAM), electrical carrier signals, telecommunication signals, and software distribution media, etc. It should be noted that the content included in the computer-readable medium can be appropriately added or removed according to the requirements of legislation and patent practice in the jurisdiction. For example, in some jurisdictions, according to legislation and patent practice, computer-readable media do not include electrical carrier signals and telecommunication signals.

[0080] It should be noted that the device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs. Furthermore, in the accompanying drawings of the device embodiments provided by this invention, the connection relationships between modules indicate that they have communication connections, which can be specifically implemented as one or more communication buses or signal lines. Those skilled in the art can understand and implement this without any creative effort.

[0081] The specific embodiments described above further illustrate the purpose, technical solution, and beneficial effects of the present invention. It should be understood that the above descriptions are merely specific embodiments of the present invention and are not intended to limit the scope of protection of the present invention. In particular, it should be noted that any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention for those skilled in the art.

Claims

1. A terahertz frequency-modulated continuous wave radar signal processing system based on FPGA, characterized in that, It includes an A / D acquisition and control module, a digital down-conversion module, a fast two-dimensional Fourier transform module, a non-coherent accumulation module, and a constant false alarm rate detection module; The A / D acquisition and control module is used to sample the analog echo signal, convert the sampled data into a digital signal, and send it to the digital down-conversion module in the FPGA. The digital downconversion module is used to perform digital downconversion processing on the sampled intermediate frequency echo signal of one channel to obtain baseband echo I and Q data of one channel. The fast two-dimensional Fourier transform module is used to perform fast two-dimensional Fourier transform processing on the baseband echo I and Q signal data to obtain the range image of the target. The noncoherent accumulation module is used to accumulate and average the target range images obtained after processing several fast two-dimensional Fourier transforms between different repetition periods within the same beam. The constant false alarm rate (CFAR) detection module is used to compare the signal amplitude of the detection unit with a set threshold to make a judgment. If the signal amplitude exceeds the threshold, there is a target; otherwise, there is no target.

2. The FPGA-based terahertz frequency-modulated continuous wave radar signal processing system according to claim 1, characterized in that, The A / D acquisition and control module uses the AD9694 chip from Analog Devices, which is a four-channel, 14-bit, 500MSPS analog-to-digital converter with built-in on-chip buffer and sample-and-hold circuit. The AD9694 is configured via SPI to sample analog intermediate frequency echo signals.

3. A terahertz frequency-modulated continuous wave radar signal processing method based on FPGA, characterized in that, This method, based on the FPGA-based terahertz frequency-modulated continuous wave radar signal processing system of claim 1, includes the following steps: Step 1: The A / D acquisition and control module samples the analog echo signal, converts the sampled data into a digital signal, and sends it to the digital down-conversion module in the FPGA. Step 2: Perform digital down-conversion processing on the sampled intermediate frequency echo signal of one channel to obtain the baseband echo I and Q data of one channel; Step 3: The fast two-dimensional Fourier transform module performs fast two-dimensional Fourier transform on the baseband echo I and Q signal data to obtain the range image of the target. Step 4: The noncoherent accumulation module performs amplitude accumulation and averaging on the target range images obtained after processing several fast two-dimensional Fourier transforms between different repetition periods within the same beam. Step 5: The constant false alarm detection module compares the signal amplitude of the detection unit with the set threshold to make a judgment and obtain the false alarm detection result.

4. The FPGA-based terahertz frequency-modulated continuous wave radar signal processing method according to claim 3, characterized in that, The digital downconversion processing described in step 2 includes two parts: digital quadrature baseband conversion and filtering extraction. The intermediate frequency echo signal is sampled using undersampling. The intermediate frequency signal is 375MHz and the signal bandwidth is 50MHz. A numerically controlled oscillator is generated using a 300MHz coherent clock to generate digital sequences of real and imaginary parts. The digital signal obtained by undersampling is digitally mixed with the digital sequence of the numerically controlled oscillator. The high-frequency part is filtered out by an FIR low-pass filter to obtain a digital zero intermediate frequency signal. The filtering and decimation uses a direct decimation method, and the decimated data rate is 100MHz.

5. The FPGA-based terahertz frequency-modulated continuous wave radar signal processing method according to claim 3, characterized in that, Step 3 describes a fast two-dimensional Fourier transform module that performs fast two-dimensional Fourier transform processing on the baseband echo I and Q signal data to obtain the target's range profile, as detailed below: Step 3.1: The data order transformation unit uses the ping-pong read / write of the BlockRam IP core of the Xilinx FFPGA to divide the baseband echo I and Q signal data stream at point L in one repetition cycle into N rows of M points of parallel baseband echo I and Q signal data streams. Step 3.2: Simultaneously perform Fast Fourier Transform (FFT) processing on the N rows of M-point baseband echo I and Q signal data streams using N Xilinx FFPGA FFT IP cores; Step 3.3: Complex multiplication processing. Using hinge factors read from N Xilinx FFPGAs, the N rows of M-point FFT results are multiplied by the hinge factors. After the N rows of M-point FFT transformations are completed, each value is multiplied by... To form a new sequence of N rows and M columns; This is called the rotation factor or hinge factor, and its calculation formula is: ； In the formula, , ; Step 3.4: The data order transformation unit performs a matrix transpose on the complex multiplication result to obtain an M-row N-column matrix; Step 3.5: M rows N-point FFT processing, by configuring M Xilinx FFPGA FFT IP cores to perform N-point FFT transformations on the M rows of data respectively; Step 3.6: The data order transformation unit transposes the M-row N-point FFT processing result to obtain an N-row M-column matrix, and outputs the one-dimensional FFT result in ascending order according to the order of rows 1-N.

6. The FPGA-based terahertz frequency-modulated continuous wave radar signal processing method according to claim 5, characterized in that, The fast two-dimensional Fourier transform process abstracts the sequence of complex points to be calculated into a two-dimensional matrix for processing. It divides the calculation of large points into multiple small-point FFT calculations, and the processing of small points does not affect each other, thus enabling parallel execution on the FPGA.

7. The FPGA-based terahertz frequency-modulated continuous wave radar signal processing method according to claim 3, characterized in that, Step 5 describes a constant false alarm detection module that compares the signal amplitude of the detection unit with a set threshold to make a decision and obtain the false alarm detection result, as follows: The constant false alarm rate (CFAR) detection module takes 16 distance units in the reference window after removing one protection unit on each side of the detection unit, adds them together, averages them, and selects the largest value. The result of the largest value is multiplied by a coefficient to obtain the CFAR detection threshold. The signal amplitude of the detection unit is compared with the threshold to make a judgment. If the signal amplitude exceeds the threshold, there is a target; otherwise, there is no target.

8. An electronic device, characterized in that, include: The system includes a memory and a processor, which are interconnected. The memory stores computer instructions, and the processor executes the computer instructions to perform the FPGA-based terahertz frequency-modulated continuous wave radar signal processing method as described in any one of claims 3 to 7.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the program is executed by the processor, it implements the steps in the FPGA-based terahertz frequency-modulated continuous wave radar signal processing method as described in any one of claims 3 to 7.

10. A computer program product, characterized in that, Includes computer instructions, which are used to cause a computer to execute the FPGA-based terahertz frequency-modulated continuous wave radar signal processing method according to any one of claims 3 to 7.

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