Semiconductor device and method for manufacturing semiconductor device

Abstract

The present invention provides a semiconductor device in which the front and back surfaces of a semiconductor element are connected to a rigid body via a solder alloy, the influence of thermal stress generated on the front and back surfaces of the semiconductor element during use of the semiconductor device is mitigated. A semiconductor device includes: a semiconductor element; a lead frame; an insulating substrate; a first bonding material that bonds the semiconductor element and the lead frame; a second bonding material that bonds the semiconductor element and the insulating substrate; and a third bonding material that bonds the insulating substrate and the lead frame, the semiconductor device being characterized in that the solidus temperature of the first bonding material is lower than the solidus temperature of the second bonding material, and the solidus temperature of the third bonding material is equal to or higher than the solidus temperature of the second bonding material.

Description

Technical Field

[0001] The present invention relates to a semiconductor device having a structure in which the front and back sides of a semiconductor element are connected to a rigid body via a solder alloy, and a method for manufacturing the semiconductor device. Background Technology

[0002] As a semiconductor device in which the front and back sides of a semiconductor element are connected to a rigid body via a solder alloy, the semiconductor power module of Patent Document 1 is known.

[0003] For example, paragraph 0088 of Patent Document 1 describes that "the semiconductor module (semiconductor power module) 19 shown in FIG10 has solder alloy 2b and other bonding materials bonded to both sides of the semiconductor chip 1. A lead frame 28 is bonded to these bonding materials on both sides of the semiconductor chip 1, and a heat dissipation metal plate 12 is bonded to the lead frame 28 via insulating thermal paste 27." This illustrates that the semiconductor power module of FIG10 in this document has a structure in which the front and back sides of the semiconductor chip are connected to the lead frame, which is a rigid body, via solder alloys disposed on both sides of the semiconductor chip. In addition, paragraph 0029 of this document shows that the solder alloy contains Sn-Cu-Sb.

[0004] Existing technical documents

[0005] Patent documents

[0006] Patent Document 1: International Publication No. 2016 / 079881 Summary of the Invention

[0007] The problem that the invention aims to solve

[0008] Typically, solder alloys composed of Sn-Cu-Sb exhibit high thermal fatigue resistance. Therefore, as shown in Figure 10 of Patent Document 1, if a solder alloy composed of Sn-Cu-Sb is used on both the front and back sides of a semiconductor element, a highly reliable bonding of the semiconductor element can be achieved.

[0009] However, while Sn-Cu-Sb solders exhibit high thermal fatigue resistance, they also tend to be harder compared to conventional Sn-based solders. Patent Document 1 does not specifically consider the configuration of hard solder alloys constraining both the front and back surfaces of semiconductor elements as a problem, nor does it specifically consider the thermal stress generated on both the front and back surfaces of semiconductor elements during temperature rises in the use of semiconductor devices.

[0010] Therefore, the object of the present invention is to provide a semiconductor device and a method for manufacturing the same, which mitigates the effects of thermal stress generated on both sides of the semiconductor element during use in a semiconductor device in which the front and back sides of the semiconductor element are connected to a rigid body via a solder alloy.

[0011] Methods for solving problems

[0012] To address the aforementioned issues, the semiconductor device of the present invention comprises: a semiconductor element; a lead frame; an insulating substrate; a first bonding material for bonding the semiconductor element to the lead frame; a second bonding material for bonding the semiconductor element to the insulating substrate; and a third bonding material for bonding the insulating substrate to the lead frame, wherein the solidus temperature of the first bonding material is lower than the solidus temperature of the second bonding material, and the solidus temperature of the third bonding material is higher than the solidus temperature of the second bonding material.

[0013] Furthermore, the semiconductor device manufacturing method of the present invention manufactures a semiconductor device by heating a semiconductor element, a lead frame, an insulating substrate, a first bonding material for bonding the semiconductor element and the lead frame, a second bonding material for bonding the semiconductor element and the insulating substrate, and a third bonding material for bonding the insulating substrate and the lead frame in a heating furnace. The semiconductor device manufacturing method includes the following steps: arranging the insulating substrate on a fixture; arranging the second bonding material on a metal wiring portion of the insulating substrate; arranging the semiconductor element on the second bonding material; arranging the first bonding material on the semiconductor element; arranging a plurality of the third bonding materials on the metal wiring portion; arranging the lead frame in a manner spanning the plurality of the third bonding materials, thereby creating a gap between the lead frame and the first bonding material; melting and bonding the first bonding material to the upper surface of the semiconductor element; melting the second bonding material to bond the lower surface of the semiconductor element to the metal wiring portion; and melting the third bonding material to bond the lead frame to the metal wiring portion, and bonding the upper surface of the semiconductor element to the lead frame via the melted first bonding material.

[0014] Invention Effects

[0015] According to the present invention, in a semiconductor device in which the front and back surfaces of a semiconductor element are connected to a rigid body via a solder alloy, the effects of thermal stress generated on the front and back surfaces of the semiconductor element during use of the semiconductor device can be mitigated. Attached Figure Description

[0016] Figure 1 This is a schematic cross-sectional view of the semiconductor device in Example 1.

[0017] Figure 2A This is a perspective view of the manufacturing process of the semiconductor device in Example 1 (before being placed into the heating furnace).

[0018] Figure 2BThis is a perspective view of the manufacturing process of the semiconductor device in Example 1 (before being placed into the heating furnace).

[0019] Figure 3 This is a simplified cross-sectional schematic diagram illustrating the manufacturing process of Example 1 (before being placed in the heating furnace).

[0020] Figure 4 This is a simplified cross-sectional schematic diagram illustrating the manufacturing process of Example 1 (after being placed in a heating furnace).

[0021] Figure 5 This is a simplified cross-sectional schematic diagram of the manufacturing process of the comparative example (after being placed in the heating furnace).

[0022] Figure 6 This is an example of a cross-sectional view of the lead frame of the semiconductor device in Embodiment 2.

[0023] Figure 7 This is another example of a cross-sectional view of the lead frame of the semiconductor device in Embodiment 2. Detailed Implementation

[0024] Hereinafter, embodiments of the semiconductor device of the present invention will be described using the accompanying drawings.

[0025] Example 1

[0026] use Figures 1 to 5 The semiconductor device 1 of Embodiment 1 of the present invention will be described below. Furthermore, the following description will focus on the case where the semiconductor device 1 is a semiconductor power module for supplying large amounts of electricity to the drive motors of trams and electric vehicles; however, the semiconductor device 1 of the present invention may also be other types of semiconductor devices.

[0027] <Components of Semiconductor Device 1>

[0028] First, use Figure 1 The cross-sectional view of this embodiment will be used to describe the constituent elements of the semiconductor device 1. As shown here, the semiconductor device 1 of this embodiment includes an insulating substrate 11, a semiconductor element 12, a lead frame 13, a first bonding material 14, a second bonding material 15, a third bonding material 16, a heat dissipation material 17, a fourth bonding material 18, and a sealing material 19. These will be briefly described below. Furthermore, as follows... Figure 1 The vertical direction is defined as shown.

[0029] The insulating substrate 11 is a rigid body on the upper surface (surface) of a ceramic insulating plate 11a, on which a desired number and shape of metal wiring portions 11b are disposed.

[0030] Semiconductor element 12 is a chip that corresponds to the function of semiconductor device 1. For example, if semiconductor device 1 is a semiconductor power module, it is an IGBT built-in chip 12a, a diode built-in chip 12b, etc.

[0031] The lead frame 13 is a copper rigid body for carrying large current, having a plurality of terminals 13a protruding to the side for electrical connection with the upper surface of the metal wiring portion 11b of the insulating substrate 11 and a protrusion 13b protruding downward for electrical connection with the upper surface of the semiconductor element 12.

[0032] The first bonding material 14 is a solder alloy used to bond the upper surface of the semiconductor element 12 to the lower surface of the protrusion 13b of the lead frame 13, such as Sn-Cu solder with a solidus temperature T1 of 227°C. Furthermore, Sn-Cu solder is a relatively soft solder with excellent stress mitigation properties. Therefore, even if thermal stress is generated due to heat during the use of the semiconductor device 1, the Sn-Cu solder on the upper surface of the semiconductor element 12 can absorb the thermal stress, thus suppressing damage to the semiconductor element 12 caused by thermal stress.

[0033] The second bonding material 15 is a solder alloy used to bond the lower surface of the semiconductor element 12 to the upper surface of the metal wiring portion 11b, such as a Sn-Cu-Sb solder with a solidus temperature T2 exceeding 227°C and less than 240°C. Furthermore, as described above, the Sn-Cu-Sb solder has high thermal fatigue resistance, thus enabling a firm bond between the semiconductor element 12 and the upper surface of the metal wiring portion 11b.

[0034] The third bonding material 16 is a solder alloy used to bond the lower surface of the terminal 13a of the lead frame 13 to the upper surface of the metal wiring portion 11b, for example, a Sn-Cu-Sb solder with a solidus temperature T3 exceeding 227°C and less than 240°C. The solidus temperature T3 only needs to be higher than the solidus temperature T1 and above the solidus temperature T2.

[0035] The heat dissipation material 17 is a metal plate having a heat sink 17a for dissipating heat generated during the use of the semiconductor device 1. Furthermore, in Figure 1 The illustration shows a heat dissipation material 17 with a heat sink 17a, but the structure may also omit the heat sink 17a.

[0036] The fourth bonding material 18 is a solder alloy used to bond the lower surface of the insulating substrate 11 to the upper surface of the heat dissipation material 17. For example, it can be any Sn-Cu solder with a solidus temperature T4 of 227°C, or Sn-Cu-Sb solder with a solidus temperature T4 of more than 227°C and less than 240°C, or a solder alloy with Sn as the main component and a solidus temperature of less than 232°C.

[0037] Sealing material 19 is a resin mold that seals the heat resistance of the above-mentioned components.

[0038] <Semiconductor Device 1 Manufacturing Process>

[0039] Next, use Figure 2A , Figure 2B A set of three-dimensional diagrams (also a flowchart), and a schematic diagram showing the cross-sections of the two diagrams. Figure 3 The manufacturing process of the main parts of semiconductor device 1 will be explained. Furthermore, a known chip mounter can be used when arranging the components shown in the diagram.

[0040] Step S1 involves placing the insulating substrate 11 on a fixture (not shown) with the metal wiring portion 11b side facing upwards. The fixture used here is formed by machining a carbon plate according to the shape of the insulating substrate 11. Hereinafter, assuming the inner part of the upper surface of the insulating substrate 11 has been configured, the steps for configuring the parts near the front of the upper surface will be described.

[0041] Step S2 is the step of disposing a sheet-like second bonding material 15 on the upper surface of the metal wiring portion 11b (near the front side) of the insulating substrate 11. In this example, a state is shown in which a relatively large rectangular second bonding material 15a and a relatively small rectangular second bonding material 15b are disposed on the upper surface of the metal wiring portion 11b (near the front side).

[0042] Step S3 is the step of configuring the semiconductor element 12 on the upper surface of the second bonding material 15. In this example, a relatively large IGBT embedded chip 12a is configured on the upper surface of the relatively large second bonding material 15a, and a relatively small diode embedded chip 12b is configured on the upper surface of the relatively small second bonding material 15b.

[0043] Step S4 is the step of depositing a sheet-like first bonding material 14 on the upper surface of the semiconductor element 12. In this example, a relatively large first bonding material 14a is deposited on the upper surface of the relatively large IGBT embedded chip 12a, and a relatively small second bonding material 15b is deposited on the upper surface of the relatively small diode embedded chip 12b.

[0044] Step S5 is the step of placing a sheet-like third bonding material 16 on the upper surface of the metal wiring portion 11b. In this example, it is shown that the third bonding material 16 is placed on each of the two metal wiring portions 11b where the two terminals 13a of the predetermined lead frame 13 are mounted.

[0045] Step S6 is the step of configuring the lead frame 13 in a manner that spans the two third bonding materials 16. In this example, by using the two third bonding materials 16a to support the two terminals 13a of the lead frame 13, a gap is formed between the protrusion 13b of the lead frame 13 and the first bonding material 14.

[0046] Next, use imitation Figure 3 performance Figure 4 Let's explain step S7. This step involves transferring the constituent elements (hereinafter referred to as "component mounting fixture") that were stacked on the fixture in steps S1 to S6 into a heating furnace for heating, so that each bonding material melts and solidifies sequentially, thereby fixing each constituent element. Furthermore, if the lead frame 13 is lightweight, a step of setting a weighting hammer to increase the weight of the lead frame 13 may be provided before heating in the heating furnace.

[0047] Step S7a: During the period immediately after the component mounting fixture is placed into the heating furnace and the temperature of the component mounting fixture is lower than the solidus temperature T1, the terminals 13a of the lead frame 13 are supported as a solid third bonding material 16, so there is a gap between the protrusion 13b and the first bonding material 14.

[0048] Step S7b: During the period when the temperature of the component mounting fixture is higher than the solidus temperature T1 of the first bonding material 14 and lower than the solidus temperature T2 of the second bonding material 15, the first bonding material 14 melts and adheres to the upper surface of the semiconductor component 12. However, there is still a gap above the first bonding material 14. Therefore, at this moment, the melted first bonding material 14 does not adhere to the protrusion 13b of the lead frame 13.

[0049] Step S7c: When the temperature of the component mounting fixture is higher than the solidus temperature T3 of the third bonding material 16, as the third bonding material 16 melts, the terminals 13a of the unsupported lead frame 13 move downwards. Furthermore, the melted first bonding material 14 comes into contact with the protrusion 13b. At this time, the melted first bonding material 14 is attracted towards the protrusion 13b due to the wetting force, thus the semiconductor element 12 below the first bonding material 14 also experiences an upward force caused by the wetting force of the first bonding material 14.

[0050] On the other hand, since the molten second bonding material 15 is attracted to the insulating substrate 11 side by the wetting force, the downward force caused by the wetting force of the second bonding material 15 also acts on the semiconductor element 12 above the second bonding material 15. Therefore, the upward force caused by the wetting force of the first bonding material 14 cancels out the downward force caused by the wetting force of the second bonding material 15, so the semiconductor element 12 does not float excessively.

[0051] Step S7d: If heating is stopped and the temperature of the component mounting fixture is lower than the solidus temperature T1 of the first bonding material 14, then each component of the semiconductor device 1 is fixed in the desired position.

[0052] As in step S7 above, by dissolving and solidifying the first bonding material 14 to the third bonding material 16 in sequence, the amount of wetting of the first bonding material 14 to the third bonding material 16 can be appropriately controlled, and the upper surface of the semiconductor element 12 and the protrusion 13b of the lead frame 13, the lower surface of the semiconductor element 12 and the metal wiring portion 11b of the insulating substrate 11, and the terminal 13a of the lead frame 13 and the metal wiring portion 11b of the insulating substrate 11 can be appropriately connected.

[0053] Furthermore, it goes without saying that after step S7, the heat dissipation material 17 is mounted using a fourth bonding material 18 by a known method, and then the semiconductor element 12, etc., is resin molded using a sealing material 19, thereby enabling the manufacture of... Figure 1 The illustrated semiconductor device 1.

[0054] <Comparative Example>

[0055] Here, for supplementary explanation Figure 4 The effectiveness of step S7 was examined, pointing out the problems with step S7' in the manufacturing method of the comparative example semiconductor device 1'. Furthermore, the comparative example semiconductor device 1' is identical to the semiconductor device 1 of this embodiment, except that the first bonding material 14 and the third bonding material 16 are homogeneous and their solidus temperature T13 is lower than the solidus temperature T2 of the second bonding material 15. In step S7' of the comparative example semiconductor device 1', the following phenomenon occurs in the heating furnace.

[0056] Step S7a': During the period immediately after the component mounting fixture is placed into the heating furnace, when the temperature of the component mounting fixture is lower than the solidus temperature T13 of the first bonding material 14 and the third bonding material 16, the terminal 13a of the lead frame 13 is supported as a solid third bonding material 16, thus creating a gap between the protrusion 13b and the first bonding material 14.

[0057] Step S7b': During the period when the temperature of the component mounting fixture is higher than the solidus temperature T13 of the first bonding material 14 and the third bonding material 16 and lower than the solidus temperature T2 of the second bonding material 15, when the first bonding material 14 melts and adheres to the upper surface of the semiconductor component 12, the terminals 13a of the lead frame 13, which loses support due to the melting of the third bonding material 16, move downward.

[0058] Furthermore, if the gap above the first bonding material 14 disappears, the upper surface of the melted first bonding material 14 contacts the protrusion 13b of the lead frame 13, and the melted first bonding material 14 is pulled towards the protrusion 13b side due to the wetting force. Therefore, the upward force caused by the wetting force of the first bonding material 14 also acts on the semiconductor element 12 below the first bonding material 14.

[0059] However, with Figure 4 Unlike step S7c, since the second bonding material 15 is still solid, the downward force caused by the wetting force of the second bonding material 15 does not act on the semiconductor element 12. Therefore, as shown in the figure, an undesirable phenomenon occurs where the semiconductor element 12 separates from the second bonding material 15 and the chip floats up. In addition, the result of the chip floating up also causes the following problems.

[0060] First, the downward force caused by the wetting force of the second bonding material 15 does not act on the first bonding material 14. As a result, the melted first bonding material 14 rises to an undesirable range (e.g., the side of the protrusion on the lower surface of the lead frame 13). Consequently, the amount of first bonding material 14 remaining between the protrusion 13b of the lead frame 13 and the semiconductor element 12 is reduced, which may result in poor connection between the protrusion 13b and the semiconductor element 12.

[0061] Second, when chip floating occurs, the weight of semiconductor element 12 is also applied to the molten third bonding material 16 via the terminals 13a of lead frame 13. As a result, the third bonding material 16 under terminal 13a overflows into an undesirable area, and the amount of third bonding material 16 remaining between terminal 13a and insulating substrate 11 in lead frame 13 becomes less, which may lead to poor connection between terminal 13a and insulating substrate 11.

[0062] Step S7c': When the temperature of the component mounting fixture is higher than the solidus temperature T2 of the second bonding material 15, the downward force caused by the wetting force of the molten second bonding material 15 also acts on the semiconductor component 12. However, since the problems generated in step S7b' are irreversible, the various problems mentioned above cannot be eliminated by the downward force caused by the wetting force of the second bonding material 15.

[0063] In addition, if the height of the semiconductor element 12 is higher than the designed height due to the chip floating, poor connection between the semiconductor element 12 and the insulating substrate 11 may occur due to insufficient second bonding material 15.

[0064] Step S7d': When heating is stopped and the temperature of the component mounting fixture is lower than the solidus temperature T13 of the first bonding material 14 and the third bonding material 16, the constituent elements of the semiconductor device 1' are fixed. That is, the various problems that occurred in steps S7b' and S7c' are also fixed.

[0065] The manufacturing method of the comparative example described above causes chip floating and various problems arising therefrom, but the manufacturing method of this embodiment does not cause chip floating or the problems arising therefrom.

[0066] In addition, in the semiconductor device of this embodiment, a relatively soft Sn-Cu solder is disposed on the upper surface of the semiconductor element, and a Sn-Cu-Sb solder with high thermal fatigue resistance is disposed on the lower surface of the semiconductor element. Therefore, the influence of thermal stress generated on both the front and back surfaces of the semiconductor element during use of the semiconductor device can be mitigated.

[0067] Example 2

[0068] Next, use Figure 6 and Figure 7 The following describes the semiconductor device 1 of Embodiment 2 of the present invention. Furthermore, the commonalities with Embodiment 1 are omitted from repeated descriptions.

[0069] In Example 1 Figure 4 In the manufacturing method shown, when the molten first bonding material 14 contacts the lower surface of the lead frame 13, there is no structure to control the wetting amount of the first bonding material 14. Therefore, even if the melting sequence of each bonding material can be properly controlled, the molten first bonding material 14 may diffuse to an undesirable range. Therefore, in this embodiment, a structure is added to keep the diffusion range of the molten first bonding material 14 within the desired range.

[0070] For example, such as Figure 6 As shown, a wetting rise prevention material 13c, composed of resin material and photoresist material, is coated on the side of the protrusion 13b of the lead frame 13. Because this wetting rise prevention material 13c has low affinity for the molten first bonding material 14, even if wetting rise occurs... Figure 5 In the case of chip floating as in (b), it is also possible to suppress the diffusion of the molten first bonding material 14 into the area coated with the wet rise prevention material 13c (i.e., the area where the first bonding material 14 is not intended to overflow in the design), so that the diffusion range of the first bonding material 14 can be kept on the lower surface of the protrusion 13b.

[0071] In addition, such as Figure 7As shown, a wetting and rising prevention material 13c, composed of resin material and photoresist material, can also be coated on the outer periphery of the lower surface of the protrusion 13b of the lead frame 13. Based on this structure, it is also possible to obtain a material similar to... Figure 6 The same effect.

[0072] Symbol Explanation

[0073] 1: Semiconductor device; 11: Insulating substrate; 11a: Insulating plate; 11b: Metal wiring section; 12: Semiconductor element; 13: Lead frame; 13a: Terminal; 13b: Protrusion; 13c: Wetting rise prevention material; 14: First bonding material; 15: Second bonding material; 16: Third bonding material; 17: Heat dissipation material; 18: Fourth bonding material; 19: Sealing material; 20: Metal wire.

Claims

1. A semiconductor device comprising: Semiconductor components; Wireframe; Insulating substrate; A first bonding material is used to bond the semiconductor element to the lead frame; A second bonding material is used to bond the semiconductor element to the insulating substrate; as well as A third bonding material bonds the insulating substrate to the lead frame. The semiconductor device is characterized in that... The solidus temperature of the first bonding material is lower than that of the second bonding material. The solidus temperature of the third bonding material is above the solidus temperature of the second bonding material.

2. The semiconductor device according to claim 1, characterized in that, The first bonding material is a Sn-Cu based solder containing Sn and Cu. The second bonding material is a Sn-Cu-Sb solder containing Sn, Cu and Sb.

3. The semiconductor device according to claim 1, characterized in that, The lead frame has terminals that protrude to the side and protrusions that protrude downward. The protrusion is bonded to the upper surface of the semiconductor element via the first bonding material. The terminal is bonded to the metal wiring portion of the insulating substrate via the third bonding material.

4. The semiconductor device according to claim 3, characterized in that, The sides of the protrusion are coated with resin material or corrosion inhibitor material.

5. The semiconductor device according to claim 3, characterized in that, The lower surface of the protrusion is coated with a resin material or an anti-corrosion material.

6. A method for manufacturing a semiconductor device, comprising manufacturing the semiconductor device by heating a semiconductor element, a lead frame, an insulating substrate, a first bonding material for bonding the semiconductor element and the lead frame, a second bonding material for bonding the semiconductor element and the insulating substrate, and a third bonding material for bonding the insulating substrate and the lead frame in a heating furnace. The method for manufacturing the semiconductor device is characterized in that... It includes the following steps: The insulating substrate is mounted on the fixture; The second bonding material is disposed on the metal wiring portion of the insulating substrate; The semiconductor element is disposed on the second bonding material; The first bonding material is disposed on the semiconductor element; A plurality of the third bonding materials are disposed on the metal wiring portion; A gap is created between the lead frame and the first bonding material by configuring the lead frame in a manner that spans multiple third bonding materials. The first bonding material is melted and bonded to the upper surface of the semiconductor element; The second bonding material is melted to bond the lower surface of the semiconductor element to the metal wiring portion; as well as The third bonding material is melted to bond the lead frame to the metal wiring portion, and the upper surface of the semiconductor element is bonded to the lead frame via the melted first bonding material.

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