Fault recording method and device, control equipment and program product

Abstract

The invention is suitable for the technical field of power system automation, and provides a fault recording method and device, control equipment and a program product, and the method comprises the steps: caching obtained time-sequenced electric quantity sampling data to a data cache region in a cyclic coverage manner; calculating at least one preset electrical characteristic quantity based on the electrical quantity sampling data, and monitoring the electrical characteristic quantity to determine an initial triggering moment t1 when a preset triggering condition is met; calculating to obtain a corrected fault starting moment t0 according to the initial triggering moment t1; and positioning the corresponding sampling data point from the data cache region based on the wave recording starting time t0, and starting fault wave recording, thereby overcoming the starting lag defect, realizing quick response, ensuring the integrity of fault data, and further improving the accuracy of fault analysis.

Description

Technical Field

[0001] This application belongs to the field of power system automation technology, and in particular relates to fault recording methods, devices, control equipment and program products. Background Technology

[0002] In power systems, fault recorders are key devices for ensuring the safe and stable operation of the power grid. They can monitor key electrical quantities such as voltage and current in the power grid in real time. When a fault or abnormal disturbance occurs in the system, they automatically trigger and record waveform data for a period of time before and after the fault occurs, providing a basis for post-fault analysis.

[0003] In existing technologies, some fault recorders employ multiple criteria to trigger recording, such as calculations based on the frequency, harmonics, sequence components, or abrupt changes of electrical quantities, comparing these calculations with preset start-up parameters. Recording is initiated when the conditions are met. However, to obtain a relatively accurate effective value, the calculation process typically requires a complete power frequency cycle (e.g., 20 milliseconds in a 50 Hz power grid) or even a longer data window. This leads to the following technical drawback: the logical start time of the recorder is inevitably later than the actual occurrence time of the fault, resulting in a calculation delay of at least one cycle. Although existing technologies include pre-recording functions, i.e., saving a cached segment of historical data after triggering, the recorded logical zero moment is the moment the triggering criteria are met, not the actual moment the fault occurs. This may cause the initial transient characteristics of the fault to be missed, thus affecting the accuracy and timeliness of fault analysis and failing to meet the need for precise fault tracing. Summary of the Invention

[0004] This application provides fault waveform recording methods, apparatus, control devices, and program products, aiming to solve the technical problem in the prior art where waveform recording start-up is delayed due to calculation delay, making it impossible to accurately and completely record waveform data near the true starting point of the fault.

[0005] In a first aspect, embodiments of this application provide a fault recording method, including: The acquired time-series electrical quantity sampling data is cached in the data cache area in a cyclic overwrite manner; Based on the electrical quantity sampling data, at least one preset electrical characteristic quantity is calculated, and the electrical characteristic quantity is monitored to determine an initial trigger time t1 when the preset trigger condition is met; A corrected fault initiation time t0 is calculated based on the initial trigger time t1; Based on the waveform recording start time t0, the corresponding sampling data point is located from the data buffer area, and fault waveform recording is started.

[0006] In one possible implementation of the first aspect, the electrical characteristic quantities include at least one of the following: effective value of phase current, zero-sequence current, negative-sequence current, effective value of phase voltage, zero-sequence voltage, and negative-sequence voltage.

[0007] In one possible implementation of the first aspect, monitoring the electrical characteristic quantity to determine an initial triggering time t1 when a preset triggering condition is met includes: When the values ​​of N consecutive calculation points of the electrical characteristic quantity are all greater than or less than the corresponding preset threshold value, the timestamp corresponding to the first calculation point among the N consecutive calculation points is determined as the initial trigger time t1.

[0008] In one possible implementation of the first aspect, calculating a corrected fault initiation time t0 based on the initial triggering time t1 includes: The corrected fault initiation time t0 is calculated using the following algorithm formula: t0 = t1 - Twin - Tjudge + tm; where Twin is the computation window length delay, Tjudge is the judgment delay, and tm is an adaptive compensation parameter.

[0009] In one possible implementation of the first aspect, the method further includes: Different values ​​are assigned to the adaptive compensation parameter tm according to the type of the triggering condition; The triggering conditions include at least one of the following: over-limit triggering conditions, zero-order triggering conditions, and negative-order triggering conditions.

[0010] In one possible implementation of the first aspect, monitoring the electrical characteristic quantity to determine an initial triggering time t1 when a preset triggering condition is met, and calculating a corrected fault initiation time t0 based on the initial triggering time t1, includes: When two or more types of electrical characteristic quantities satisfy their respective triggering conditions, the initial triggering time t1 corresponding to the two or more types of electrical characteristic quantities that satisfy their respective triggering conditions is determined respectively; Based on the initial trigger time t1 for each type and the corresponding adaptive compensation parameter tm, a corrected fault start time t0 is calculated.

[0011] In one possible implementation of the first aspect, calculating a corrected fault initiation time t0 based on the initial triggering time t1 includes: The corrected fault initiation time t0 is calculated using the following algorithm formula: t0 = t1 - Tcalc - K / (dH / dt); where Tcalc is the algorithm delay parameter, K is an empirical coefficient, and dH / dt is the harmonic energy growth rate of the electrical characteristic quantity at the initial triggering time t1.

[0012] Secondly, embodiments of this application provide a fault recording device, comprising: The caching module is used to cache the acquired time-series electrical quantity sampling data to the data cache area in a cyclic overwrite manner; The trigger time calculation module is used to calculate at least one preset electrical characteristic quantity based on the electrical quantity sampling data, and monitor the electrical characteristic quantity to determine an initial trigger time t1 when the preset trigger conditions are met; The correction module is used to calculate a corrected fault start time t0 based on the initial trigger time t1; The waveform recording module is used to locate the corresponding sampling data point from the data buffer based on the waveform recording start time t0, and start fault waveform recording.

[0013] Thirdly, embodiments of this application provide a control device, including: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the method as described in any of the first aspects.

[0014] Fourthly, embodiments of this application provide a computer-readable storage medium, comprising: the computer-readable storage medium storing a computer program, which, when executed by a processor, implements the steps of the method as described in any of the first aspects.

[0015] Fifthly, embodiments of this application provide a computer program product that, when run on a control device, causes the control device to perform the method described in any of the first aspects above.

[0016] The beneficial effects of the embodiments in this application compared with the prior art are: By correcting the initial trigger time t1, a recording start time t0 that is closer to the actual fault occurrence time is determined and used as the logical zero point for recording. This overcomes the starting lag defect caused by calculation delay in existing technologies and achieves a truly fast response. Because the start time is effectively advanced, it can capture and record the electrical quantity change waveforms from the moment the fault occurs more completely than existing technologies, avoiding the loss of key transient information, ensuring the integrity of fault data, and providing a more accurate and reliable basis for subsequent fault cause analysis, fault location, and protection action behavior evaluation.

[0017] It is understood that the beneficial effects of the second to fifth aspects mentioned above can be found in the relevant descriptions in the first aspect mentioned above, and will not be repeated here. Attached Figure Description

[0018] To more clearly illustrate the technical solutions in the embodiments of this application, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0019] Figure 1 A schematic flowchart of a fault recording method provided in an embodiment of this application; Figure 2 This is a schematic diagram illustrating the principle of startup timing correction provided in an embodiment of this application; Figure 3 This is a schematic diagram of the structure of a fault recording device provided in an embodiment of this application; Figure 4 This is a schematic diagram of the structure of a control device provided in an embodiment of this application. Detailed Implementation

[0020] In the following description, specific details such as particular system architectures and techniques are set forth for illustrative purposes and not for limitation, in order to provide a thorough understanding of the embodiments of this application. However, those skilled in the art will understand that this application may also be implemented in other embodiments without these specific details. In other instances, detailed descriptions of well-known systems, apparatuses, circuits, and methods have been omitted so as not to obscure the description of this application with unnecessary detail.

[0021] It should be understood that, when used in this application specification and the appended claims, the term "comprising" indicates the presence of the described features, integrals, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components and / or a collection thereof.

[0022] It should also be understood that the term “and / or” as used in this application specification and the appended claims means any combination of one or more of the associated listed items and all possible combinations, and includes such combinations.

[0023] As used in this application specification and the appended claims, the term "if" may be interpreted, depending on the context, as "when," "once," "in response to determination," or "in response to detection." Similarly, the phrase "if determined" or "if detected [the described condition or event]" may be interpreted, depending on the context, as meaning "once determined," "in response to determination," "once detected [the described condition or event]," or "in response to detection [the described condition or event]."

[0024] Furthermore, in the description of this application and the appended claims, the terms "first," "second," "third," etc., are used only to distinguish descriptions and should not be construed as indicating or implying relative importance.

[0025] References to "one embodiment" or "some embodiments" as described in this specification mean that one or more embodiments of this application include a specific feature, structure, or characteristic described in connection with that embodiment. Therefore, the phrases "in one embodiment," "in some embodiments," "in other embodiments," "in still other embodiments," etc., appearing in different parts of this specification do not necessarily refer to the same embodiment, but rather mean "one or more, but not all, embodiments," unless otherwise specifically emphasized. The terms "comprising," "including," "having," and variations thereof mean "including but not limited to," unless otherwise specifically emphasized.

[0026] Example 1 This embodiment provides a specific implementation scheme for a fault recording method. Figure 1 This is a flowchart illustrating the method provided in the embodiments of this application. There is an inherent analyzable delay between the actual occurrence of a fault and the detection and triggering of waveform recording. By correcting the timing of the initially detected fault indications, a waveform recording start point closer to the actual occurrence of the fault can be determined, thereby achieving rapid and complete recording of the fault waveform and avoiding the omission of key transient information in the early stages of the fault.

[0027] Figure 3 The basic principle of the start-up time correction in this application embodiment is illustrated. Point A represents the actual physical time when the fault occurs, point B represents the initial trigger time t1 when the system algorithm first meets the preset trigger conditions, and point C represents the actual waveform recording start time t0 obtained after backtracking correction in this application. As shown in the figure, there is a delay Δt between the initial trigger time t1 (B) and the actual fault time A. This delay is mainly accumulated by data acquisition, algorithm calculation, and logical judgment. The goal of the method in this application is to accurately estimate and compensate for this delay, so that the corrected waveform recording start time t0 (C) is earlier than the initial trigger time t1 (B), thereby infinitely approaching the actual fault starting point A on the time axis.

[0028] In one embodiment of this application, the method may specifically include the following steps: S101 caches the acquired time-series electrical quantity sampling data to the data cache area in a cyclic overwrite manner.

[0029] Specifically, in a power system application scenario, such as a substation automation system or line protection device, the fault recording device continuously and synchronously samples key analog electrical signals in the power grid through its front-end sensors (such as current transformers (CTs) and voltage transformers (PTs)) and data acquisition cards. These electrical signals typically include three-phase voltages (Ua, Ub, Uc) and three-phase currents (Ia, Ib, Ic), and sometimes also neutral point current or bus voltage. To ensure the capture of the rapid transient process during a fault, the sampling process can employ a high-speed analog-to-digital converter (ADC) at a sampling rate much higher than the Nyquist frequency. For example, in a 50Hz power frequency grid, a sampling rate of 2.5kHz (i.e., 50 sampling points per power frequency cycle) or even higher, such as 5kHz (100 sampling points per power frequency cycle), can be used to ensure sufficient waveform resolution.

[0030] The collected discrete-time electrical quantity sampling data is temporarily stored in a data buffer. The data is stored using a first-in, first-out (FIFO) cyclic overwrite method; that is, when the buffer is full, new sampling data starts from the beginning of the buffer and sequentially overwrites the oldest data. This mechanism ensures that at any given time, the device's memory retains a complete sequence of electrical signals from the past period, providing a data foundation for subsequent fault tracing and retrieval of pre-fault data.

[0031] S102, based on the electrical quantity sampling data, calculate at least one preset electrical characteristic quantity, and monitor the electrical characteristic quantity to determine an initial trigger time t1 when the preset trigger condition is met.

[0032] While data acquisition and caching continue, one or more computational tasks are executed in parallel to perform real-time analysis of the cached data. These tasks continuously extract the latest data segments from the aforementioned data cache using a sliding window mechanism. Specifically, every one or several sampling cycles, a data window of one complete power frequency cycle (20 milliseconds in a 50Hz power grid) can be extracted from the cache. This sliding window mechanism ensures the continuity and real-time nature of the analysis.

[0033] For each extracted data window, a preset digital signal processing algorithm is applied to calculate one or more electrical characteristic quantities that can characterize the current power grid operating state.

[0034] In this embodiment, a commonly used digital signal processing algorithm is the Fast Fourier Transform (FFT). By performing FFT on the sampling points within a 20-millisecond data window, the fundamental effective value, phase, and harmonic components of the electrical quantity within that time period are calculated. Based on these calculation results, key electrical characteristic quantities for fault diagnosis can be further obtained. According to a specific embodiment of this application, these electrical characteristic quantities may include, but are not limited to: RMS value of phase current: Reflects the line load and short-circuit current level. The RMS value of the three phase currents is obtained by performing Fourier transform or other RMS value calculation methods on the sampling sequence of the three phase currents.

[0035] Zero-sequence current: A sensitive indicator of ground faults, determined by the instantaneous values ​​or phasors of the three-phase currents using the formula... Calculated.

[0036] Negative sequence current: A sensitivity indicator for asymmetrical faults (such as phase-to-phase short circuits and phase loss), determined by the phasors of the three-phase currents using the formula... The calculation yielded that, is a complex number rotation factor.

[0037] RMS phase voltage: Reflects the system voltage level and is used to determine overvoltage or voltage dip. The RMS values ​​of the three phase voltages are obtained by calculating the sampling sequence of the three-phase voltages.

[0038] Zero-sequence voltage: reflects the neutral point displacement and is also a sensitive indicator of grounding faults.

[0039] Negative sequence voltage: Reflects the degree of voltage imbalance, determined by the instantaneous values ​​or phasors of the three-phase voltages using the formula... Calculated.

[0040] Negative sequence voltage: Based on the phasors of the three-phase voltages, through the formula... Calculated.

[0041] Each calculation generates a value for an electrical characteristic and its corresponding timestamp, typically defined as the end point of the calculation window. Thus, a characteristic value and a timestamp together constitute a calculation point. As the sliding window moves forward, a real-time data stream consisting of consecutive calculation points is generated for each monitored electrical characteristic.

[0042] Next, these real-time generated calculation point data streams are continuously and in parallel compared and judged against a series of preset trigger conditions. These trigger conditions (or setpoints) are preset according to power system operating procedures, protection settings, and fault characteristics, and are usually user-configurable. In this embodiment, to improve the reliability of triggering and prevent false triggering caused by transient disturbances or measurement noise, the judgment logic generally adopts a confirmation strategy based on continuous counting, i.e., a digital filtering or de-jittering mechanism.

[0043] As a preferred implementation method, parallel decision logic can include the following: 1. Current Limit Exceedance Judgment: The real-time calculated effective values ​​of the three-phase currents (A, B, and C) are compared with a preset current limit threshold value Iset (e.g., set according to 1.2 times the line's rated load). The current limit exceedance trigger condition is considered met only when the effective value of the current in any phase exceeds the threshold value Iset for N1 consecutive calculation points. Here, N1 is an integer that can be adjusted according to anti-interference requirements, for example, 15. Once this condition is met, the timestamp corresponding to the first calculation point among these N1 consecutive calculation points is precisely recorded as a local trigger time t10. If the condition is not met at any time (e.g., continuous counting is interrupted), t10 is set to an invalid value (e.g., 0 or NULL), and the next round of monitoring continues.

[0044] 2. Zero-sequence current exceeding the upper limit judgment: The calculated zero-sequence current I0 is compared with the preset zero-sequence current exceeding the limit threshold value I0set (for example, for systems with an ungrounded neutral point or grounded through an arc suppression coil, this value can be set very small, such as 0.1 amperes). Similarly, when the zero-sequence current values ​​at N2 consecutive calculation points are all greater than the threshold value I0set, the zero-sequence current triggering condition is considered to be met (indicating a possible grounding fault), and the timestamp of the first calculation point in this continuous sequence is recorded as t11. N2 can be set according to the sensitivity and stability of the zero-sequence component, for example, it can be 10.

[0045] 3. Negative Sequence Current Exceeding Upper Limit Detection: The calculated negative sequence current I2 is compared with a preset negative sequence current exceeding threshold value I2set (e.g., 0.1 amperes). When the values ​​of the negative sequence current at N3 consecutive calculation points are all greater than the threshold value I2set, the negative sequence current trigger condition is met (indicating a possible asymmetrical fault). At this time, the timestamp of the first calculation point of this continuous sequence is recorded as t12. N3 can also be 10.

[0046] 4. Voltage Limit Exceedance Judgment: The effective values ​​of the three-phase voltages are compared with a preset voltage limit threshold value Uuset (for example, for a system with a rated phase voltage of 57.7 volts, it can be set to 63.51 volts, i.e., 1.1 times the rated voltage). When the values ​​of any phase voltage at N1 consecutive calculation points are greater than the threshold value Uuset, the timestamp of the first calculation point in the sequence is recorded as t13.

[0047] 5. Voltage Lower Limit Judgment: The effective values ​​of the three-phase voltages are compared with a preset voltage lower limit threshold value Ulset (for example, it can be set to 51.97 volts, i.e., 0.9 times the rated voltage). When the values ​​of any phase voltage at N1 consecutive calculation points are all less than the threshold value Ulset (indicating a voltage drop, often accompanied by a short circuit fault), the timestamp of the first calculation point in the sequence is recorded as t14.

[0048] 6. Zero-sequence voltage exceeding the upper limit judgment: The calculated zero-sequence voltage U0 is compared with the preset zero-sequence voltage exceeding the threshold value U0set (e.g., 1.15 volts). When the values ​​of the zero-sequence voltage at N2 consecutive calculation points are all greater than the threshold value U0set, the timestamp of the first calculation point of the sequence is recorded as t15.

[0049] 7. Negative sequence voltage exceeding the upper limit judgment: Compare the calculated negative sequence voltage U2 with the preset negative sequence voltage exceeding the threshold value U2set (e.g., 1.73 volts). When the values ​​of the negative sequence voltage at N3 consecutive calculation points are all greater than the threshold value U2set, record the timestamp of the first calculation point of the sequence as t16.

[0050] Through the above parallel and multi-dimensional judgment logic, multiple fault symptoms can be monitored simultaneously, and a preliminary, local trigger moment can be recorded for each symptom that meets the conditions.

[0051] In S102, a complex fault may trigger multiple judgment conditions within a short period of time, resulting in multiple non-zero local trigger times (t10, t11, ..., t16). To determine a unified benchmark for the entire waveform recording event, a global initial trigger time t1 needs to be determined from these times.

[0052] The initial trigger time t1 refers to the timestamp when the electrical quantity abnormality is first confirmed through calculation and judgment logic (specifically, the timestamp of the first calculation point among N consecutive calculation points), which is the reference point for the actual time of subsequent fault correction.

[0053] Specifically, when the values ​​of N consecutive calculation points of the electrical characteristic quantity are all greater than or less than the corresponding preset threshold value, the timestamp corresponding to the first calculation point among the N consecutive calculation points is determined as the initial trigger time t1.

[0054] Specifically, by analyzing and comparing all non-zero local trigger times and selecting the minimum value (i.e., the earliest time), the global initial trigger time t1 can be determined. This t1 represents the earliest abnormal signal occurrence point that the system can perceive through its calculation and judgment logic, and serves as the benchmark for subsequent correction calculations.

[0055] While determining t1, a set of key context parameters associated with that time t1 are also recorded. These parameters are crucial for subsequent scenario-adaptive correction calculations. Specifically, these include: the number of consecutive calculation points Ns used for the specific judgment condition that triggers t1 (i.e., the corresponding values ​​of N1, N2, or N3), and the type of judgment condition (e.g., whether it is current over-limit triggering, zero-sequence triggering, or negative-sequence triggering).

[0056] S103, a corrected fault start time t0 is calculated based on the initial trigger time t1.

[0057] Specifically, the corrected fault initiation time t0 is calculated according to the following algorithm formula: t0 = t1 - Twin - Tjudge + tm; where Twin is the computation window length delay, Tjudge is the judgment delay, and tm is an adaptive compensation parameter.

[0058] The adaptive compensation parameter tm can be assigned different values ​​according to the type of the triggering condition; the type of the triggering condition includes at least one of the following: over-limit triggering condition, zero-order triggering condition, and negative-order triggering condition.

[0059] In this embodiment, the initial trigger time t1 determined in the previous step is not directly used as the logic zero point (i.e., the fault time) for waveform recording. Instead, it is used as a known input to start a time correction procedure. This procedure aims to compensate for all inherent delays between the actual occurrence of the fault and the system's judgment logic meeting the conditions, thereby backtracking to calculate an earlier and more accurate waveform recording start time t0.

[0060] In this embodiment, the backtracking calculation can be implemented using a specific algorithm formula. As a preferred implementation, the formula is defined as: .

[0061] The following is a detailed explanation of each parameter in the formula: t1: This is the global initial trigger time determined in S102, which is the reference point for correction.

[0062] : Calculation window length delay. This is an inherent delay introduced by digital signal processing algorithms (such as FFT) that require a complete data window for effective computation. In this embodiment, since data from a single power frequency cycle is used for computation, therefore... This is a fixed value, 20 milliseconds. This can be understood as the system having to wait at least 20 milliseconds for the calculation window to fill with data before the impact of the fault can be reflected in the calculation results for the first time.

[0063] : Decision delay. This is the delay introduced by the N consecutive decision-making logic to ensure trigger reliability. Its value is equal to the number of consecutive calculation points Ns used in the decision-making condition for trigger t1, multiplied by the time interval between each calculation point. For example, if the sampling rate is 2.5kHz (sampling period 0.4ms), and the calculation is a point-by-point sliding process (i.e., a new calculation result is generated for each sampling point), then The timeout is 0.4 milliseconds. If the trigger condition for t1 is current exceeding the limit, and its Ns is 15, then... for This delay is to confirm the persistence of the fault rather than transient noise.

[0064] tm: Adaptive compensation parameter. This is a key parameter for refined compensation. It is not a fixed value but is adaptively adjusted according to the type of triggering condition. It compensates for the delay in the change process of electrical quantities related to the fault type, which is difficult to quantify precisely. Different types of faults have different rates and characteristics of electrical quantity changes; therefore, introducing a type-related compensation term can make the correction results more accurate. In a specific embodiment of this application, the value of tm can be dynamically determined according to the event type that triggers t1. These values ​​can be calibrated based on a large amount of fault simulation data or field operating experience. For example: - If the triggering type is an over-limit triggering condition (such as current exceeding the upper limit, voltage exceeding the upper limit, or voltage exceeding the lower limit), such faults usually develop rapidly, and the electrical quantities change in a step-like manner. The compensation amount can be slightly smaller, so tm = 5ms is set. - If the triggering type is a zero-sequence triggering condition or a negative-sequence triggering condition (such as zero-sequence current exceeding the limit, negative-sequence voltage exceeding the limit), such faults are usually related to imbalance or grounding. Their development process may be slightly slower, and the component values ​​require an accumulation process. The compensation amount can be slightly larger, so tm = 8ms is set. For example: Suppose t1 is 12:00:00.500, triggered by 15 consecutive current over-limit events, with a sampling interval of 0.4ms. Then the corrected start-up time... The logic zero of the recorded waveform was corrected to 12:00:00.479.

[0065] By subtracting the known and quantifiable calculation and judgment delays from the initial triggering time t1 and adding an adaptive compensation amount based on experience and fault type, a corrected waveform recording start time t0 that is theoretically closer to the actual fault occurrence time is obtained.

[0066] S104, based on the waveform recording start time t0, locate the corresponding sampling data point from the data buffer area and start fault waveform recording.

[0067] After calculating the final waveform recording start time t0, the waveform recording control logic is activated. Its core task is to accurately locate the corresponding historical sampling data point in the cyclic data buffer established in S101 based on the precise timestamp t0.

[0068] In this embodiment, the current write position (pointer) of the latest data in the cache is known, as well as the time difference between t0 and the current time. This time difference and the sampling period are then used to... This allows us to calculate the number of sampling points that need to be backtracked. For example, assuming the total size of the circular data buffer is n sampling points, the pointer position of the latest data being written is k, and the time difference between time t0 and the current time is ΔT, then the index position x of the data point corresponding to t0 in the buffer can be obtained using the formula... The calculation yields the result. Here, kt1 is the index of the data at time t1 in the cache.

[0069] Once the data point with index x is located, it is taken as the logical zero point of the fault waveform recording. Then, using this point as the center, a pre-fault data segment of a preset length (e.g., 200 milliseconds) is extracted forward, and a post-fault data segment of a preset length (e.g., 200 milliseconds or longer) is collected or extracted backward. These two data segments are seamlessly stitched together to form a complete fault waveform record with t0 as the zero point and a continuous time axis. Finally, this record, containing high-precision waveform data and relevant event information (such as trigger type, trigger time, and corrected time), is stored in a common standard format (such as the COMTRADE format for power system transient data exchange) in a memory (such as flash memory or solid-state drive) to form a final waveform file for subsequent fault analysis.

[0070] In addition, optionally, this embodiment can also independently store each triggered sub-event and its respective corrected time to provide richer fault diagnosis information. For example, if t10 is not 0, a current exceeding the upper limit event can be recorded separately, and its independent correction time can be calculated: Similarly, all other triggered events, from t11 to t16, can be processed in a similar way, with their respective corrected trigger times calculated and stored. This provides a multi-dimensional, high-precision time-stamped sequence for complex secondary fault analysis.

[0071] Example 2 This embodiment, based on Embodiment 1, provides an adaptive correction scheme for composite triggering conditions. In real power system faults, a single fault event often triggers anomalies in multiple electrical quantities simultaneously. For example, a severe phase-to-phase short-circuit fault can cause a sharp increase in the fault phase current and a sudden drop in system voltage. In this case, simply selecting the earliest time among all triggering signals for correction, while feasible, may not be the optimal strategy because it can be affected by noise in a single signal channel or specific disturbances. This embodiment aims to intelligently select different calculation methods to determine the waveform recording start time t0 based on different combinations of fault symptoms, thereby improving the robustness and accuracy of the correction results.

[0072] The execution flow of this embodiment can be regarded as a further extension of S103 in embodiment 1. Specifically, when two or more types of electrical characteristic quantities satisfy their respective triggering conditions, the initial triggering time t1 corresponding to the two or more types of electrical characteristic quantities that satisfy their respective triggering conditions is determined respectively; based on the initial triggering time t1 of each type and the adaptive compensation parameter tm corresponding to them respectively, a corrected fault start time t0 is calculated.

[0073] For ease of understanding, the following description is provided based on an example: Step a1, Composite Triggering Event Analysis and Classification: After executing S102 of Example 1 and obtaining a set of local triggering times t10 to t16, the system does not immediately determine the global t1. Instead, it first analyzes and classifies these triggering events that occur densely within a short period of time to create a preliminary fault profile. First, the total number k of all non-zero triggering times is counted. Then, these triggering events are classified into two main categories based on their physical properties: current-type triggering events and voltage-type triggering events.

[0074] Current-related triggering events include: phase current exceeding the upper limit (corresponding to t10), zero-sequence current exceeding the upper limit (corresponding to t11), and negative-sequence current exceeding the upper limit (corresponding to t12). The number of these events that are triggered is counted and denoted as k1.

[0075] Voltage-related trigger events include: voltage exceeding the upper limit (corresponding to t13), voltage exceeding the lower limit (corresponding to t14), zero-sequence voltage exceeding the upper limit (corresponding to t15), and negative-sequence voltage exceeding the upper limit (corresponding to t16). The number of times these events are triggered is recorded and denoted as k2.

[0076] Step a2, determine the earliest time and related parameters for each category: Next, for each type of triggering event, find its earliest occurrence time as the representative time of that type of event.

[0077] If the number of current-type trigger events k1 > 0, then among all the triggered current-type event times (non-zero values ​​in t10, t11, t12), the smallest one is selected and recorded as the earliest current-type trigger time tc. At the same time, the number of continuous calculation points Nc and the adaptive compensation parameter tmc corresponding to time tc are recorded.

[0078] If the number of voltage-type trigger events k2 > 0, then among all the triggered voltage-type event times (non-zero values ​​in t13, t14, t15, t16), the smallest one is selected and recorded as the earliest voltage-type trigger time tv. Simultaneously, the number of consecutive calculation points Nv and the adaptive compensation parameter tmv corresponding to time tv are recorded.

[0079] The optional explanations are as follows: k: The total number of effective local triggering moments in a composite triggering scenario, i.e., the number of non-zero moments in t10~t16 (e.g., when current over-limit and voltage drop are triggered simultaneously, k=2), used to determine whether the fault simultaneously causes multiple electrical quantity anomalies.

[0080] k1 (number of current-related triggering events): the total number of current-related events that meet the triggering conditions, i.e., the number of non-zero moments in t10 (current over-limit), t11 (zero-sequence current over-limit), and t12 (negative-sequence current over-limit) (e.g., when only zero-sequence current over-limit is triggered, k1=1).

[0081] k2 (number of voltage-related triggering events): the total number of voltage-related events that meet the triggering conditions, i.e., the number of non-zero moments in t13 (voltage exceeds the upper limit), t14 (voltage exceeds the lower limit), t15 (zero-sequence voltage exceeds the limit), and t16 (negative-sequence voltage exceeds the limit) (e.g., when both voltage drop and zero-sequence voltage exceed the limit are triggered simultaneously, k2=2).

[0082] tc (earliest trigger time for current type): the smallest timestamp among all valid current type trigger times (non-zero values ​​in t10~t12), representing the moment when the current signal first becomes abnormal (e.g., when t10=12:00:00.500 and t11=12:00:00.502, tc=12:00:00.500).

[0083] tv (earliest trigger time for voltage classes): the smallest timestamp among all valid voltage class trigger times (non-zero values ​​in t13~t16), representing the moment when the voltage signal first becomes abnormal (e.g., when t14=12:00:00.498 and t15=12:00:00.501, tv=12:00:00.498).

[0084] Nc (Number of continuous calculation points for current-related events): The number of continuous confirmation points corresponding to tc, i.e., the N value used to trigger the current-related event at time tc (e.g., when tc is triggered by current exceeding the limit, Nc=N1=15; when it is triggered by zero-sequence current, Nc=N2=10).

[0085] Nv (Number of consecutive calculation points for voltage-related events): The number of consecutive confirmation points corresponding to tv, i.e., the N value used when a voltage-related event triggers tv (e.g., when tv is triggered by a voltage drop, Nv=N1=15; when it is triggered by a zero-sequence voltage, Nv=N2=10).

[0086] TMC (current-related adaptive compensation parameter): Matches the TM value of the trigger type corresponding to TC (e.g., when TC is triggered by current exceeding the limit, TMC=5ms; when triggered by zero-sequence current, TMC=8ms).

[0087] tmv (voltage adaptive compensation parameter): Matches the tm value of the trigger type corresponding to tv (e.g., when tv is triggered by voltage drop, tmv=5ms; when triggered by zero-sequence voltage, tmv=8ms).

[0088] Step a3: Select the calculation method according to the complex situation: Based on the values ​​of k1 and k2, that is, based on whether the fault is only manifested as current abnormality (such as remote high resistance fault), only manifested as voltage abnormality (such as system oscillation or power supply side disturbance), or both abnormalities (such as near-field metallic short circuit), different calculation methods are selected to determine the final waveform recording start time t0.

[0089] Scenario 1: Only current-related triggering (k1>0 and k2=0). This scenario indicates that the fault characteristics are mainly reflected in current changes, such as remote faults or sudden load increases, with little impact on the local voltage. In this case, the system adopts the first calculation method, which is entirely based on the earliest current-related triggering time tc for correction. This calculation method is the same as the single-trigger calculation method in Example 1: .in, To calculate the window length delay (e.g., 20ms). This is the time interval for calculating points.

[0090] Scenario 2: Voltage-related triggering only (k1=0 and k2>0). This scenario may correspond to disturbances on the system power supply side, long-distance voltage fluctuations, or non-faulty large load switching, with the fault characteristics primarily manifesting in the voltage. In this case, the system also uses the first calculation method, but is completely corrected based on the earliest voltage-related trigger time tv: .

[0091] Scenario 3: Both current and voltage are triggered (k1>0 and k2>0). This situation usually indicates a more serious local or near-field fault that affects both current and voltage, such as a metallic short circuit. In this case, both time points tc and tv contain important information about the fault's origin. To obtain more robust and accurate correction results and avoid the bias or noise that may exist from a single information source, the system can employ a second calculation method that fuses the two types of information. In this embodiment, this fusion calculation can be a weighted average of various parameters, for example, using the simplest arithmetic average for comprehensive correction: .

[0092] To simplify the expression, the judgment delay will be used. Defined as Then the above formula can be written as: .in, For current-related judgment delays, the judgment delay corresponding to tc is calculated using the following formula: =Nc×Tinterval (e.g., when Nc=15 and Tinterval=0.4ms, =6ms). The voltage-related judgment delay, corresponding to the TV judgment delay, is calculated using the following formula: =Nv×Tinterval (e.g., when Nv=10 and Tinterval=0.4ms, =4ms).

[0093] Understandably, this method of fusing and calculating multi-source triggering information is equivalent to performing cross-validation and voting on the fault initiation point. The results are generally more reliable and stable than relying solely on the earliest single moment, as it smooths out potential measurement errors or minor differences in algorithm response that may exist in a single channel.

[0094] Through the above-described classification and processing logic based on the combination of fault symptoms, the embodiments of this application can adaptively select the optimal correction strategy according to the actual performance of the fault. In particular, for complex and comprehensive faults, by averaging or weighted fusion of multi-source information, measurement or calculation errors that may exist in a single information source can be effectively smoothed, thereby achieving more accurate and complete correction of the waveform start time in complex fault scenarios.

[0095] Example 3 This embodiment proposes a specialized adaptive correction scheme for high-impedance grounding faults (HIF). Typical characteristics of HIFs include very small fault currents (potentially less than the normal load current of the line) and intermittent, unstable fault arcs, making traditional criters based on exceeding the power frequency RMS limit insensitive and unreliable. The fault characteristics are often hidden in weak harmonics or transient components, and the fault process develops slowly. This embodiment aims to solve the problem of untimely and inaccurate waveform recording for such concealed faults. The steps include: Step b1: Buffer electrical quantity sampling data. This step is the same as S101 in Example 1. Continuously sample electrical signals at high frequency and store them in a cyclic data buffer.

[0096] Step b2: Calculate at least one preset electrical characteristic quantity and determine an initial triggering time t1.

[0097] In response to the characteristics of high-impedance grounding faults, this embodiment no longer uses the conventional power frequency fundamental RMS value as the main criterion, but instead employs electrical characteristic quantities that are more sensitive to harmonic components. This is because the nonlinear characteristics of an electric arc generate abundant harmonics. For example, a set of digital bandpass filters, or time-frequency analysis methods such as Short-Time Fourier Transform (STFT) and Wavelet Transform, can be used to specifically process and extract the total energy or total harmonic distortion (THD) of a specific frequency band (e.g., a band covering the 3rd to 13th harmonics) in the current signal, denoted as... This harmonic energy parameter is highly sensitive to the high-frequency components generated by the electric arc, and can change significantly even when the fundamental current does not change much.

[0098] The total harmonic energy calculated in real time With a specially designed, highly sensitive trigger threshold Compare them.

[0099] Next, the initial triggering time t1 is determined. When the total harmonic energy is monitored... The value exceeded the preset trigger threshold for the first time. When this time is determined, it is set as the initial trigger time t1. It should be noted that, due to the slow and insidious nature of high-impedance grounding faults, this t1 may be significantly later than the actual start point of the fault (i.e., the moment when the arc first ignites or the unstable contact first occurs).

[0100] Step b3: Determine the recording start time t0. This embodiment proposes a dynamic correction model that is inversely proportional to the fault development rate. After determining t1, the growth rate of harmonic energy parameters near time t1 is immediately calculated and denoted as... This growth rate can be analyzed using recent data. The calculation points are obtained by difference or linear fitting, and they directly reflect the speed of fault development.

[0101] Then, backtracking calculations are performed according to the following formula to generate the waveform recording start time t0: .

[0102] The parameters in the formula are explained as follows: t1: the initial trigger time determined in the previous step. Algorithm delay parameter. This is a relatively fixed delay, representing the time required to calculate harmonic energy. The time required itself can be a small value, such as 3 milliseconds. K: A preset empirical or calibration coefficient. This coefficient is derived through statistical analysis of a large amount of experimental data or simulation models of high-impedance grounding faults, and is used to calibrate the magnitude of the dynamic correction. Its dimension is (energy / time)*time. Harmonic energy growth rate, which is the key dynamic variable in this formula.

[0103] For this modified model, the dynamic delay parameter term The magnitude of harmonic energy is inversely proportional to the rate of fault development. For slow-developing, weakly characterized high-impedance grounding faults, the rate of increase of harmonic energy is... It will be very small, resulting in a very small denominator, thus making This value becomes very large. This means that a significant time backtracking correction will be automatically performed, advancing the recording start time t0 to capture the initial stage of the fault. Conversely, if it is a rapidly developing fault with relatively obvious characteristics, its... The value will be relatively large, resulting in a smaller correction amount, which is consistent with reality. This adaptive mechanism allows the correction amount to dynamically match the individual characteristics of the fault.

[0104] Step b4: Record waveforms based on t0. Similar to S104 in Example 1, based on the waveform recording start time t0 obtained after dynamic and significant correction, the data starting point is accurately located in the data buffer, and the waveform data before and after the fault are processed and stored to generate a waveform recording file that can completely record the entire process of a high-impedance grounding fault from its inception to its development, providing accurate data for analyzing such difficult faults.

[0105] By introducing a dynamic delay parameter that is directly related to the fault development speed, the method proposed in this embodiment can effectively and adaptively solve the problem of untimely initiation of high-impedance grounding fault waveform recording.

[0106] It should be understood that the sequence number of each step in the above embodiments does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application.

[0107] Corresponding to the fault recording method described in the above embodiments, Figure 3 A structural block diagram of the fault recording device provided in the embodiments of this application is shown. For ease of explanation, only the parts related to the embodiments of this application are shown.

[0108] Reference Figure 3 A fault recording device, comprising: The caching module is used to cache the acquired time-series electrical quantity sampling data into the data buffer in a cyclic overwrite manner. This module receives analog electrical signals from the current transformer through an external analog-to-digital converter (ADC) interface and converts them into a digitized sampling data sequence. It is responsible for efficiently managing the cyclic data buffer in RAM, continuously writing the latest sampling data according to the first-in, first-out (FIFO) principle while overwriting the oldest data, providing a real-time and historical data source for all other processing modules. The function of this module corresponds to... Figure 1 S101 in the middle.

[0109] The trigger time calculation module is used to calculate at least one preset electrical characteristic quantity based on the electrical quantity sampling data, and monitor the electrical characteristic quantity to determine an initial trigger time t1 when a preset trigger condition is met. This module continuously reads data from the data buffer of the cache module and executes S102 of Embodiment 1. This module may contain multiple parallel processing threads or hardware logic units, each used to calculate different electrical characteristic quantities (such as the effective value of phase current, zero-sequence voltage, harmonic energy, etc.), and compare the calculation results with their respective preset threshold values. Once any judgment condition is met (e.g., N consecutive points exceeding the limit), the module generates an event signal containing local trigger times (such as t10, t11, etc.) and related parameters. Among all triggered events, the earliest global initial trigger time t1 is determined by comparison, and context parameters related to t1 (such as trigger type, number of consecutive points Ns, etc.) are packaged to form an initial trigger event package.

[0110] The correction module is used to calculate a corrected fault start time t0 based on the initial trigger time t1. This module receives the initial trigger event packet from the trigger time calculation module. This module can implement the correction logic based on a single trigger type as in Embodiment 1, the fusion calculation logic based on composite trigger conditions as in Embodiment 2, or the dynamic correction logic for a specific fault type as in Embodiment 3. Regardless of the logic used, its final output is a final waveform recording start time t0 earlier than t1, obtained through precise backtracking calculation.

[0111] The waveform recording module is used to locate the corresponding sampling data point from the data buffer based on the waveform recording start time t0, and to start fault waveform recording. This module receives the final instruction from the correction module—the waveform recording start time t0. Upon receiving the instruction, the module immediately executes it. Figure 1 S104 in the code sends a data location request to the cache module, performs precise backtracking in the circular data cache based on t0, and finds the corresponding historical data point. Then, it controls the data extraction process, copies the data before and after the data point for a preset duration from RAM, formats and encapsulates it (e.g., adds channel information, timestamps, event lists, etc.), and finally generates a standard waveform file.

[0112] Optionally, the electrical characteristic quantities include at least one of the following: effective value of phase current, zero-sequence current, negative-sequence current, effective value of phase voltage, zero-sequence voltage, and negative-sequence voltage.

[0113] Optionally, the trigger time calculation module is used to determine the timestamp corresponding to the first calculation point among the N consecutive calculation points as the initial trigger time t1 when the values ​​of the electrical characteristic quantity are all greater than or less than the corresponding preset threshold value.

[0114] Optionally, the corrected fault initiation time t0 can be calculated according to the following algorithm formula: t0 = t1 - Twin - Tjudge + tm; where Twin is the computation window length delay, Tjudge is the judgment delay, and tm is an adaptive compensation parameter.

[0115] Optionally, different values ​​may be assigned to the adaptive compensation parameter tm according to the type of the triggering condition; wherein, the type of the triggering condition includes at least one of the following: over-limit triggering condition, zero-order triggering condition, and negative-order triggering condition.

[0116] Optionally, a correction module is used to determine the initial triggering time t1 corresponding to the two or more types of electrical characteristic quantities that satisfy their respective triggering conditions when there are two or more types of electrical characteristic quantities that satisfy their respective triggering conditions; and to calculate a corrected fault start time t0 based on the initial triggering time t1 of each type and the adaptive compensation parameter tm corresponding to each of them.

[0117] Optionally, the corrected fault initiation time t0 can be calculated according to the following algorithm formula: t0 = t1 - Tcalc - K / (dH / dt); where Tcalc is the algorithm delay parameter, K is an empirical coefficient, and dH / dt is the harmonic energy growth rate of the electrical characteristic quantity at the initial triggering time t1.

[0118] It should be noted that the information interaction and execution process between the above-mentioned devices / units / modules are based on the same concept as the method embodiments of this application. For details on their specific functions and technical effects, please refer to the method embodiments section, and they will not be repeated here.

[0119] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the above-described division of functional units and modules is merely an example. In practical applications, the above functions can be assigned to different functional units and modules as needed, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above. The functional units and modules in the embodiments can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit. Furthermore, the specific names of the functional units and modules are only for easy differentiation and are not intended to limit the scope of protection of this application. The specific working process of the units and modules in the above system can be referred to the corresponding process in the foregoing method embodiments, and will not be repeated here.

[0120] This application also provides a control device, which includes: at least one processor, a memory, and a computer program stored in the memory and executable on the at least one processor, wherein the processor executes the computer program to implement the steps in any of the above method embodiments.

[0121] This application also provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the steps described in the various method embodiments above.

[0122] This application provides a computer program product that, when run on a control device, enables the control device to perform the steps described in the above-described method embodiments.

[0123] Figure 4 This is a schematic diagram of the structure of a control device provided in one embodiment of this application. Figure 4 As shown, the control device of this embodiment includes: at least one processor 40 ( Figure 4 (Only one is shown in the diagram), memory 41, and computer program 42 stored in the memory 41 and executable on the at least one processor 40, wherein the processor 40 executes the computer program 42 to implement the steps in any of the above-described visual programming method embodiments.

[0124] The control device may include, but is not limited to, a processor 40 and a memory 41. Those skilled in the art will understand that... Figure 4 This is merely an example of a control device and does not constitute a limitation on the control device. It may include more or fewer components than shown in the figure, or a combination of certain components, or different components. For example, it may also include input / output devices, network access devices, etc.

[0125] The processor 40 may be a Central Processing Unit (CPU), or it may be other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. A general-purpose processor may be a microprocessor or any conventional processor.

[0126] In some embodiments, the memory 41 may be an internal storage unit of the control device, such as a hard disk or memory. In other embodiments, the memory 41 may be an external storage device of the control device, such as a plug-in hard disk, smart media card (SMC), secure digital (SD) card, flash card, etc., provided on the control device. Furthermore, the memory 41 may include both internal and external storage units of the control device. The memory 41 is used to store the operating system, applications, bootloader, data, and other programs, such as the program code of the computer program. The memory 41 can also be used to temporarily store data that has been output or will be output.

[0127] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, all or part of the processes in the methods of the above embodiments of this application can be implemented by a computer program instructing related hardware. The computer program can be stored in a computer-readable storage medium, and when executed by a processor, it can implement the steps of the various method embodiments described above. The computer program includes computer program code, which can be in the form of source code, object code, executable files, or certain intermediate forms. The computer-readable medium can include at least: any entity or device capable of carrying computer program code to a device / control device, a recording medium, a computer memory, a read-only memory (ROM), a random access memory (RAM), an electrical carrier signal, a telecommunication signal, and a software distribution medium. Examples include USB flash drives, portable hard drives, magnetic disks, or optical disks. In some jurisdictions, according to legislation and patent practice, computer-readable media cannot be electrical carrier signals or telecommunication signals.

[0128] In the above embodiments, the descriptions of each embodiment have different focuses. For parts that are not described in detail or recorded in a certain embodiment, please refer to the relevant descriptions of other embodiments.

[0129] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0130] In the embodiments provided in this application, it should be understood that the disclosed apparatus / control devices and methods can be implemented in other ways. For example, the apparatus / control device embodiments described above are merely illustrative. For instance, the division of modules or units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between apparatuses or units may be electrical, mechanical, or other forms.

[0131] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0132] The above-described embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be included within the protection scope of this application.

Claims

1. A fault recording method, characterized in that, include: The acquired time-series electrical quantity sampling data is cached in the data cache area in a cyclic overwrite manner; Based on the electrical quantity sampling data, at least one preset electrical characteristic quantity is calculated, and the electrical characteristic quantity is monitored to determine an initial trigger time t1 when the preset trigger condition is met; A corrected fault initiation time t0 is calculated based on the initial trigger time t1; Based on the waveform recording start time t0, the corresponding sampling data point is located from the data buffer area, and fault waveform recording is started.

2. The method of claim 1, wherein, The electrical characteristic quantities include at least one of the following: effective value of phase current, zero-sequence current, negative-sequence current, effective value of phase voltage, zero-sequence voltage, and negative-sequence voltage.

3. The method of claim 2, wherein, The monitoring of the electrical characteristic quantity to determine an initial trigger time t1 when a preset trigger condition is met includes: When the values ​​of N consecutive calculation points of the electrical characteristic quantity are all greater than or less than the corresponding preset threshold value, the timestamp corresponding to the first calculation point among the N consecutive calculation points is determined as the initial trigger time t1.

4. The method of claim 2, wherein, The step of calculating a corrected fault initiation time t0 based on the initial trigger time t1 includes: The corrected fault initiation time t0 is calculated using the following algorithm formula: t0 = t1 - Twin - Tjudge + tm; where Twin is the computation window length delay, Tjudge is the judgment delay, and tm is an adaptive compensation parameter.

5. The method according to claim 4, characterized in that, The method further includes: Different values ​​are assigned to the adaptive compensation parameter tm according to the type of the triggering condition; The triggering conditions include at least one of the following: over-limit triggering conditions, zero-order triggering conditions, and negative-order triggering conditions.

6. The method according to claim 5, characterized in that, The monitoring of the electrical characteristic quantity to determine an initial trigger time t1 when a preset trigger condition is met, and the calculation of a corrected fault start time t0 based on the initial trigger time t1, includes: When two or more types of electrical characteristic quantities satisfy their respective triggering conditions, the initial triggering time t1 corresponding to the two or more types of electrical characteristic quantities that satisfy their respective triggering conditions is determined respectively; Based on the initial trigger time t1 for each type and the corresponding adaptive compensation parameter tm, a corrected fault start time t0 is calculated.

7. The method according to claim 2, characterized in that, The step of calculating a corrected fault initiation time t0 based on the initial trigger time t1 includes: The corrected fault initiation time t0 is calculated using the following algorithm formula: t0 = t1 - Tcalc - K / (dH / dt); where Tcalc is the algorithm delay parameter, K is an empirical coefficient, and dH / dt is the harmonic energy growth rate of the electrical characteristic quantity at the initial triggering time t1.

8. A fault recording device, characterized in that, include: The caching module is used to cache the acquired time-series electrical quantity sampling data to the data cache area in a cyclic overwrite manner; The trigger time calculation module is used to calculate at least one preset electrical characteristic quantity based on the electrical quantity sampling data, and monitor the electrical characteristic quantity to determine an initial trigger time t1 when the preset trigger conditions are met; The correction module is used to calculate a corrected fault start time t0 based on the initial trigger time t1; The waveform recording module is used to locate the corresponding sampling data point from the data buffer based on the waveform recording start time t0, and start fault waveform recording.

9. A control device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the computer program, it implements the method as described in any one of claims 1 to 7.

10. A computer program product, characterized in that, When the computer program product is run on the control device, it causes the control device to perform the method as described in any one of claims 1 to 7.

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