Multi-module power management

Abstract

One example discloses a module comprising: a set of electronic switches configured to be coupled to a supply line and a set of loads; a communication circuit coupled to the electronic switch and configured to be coupled to a communication bus; a controller coupled to the electronic switch and the communication circuit; wherein the communication circuit and the controller are powered by the electronic switch; wherein the communication circuitry and the controller are configured to be in a low power state until a wake-up signal is received from the electronic switch; and wherein the electronic switch is configured to receive the wake-up signal via the power supply line.

Description

Technical Field

[0001] This specification relates to systems, methods, equipment, apparatus, articles, and instructions for multi-module power management. Background Technology

[0002] Modern vehicles contain numerous power-consuming modules and circuits; however, at certain times, such as when the vehicle is parked, only a few of them typically remain powered. Even when the vehicle is fully operational, not all circuits (e.g., modules) need constant power; instead, they are periodically or on demand awakened and then put back to sleep. This energy saving is particularly important for maximizing the driving range of electric vehicles. Summary of the Invention

[0003] According to one example embodiment, a module includes: a set of electronic switches configured to be coupled to a power supply line and a set of loads; a communication circuit coupled to the electronic switches and configured to be coupled to a communication bus; and a controller coupled to the electronic switches and the communication circuit; wherein the communication circuit and the controller are powered via the electronic switches; wherein the communication circuit and the controller are configured to be in a low-power state until a wake-up signal is received from the electronic switches; and wherein the electronic switches are configured to receive the wake-up signal via the power supply line.

[0004] In another example embodiment, each of the electronic switches has a unique address; and at least one of the electronic switches is configured to send the wake-up signal directly to the other of the electronic switches by including the unique address in the wake-up signal.

[0005] In another example embodiment, the electronic switch is configured to receive the wake-up signal via the power supply line and the communication bus.

[0006] In another example embodiment, the electronic switch receives the wake-up signal only via the power supply line.

[0007] In another example embodiment, the electronic switch controls the power supplied to the set of loads.

[0008] In another example embodiment, the electronic switch is configured to continue supplying power to the load even after the electronic switch itself has been placed in a low-power mode.

[0009] In another example embodiment, the communication circuit is a PHY circuit.

[0010] In another example embodiment, the communication bus is a CAN bus or an Ethernet bus.

[0011] In another example embodiment, the module is embedded in a software-defined vehicle (SDV).

[0012] In another example embodiment, the wake-up signal is indicated by a change in voltage level or voltage polarity on the power supply line.

[0013] In another example embodiment, the module is a first module; the module further includes a second module and a third module; wherein the first module is coupled to the second module via a first electronic switch in the second module; and wherein the third module is coupled to the second module via a second electronic switch in the second module.

[0014] In another example embodiment, the second module and the third module each include a set of elements that are functional copies of the elements in the first module.

[0015] In another example embodiment, the first electronic switch in the second module is configured to receive a wake-up signal sent from the electronic switch in the first module, the electronic switch in the first module being addressed to the electronic switch in the third module.

[0016] In another example embodiment, the first electronic switch in the second module directly transmits the received wake-up signal to the second electronic switch in the second module.

[0017] In another example embodiment, the second electronic switch in the second module directly transmits the received wake-up signal to the addressed electronic switch in the second module.

[0018] In another example embodiment, when the received wake-up signal is directly transmitted, the controller and communication circuitry in the second module remain in a low-power state.

[0019] In another example embodiment, when the received wake-up signal is transmitted directly, only the first electronic switch and the second electronic switch in the second module are energized.

[0020] In another example embodiment, the electronic switch in the first module and the electronic switch in the third module are coupled only through the first electronic switch and the second electronic switch in the second module.

[0021] In another example embodiment, the first module, the second module, and the third module are coupled in a hierarchical structure.

[0022] In another example embodiment, the first module and the third module are located at a lower level of the hierarchy, and the second module is located at a higher level of the hierarchy.

[0023] In another example embodiment, the first module and the third module are edge modules, and the second module is a region or domain module.

[0024] In another example embodiment, the electronic switches in the lower levels of the hierarchy can only communicate through the electronic switches in the higher levels of the hierarchy.

[0025] The above discussion is not intended to represent every example embodiment or every implementation within the scope of the current or future set of technical solutions. The following figures and detailed descriptions further illustrate various example embodiments.

[0026] The various example embodiments can be more fully understood by considering the following specific implementations in conjunction with the accompanying drawings. Attached Figure Description

[0027] Figure 1 This represents the first example of a multi-module power management system.

[0028] Figure 2 This represents the second example, a multi-module power management system.

[0029] While this disclosure allows for various modifications and alternatives, details of this disclosure have been shown by way of example in the drawings and will be described in detail. However, it should be understood that other embodiments besides the specific embodiments described may also exist. All modifications, equivalents, and alternative embodiments falling within the spirit and scope of the appended claims are also covered. Detailed Implementation

[0030] Figure 1 This represents a first example of a multi-module power management system 100. The first example system 100 includes a set of hierarchically ordered modules 102 to 108. In this example, each of modules 102 to 108 includes a set of electronic switches 110 to 116, communication circuitry (e.g., a PHY with a PMIC, as shown), and a controller (e.g., an MCU with a PMIC, as shown).

[0031] Note that modules can be domains, regions, edge nodes, etc. Modules can be distinguished by the number of their MCUs and / or the number and current levels of their power, electronic switches, etc. For example, PMIC used in this article refers to power management integrated circuits.

[0032] A set of electronic switches 110 to 116 are coupled to a set of loads. For example, modules 104 to 108 are defined herein as a set of loads of electronic switch 110 in module 102, while a set of loads (e.g., other modules, circuits, actuators, sensors, etc.) are considered to be coupled to electronic switches 112 to 116 in modules 104 to 108, but are not explicitly shown to avoid Figure 1 confusion.

[0033] The highest-level module 118 in a hierarchically ordered set of modules is module 102. The lower-level modules 120 in a hierarchically ordered set of modules are modules 104 to 108.

[0034] Also shown is a main power supply 122 (e.g., a 48 V vehicle battery), a main power line 124 (e.g., 48 V), a set of regulated power lines 126 (e.g., 5 V), a communication bus 128, and a set of wake-up signals 130.

[0035] The first example system 100 has a software-defined vehicle (SDV) topology. In various SDV applications, predefined regions containing a variable number of modules and circuits can be shut down or placed in a deep sleep state. For example, the SDV architecture differs from a traditional vehicle architecture. SDV includes power distributors, regions, domains, edge nodes, etc., that perform most (if not all) of the vehicle's functions. Independent modules in a traditional vehicle architecture that perform only individual functions are typically not used by the SDV. Modules and circuits in the SDV need to be powered on, shut down, and / or placed in low-power modes depending on the SDV's state, which helps save power and metered energy, and can be particularly useful for increasing the driving range of electric or hybrid vehicles.

[0036] For SDVs (and other vehicles), energy efficiency is crucial when the vehicle is parked, but extended range can also become important. Therefore, some modules are turned off or placed in low-power mode. However, it's possible that one module may not need to operate, but another module connected at the next or even two levels below it may need to. In some cases, an edge module may be off or in low-power mode, but some loads connected to it may need to remain active and transmit data. In other words, while the architecture is layered, the power states do not necessarily follow the same hierarchy. Some modules may have different on / off states than their superiors and subordinates.

[0037] In this example 100, a set of lower-level modules 120 (i.e., modules 104 to 108) receive their power from the previous level (i.e., a set of regulating power lines 126), and as previously described, each module also includes an electronic switch to power the modules in its next level. For a domain, the next level is a region. For a region, the next level would be an edge. For an edge, the next level is the actual actuators, sensors, loads, etc. The number of levels in the hierarchy will depend on the specific OEM, so no rules are set regarding the complexity of the architecture.

[0038] In the wake-up configuration shown, the PHY sends, receives, and processes the wake-up signal 130. Once the PHY receives the wake-up signal 130, it wakes up its attached PMIC, which in turn wakes up the attached MCU. The PHY also wakes up any other components on the module that need to be woken up, but most components are woken up or turned on after the PMIC powers them. The PHY needs to receive a certain amount of power (i.e., from the main power line 124) in order to be able to “hear” and “act on” the wake-up signal. In a topology where the PHY can receive the wake-up signal, its attached PMIC is already operational and powering the PHY (enabling it to receive the wake-up signal). In the case of a CAN transceiver, such a PMIC is inside the CAN PHY, so a separate PMIC is not purchased and deployed. When the PHY receives the wake-up signal, it wakes up the PMIC attached to the MCU, which then wakes up the MCU.

[0039] Note that while in this example 100 the PHY is powered by an attached PMIC, in other examples the PHY may be powered by a low-dropout voltage regulator (LDO). The LDO may be internal or external to the PHY.

[0040] Even when the module is in low-power mode, it remains connected to the main power line 124, but it is not using a large amount of power. In this case, the PHY is powered and can function after receiving a wake-up signal via the communication bus 128. The PHY then generates a wake-up output signal 130, as shown.

[0041] This means the PHY needs to be powered independently from a permanent battery (i.e., from the main power line 124), requiring a separate power network for PHY wake-up tasks. In other examples, this could be achieved by powering the PHY from the communication bus 128. While this is possible for Ethernet, it is not possible for CAN networks. Considering the latency of Ethernet-based wake-up, a CAN network is typically required, but it may not be able to provide power via the communication bus 128. This complexity hinders the goal of building a power network and architecture where branches can be completely shut down but can also be woken up as needed.

[0042] One wake-up requirement in the SDV architecture is that a module / load must be woken up if one of its associated loads begins to draw current above a certain threshold. Another wake-up requirement is to selectively inform the module / load that it is being woken up due to functional requirements that are not necessarily related to power consumption.

[0043] For example, if a module / load is in a shutdown state, it can be raised to a higher power supply level by activating a dedicated electronic switch, thus waking it up when powered on. If the slave module / load is in a low-power mode (and the electronic switch supplying it at the higher-level module is on), but it needs to be woken up, a wake-up signal must be delivered to the module / load.

[0044] If the PHY will meet this requirement, it should be powered so that it can receive and process the wake-up signal. This is possible if the module is in a low-power mode, as the electronic switch still receives power even when it is not using a large amount of power. However, this wake-up process is not possible if the module / load is off, because the PHY will then be unpowered along with the rest of the module.

[0045] One way to keep the PHY powered on and be able to listen for a wake-up signal when the module / load is completely powered off would be to provide a dedicated power line to the PHY; however, this would tend to contradict the overall purpose of the SDV architecture, as a dedicated wake-up line would require hard-wiring to the CAN / Ethernet PHY sub-circuit of each module, and each module's CAN / Ethernet PHY circuit would require separate power supply. Therefore, completely shutting down an entire area, domain, and / or edge node would not actually occur as expected in the SDV architecture.

[0046] Therefore, these CAN and Ethernet networks transmit wake-up signals to the PHY via bus communication line 128 or via dedicated wake-up lines. The PHY receives, uses, and / or relays wake-up signals across the CAN / Ethernet architecture via these existing communication lines 128. While dedicated lines do not consume power, they do complicate wiring and increase cost and weight because each module now requires a separate additional wire dedicated to the wake-up signal.

[0047] Additionally, the PHY that receives the wake-up signal via CAN bus 128 needs to be continuously powered to process the wake-up signal 130, because if it is connected to a host module that may be disabled, it will not be able to receive and process the wake-up signal when the host module is off. This requires a separate power network, but this defeats the purpose of the energy management network, as the goal is to eliminate permanent battery connections.

[0048] For example, existing wake-up signaling flows are based on top-down and bottom-up wake-up signals. Top-down signals originate from higher levels and go to lower levels, such as when a module is directly powered from a shutdown state, or when a module sends a PHY-level wake-up signal to wake it from a low-power mode. Bottom-up signals are generated when an electronic switch generates a wake-up signal because one of its loads exceeds a certain current threshold. However, there will be complex situations that simple wake-up building blocks cannot satisfy.

[0049] A complex example is when a person approaches a vehicle and the door handle needs to be unlocked. This requires sensors in all corners of the vehicle to receive signals, process them, and generate a wake-up signal that propagates to different edges and areas, all the way to the door handle. If the wake-up signal is supposed to follow the aforementioned bottom-up and then top-down path, it would require power to many intermediate modules, even if those modules are only in low-power mode. This defeats the purpose of shutting down modules to save power.

[0050] Furthermore, in high-voltage vehicle architectures (e.g., 48 V), delivering the appropriate wake-up signal to such a PHY becomes more inefficient because a dedicated voltage line is provided to the PHY just to enable it to receive the wake-up signal. For example, the simple LDO circuit currently used to reduce the 12 V rail voltage to the 5 V PHY voltage is less effective at reducing the 48 V rail voltage to the 5 V PHY voltage due to excessive power dissipation.

[0051] This discussion now turns to another approach to power management in multi-module systems. A new topology that places the electronic switch at the center of the wake-up process / hierarchy reduces wiring while achieving greater power savings, particularly for software-defined vehicles (SDVs). One difference in this new topology is that the electronic switch, instead of the PHY, now generates the wake-up signal (see...). Figure 1 ).

[0052] Some of the many benefits of this different approach to power management in multi-module systems include: eliminating the need for a separate permanent power network to power the PHY; eliminating the need for a separate wake-up wiring network; and eliminating the need for the PHY to operate at high voltages (e.g., 48 V), which would otherwise require additional switching converters, increasing costs and generating additional EMC noise.

[0053] Figure 2 This represents a second example of a multi-module power management system 200. The second example system 200 includes a set of hierarchically ordered modules 202 to 218. In this example, each of modules 202 to 218 includes a set of electronic switches 220 to 236, communication circuitry (e.g., a PHY with a PMIC, as shown), and a controller (e.g., an MCU with a PMIC, as shown).

[0054] In various example embodiments, each module can be divided into domains, regions, edge nodes, etc.; however, Figure 2 A collection of examples of partitions, which will be discussed further below, is shown. These modules can also be distinguished by the number and / or power of their MCUs, the number of electronic switches, and current levels, etc. As used herein, PMIC refers to a power management integrated circuit.

[0055] A set of electronic switches 210 to 236 are coupled to a set of loads. These loads can be other modules, circuits, actuators, sensors, etc. For example, modules 204 and 206 are defined herein as a set of loads for electronic switch 220 in module 202; modules 208 to 212 are defined herein as a set of loads for electronic switch 222 in module 204; and modules 214 to 218 are defined herein as a set of loads for electronic switch 224 in module 206. A set of loads (in order to...) Figure 2 (To reduce clutter, not shown) is also coupled to electronic switches 226 to 236 in modules 208 to 218.

[0056] exist Figure 2 In the example embodiment shown, the highest-level module 238 (e.g., for 48 V to 5 V voltage conversion) in a hierarchically ordered set of modules is module 202. The first higher-level (e.g., intermediate) module 240 is module 204, the second higher-level module 242 is module 206, and a set of lower-level modules 244 are modules 208 to 218.

[0057] It also shows the possible first domain / zone 246 and second domain / zone 248, which are particularly suitable for SDV.

[0058] Also shown is a main power supply 250 (e.g., a 48 V vehicle power supply), a main power line 252 (e.g., 48 V), a set of regulated power lines 254 (e.g., 5 V), a communication bus 256, and a set of wake-up signals 258.

[0059] Electronic switches 220 to 236 are electronic switches that control the flow of electricity to any object attached to them. Such electronic switches do not necessarily regulate voltage or current, except perhaps for operations with certain characteristics, such as high-voltage interruption, high-current interruption, or current limiting for a certain amount of time before power is interrupted. Electronic switches are sometimes designed to adaptively change the high-current interruption threshold on a given conductor based on the temperature of the conductor, but this is typically estimated from the current that previously flowed through said conductor and heated it.

[0060] In various example embodiments, electronic switches 220 to 236 receive their power from a main power line 252 (e.g., 48 V) or a set of regulated power lines 254 (e.g., 5 V). Electronic switches 220 to 236 are activated upon power-up, but they can also enter a low-power mode via a communication port coupled to listen on a communication bus 256 to receive on / off commands to turn on and off various loads connected thereto, or to maintain the on / off state of the loads as before placing the electronic switches themselves in low-power mode. However, in other example embodiments, if the load remains on while the electronic switches are in low-power mode, the amount of current available to the load can be reduced to below the normally available current.

[0061] To address this issue, an electronic switch current threshold limit can be set for the operation of individual loads when the electronic switch is in low-power mode. This allows the electronic switch to wake itself up and generate a wake-up signal to turn on the PMIC, MCU, and PHY once the load starts to draw more current than the threshold limit while the electronic switch is in low-power mode.

[0062] In the second example system 200, electronic switches 220 to 236 are now also central to the wake-up signal flow. To support this role, many, most, or all of the electronic switches 220 to 236 each have a unique address, so that a selected electronic switch can receive a wake-up signal 258 directed only to that selected electronic switch. Similarly, the internal logic of an electronic switch can generate wake-up signals / messages directed to specific addresses of one or more other electronic switches. Such wake-up signals / messages propagate only at a sufficiently high position in the hierarchy to be passed down the hierarchy to the electronic switch to which the wake-up signal / message is directed (e.g., sometimes "one level up," other times "two or more levels up"). In various example embodiments, the controller (e.g., the MCU) can operate in a very low power mode, if desired, to facilitate the propagation of wake-up signals / messages without fully waking itself up.

[0063] In the second example system 200, a wake-up signal 258 propagates via a set of regulated power lines 254, which hierarchically couple all electronic switches 220 to 236 together. Thus, a bottom-up wake-up signal 258 requested by a set of lower-level modules 244 can be relayed hierarchically first to an electronic switch in one of the higher-level modules 240, 242, then relayed to the highest-level module 238 if necessary, and then back down through the higher-level modules 240, 242 to another set of lower-level modules 244 in another domain / region 246, 248.

[0064] This achieves power savings because the PHY, MCU, and their attached or internal PMIC do not need to be powered on or are in a low-power mode. When the wake-up signal 258 is transmitted through the hierarchy on a set of regulated power lines 254 to any other module / load in the entire system 200 (e.g., any module / circuit / load in the SDV vehicle), the PHY, MCU, and their attached or internal PMIC can be completely shut down without unnecessarily powering any intermediate, undesirable modules.

[0065] The wake-up signal 258 can also be eliminated by propagating the wake-up signal 258 via a set of regulating power lines 254 (see [link to documentation]). The previous paradox of requiring power in the module to wake it from an unpowered state can also be eliminated (see [link to documentation]). Figure 1 Conversely, the communication circuitry (e.g., a PHY with a PMIC) and controller (e.g., an MCU with a PMIC) in the intermediate module remain off because the electronic switches 220 to 236 do not need to be powered, allowing the electronic switches 220 to 236 to relay and propagate the wake-up signal 258 throughout the network and power only on things that need to be woken up.

[0066] In some example embodiments, the wake-up signal 258 may also be transmitted via a communication network bus, and if the PHY circuit happens to be energized, a power switch may be coupled to the PHY circuit to listen for any such wake-up signal 258 on the communication bus. In various example embodiments, electronic switches 220 to 236 may be directly coupled to the communication bus 256 using a suitable decoupling device so that the wake-up signal 258 may also be received and processed via this second path.

[0067] Unless a specific order is explicitly stated, the various instructions and / or operational steps discussed in the above figures may be performed in any order. Furthermore, those skilled in the art will recognize that while some example sets of instructions / steps have been discussed, the material in this specification can be combined in various ways to produce other examples, and should be understood within the context of the detailed description provided herein.

[0068] In some example embodiments, these instructions / steps are implemented as functional and software instructions. In other embodiments, the instructions may be implemented using logic gates, application-specific chips, firmware, and other hardware forms.

[0069] In some example embodiments, these instructions / steps are embodied as a set of executable instructions in a non-transitory computer-readable or computer-usable medium, implemented on a computer or machine programmed with and controlled by the executable instructions. The instructions are loaded to execute on a processor (e.g., one or more CPUs) or state machine. The processor includes a microprocessor, microcontroller, processor module or subsystem (including one or more microprocessors or microcontrollers), or other control or computing device. A processor may refer to a single component or multiple components. The computer-readable or computer-usable storage medium is considered part of an article (or article of manufacture). An article or article of manufacture may refer to any manufactured single component or multiple components. Non-transitory machine or computer-usable medium as defined herein does not include signals, but such medium is capable of receiving and processing information from signals and / or other transient media.

[0070] It is readily understood that the components of the embodiments generally described herein and illustrated in the accompanying drawings can be arranged and designed in a wide variety of different configurations. Therefore, the detailed descriptions of the various embodiments illustrated in the figures are not intended to limit the scope of this disclosure, but merely to illustrate various embodiments. Although various aspects of the embodiments are presented in the drawings, the drawings are not necessarily drawn to scale unless specifically stated otherwise.

[0071] The invention may be embodied in other specific forms without departing from the spirit or essential characteristics thereof. The described embodiments should be considered illustrative rather than restrictive in all respects. Therefore, the scope of the invention is indicated by the appended claims rather than by the detailed description herein. All variations falling within the equivalent meaning and scope of the claims should be embraced within the scope of the claims.

[0072] References to features, advantages, or similar language throughout this specification do not imply that all features and advantages achievable with this invention should be included in or in any single embodiment of the invention. Rather, language referring to features and advantages should be understood to mean that a particular feature, advantage, or characteristic described in connection with an embodiment is included in at least one embodiment of the invention. Therefore, discussions of features, advantages, and similar language throughout this specification may (but are not necessarily required to) refer to the same embodiment.

[0073] Furthermore, the features, advantages, and characteristics described in this invention can be combined in any suitable manner in one or more embodiments. Those skilled in the art will recognize that, in view of the description herein, this invention can be practiced without one or more specific features or advantages of a particular embodiment. In other instances, additional features and advantages that may not be present in all embodiments of the invention may be recognized in certain embodiments.

[0074] Throughout this specification, references to "an embodiment," "an embodiment," or similar language mean that a particular feature, structure, or characteristic described in connection with the indicated embodiment is included in at least one embodiment of the invention. Therefore, the phrases "in an embodiment," "in an embodiment," and similar language throughout this specification may (but not necessarily) all refer to the same embodiment.

Claims

1. A module, characterized in that, include: A set of electronic switches configured to couple to a power supply line and a set of loads; A communication circuit, which is coupled to the electronic switch and configured to be coupled to a communication bus; A controller, which is coupled to the electronic switch and the communication circuit; The communication circuit and the controller are powered by the electronic switch. The communication circuit and the controller are configured to operate in a low-power state until a wake-up signal is received from the electronic switch; and The electronic switch is configured to receive the wake-up signal via the power supply line.

2. The module according to claim 1, characterized in that: Each of the electronic switches has a unique address; and At least one of the electronic switches is configured to send the wake-up signal directly to the other of the electronic switches by including the unique address in the wake-up signal.

3. The module according to claim 1, characterized in that: The electronic switch is configured to receive the wake-up signal via the power supply line and the communication bus.

4. The module according to claim 1, characterized in that: The electronic switch receives the wake-up signal only via the power supply line.

5. The module according to claim 1, characterized in that: The electronic switch controls the power supplied to the set of loads.

6. The module according to claim 1, characterized in that: The electronic switch is configured to continue supplying power to the load even after the electronic switch itself has been put into a low-power mode.

7. The module according to claim 1, characterized in that: The wake-up signal is indicated by a change in voltage level or voltage polarity on the power supply line.

8. The module according to claim 1, characterized in that: The module in question is the first module; The module further includes a second module and a third module; The first module is coupled to the second module via a first electronic switch in the second module; and The third module is coupled to the second module via a second electronic switch in the second module.

9. The module according to claim 8, characterized in that: The second module and the third module each include a set of elements, which are functional copies of the elements in the first module.

10. The module according to claim 8, characterized in that: The first electronic switch in the second module is configured to receive a wake-up signal sent from the electronic switch in the first module, and the electronic switch in the first module is addressed to the electronic switch in the third module.

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