Maximum power point tracking circuit and photovoltaic system
By designing a maximum power point tracking circuit and using hardware circuitry to control the switching transistor's on/off state, the problems of current backflow in synchronous control and conduction loss in asynchronous control were solved, achieving high charging efficiency and extended system lifespan.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- FOSHAN LINGZHI IOT TECH CO LTD
- Filing Date
- 2025-12-31
- Publication Date
- 2026-04-21
AI Technical Summary
Existing MPPT circuits have safety hazards caused by reverse current under synchronous control, while asynchronous control affects charging efficiency due to high diode conduction losses.
Design a maximum power point tracking circuit, including a charging unit, a data acquisition unit, and a control unit. The circuit controls the switching transistor's on/off state through hardware circuitry to prevent current backflow, and optimizes the switching transistor's operating mode through PWM signals to improve charging efficiency.
It achieves accurate control across the entire power range, avoids current backflow damage, extends system life, reduces production costs, and improves system efficiency.
Smart Images

Figure CN121900577A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of circuit control technology, and in particular to a maximum power point tracking circuit and a photovoltaic system. Background Technology
[0002] In photovoltaic (PV) systems (also known as photovoltaic power generation systems), Maximum Power Point Tracking (MPPT) technology is a technique that can adjust the operating point of PV modules in real time to ensure they always output maximum power, thereby improving energy conversion efficiency. The MPPT circuit is the core of this function, responsible for efficiently and safely storing the electrical energy generated by the PV modules into batteries.
[0003] Currently, MPPT circuit control methods are mainly divided into synchronous control and asynchronous control. For synchronous control, when the MPPT circuit operates in Discontinuous Conduction Mode (DCM), the inductor current drops to zero within one switching cycle. If the synchronous freewheeling switch fails to turn off in time, the high voltage of the battery will be applied in reverse through the switch and inductor to the photovoltaic module, forming a reverse current from the battery to the photovoltaic module (i.e., current backflow), which can damage the photovoltaic module and / or the switch, leading to serious safety hazards in the entire system. Asynchronous control, by connecting an external diode in the circuit, although the diode has unidirectional conductivity and can physically block reverse current, introduces a fixed forward voltage drop. Under high current conditions, the diode's conduction loss is high; for example, when the diode's forward voltage drop is 1V and the current is 10A, the diode's conduction loss is 10W, severely affecting charging efficiency. Summary of the Invention
[0004] This invention provides a maximum power point tracking circuit and a photovoltaic system that can achieve accurate control of the switching transistor across the entire power range through hardware circuitry, thereby improving charging efficiency and preventing circuit damage caused by current backflow, thus extending system lifespan.
[0005] According to one aspect of the present invention, a maximum power point tracking circuit is provided, comprising: a charging unit, a data acquisition unit, and a control unit, wherein the charging unit is electrically connected to a battery and a photovoltaic module respectively; wherein the data acquisition unit is electrically connected to the charging unit and the control unit respectively, and is used to acquire current data of the charging unit and send the current data to the control unit; the control unit is electrically connected to the charging unit and is used to generate a first pulse width modulation (PWM) signal and a second PWM signal according to the current data and a reference voltage, and send the first PWM signal and the second PWM signal to two switching transistors of the charging unit respectively, so as to realize maximum power point tracking (MPPT) of the output power of the photovoltaic module.
[0006] Optionally, when the maximum voltage of the photovoltaic module is less than the minimum voltage of the battery, the charging unit includes: a first capacitor, a second capacitor, a first switching transistor, a second switching transistor, and a first inductor; the two ends of the first capacitor are electrically connected to the positive and negative terminals of the photovoltaic module, respectively, and the two ends of the second capacitor are electrically connected to the positive and negative terminals of the battery, respectively; one end of the first inductor is electrically connected to the positive terminal of the photovoltaic module, and the other end of the first inductor is electrically connected to the drain of the first switching transistor and the source of the second switching transistor; the source of the first switching transistor is electrically connected to the negative terminal of the photovoltaic module and the negative terminal of the battery, and the gate of the first switching transistor is connected to a first PWM signal; the drain of the second switching transistor is electrically connected to the positive terminal of the battery, and the gate of the second switching transistor is connected to a second PWM signal.
[0007] Optionally, the number of acquisition units is one, and the acquisition unit is located between one end of the first inductor and the positive terminal of the photovoltaic module.
[0008] Optionally, the control unit includes: a conversion unit, a matching unit, a comparison unit, a logic unit, and a main control unit; the conversion unit is electrically connected to the acquisition unit and the matching unit respectively, and is used to convert the first current acquired by the acquisition unit into a first voltage; the matching unit is electrically connected to the comparison unit and the main control unit respectively, and is used to scale the voltage value of the first voltage to a size that the main control unit can sample; the main control unit is electrically connected to the logic unit and the gate of the first switching transistor, and is used to generate a first PWM signal according to the first voltage; the comparison unit is electrically connected to the logic unit, and is used to generate a first comparison result according to the first voltage and a reference voltage; the logic unit is electrically connected to the gate of the second switching transistor, and is used to generate a second PWM signal according to the first PWM signal and the first comparison result.
[0009] Optionally, when the minimum voltage of the photovoltaic module is greater than the maximum voltage of the battery, the charging unit includes: a third capacitor, a fourth capacitor, a third switch, a fourth switch, and a second inductor; the two ends of the third capacitor are electrically connected to the positive and negative terminals of the photovoltaic module, respectively, and the two ends of the fourth capacitor are electrically connected to the positive and negative terminals of the battery, respectively; the source of the fourth switch is electrically connected to the positive terminal of the photovoltaic module, the drain of the fourth switch is electrically connected to the drain of the third switch and one end of the second inductor, and the gate of the fourth switch is connected to a second PWM signal; the source of the third switch is electrically connected to the negative terminal of the photovoltaic module and the negative terminal of the battery, and the gate of the third switch is connected to a first PWM signal; the other end of the second inductor is electrically connected to the positive terminal of the battery.
[0010] Optionally, there are two acquisition units: one acquisition unit is located between the source of the fourth switching transistor and the positive terminal of the photovoltaic module, and the other acquisition unit is located between the source of the third switching transistor and the negative terminal of the battery.
[0011] Optionally, the control unit includes: two conversion units, one matching unit, one comparison unit, one logic unit, and one main control unit; one conversion unit is electrically connected to one acquisition unit and one matching unit respectively, and is used to convert the second current acquired by one acquisition unit into a second voltage; the matching unit is electrically connected to the main control unit, and is used to scale the voltage value of the second voltage to a size that the main control unit can sample; the main control unit is electrically connected to the logic unit and the gate of the fourth switch, and is used to generate a second PWM signal based on the second voltage; the other conversion unit is electrically connected to another acquisition unit and one comparison unit respectively, and is used to convert the third current acquired by the other acquisition unit into a third voltage; the comparison unit is electrically connected to the logic unit, and is used to generate a second comparison result based on the third voltage and a reference voltage; the logic unit is electrically connected to the gate of the third switch, and is used to generate a first PWM signal based on the second PWM signal and the second comparison result.
[0012] Optionally, the conversion unit includes: a first diode, a second diode, a third diode, a fourth diode, a first resistor, and a fifth capacitor; wherein the anodes of the first and second diodes are respectively connected to the two terminals of the corresponding acquisition unit, and the cathodes of the first and second diodes, one end of the first resistor, and one end of the fifth capacitor are electrically connected to the corresponding matching unit or the corresponding comparison unit; the cathode of the third diode is electrically connected to the anode of the first diode, and the cathode of the fourth diode is electrically connected to the anode of the second diode; the anodes of the third and fourth diodes, the other end of the first resistor, and the other end of the fifth capacitor are all grounded; the matching unit includes: a second resistor, a third resistor, a fourth resistor, and an operational amplifier; wherein one end of the second resistor is electrically connected to one end of the first resistor of the corresponding conversion unit, and the other end of the second resistor is electrically connected to the positive input terminal of the operational amplifier; one end of the third resistor is grounded, and the other end of the third resistor is electrically connected to the negative input terminal of the operational amplifier and one end of the fourth resistor; the output terminal of the operational amplifier and the other end of the fourth resistor are electrically connected to the corresponding main control unit and the corresponding comparison unit.
[0013] Optionally, the logic unit is an AND gate; the comparison unit includes: a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, and a comparator; wherein, one end of the fifth resistor is electrically connected to the output terminal of the operational amplifier of the corresponding matching unit or one end of the first resistor of the corresponding conversion unit, and the other end of the fifth resistor is electrically connected to the positive input terminal of the comparator; one end of the sixth resistor is connected to a reference voltage, and the other end of the sixth resistor is electrically connected to the negative input terminal of the comparator, one end of the seventh resistor, and one end of the eighth resistor; the other end of the seventh resistor is grounded; the other end of the eighth resistor, the output terminal of the comparator, and the input terminal of the AND gate are electrically connected; the main control unit includes: a ninth resistor, a sixth capacitor, and a main control chip; wherein, one end of the ninth resistor is electrically connected to the output terminal of the operational amplifier of the corresponding matching unit, and the other end of the ninth resistor is electrically connected to one end of the sixth capacitor and the input pin of the main control chip; the other end of the sixth capacitor is grounded; the output pin of the main control chip is electrically connected to the input terminal of the AND gate and one switch of the charging unit; the output terminal of the AND gate is electrically connected to the other switch of the charging unit.
[0014] According to another aspect of the present invention, a photovoltaic system is provided, including a maximum power point tracking circuit of any of the above embodiments, as well as a battery and a photovoltaic module; wherein the photovoltaic module charges the battery through the maximum power point tracking circuit.
[0015] The technical solution of this invention, through the design of a maximum power point tracking (MPPT) circuit, includes a charging unit, a data acquisition unit, and a control unit. The data acquisition unit collects current data from the charging unit and sends it to the control unit. The control unit generates a first PWM signal and a second PWM signal based on the current data and a reference voltage, and sends these signals to the two switching transistors of the charging unit, respectively, to achieve MPPT for the photovoltaic module's output power. Firstly, the control unit can generate PWM signals based on the current data and reference voltage collected by the data acquisition unit to control the switching transistors of the charging unit to turn on / off, thereby achieving accurate control of the switching transistors across the entire power range and improving charging efficiency. Simultaneously, the charging unit does not include diodes, avoiding the problem of high conduction losses caused by forward voltage drop, further improving system efficiency. Secondly, the MPPT circuit is built with a hardware structure, which can avoid circuit damage caused by current backflow, extending system life. Furthermore, the circuit structure is simple, easy to implement, saves production costs, and is widely applicable.
[0016] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of the present invention, nor is it intended to limit the scope of the invention. Other features of the invention will become readily apparent from the following description. Attached Figure Description
[0017] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0018] Figure 1 This is a schematic diagram of a maximum power point tracking circuit provided in Embodiment 1 of the present invention;
[0019] Figure 2 This is a circuit structure diagram of a charging unit provided in Embodiment 1 of the present invention;
[0020] Figure 3 This is a schematic diagram of the structure of a control unit provided in Embodiment 1 of the present invention;
[0021] Figure 4 This is a circuit structure diagram of a control unit provided in Embodiment 1 of the present invention;
[0022] Figure 5 This is a circuit structure diagram of another charging unit provided in Embodiment 1 of the present invention;
[0023] Figure 6 This is a schematic diagram of another control unit provided in Embodiment 1 of the present invention;
[0024] Figure 7 This is a circuit structure diagram of another control unit provided in Embodiment 1 of the present invention. Detailed Implementation
[0025] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.
[0026] It should be noted that the terms "first," "second," "third," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.
[0027] Example 1
[0028] Figure 1 This is a schematic diagram of a maximum power point tracking circuit provided in Embodiment 1 of the present invention. Figure 1 As shown, the maximum power point tracking circuit 1 includes a charging unit 10, a data acquisition unit 20, and a control unit 30. The charging unit 10 is electrically connected to the battery 2 and the photovoltaic module 3, respectively, and the photovoltaic module 3 charges the battery 2 through the maximum power point tracking circuit 1.
[0029] The acquisition unit 20 is electrically connected to the charging unit 10 and the control unit 30 respectively, and is used to acquire the current data of the charging unit 10 and send the current data to the control unit 30.
[0030] The control unit 30 is electrically connected to the charging unit 10 and is used to generate a first pulse width modulation (PWM) signal and a second PWM signal based on the current data and the reference voltage. The first PWM signal and the second PWM signal are sent to the two switching transistors of the charging unit 10 respectively to realize MPPT of the output power of the photovoltaic module 3.
[0031] In this invention, by adjusting the duty cycle of the first PWM signal and the second PWM signal, the on / off state of the two switching transistors of the charging unit 10 is controlled, thereby achieving accurate control of the switching transistors across the full power range, maximizing the utilization of photovoltaic power generation and improving charging efficiency.
[0032] In one embodiment, the hardware topology of the charging unit 10 needs to be adapted according to the relationship between the photovoltaic module voltage and the battery voltage.
[0033] In one possible implementation, when the maximum voltage of the photovoltaic module 3 is less than the minimum voltage of the battery 2, the charging unit 10 operates in Boost mode. Figure 2This is a circuit structure diagram of a charging unit provided in Embodiment 1 of the present invention. Figure 2 As shown, the charging unit 10 includes: a first capacitor C1, a second capacitor C2, a first switch Q1, a second switch Q2, and a first inductor L1.
[0034] The first capacitor C1 is electrically connected to the positive and negative terminals of the photovoltaic module 3, respectively, and the second capacitor C2 is electrically connected to the positive and negative terminals of the battery 2, respectively. One end of the first inductor L1 is electrically connected to the positive terminal of the photovoltaic module 3, and the other end of the first inductor L1 is electrically connected to the drain of the first switch Q1 and the source of the second switch Q2; the source of the first switch Q1 is electrically connected to the negative terminal of the photovoltaic module 3 and the negative terminal of the battery 2, and the gate of the first switch Q1 is connected to the first PWM signal (…). Figure 2 (Referring to PWM1); the drain of the second switch Q2 is electrically connected to the positive terminal of battery 2, and the gate of the second switch Q2 is connected to the second PWM signal ( Figure 2 (This is denoted as PWM2).
[0035] Continue to refer to Figure 2 When the maximum voltage of photovoltaic module 3 is less than the minimum voltage of battery 2, the number of acquisition units 20 is one, and the acquisition unit 20 can be the first current transformer IC1. A current transformer is a sensor specifically used to measure and monitor alternating current. Its core sampling mechanism is to obtain a current signal proportional to the primary side from the secondary winding. The "+" and "-" terminals on the secondary side are the standard sampling interfaces.
[0036] Specifically, the first current transformer IC1 is positioned between one end of the first inductor L1 and the positive terminal of the photovoltaic module 3. The first current transformer IC1 can sample the first current ( Figure 2 (denoted as I1+ and I1-), the first current is the input current of photovoltaic module 3.
[0037] Accordingly, Figure 3 This is a schematic diagram of the structure of a control unit provided in Embodiment 1 of the present invention. Figure 3 As shown, the control unit 30 includes: a conversion unit 31, a matching unit 32, a comparison unit 33, a logic unit 34, and a main control unit 35.
[0038] The conversion unit 31 is electrically connected to the acquisition unit 20 (i.e., the first current sampled by the first current transformer IC1) and the matching unit 33 respectively. The conversion unit 31 can convert the first current sampled by the acquisition unit into the first voltage.
[0039] The matching unit 32 is electrically connected to the comparison unit 33 and the main control unit 35 respectively. The matching unit 32 is used to scale the voltage value of the first voltage to a size that the main control unit 35 can sample, thereby ensuring that the main control unit 35 can identify the first voltage and provide a data basis for the subsequent generation of PWM signals.
[0040] The main control unit 35 is electrically connected to the logic unit 34 and the gate of the first switching transistor Q1, and is used to generate a first PWM signal according to the first voltage.
[0041] The comparison unit 33 is electrically connected to the logic unit 34 and is used to generate a first comparison result based on the first voltage and the reference voltage Vref.
[0042] The logic unit 34 is electrically connected to the gate of the second switch Q2 and is used to generate a second PWM signal based on the first PWM signal and the first comparison result.
[0043] In one embodiment, Figure 4 This is a circuit structure diagram of a control unit provided in Embodiment 1 of the present invention. Figure 4 As shown, the conversion unit 31 includes: a first diode D1, a second diode D2, a third diode D3, a fourth diode D4, a first resistor R1, and a fifth capacitor C5. The matching unit 32 includes: a second resistor R2, a third resistor R3, a fourth resistor R4, and an operational amplifier OPA. The comparison unit 33 includes: a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, and a comparator U. The logic unit 34 is an AND gate. The main control unit 35 includes: a ninth resistor R9, a sixth capacitor C6, and a main control chip. The main control chip can be a microcontroller unit (MCU) or a digital signal processor (DSP).
[0044] Specifically, the anodes of the first diode D1 and the second diode D2 are connected to the two terminals of the corresponding acquisition unit (i.e., I1+ and I1- respectively). The cathodes of the first diode D1 and the second diode D2, one end of the first resistor R1, and one end of the fifth capacitor C5 are electrically connected to the corresponding matching unit 32. The cathode of the third diode D3 is electrically connected to the anode of the first diode D1, and the cathode of the fourth diode D4 is electrically connected to the anode of the second diode D2. The anodes of the third diode D3 and the fourth diode D4, the other end of the first resistor R1, and the other end of the fifth capacitor C5 are all grounded.
[0045] One end of the second resistor R2 is electrically connected to one end of the first resistor R1 of the corresponding conversion unit 31, and the other end of the second resistor R2 is electrically connected to the positive input terminal of the operational amplifier OPA; one end of the third resistor R3 is grounded, and the other end of the third resistor R3 is electrically connected to the negative input terminal of the operational amplifier OPA and one end of the fourth resistor R4; the output terminal of the operational amplifier OPA and the other end of the fourth resistor R4 are electrically connected to the corresponding main control unit 35 and the corresponding comparison unit 33.
[0046] One end of the fifth resistor R5 is electrically connected to the output of the operational amplifier OPA of the corresponding matching unit 32, and the other end of the fifth resistor R5 is electrically connected to the positive input of the comparator U; one end of the sixth resistor R6 is connected to the reference voltage Vref, and the other end of the sixth resistor R6 is electrically connected to the negative input of the comparator U, one end of the seventh resistor R7, and one end of the eighth resistor R8; the other end of the seventh resistor R7 is grounded; the other end of the eighth resistor R8, the output of the comparator U, and the input of the AND gate are electrically connected.
[0047] One end of the ninth resistor R9 is electrically connected to the output of the operational amplifier OPA of the corresponding matching unit 32, and the other end of the ninth resistor R9 is electrically connected to one end of the sixth capacitor C6 and the input pin of the main control chip; the other end of the sixth capacitor C6 is grounded; the output pin of the main control chip is electrically connected to the input of the AND gate and one of the switches of the charging unit 20; the output of the AND gate is electrically connected to the other switch of the charging unit 20.
[0048] For example, in this implementation, the output pin of the main control chip is electrically connected to the gate of the first switch Q1 of the charging unit 20, and the output of the AND gate is electrically connected to the gate of the second switch Q2 of the charging unit 20.
[0049] In this implementation, the first switch Q1 and the second switch Q2 can be N-channel MOSFETs. The scaling factor of the matching unit 32 for the first voltage value is R4 / R3. The ninth resistor R9 and the sixth capacitor C6 form a low-pass filter circuit.
[0050] Figure 4 The control unit shown works as follows: The voltage value of the first voltage is scaled and input to the positive input of comparator U, while the reference voltage Vref is input to the negative input of comparator U, thus setting the synchronization current threshold Isync. Using a hysteresis comparison method, when the current is less than the synchronization current threshold Isync, a falling edge is triggered, turning off Q2. When the current recovers to Irecover, a rising edge is triggered, closing the freewheeling current Q2. In DCM operation, no current backflow occurs, avoiding irreversible damage to the system.
[0051] In another possible implementation, if the minimum voltage of the photovoltaic module 3 is greater than the maximum voltage of the battery 2, the charging unit 10 operates in buck mode. Figure 5 This is a circuit structure diagram of another charging unit provided in Embodiment 1 of the present invention. Figure 5 As shown, the charging unit 10 includes: a third capacitor C3, a fourth capacitor C4, a third switch Q3, a fourth switch Q4, and a second inductor L2.
[0052] Among them, the two ends of the third capacitor C3 are electrically connected to the positive and negative terminals of the photovoltaic module 3, respectively, and the two ends of the fourth capacitor C4 are electrically connected to the positive and negative terminals of the battery 2, respectively. The source of the fourth switch Q4 is electrically connected to the positive terminal of the photovoltaic module 3, the drain of the fourth switch Q4 is electrically connected to the drain of the third switch Q3 and one end of the second inductor L2, and the gate of the fourth switch Q4 is connected to the second PWM signal (…). Figure 5 (Refered as PWM2). The source of the third switch Q3 is electrically connected to the negative terminal of the photovoltaic module 3 and the negative terminal of the battery 2, and the gate of the third switch Q3 is connected to the first PWM signal ( Figure 5 (This is denoted as PWM1). The other end of the second inductor L2 is electrically connected to the positive terminal of the battery 2.
[0053] Continue to refer to Figure 5 When the minimum voltage of photovoltaic module 3 is greater than the maximum voltage of battery 2, two acquisition units 20 are used. These acquisition units can be a second current transformer IC2 and a third current transformer IC3. The second current transformer IC2 is positioned between the source of the fourth switch Q4 and the positive terminal of photovoltaic module 3, and the third current transformer IC3 is positioned between the source of the third switch Q3 and the negative terminal of battery 2. The second current transformer IC2 can sample the second current (…). Figure 5 The two currents are denoted as I2+ and I2-, respectively. The second current is the input current of photovoltaic module 3. The third current transformer IC3 can sample the third current (I2+ and I2-). Figure 5 (These are denoted as I3+ and I3-). The third current is used for the switching signal of the synchronous switching transistor.
[0054] and Figure 2 Compared to the charging unit 10 shown, Figure 5 The reason for adding an extra current transformer to the charging unit 10 shown is that the input current becomes 0 when the fourth switch Q4 is turned off. Based on the sensor error, the fourth switch Q4 is typically turned off when the current drops to the synchronous current threshold Isync. Under low current, the voltage drop across the body diode of the switch is equal to the voltage drop when it is on.
[0055] Accordingly, Figure 6 This is a schematic diagram of another control unit provided in Embodiment 1 of the present invention. Figure 6As shown, the control unit 30 includes: two conversion units 31, a matching unit 32, a comparison unit 33, a logic unit 34, and a main control unit 35.
[0056] Among them, a conversion unit 31 is electrically connected to a data acquisition unit 20 (i.e., receiving the second current sampled by the second current transformer IC2) and a matching unit 32, respectively, and is used to convert the second current sampled by the data acquisition unit into a second voltage.
[0057] The matching unit 32 is electrically connected to the main control unit 35 and is used to scale the voltage value of the second voltage to a size that the main control unit can sample, thereby ensuring that the main control unit 35 can identify the second voltage and provide a data basis for the subsequent generation of PWM signals.
[0058] The main control unit 35 is electrically connected to the gate of the logic unit 34 and the fourth switch Q4, and is used to generate a second PWM signal according to the second voltage.
[0059] Another conversion unit 31 is electrically connected to another acquisition unit (i.e., receiving the third current sampled by the third current transformer IC3) and a comparison unit 33, respectively, and is used to convert the third current sampled by the other acquisition unit into a third voltage.
[0060] The comparison unit 33 is electrically connected to the logic unit 34 and is used to generate a second comparison result based on the third voltage and the reference voltage Vref.
[0061] The logic unit 34 is electrically connected to the gate of the third switch Q3 and is used to generate a first PWM signal based on the second PWM signal and the second comparison result.
[0062] In one embodiment, Figure 7 This is a circuit structure diagram of another control unit provided in Embodiment 1 of the present invention. Figure 7 As shown, the conversion unit 31 includes: a first diode D1, a second diode D2, a third diode D3, a fourth diode D4, a first resistor R1, and a fifth capacitor C5. The matching unit 32 includes: a second resistor R2, a third resistor R3, a fourth resistor R4, and an operational amplifier OPA. The comparison unit 33 includes: a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, and a comparator U. The logic unit 34 is an AND gate. The main control unit 35 includes: a ninth resistor R9, a sixth capacitor C6, and a main control chip. The main control chip can be an MCU or a DSP.
[0063] Specifically, the anodes of the first diode D1 and the second diode D2 are connected to the two terminals of the corresponding acquisition unit (i.e., I2+ and I2-, or I3+ and I3-, respectively). The cathodes of the first diode D1 and the second diode D2, one end of the first resistor R1, and one end of the fifth capacitor C5 are electrically connected to the corresponding matching unit 32 or the corresponding comparison unit 33. The cathode of the third diode D3 is electrically connected to the anode of the first diode D1, and the cathode of the fourth diode D4 is electrically connected to the anode of the second diode D2. The anodes of the third diode D3 and the fourth diode D4, the other end of the first resistor R1, and the other end of the fifth capacitor C5 are all grounded.
[0064] One end of the second resistor R2 is electrically connected to one end of the first resistor R1 of the corresponding conversion unit 31, and the other end of the second resistor R2 is electrically connected to the positive input terminal of the operational amplifier OPA; one end of the third resistor R3 is grounded, and the other end of the third resistor R3 is electrically connected to the negative input terminal of the operational amplifier OPA and one end of the fourth resistor R4; the output terminal of the operational amplifier OPA and the other end of the fourth resistor R4 are electrically connected to the corresponding main control unit 35.
[0065] One end of the fifth resistor R5 is electrically connected to one end of the first resistor R1 of the corresponding conversion unit 31, and the other end of the fifth resistor R5 is electrically connected to the positive input terminal of the comparator U; one end of the sixth resistor R6 is connected to the reference voltage Vref, and the other end of the sixth resistor R6 is electrically connected to the negative input terminal of the comparator U, one end of the seventh resistor R7, and one end of the eighth resistor R8; the other end of the seventh resistor R7 is grounded; the other end of the eighth resistor R8, the output terminal of the comparator U, and the input terminal of the AND gate are electrically connected.
[0066] One end of the ninth resistor R9 is electrically connected to the output of the operational amplifier OPA of the corresponding matching unit 32, and the other end of the ninth resistor R9 is electrically connected to one end of the sixth capacitor C6 and the input pin of the main control chip; the other end of the sixth capacitor C6 is grounded; the output pin of the main control chip is electrically connected to the input of the AND gate and one of the switches of the charging unit 20; the output of the AND gate is electrically connected to the other switch of the charging unit 20.
[0067] For example, in this implementation, the output pin of the main control chip is electrically connected to the gate of the fourth switch Q4 of the charging unit 20, and the output of the AND gate is electrically connected to the gate of the third switch Q3 of the charging unit 20.
[0068] In this implementation, the third switch Q3 and the fourth switch Q4 can be N-channel MOSFETs. The scaling factor of the matching unit 32 for the first voltage is R4 / R3. The ninth resistor R9 and the sixth capacitor C6 form a low-pass filter circuit.
[0069] Figure 7 The control unit shown operates as follows: the third voltage is input to the positive input of comparator U, and the reference voltage Vref is input to the negative input of comparator U, thus allowing the setting of the synchronization current threshold Isync. A hysteresis comparison method is used; when the current crosses zero, a falling edge is triggered, turning off Q3; when the current recovers to Irecover, a rising edge is triggered, closing the freewheeling current Q3. In DCM operation, no current backflow occurs, avoiding irreversible damage to the system.
[0070] Thus, the maximum power point tracking circuit can operate in synchronous mode when the current equals the peak current; in synchronous + asynchronous mode when the current is less than the peak current but greater than the synchronous current threshold Isync; and in asynchronous mode when the current is less than the synchronous current threshold Isync. Furthermore, a valley current detection circuit is included to detect sudden current changes. When the valley current is less than the synchronous current threshold Isync, the freewheeling switch is turned off. This prevents current backflow during sudden changes from high to low power.
[0071] The technical solution of this invention, through the design of a maximum power point tracking (MPPT) circuit, includes a charging unit, a data acquisition unit, and a control unit. The data acquisition unit collects current data from the charging unit and sends it to the control unit. The control unit generates a first PWM signal and a second PWM signal based on the current data and a reference voltage, and sends these signals to the two switching transistors of the charging unit, respectively, to achieve MPPT for the photovoltaic module's output power. Firstly, the control unit can generate PWM signals based on the current data and reference voltage collected by the data acquisition unit to control the switching transistors of the charging unit to turn on / off, thereby achieving accurate control of the switching transistors across the entire power range and improving charging efficiency. Simultaneously, the charging unit does not include diodes, avoiding the problem of high conduction losses caused by forward voltage drop, further improving system efficiency. Secondly, the MPPT circuit is built with a hardware structure, which can avoid circuit damage caused by current backflow, extending system life. Furthermore, the circuit structure is simple, easy to implement, saves production costs, and is widely applicable.
[0072] Example 2
[0073] This invention also provides a photovoltaic system, including the maximum power point tracking circuit of any of the above embodiments, as well as a battery and a photovoltaic module.
[0074] In one embodiment, the photovoltaic module charges the battery via a maximum power point tracking circuit.
[0075] The specific embodiments described above do not constitute a limitation on the scope of protection of this invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this invention should be included within the scope of protection of this invention.
Claims
1. A maximum power point tracking circuit, characterized in that, include: The system comprises a charging unit, a data acquisition unit, and a control unit, wherein the charging unit is electrically connected to the battery and the photovoltaic module, respectively; wherein, The acquisition unit is electrically connected to the charging unit and the control unit respectively, and is used to acquire the current data of the charging unit and send the current data to the control unit; The control unit is electrically connected to the charging unit and is used to generate a first pulse width modulation (PWM) signal and a second PWM signal based on the current data and reference voltage. The first PWM signal and the second PWM signal are then sent to two switching transistors of the charging unit to achieve maximum power point tracking (MPPT) of the output power of the photovoltaic module.
2. The maximum power point tracking circuit according to claim 1, characterized in that, When the maximum voltage of the photovoltaic module is less than the minimum voltage of the battery, the charging unit includes: a first capacitor, a second capacitor, a first switching transistor, a second switching transistor, and a first inductor; The two ends of the first capacitor are electrically connected to the positive and negative terminals of the photovoltaic module, respectively, and the two ends of the second capacitor are electrically connected to the positive and negative terminals of the battery, respectively. One end of the first inductor is electrically connected to the positive terminal of the photovoltaic module, and the other end of the first inductor is electrically connected to the drain of the first switching transistor and the source of the second switching transistor; the source of the first switching transistor is electrically connected to the negative terminal of the photovoltaic module and the negative terminal of the battery, and the gate of the first switching transistor is connected to the first PWM signal; the drain of the second switching transistor is electrically connected to the positive terminal of the battery, and the gate of the second switching transistor is connected to the second PWM signal.
3. The maximum power point tracking circuit according to claim 2, characterized in that, The number of the acquisition unit is one, and the acquisition unit is located between one end of the first inductor and the positive terminal of the photovoltaic module.
4. The maximum power point tracking circuit according to claim 3, characterized in that, The control unit includes: a conversion unit, a matching unit, a comparison unit, a logic unit, and a main control unit; The conversion unit is electrically connected to the acquisition unit and the matching unit respectively, and is used to convert the first current acquired by the acquisition unit into a first voltage. The matching unit is electrically connected to the comparison unit and the main control unit respectively, and is used to scale the voltage value of the first voltage to a size that the main control unit can sample. The main control unit is electrically connected to the logic unit and the gate of the first switching transistor, and is used to generate the first PWM signal according to the first voltage; The comparison unit is electrically connected to the logic unit and is used to generate a first comparison result based on the first voltage and the reference voltage; The logic unit is electrically connected to the gate of the second switching transistor and is used to generate the second PWM signal based on the first PWM signal and the first comparison result.
5. The maximum power point tracking circuit according to claim 1, characterized in that, When the minimum voltage of the photovoltaic module is greater than the maximum voltage of the battery, the charging unit includes: a third capacitor, a fourth capacitor, a third switch, a fourth switch, and a second inductor; The two ends of the third capacitor are electrically connected to the positive and negative terminals of the photovoltaic module, respectively, and the two ends of the fourth capacitor are electrically connected to the positive and negative terminals of the battery, respectively. The source of the fourth switching transistor is electrically connected to the positive terminal of the photovoltaic module, the drain of the fourth switching transistor is electrically connected to the drain of the third switching transistor and one end of the second inductor, and the gate of the fourth switching transistor is connected to the second PWM signal; the source of the third switching transistor is electrically connected to the negative terminal of the photovoltaic module and the negative terminal of the battery, and the gate of the third switching transistor is connected to the first PWM signal; the other end of the second inductor is electrically connected to the positive terminal of the battery.
6. The maximum power point tracking circuit according to claim 5, characterized in that, The number of acquisition units is two. One acquisition unit is located between the source of the fourth switching transistor and the positive terminal of the photovoltaic module, and the other acquisition unit is located between the source of the third switching transistor and the negative terminal of the battery.
7. The maximum power point tracking circuit according to claim 6, characterized in that, The control unit includes: two conversion units, one matching unit, one comparison unit, one logic unit, and one main control unit; A conversion unit is electrically connected to a data acquisition unit and the matching unit respectively, and is used to convert the second current acquired by the data acquisition unit into a second voltage. The matching unit is electrically connected to the main control unit and is used to scale the voltage value of the second voltage to a size that the main control unit can sample. The main control unit is electrically connected to the logic unit and the gate of the fourth switching transistor, and is used to generate the second PWM signal according to the second voltage; Another conversion unit is electrically connected to another acquisition unit and the comparison unit, respectively, and is used to convert the third current acquired by the other acquisition unit into a third voltage; The comparison unit is electrically connected to the logic unit and is used to generate a second comparison result based on the third voltage and the reference voltage; The logic unit is electrically connected to the gate of the third switch and is used to generate the first PWM signal based on the second PWM signal and the second comparison result.
8. The maximum power point tracking circuit according to claim 4 or 7, characterized in that, The conversion unit includes: a first diode, a second diode, a third diode, a fourth diode, a first resistor, and a fifth capacitor; The anodes of the first diode and the second diode are respectively connected to the two terminals of the corresponding acquisition unit. The cathodes of the first diode, the second diode, one end of the first resistor, and one end of the fifth capacitor are electrically connected to the corresponding matching unit or the corresponding comparison unit. The cathode of the third diode is electrically connected to the anode of the first diode, and the cathode of the fourth diode is electrically connected to the anode of the second diode. The anodes of the third diode, the fourth diode, the other end of the first resistor, and the other end of the fifth capacitor are all grounded. The matching unit includes: a second resistor, a third resistor, a fourth resistor, and an operational amplifier; Wherein, one end of the second resistor is electrically connected to one end of the first resistor of the corresponding conversion unit, and the other end of the second resistor is electrically connected to the positive input terminal of the operational amplifier; one end of the third resistor is grounded, and the other end of the third resistor is electrically connected to the negative input terminal of the operational amplifier and one end of the fourth resistor; the output terminal of the operational amplifier and the other end of the fourth resistor are electrically connected to the corresponding main control unit and the corresponding comparator unit.
9. The maximum power point tracking circuit according to claim 8, wherein the logic unit is an AND gate; The comparison unit includes: The fifth resistor, the sixth resistor, the seventh resistor, the eighth resistor, and the comparator; Wherein, one end of the fifth resistor is electrically connected to the output terminal of the operational amplifier of the corresponding matching unit or one end of the first resistor of the corresponding conversion unit, and the other end of the fifth resistor is electrically connected to the positive input terminal of the comparator; one end of the sixth resistor is connected to the reference voltage, and the other end of the sixth resistor is electrically connected to the negative input terminal of the comparator, one end of the seventh resistor, and one end of the eighth resistor; the other end of the seventh resistor is grounded; the other end of the eighth resistor, the output terminal of the comparator, and the input terminal of the AND gate are electrically connected. The main control unit includes: a ninth resistor, a sixth capacitor, and a main control chip; Wherein, one end of the ninth resistor is electrically connected to the output terminal of the operational amplifier of the corresponding matching unit, and the other end of the ninth resistor is electrically connected to one end of the sixth capacitor and the input pin of the main control chip; the other end of the sixth capacitor is grounded; the output pin of the main control chip is electrically connected to the input terminal of the logic AND gate and a switch of the charging unit; The output of the AND gate is electrically connected to another switch in the charging unit.
10. A photovoltaic system, characterized in that, Includes the maximum power point tracking circuit as described in any one of claims 1-9, as well as batteries and photovoltaic modules; The photovoltaic module charges the battery through the maximum power point tracking circuit.