Clock generation method, field programmable gate array and clock generation system

Abstract

The invention discloses a clock generation method, a field-programmable gate array and a clock generation system, and belongs to the technical field of integrated circuits, and the method comprises the steps: obtaining first clock data; inputting the first clock data into a pre-obtained target model to obtain a target temperature and a target voltage, determining a first instruction according to the target temperature, transmitting the first instruction to a temperature adjusting module, and triggering the temperature adjusting module to adjust the temperature of the crystal oscillator module based on the first instruction; determining a second instruction according to the target voltage, transmitting the second instruction to the voltage regulation module, and triggering the voltage regulation module to regulate the power supply voltage of the crystal oscillator module based on the second instruction; acquiring the current temperature and the current power supply voltage of the crystal oscillator module; and when the current temperature is the target temperature and the current power supply voltage is the target voltage, acquiring a clock signal output by the crystal oscillator module. The clock signal obtained by the invention is relatively low in error, low in temperature drift coefficient and low in cost, and the clock frequency is adjustable in a preset range.

Description

Technical Field

[0001] This application relates to the field of integrated circuit technology, and more specifically, to a clock generation method, a field-programmable gate array, and a clock generation system. Background Technology

[0002] High-precision real-time clock synchronization is widely used in 5G / 6G communication, real-time positioning and navigation. Conventional active crystal oscillators are small in size, low in power consumption, short in hot start time and inexpensive, but they have large clock errors, weak temperature drift stability and large frequency errors, which make it difficult to meet the requirements of high-precision real-time clock synchronization. Summary of the Invention

[0003] This application proposes a clock generation method, a field-programmable gate array, and a clock generation system to improve the above-mentioned deficiencies.

[0004] In a first aspect, this application provides a clock generation method applied to a field-programmable gate array (FPGA), wherein the FPGA is connected to a crystal oscillator module, a temperature regulation module, and a voltage regulation module. The method includes: acquiring first clock data; inputting the first clock data into a pre-acquired target model to obtain a target temperature and a target voltage, wherein the target model is obtained by training a preset prediction model based on a dataset, and the dataset includes the temperature, supply voltage, and clock data output by the crystal oscillator module having a corresponding relationship; determining a first instruction based on the target temperature and transmitting the first instruction to the temperature regulation module to trigger the temperature regulation module to adjust the temperature of the crystal oscillator module based on the first instruction; determining a second instruction based on the target voltage and transmitting the second instruction to the voltage regulation module to trigger the voltage regulation module to adjust the supply voltage of the crystal oscillator module based on the second instruction; acquiring the current temperature and current supply voltage of the crystal oscillator module; and, when the current temperature is the target temperature and the current supply voltage is the target voltage, acquiring the clock signal output by the crystal oscillator module.

[0005] Optionally, in one possible implementation, the method further includes: if the current temperature is not the target temperature, then determining a new first instruction based on the current temperature and the target temperature, and returning to execute the transmission of the first instruction to the temperature adjustment module and subsequent operations.

[0006] Optionally, in one possible implementation, determining the new first instruction based on the current temperature and the target temperature includes: obtaining the new first instruction based on the difference between the current temperature and the target temperature and the first instruction.

[0007] Optionally, in one possible implementation, the method further includes: if the current supply voltage is not the target voltage, then determining a new second instruction based on the current supply voltage and the target voltage, returning to execute the transmission of the second instruction to the voltage regulation module and subsequent operations.

[0008] Optionally, in one possible implementation, determining the new second instruction based on the current supply voltage and the target voltage includes: obtaining the new second instruction based on the difference between the current supply voltage and the target voltage and the second instruction.

[0009] Optionally, in one possible implementation, before acquiring the first clock data, the method further includes: acquiring a dataset, the dataset comprising multiple different data groups, each data group including the second clock data output by the crystal oscillator module under the test scenario, the test temperature corresponding to the second clock data, and the test power supply voltage; inputting the dataset into a preset prediction model for training, updating the parameters of the prediction model, and obtaining a target model.

[0010] Optionally, in one possible implementation, the step of inputting the dataset into a preset prediction model for training, updating the parameters of the prediction model, and obtaining a target model includes: inputting multiple second clock data from the dataset into the prediction model to obtain the predicted temperature and predicted voltage corresponding to each second clock data; determining a loss function value based on a loss function, the predicted temperature, predicted voltage, test temperature, and test power supply voltage corresponding to each second clock data; if the loss function value does not meet a preset condition, backpropagation is performed to update the parameters of the prediction model to obtain a new prediction model, and the steps of inputting multiple second clock data from the dataset into the prediction model to obtain the predicted temperature and predicted voltage corresponding to each second clock data, as well as subsequent steps, are repeated until the loss function value meets the preset condition, and the new prediction model is used as the target model.

[0011] Optionally, in one possible implementation, the loss function is the mean squared error function.

[0012] Secondly, this application also provides a field-programmable gate array (FPGA) applied to a clock generation system. The clock generation system further includes a crystal oscillator module, a temperature regulation module, and a voltage regulation module. The FPGA is configured to: acquire first clock data; input the first clock data into a pre-acquired target model to obtain a target temperature and a target voltage, wherein the target model is obtained by training a preset prediction model based on a dataset, and the dataset includes the temperature, supply voltage, and clock data output by the crystal oscillator module, which have corresponding relationships; determine a first instruction based on the target temperature and transmit the first instruction to the temperature regulation module to trigger the temperature regulation module to adjust the temperature of the crystal oscillator module based on the first instruction; determine a second instruction based on the target voltage and transmit the second instruction to the voltage regulation module to trigger the voltage regulation module to adjust the supply voltage of the crystal oscillator module based on the second instruction; acquire the current temperature and current supply voltage of the crystal oscillator module; and, when the current temperature is the target temperature and the current supply voltage is the target voltage, acquire the clock signal output by the crystal oscillator module.

[0013] Thirdly, this application also provides a clock generation system, including: a crystal oscillator module, a temperature regulation module, a voltage regulation module, a data acquisition module, and the aforementioned field-programmable gate array (FPGA); the first output terminal of the FPGA is connected to the input terminal of the temperature regulation module for outputting a first instruction, and the second output terminal of the FPGA is connected to the input terminal of the voltage regulation module for outputting a second instruction; the output terminal of the crystal oscillator module is connected to the first input terminal of the FPGA for outputting a clock signal, the first output terminal of the data acquisition module is connected to the second input terminal of the FPGA for outputting the current temperature of the crystal oscillator module, and the second output terminal of the data acquisition module is connected to the third input terminal of the FPGA for outputting the current power supply voltage of the crystal oscillator module.

[0014] Optionally, in one possible implementation, the temperature regulation module includes a heating device, and the voltage regulation module includes a voltage regulation circuit.

[0015] Optionally, in one possible implementation, the acquisition module includes a temperature sensor, a voltage detection circuit, and an analog-to-digital conversion circuit; The temperature sensor is used to detect the temperature of the crystal oscillator module. The output terminal of the temperature sensor is connected to the first input terminal of the analog-to-digital converter circuit. The voltage detection circuit is used to detect the power supply voltage of the crystal oscillator module. The output terminal of the voltage detection circuit is connected to the second input terminal of the analog-to-digital converter circuit. The first output terminal of the analog-to-digital converter circuit is connected to the second input terminal of the field-programmable gate array (FPGA) to output the current temperature of the crystal oscillator module. The second output terminal of the analog-to-digital converter circuit is connected to the third input terminal of the FPGA to output the current power supply voltage of the crystal oscillator module.

[0016] Optionally, in one possible implementation, the acquisition module further includes a fifth circuit and a sixth circuit; the input terminal of the fifth circuit is connected to the output terminal of the temperature sensor, and the output terminal of the fifth circuit is connected to the first input terminal of the analog-to-digital converter circuit, the fifth circuit being used to amplify and filter the signal output by the temperature sensor; the input terminal of the sixth circuit is connected to the output terminal of the voltage detection circuit, and the output terminal of the sixth circuit is connected to the second input terminal of the analog-to-digital converter circuit, the sixth circuit being used to amplify and filter the signal output by the voltage detection circuit.

[0017] In this embodiment, firstly, first clock data is acquired; the first clock data is input into a pre-acquired target model to obtain a target temperature and a target voltage. The target model is obtained by training a preset prediction model based on a dataset. The dataset includes the temperature, power supply voltage, and clock data output by the crystal oscillator module, which have corresponding relationships. Then, a first instruction is determined based on the target temperature and transmitted to the temperature adjustment module, triggering the temperature adjustment module to adjust the temperature of the crystal oscillator module based on the first instruction. A second instruction is determined based on the target voltage and transmitted to the voltage adjustment module, triggering the voltage adjustment module to adjust the power supply voltage of the crystal oscillator module based on the second instruction. Secondly, the current temperature and current power supply voltage of the crystal oscillator module are acquired. When the current temperature is the target temperature and the current power supply voltage is the target voltage, the clock signal output by the crystal oscillator module is collected.

[0018] This application inputs first clock data into a target model to obtain target temperature and target voltage. Based on the target temperature, the temperature of the crystal oscillator module is adjusted; based on the target voltage, the supply voltage of the crystal oscillator module is adjusted. When the current temperature of the crystal oscillator module is the target temperature and when the current supply voltage of the crystal oscillator module is the target voltage, a clock signal matching the first clock data is obtained. On one hand, compared to conventional active crystal oscillators, the clock signal output by the crystal oscillator module in this application has lower error and lower temperature drift coefficient. On the other hand, compared to known temperature-compensated crystal oscillators, the clock signal output by the crystal oscillator module in this application not only has lower error and lower temperature drift coefficient but also lower cost. Furthermore, this application enables the clock frequency to be adjustable within a preset range, making it applicable in clock switching scenarios.

[0019] Other features and advantages of this application will be set forth in the following description and will be apparent in part from the description or may be learned by practicing the application. The objectives and other advantages of this application may be realized and obtained by means of the structures particularly pointed out in the written description, claims, and drawings. Attached Figure Description

[0020] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0021] Figure 1 A flowchart of the clock generation method provided in an embodiment of this application is shown; Figure 2 A flowchart of a clock generation method according to another embodiment of this application is shown; Figure 3 A flowchart of a clock generation method according to another embodiment of this application is shown; Figure 4 A training block diagram of the prediction model provided in an embodiment of this application is shown; Figure 5 A structural block diagram of the clock generation system provided in an embodiment of this application is shown; Figure 6 A structural block diagram of the acquisition module provided in an embodiment of this application is shown; Figure 7 A structural block diagram of a data acquisition module provided in another embodiment of this application is shown; Figure 8 A structural block diagram of a clock generation system provided in another embodiment of this application is shown. Detailed Implementation

[0022] To enable those skilled in the art to better understand the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the present application, and not all of them. The components of the embodiments of the present application described and shown in the accompanying drawings can generally be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of the present application provided in the accompanying drawings is not intended to limit the scope of the claimed application, but merely represents selected embodiments of the present application. All other embodiments obtained by those skilled in the art based on the embodiments of the present application without inventive effort are within the scope of protection of the present application.

[0023] It should be noted that similar reference numerals and letters in the following figures indicate similar items; therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures. Furthermore, in the description of this application, terms such as "first," "second," etc., are used only to distinguish descriptions and should not be construed as indicating or implying relative importance.

[0024] High-precision real-time clock synchronization is widely used in 5G / 6G communication, real-time positioning, and navigation. Current solutions primarily employ dedicated temperature-compensated crystal oscillators (TCXOs), which offer advantages such as low clock error, strong temperature drift stability, and extremely low frequency error. However, due to their internal circuit design, they suffer from drawbacks including large package size, high power consumption, fixed frequency, long warm-up time, and high cost. Conventional active crystal oscillators, on the other hand, have small packages, low power consumption, short warm-up time, and are inexpensive, but they suffer from high clock error, weak temperature drift stability, and frequency error.

[0025] It should be noted that high-precision real-time clock synchronization is often required in applications such as 5G / 6G wireless communication, real-time positioning, and navigation. The main control chip is usually a Field-Programmable Gate Array (FPGA). FPGA has the advantages of flexible functions, strong algorithm processing capabilities, and adaptability to multiple scenarios. It would be very valuable to propose a clock generation method and system that can combine active crystal and FPGA and has low temperature drift coefficient, low frequency error, and low cost.

[0026] Therefore, this application provides a clock generation method, a field-programmable gate array, and a clock generation system to solve or partially solve the above problems.

[0027] Please see Figure 1The document illustrates a flowchart of a clock generation method provided in an embodiment of this application. The method is applied to a field-programmable gate array (FPGA), which is connected to a crystal oscillator module, a temperature regulation module, and a voltage regulation module. Specifically, it includes steps S101 to S106.

[0028] Step S101: Obtain the first clock data.

[0029] It should be noted that the first clock data represents the high-precision clock signal data required for the normal operation of the FPGA. The first clock data includes at least one of the following: the target clock frequency of the crystal oscillator module, the error between the standard frequency and the target clock frequency, and the phase noise of the target clock frequency.

[0030] The first clock data can be user-defined data or data received by the FPGA. For example, the user inputs the first clock data based on their needs, and the FPGA obtains the first clock data based on the user's input. Alternatively, the FPGA may obtain the first clock data sent by other devices.

[0031] Step S102: Input the first clock data into the pre-acquired target model to obtain the target temperature and target voltage. The target model is obtained by training a preset prediction model based on a dataset. The dataset includes the temperature, power supply voltage and clock data output by the crystal oscillator module that have a corresponding relationship.

[0032] It is understandable that the target temperature represents the temperature corresponding to the first clock data, and the temperature of the crystal oscillator module needs to be adjusted to the target temperature; the target voltage represents the power supply voltage corresponding to the first clock data, and the power supply voltage of the crystal oscillator module needs to be adjusted to the target voltage.

[0033] It should be noted that the target model is trained on a pre-defined prediction model based on a dataset. The dataset includes the temperature, supply voltage, and clock data output by the crystal oscillator module, which have a corresponding relationship. Specifically, the temperature, supply voltage, and clock data of the corresponding crystal oscillator module represent the temperature, supply voltage, and clock data output by the crystal oscillator module at a specific moment in the data collection. Therefore, inputting the first clock data into the target model yields the target temperature and target voltage corresponding to the first clock data.

[0034] Understandably, each crystal has a standard frequency due to its physical characteristics. Therefore, parameters such as frequency error and phase noise can be determined based on the actual acquired clock data. Different crystal models correspond to different target models, and different datasets also correspond to different target models. For example, a first target model is trained based on a first dataset (including the output frequency, temperature, and supply voltage of the corresponding crystal oscillator modules). The first clock data includes the expected frequency of the crystal oscillator modules. Inputting the first clock data into the first target model yields the target temperature and target voltage. As another example, a second target model is trained based on a second dataset (including the output frequency error, temperature, and supply voltage of the corresponding crystal oscillator modules). The first clock data includes the expected frequency error of the crystal oscillator modules. Inputting the first clock data into the second target model yields the target temperature and target voltage.

[0035] In one alternative embodiment, the target model is implemented based on hardware circuitry.

[0036] In one implementation scenario, the field-programmable gate array includes a target model, which is a configured target circuit. The target circuit includes an input terminal and an output terminal. The first clock data is input to the target circuit, and the target circuit outputs the target temperature and the target voltage.

[0037] An exemplary method involves obtaining a training circuit based on first configuration bitstream data, inputting the dataset into the training circuit for training, obtaining the corresponding second configuration parameters based on the trained circuit, configuring a field-programmable gate array based on the second configuration parameters to obtain a target model, and inputting the first clock data into the pre-acquired target model to obtain the target temperature and target voltage.

[0038] In one alternative embodiment, the target model is a machine learning model defined by a software instruction set, which is executed in a processor.

[0039] In one implementation scenario, the target model runs on a processor. The processor obtains the target temperature and target voltage based on the first clock data, and the FPGA then performs subsequent operations based on the target temperature and target voltage.

[0040] Step S103: Determine a first instruction based on the target temperature and transmit the first instruction to the temperature adjustment module to trigger the temperature adjustment module to adjust the temperature of the crystal oscillator module based on the first instruction.

[0041] It should be noted that the target temperature refers to the temperature corresponding to the first clock data. The temperature of the crystal oscillator module needs to be adjusted to the target temperature. To do this, a first instruction needs to be determined based on the target temperature and transmitted to the temperature adjustment module. The temperature adjustment module adjusts the temperature of the crystal oscillator module based on the first instruction.

[0042] Step S104: Determine a second instruction based on the target voltage and transmit the second instruction to the voltage regulation module to trigger the voltage regulation module to adjust the power supply voltage of the crystal oscillator module based on the second instruction.

[0043] It should be noted that the target voltage represents the power supply voltage corresponding to the first clock data. The power supply voltage of the crystal oscillator module needs to be adjusted to the target voltage. To do this, a second instruction needs to be determined based on the target voltage and transmitted to the voltage adjustment module. The voltage adjustment module adjusts the power supply voltage of the crystal oscillator module based on the second instruction.

[0044] Step S105: Obtain the current temperature and current power supply voltage of the crystal oscillator module.

[0045] After adjustment by the temperature regulation module and the voltage regulation module, the current temperature and current power supply voltage of the crystal oscillator module are obtained.

[0046] Step S106: When the current temperature is the target temperature and the current power supply voltage is the target voltage, acquire the clock signal output by the crystal oscillator module.

[0047] Understandably, it is necessary to compare the current temperature with the target temperature, and to compare the current supply voltage with the target voltage. When the current temperature is the target temperature and the current supply voltage is the target voltage, it means that the temperature of the crystal oscillator module has reached the preset requirement and the supply voltage of the crystal oscillator module has also reached the preset requirement. Then, the clock signal output by the crystal oscillator module is collected, and the obtained clock signal is the required clock data, that is, the clock signal that matches the first clock data.

[0048] It should be noted that, considering the minimum resolution of sensor data acquisition and the minimum resolution of voltage detection, if the difference between the current temperature and the target temperature is within the first preset range, the current temperature is considered the target temperature; otherwise, the current temperature is considered not to be the target temperature. Similarly, if the difference between the current supply voltage and the target voltage is within the second preset range, the current supply voltage is considered the target voltage; otherwise, the current supply voltage is considered not to be the target voltage.

[0049] It should be noted that for a given crystal model, there is a theoretical output frequency. However, due to factors such as temperature and supply voltage, the output frequency of the crystal oscillator module is limited to a certain range. For example, for a 20MHz ordinary industrial-grade crystal oscillator, the corresponding output frequency range is 19.9991MHz-20.0009MHz. In high-precision real-time clock synchronization scenarios, a precise clock signal is required. For instance, when the user inputs a first clock data of 20.0001MHz, this application can enable the crystal oscillator module to output a clock signal corresponding to the first clock data. Similarly, when the user inputs a first clock data of 20.0004MHz, this application can enable the crystal oscillator module to output a clock signal corresponding to the first clock data. Therefore, the clock generation method of this application can achieve clock signal control within a preset range and can be applied in clock switching scenarios.

[0050] In this embodiment, firstly, first clock data is acquired; the first clock data is input into a pre-acquired target model to obtain a target temperature and a target voltage. The target model is obtained by training a preset prediction model based on a dataset. The dataset includes the temperature, power supply voltage, and clock data output by the crystal oscillator module, which have corresponding relationships. Then, a first instruction is determined based on the target temperature and transmitted to the temperature adjustment module, triggering the temperature adjustment module to adjust the temperature of the crystal oscillator module based on the first instruction. A second instruction is determined based on the target voltage and transmitted to the voltage adjustment module, triggering the voltage adjustment module to adjust the power supply voltage of the crystal oscillator module based on the second instruction. Secondly, the current temperature and current power supply voltage of the crystal oscillator module are acquired. When the current temperature is the target temperature and the current power supply voltage is the target voltage, the clock signal output by the crystal oscillator module is collected.

[0051] This application inputs first clock data into a target model to obtain target temperature and target voltage. Based on the target temperature, the temperature of the crystal oscillator module is adjusted; based on the target voltage, the supply voltage of the crystal oscillator module is adjusted. When the current temperature of the crystal oscillator module is the target temperature and when the current supply voltage of the crystal oscillator module is the target voltage, a clock signal matching the first clock data is obtained. On one hand, compared to conventional active crystal oscillators, the clock signal output by the crystal oscillator module in this application has lower error and lower temperature drift coefficient. On the other hand, compared to known temperature-compensated crystal oscillators, the clock signal output by the crystal oscillator module in this application not only has lower error and lower temperature drift coefficient but also lower cost. Furthermore, this application enables the clock frequency to be adjustable within a preset range, making it applicable in clock switching scenarios.

[0052] Please see Figure 2The document illustrates a flowchart of a clock generation method provided in an embodiment of this application. The method is applied to a field-programmable gate array (FPGA), which is connected to a crystal oscillator module, a temperature regulation module, and a voltage regulation module. Specifically, it includes steps S201 to S208.

[0053] Step S201: Obtain the first clock data.

[0054] Step S202: Input the first clock data into the pre-acquired target model to obtain the target temperature and target voltage. The target model is obtained by training a preset prediction model based on a dataset. The dataset includes the temperature, power supply voltage and clock data output by the crystal oscillator module that have a corresponding relationship.

[0055] Step S203: Determine a first instruction based on the target temperature and transmit the first instruction to the temperature adjustment module to trigger the temperature adjustment module to adjust the temperature of the crystal oscillator module based on the first instruction.

[0056] Step S204: Determine a second instruction based on the target voltage and transmit the second instruction to the voltage regulation module to trigger the voltage regulation module to adjust the power supply voltage of the crystal oscillator module based on the second instruction.

[0057] Step S205: Obtain the current temperature and current power supply voltage of the crystal oscillator module.

[0058] Step S206: When the current temperature is the target temperature and the current power supply voltage is the target voltage, acquire the clock signal output by the crystal oscillator module.

[0059] Step S207: If the current temperature is not the target temperature, then a new first instruction is determined based on the current temperature and the target temperature, and the process returns to transmit the first instruction to the temperature adjustment module and subsequent operations.

[0060] It is understandable that temperature changes require a process. If the detected current temperature is not the target temperature, it means that the temperature of the crystal oscillator module needs to be adjusted further. A new first instruction is then determined based on the current temperature and the target temperature. The temperature adjustment module then adjusts the temperature of the crystal oscillator module based on the new first instruction until the current temperature is detected as the target temperature.

[0061] In one alternative embodiment, a new first instruction is obtained based on the difference between the current temperature and the target temperature and the first instruction.

[0062] It should be noted that the temperature of the crystal oscillator module can be adjusted using heating or cooling devices. If the current temperature is lower than the target temperature, the temperature of the crystal oscillator module needs to be increased, which can be done by increasing the power of the heating device or decreasing the power of the cooling device. If the current temperature is higher than the target temperature, the temperature of the crystal oscillator module needs to be decreased, which can be done by decreasing the power of the heating device or increasing the power of the cooling device.

[0063] In one example, the temperature of a crystal oscillator module is adjusted via a heating device. The first instruction is "00001111". The current temperature is 20 degrees Celsius, the target temperature is 25 degrees Celsius, and the difference between the current and target temperatures is -5 degrees Celsius. Based on this difference and the first instruction, a new first instruction of "00011111" can be obtained to increase the power of the heating device. The amount of power increase can be determined based on a preset rule; for example, a temperature adjustment of 0.5 degrees Celsius corresponds to a power adjustment of 1 watt. The adjusted power value is then converted into a new first instruction.

[0064] In one example, the temperature of the crystal oscillator module is adjusted by a heating device. The first instruction is "00001111". The current temperature is 28 degrees Celsius, the target temperature is 25 degrees Celsius, and the difference between the current temperature and the target temperature is 3 degrees Celsius. Based on the difference and the first instruction, a new first instruction is obtained as "0000111" to reduce the power of the heating device.

[0065] Step S208: If the current supply voltage is not the target voltage, then a new second instruction is determined based on the current supply voltage and the target voltage, and the process returns to transmit the second instruction to the voltage regulation module and subsequent operations.

[0066] Understandably, if the detected current supply voltage is not the target voltage, it means that the supply voltage of the crystal oscillator module needs to be adjusted. Then, a new second instruction is determined based on the current supply voltage and the target voltage, and the voltage adjustment module adjusts the supply voltage of the crystal oscillator module based on the new second instruction.

[0067] It should be noted that the crystal oscillator module is a conventional active crystal oscillator circuit, which will not be described in detail here. The voltage regulation module regulates the power supply voltage of the crystal oscillator module.

[0068] For example, the second instruction is "00011111", the current supply voltage is 2V, the target voltage is 2.5V, and the difference between the current supply voltage and the target voltage is -0.5V. Based on the difference and the second instruction, a new second instruction is obtained as "00111110" to increase the supply voltage of the crystal oscillator module.

[0069] For example, if the second instruction is "00011111", the current supply voltage is 2.7V, the target voltage is 2.5V, and the difference between the current supply voltage and the target voltage is 0.2V, then based on the difference and the second instruction, a new second instruction is obtained as "00011110" to reduce the supply voltage of the crystal oscillator module.

[0070] In this embodiment, the temperature of the crystal oscillator module is adjusted to the target temperature by a temperature regulation module, and the power supply voltage of the crystal oscillator module is adjusted to the target voltage by a voltage regulation module. When the current temperature and the current power supply voltage are both at the target temperature and the target voltage, the clock signal output by the crystal oscillator module is acquired to obtain a clock signal that matches the first clock data. While achieving the same effect as a temperature-compensated crystal oscillator, this application enables adjustable clock frequency within a budget, resulting in lower costs.

[0071] Please see Figure 3 The document illustrates a flowchart of a clock generation method provided in an embodiment of this application. The method is applied to a field-programmable gate array (FPGA), which is connected to a crystal oscillator module, a temperature regulation module, and a voltage regulation module. Specifically, it includes steps S301 to S308.

[0072] Step S301: Collect a dataset, which includes multiple different data groups. Each data group includes the second clock data output by the crystal oscillator module under the test scenario, the test temperature corresponding to the second clock data, and the test power supply voltage.

[0073] It is understandable that the second clock data output by the crystal oscillator module, the temperature of the crystal oscillator module, and the power supply voltage of the crystal oscillator module at a certain moment are collected. The temperature of the crystal oscillator module at this moment is taken as the test temperature corresponding to the second clock signal, and the power supply voltage of the crystal oscillator module at this moment is taken as the test power supply voltage corresponding to the second clock signal. The second clock data, test temperature, and test power supply voltage corresponding to each moment are taken as a data group. Multiple data groups are collected multiple times, and the multiple data groups are used as the training dataset.

[0074] The second clock data includes at least one of the following: the clock frequency of the crystal oscillator module, the error between the standard frequency and the clock frequency, and phase noise.

[0075] Step S302: Input the dataset into a preset prediction model for training, update the parameters of the prediction model, and obtain the target model.

[0076] It is understood that the prediction model is a neural network model, for example, a recurrent neural network (RNN).

[0077] In one optional embodiment, step S302 includes steps S3021 to S3023: Step S3021: Input multiple second clock data from the dataset into the prediction model to obtain the predicted temperature and predicted voltage corresponding to each second clock data.

[0078] It should be noted that multiple second clock data points from the dataset are input into the prediction model, and the prediction model calculates the predicted temperature and predicted voltage corresponding to each second clock data point.

[0079] Step S3022: Determine the value of the loss function based on the loss function, the predicted temperature, predicted voltage, test temperature, and test supply voltage corresponding to each of the second clock data.

[0080] It is known that each data group in the dataset is the actual collected data. Therefore, the test temperature corresponding to the second clock data can be understood as the baseline value of the predicted temperature, and the test power supply voltage corresponding to the second clock data can be understood as the baseline value of the predicted voltage. Therefore, the loss function value can be determined based on the loss function, the predicted temperature, predicted voltage, test temperature and test power supply voltage corresponding to each second clock data, and the training can be judged based on the loss function value.

[0081] Step S3023: If the loss function value does not meet the preset conditions, backpropagation is performed to update the parameters of the prediction model, obtain a new prediction model, and return to execute the steps of inputting multiple second clock data in the dataset into the prediction model to obtain the predicted temperature and predicted voltage corresponding to each second clock data, and subsequent steps, until the loss function value meets the preset conditions, and the new prediction model is used as the target model.

[0082] If the loss function value does not meet the preset conditions, backpropagation is performed to update the parameters of the prediction model to obtain a new prediction model. Multiple second clock data from the dataset are then input into the prediction model to obtain the predicted temperature and predicted voltage corresponding to each second clock data and subsequent steps.

[0083] If the loss function value meets the preset conditions, the training is complete, and the new prediction model is used as the target model.

[0084] It should be noted that the second clock data represents the clock data input to the model during model training, while the first clock data represents the clock data input to the model during model prediction. Therefore, the first and second clock data are of the same type. For example, if the second clock data includes the acquired output frequency and phase noise of the crystal oscillator module, then the first clock data includes the expected output frequency and phase noise of the crystal oscillator module. As another example, if the second clock data includes the acquired error and phase noise of the crystal oscillator module's output frequency, then the first clock data includes the expected error and phase noise of the crystal oscillator module's output frequency, where the output frequency error is the difference between the crystal oscillator module's output frequency and the standard frequency.

[0085] In one optional embodiment, the loss function is a mean squared error function.

[0086] For an example, please refer to Figure 4 The diagram shows the training block diagram of the prediction model. The second clock data includes the error of the crystal's output frequency and phase noise. The training steps of the model are as follows: The first step is to create a dataset based on the crystal's output frequency error and phase noise, along with temperature and power supply data (supply voltage).

[0087] The second step is to construct the prediction model A1, with the objective function being: F 预测（电压，温度） =a1*Frequency Error n1 +a2*phase noise n2 +a3, where a1, a2, a3, n1, and n2 represent the weights of the prediction model A1, and a1, a2, a3, n1, and n2 are arbitrary initial values ​​before training.

[0088] It should be noted that the second clock data in this embodiment includes frequency error and phase noise, which is only an example. The second clock data may also include multiple parameters such as frequency error and phase noise, and different objective functions can be constructed based on multiple parameters. The objective function is only an example, and different objective functions can be set according to requirements.

[0089] The third step is to feed the dataset into the initial prediction model A1, and the output data is F. 预测（电压，温度） The output data F 预测（电压，温度） Compared with standard data F 标准（电压，温度） The formula for calculating the mean square error is as follows.

[0090] Where n represents the total number of training data sets, i represents the index of the data set, and F 预测i（电压，温度） F represents the expression for the predicted temperature and predicted voltage calculated by the objective function during the i-th second clock cycle. 标准i（电压，温度）This represents the expression for the voltage and temperature collected corresponding to the i-th second clock data. MSE represents the mean square error of the predicted voltage and temperature. The preset minimum mean square error is 0.02%. If the MSE is less than 0.02%, then... Figure 4 If the target value is 0.02%, then training stops, and the updated prediction model A1 is used as the target model.

[0091] The fourth step is to backpropagate if the current calculated MSE is greater than or equal to 0.02%, update the weights of each parameter, that is, update the values ​​of a1, a2, a3, n1, and n2, and obtain a new prediction model A1.

[0092] Step 5: Repeat steps 3 and 4 until the MSE is less than 0.02%, and obtain the target model.

[0093] After training is complete, the first clock data includes the expected output frequency error and phase noise of the crystal. The first data is then input into the target model to obtain the target temperature and target voltage.

[0094] Step S303: Obtain the first clock data.

[0095] Step S304: Input the first clock data into the pre-acquired target model to obtain the target temperature and target voltage. The target model is obtained by training a preset prediction model based on a dataset. The dataset includes the temperature, power supply voltage and clock data output by the crystal oscillator module that have a corresponding relationship.

[0096] Step S305: Determine a first instruction based on the target temperature and transmit the first instruction to the temperature adjustment module to trigger the temperature adjustment module to adjust the temperature of the crystal oscillator module based on the first instruction.

[0097] Step S306: Determine a second instruction based on the target voltage and transmit the second instruction to the voltage regulation module to trigger the voltage regulation module to adjust the power supply voltage of the crystal oscillator module based on the second instruction.

[0098] Step S307: Obtain the current temperature and current power supply voltage of the crystal oscillator module.

[0099] Step S308: When the current temperature is the target temperature and the current power supply voltage is the target voltage, acquire the clock signal output by the crystal oscillator module.

[0100] This application embodiment collects a dataset and inputs it into a preset prediction model for model training to obtain a target model. The target model can predict the target temperature and target voltage based on the first clock data. Then, based on the target temperature, it obtains a first instruction and transmits the first instruction to the temperature regulation module. The temperature regulation module adjusts the temperature of the crystal oscillator module. Based on the target voltage, it obtains a second instruction and transmits the second instruction to the voltage regulation module. The voltage regulation module adjusts the power supply voltage of the crystal oscillator module. When the current temperature of the crystal oscillator module is the target temperature and the current power supply voltage is the target voltage, it indicates that the clock signal output by the crystal oscillator module matches the first clock data. The clock signal output by the crystal oscillator module is obtained. The frequency error of this clock signal is small and the temperature drift coefficient is low.

[0101] It should be noted that this application embodiment also provides a field-programmable gate array (FPGA) applied to a clock generation system. The clock generation system further includes a crystal oscillator module, a temperature regulation module, and a voltage regulation module. The FPGA is configured as follows: Obtain the first clock data.

[0102] The first clock data is input into a pre-acquired target model to obtain the target temperature and target voltage. The target model is obtained by training a preset prediction model based on a dataset. The dataset includes the temperature, power supply voltage, and clock data output by the crystal oscillator module, which have corresponding relationships.

[0103] A first instruction is determined based on the target temperature, and the first instruction is transmitted to the temperature adjustment module, triggering the temperature adjustment module to adjust the temperature of the crystal oscillator module based on the first instruction.

[0104] A second instruction is determined based on the target voltage, and the second instruction is transmitted to the voltage regulation module, triggering the voltage regulation module to adjust the power supply voltage of the crystal oscillator module based on the second instruction.

[0105] Obtain the current temperature and current power supply voltage of the crystal oscillator module.

[0106] When the current temperature is the target temperature and the current power supply voltage is the target voltage, the clock signal output by the crystal oscillator module is acquired.

[0107] In one implementation scenario, the field-programmable gate array includes a target model, which is a configured target circuit. The target circuit includes an input terminal and an output terminal. The first clock data is input to the target circuit, and the target circuit outputs the target temperature and the target voltage.

[0108] An exemplary method involves obtaining a training circuit based on first configuration bitstream data, inputting the dataset into the training circuit for training, obtaining the corresponding second configuration parameters based on the trained circuit, configuring a field-programmable gate array based on the second configuration parameters to obtain a target model, and inputting the first clock data into the pre-acquired target model to obtain the target temperature and target voltage.

[0109] In one implementation scenario, the target model is a model running on a processor. The processor obtains the target temperature and target voltage based on the first clock data, and the FPGA then performs subsequent operations based on the target temperature and target voltage.

[0110] In one optional embodiment, the field-programmable gate array can also be configured to: if the current temperature is not the target temperature, determine a new first instruction based on the current temperature and the target temperature, return to execute transmitting the first instruction to the temperature regulation module and subsequent operations.

[0111] In one alternative embodiment, the field-programmable gate array can also be configured to: obtain a new first instruction based on the difference between the current temperature and the target temperature and the first instruction.

[0112] In one optional embodiment, the field-programmable gate array can also be configured to: if the current supply voltage is not the target voltage, determine a new second instruction based on the current supply voltage and the target voltage, return to execute the transmission of the second instruction to the voltage regulation module and subsequent operations.

[0113] In one alternative embodiment, the field-programmable gate array can also be configured to: obtain a new second instruction based on the difference between the current supply voltage and the target voltage and the second instruction.

[0114] In one optional embodiment, the field-programmable gate array can also be configured to: acquire a dataset, the dataset including multiple different data groups, each data group including second clock data output by the crystal oscillator module under the test scenario, the test temperature corresponding to the second clock data, and the test power supply voltage; input the dataset into a preset prediction model for training, update the parameters of the prediction model, and obtain a target model.

[0115] In one optional embodiment, the field-programmable gate array (FPGA) can be further configured to: input multiple second clock data from the dataset into the prediction model to obtain the predicted temperature and predicted voltage corresponding to each second clock data; determine the loss function value based on the loss function, the predicted temperature, predicted voltage, test temperature, and test power supply voltage corresponding to each second clock data; if the loss function value does not meet the preset conditions, backpropagate to update the parameters of the prediction model to obtain a new prediction model, and return to execute the steps of inputting multiple second clock data from the dataset into the prediction model to obtain the predicted temperature and predicted voltage corresponding to each second clock data and subsequent steps, until the loss function value meets the preset conditions, and use the new prediction model as the target model.

[0116] Please see Figure 5 The diagram illustrates a structural block diagram of a clock generation system 500 provided in an embodiment of this application. The clock generation system 500 includes: The crystal oscillator module 510, temperature regulation module 520, voltage regulation module 530, acquisition module 540, and the aforementioned field programmable gate array 550.

[0117] The first output terminal of the field-programmable gate array 550 is connected to the input terminal of the temperature regulation module 520 for outputting a first instruction, and the second output terminal of the field-programmable gate array 550 is connected to the input terminal of the voltage regulation module 530 for outputting a second instruction.

[0118] The output terminal of the crystal oscillator module 510 is connected to the first input terminal of the field-programmable gate array 550 for outputting a clock signal. The first output terminal of the acquisition module 540 is connected to the second input terminal of the field-programmable gate array 550 for outputting the current temperature of the crystal oscillator module 510. The second output terminal of the acquisition module 540 is connected to the third input terminal of the field-programmable gate array 550 for outputting the current power supply voltage of the crystal oscillator module 510.

[0119] It should be noted that the field-programmable gate array (FPGA) 550 acquires first clock data and obtains the target temperature and target voltage based on the first clock data. The FPGA 550 obtains a first instruction based on the target temperature and transmits the first instruction to the temperature regulation module 520. The temperature regulation module 520 adjusts the temperature of the crystal oscillator module 510 based on the first instruction. The FPGA 550 obtains a second instruction based on the target voltage and transmits the second instruction to the voltage regulation module 530. The voltage regulation module 530 adjusts the power supply voltage of the crystal oscillator module 510 based on the second instruction. The acquisition module 540 acquires the current temperature of the crystal oscillator module 510 and transmits the current temperature to the FPGA 550. The acquisition module 540 is also used to acquire the current power supply voltage of the crystal oscillator module 510 and transmit the current power supply voltage to the FPGA 550. When the current temperature is the target temperature and the current power supply voltage is the target voltage, the FPGA 550 acquires the clock signal output by the crystal oscillator module 510.

[0120] This application inputs first clock data into a target model to obtain target temperature and target voltage. Based on the target temperature, the temperature of the crystal oscillator module is adjusted; based on the target voltage, the supply voltage of the crystal oscillator module is adjusted. When the current temperature of the crystal oscillator module is the target temperature and when the current supply voltage of the crystal oscillator module is the target voltage, a clock signal matching the first clock data is obtained. On one hand, compared to conventional active crystal oscillators, the clock signal output by the crystal oscillator module in this application has lower error and lower temperature drift coefficient. On the other hand, compared to known temperature-compensated crystal oscillators, the clock signal output by the crystal oscillator module in this application not only has lower error and lower temperature drift coefficient but also lower cost. Furthermore, this application enables adjustable clock frequency within a preset range, making it applicable in clock switching scenarios.

[0121] In one optional embodiment, the temperature regulation module includes a heating element, and the voltage regulation module includes a voltage regulation circuit. For example, the temperature regulation module includes at least one of a heating element and a cooling element.

[0122] In one alternative embodiment, please refer to Figure 6 The diagram shows a structural block diagram of a data acquisition module 540 provided in an embodiment of this application. The data acquisition module 540 includes a temperature sensor 541, a voltage detection circuit 542, and an analog-to-digital conversion circuit 543.

[0123] The temperature sensor 541 is used to detect the temperature of the crystal oscillator module. The output terminal of the temperature sensor 541 is connected to the first input terminal of the analog-to-digital converter circuit 543. The voltage detection circuit 542 is used to detect the power supply voltage of the crystal oscillator module. The output terminal of the voltage detection circuit 542 is connected to the second input terminal of the analog-to-digital converter circuit 543. The first output terminal of the analog-to-digital converter circuit 543 is connected to the second input terminal of the field-programmable gate array (FPGA) and is used to output the current temperature of the crystal oscillator module. The second output terminal of the analog-to-digital converter circuit 543 is connected to the third input terminal of the FPGA and is used to output the current power supply voltage of the crystal oscillator module.

[0124] It should be noted that the temperature sensor can be placed on the crystal oscillator module or in a nearby location. The temperature sensor is used to measure the temperature of the crystal oscillator module. The voltage detection circuit is used to detect the supply voltage of the crystal oscillator module. The supply voltage of the crystal oscillator module can be detected by a voltage detection instrument, or it can be determined by detecting the current. Specifically, the supply voltage of the crystal oscillator module can be obtained by the relationship between current, resistance, and voltage; no specific limitation is made here.

[0125] The temperature sensor transmits the collected temperature signal to the first input of the analog-to-digital converter (ADC). The ADC performs analog-to-digital conversion on the received temperature signal to obtain the current temperature signal, which is then transmitted to the field-programmable gate array (FPGA) through its first output. Similarly, the voltage detection circuit transmits the collected voltage signal to the second input of the ADC. The ADC performs analog-to-digital conversion on the received voltage signal to obtain the current supply voltage signal, which is then transmitted to the FPGA through its second output. The FPGA makes decisions based on the received current temperature and current supply voltage.

[0126] In one alternative embodiment, please refer to Figure 7 The diagram shows a structural block diagram of the acquisition module 540 provided in the embodiment of this application. The acquisition module 540 also includes a fifth circuit 544 and a sixth circuit 545.

[0127] The input terminal of the fifth circuit 544 is connected to the output terminal of the temperature sensor 541, and the output terminal of the fifth circuit 544 is connected to the first input terminal of the analog-to-digital converter circuit. The fifth circuit 544 is used to amplify and filter the signal output by the temperature sensor 541.

[0128] The input terminal of the sixth circuit 545 is connected to the output terminal of the voltage detection circuit 542, and the output terminal of the sixth circuit 545 is connected to the second input terminal of the analog-to-digital conversion circuit. The sixth circuit 545 is used to amplify and filter the signal output by the voltage detection circuit 542.

[0129] It is understandable that by amplifying and filtering the signal output by the temperature sensor through the fifth circuit, a more accurate current temperature can be obtained. Similarly, by amplifying and filtering the signal output by the voltage detection circuit through the sixth circuit, a more accurate current supply voltage can be obtained. This enables the field-programmable gate array to make more accurate decisions based on more accurate data and obtain a more accurate clock signal.

[0130] For an example, please refer to Figure 8 The diagram shows a structural block diagram of a clock generation system 500, which includes a crystal oscillator module 510, a temperature regulation module 520, a voltage regulation module 530, an acquisition module 540, and the aforementioned field programmable gate array 550.

[0131] The temperature control module 520 includes a temperature control switch and a heating element. The input terminal of the temperature control switch is connected to the first output terminal of the field programmable gate array 550, and the output terminal of the temperature control switch is connected to the heating element. The temperature control switch is used to receive the first instruction transmitted by the field programmable gate array 550. The temperature control switch can control the opening and closing of the heating element, and can also control the output power of the heating element. The crystal oscillator module 510 can be heated by increasing the power of the heating element, and the crystal oscillator module 510 can be cooled by decreasing the power of the heating element.

[0132] The voltage regulation module 530 includes a power output circuit, a voltage control circuit, and a current monitoring circuit. The power output circuit provides power, the voltage control circuit regulates the power supply voltage, and the current monitoring circuit monitors whether the load current of the power supply is within a safe range. If the current value is not within a safe range, the power supply is stopped or the load current of the power supply is adjusted to a safe range. The voltage control circuit adjusts the power supply voltage based on the received second instruction, that is, adjusts the power supply voltage of the crystal oscillator module 510. The power supply voltage of the crystal oscillator module 510 can be boosted or bucked by controlling the current.

[0133] The acquisition module 540 includes a temperature acquisition circuit, a voltage acquisition circuit, a first analog conditioning circuit, a second analog conditioning circuit, and an analog-to-digital converter (ADC) 543. The temperature acquisition circuit acquires a first temperature signal from the crystal oscillator module 510 and limits or filters the acquired first temperature signal to obtain a second temperature signal. The temperature acquisition circuit transmits the second temperature signal to the first analog conditioning circuit, which amplifies and denoises the second temperature signal to obtain a third temperature signal. This third temperature signal is then transmitted to the ADC, which converts the third temperature signal into a digital fourth temperature signal and transmits it (the current temperature) to the field-programmable gate array (FPGA) 550. The FPGA 550 generates a new first instruction based on the fourth temperature signal and transmits it to the temperature adjustment module 520. The temperature adjustment module 520 adjusts the temperature of the crystal oscillator module 510 based on the new first instruction, and then acquires the temperature signal from the crystal oscillator module 510 based on the temperature acquisition circuit, along with subsequent processing steps. Therefore, it can be seen that... Figure 8 The field-programmable gate array 550, temperature regulation module 520, and acquisition module 540, along with the temperature acquisition circuit, first analog conditioning circuit, and analog-to-digital conversion circuit, form a temperature feedback control loop that can adjust the temperature of the crystal oscillator module 510 to the target temperature and stabilize the temperature of the crystal oscillator module 510 at the target temperature.

[0134] Similarly, the voltage acquisition circuit acquires the first supply voltage signal of the crystal oscillator module 510, and limits or filters the acquired first supply voltage signal to obtain the second supply voltage signal. The voltage acquisition circuit transmits the second supply voltage signal to the second analog conditioning circuit. The second analog conditioning circuit amplifies and denoises the second supply voltage signal to obtain the third supply voltage signal, and transmits the third supply voltage signal to the analog-to-digital converter circuit. The analog-to-digital converter circuit converts the third supply voltage signal into a digital fourth supply voltage signal and transmits the fourth supply voltage signal (current voltage) to the field-programmable gate array 550. The field-programmable gate array 550 obtains a new second instruction based on the fourth supply voltage signal and transmits it to the voltage regulation module 530. The voltage regulation module 530 adjusts the supply voltage of the crystal oscillator module 510 based on the new second instruction, and then acquires the supply voltage signal of the crystal oscillator module 510 based on the voltage acquisition circuit and subsequent processing steps. Therefore, it can be seen that... Figure 8 The field-programmable gate array 550, voltage regulation module 530, and voltage acquisition circuit, second analog conditioning circuit, and analog-to-digital conversion circuit in the acquisition module 540 constitute a voltage feedback control loop, which can adjust the power supply voltage of the crystal oscillator module 510 to the target voltage and stabilize the power supply voltage of the crystal oscillator module 510 at the target voltage.

[0135] The field-programmable gate array 550 includes a phase-locked loop (PLL) module, also known as a PLL module. The PLL is used to receive the clock signal output by the crystal oscillator module 510. The PLL can obtain the error between the clock frequency and the standard frequency based on the clock signal output by the crystal oscillator module 510. It can also obtain more clock frequencies. For example, if the clock frequency output by the crystal oscillator module 510 is 25MHz, the clock frequency can be extended to 1Hz-200MHz through the PLL module.

[0136] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working process of the above-described device and module can be referred to the corresponding process in the foregoing method embodiments, and will not be repeated here.

[0137] In the several embodiments provided in this application, the coupling between modules can be electrical, mechanical, or other forms of coupling.

[0138] Furthermore, the functional modules in the various embodiments of this application can be integrated into one processing module, or each module can exist physically separately, or two or more modules can be integrated into one module. The integrated modules described above can be implemented in hardware or as software functional modules.

[0139] In this embodiment, the modules / units included in the various devices and products described in the above embodiments can be software modules / units, hardware modules / units, or a combination of both.

[0140] For example, for various devices and products applied to or integrated into a chip, each module / unit can be implemented using hardware methods such as circuits, or at least some modules / units can be implemented using software programs that run on a processor integrated within the chip, while the remaining (if any) modules / units can be implemented using hardware methods such as circuits; for various devices and products applied to or integrated into a chip module, each module / unit can be implemented using hardware methods such as circuits, and different modules / units can be located in the same component (e.g., chip, circuit module, etc.) or different components of the chip module, or at least some modules / units... It can be implemented using software programs that run on the processor integrated within the chip module. The remaining modules / units (if any) can be implemented using hardware methods such as circuits. For various devices and products applied to or integrated into the terminal, each of its modules / units can be implemented using hardware methods such as circuits. Different modules / units can be located in the same component (e.g., chip, circuit module, etc.) or different components within the terminal. Alternatively, at least some modules / units can be implemented using software programs that run on the processor integrated within the terminal, while the remaining modules / units (if any) can be implemented using hardware methods such as circuits.

[0141] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application.

Claims

1. A clock generation method, characterized in that, The method, applied to a field-programmable gate array (FPGA), wherein the FPGA is connected to a crystal oscillator module, a temperature regulation module, and a voltage regulation module, includes: Acquire the first clock data; The first clock data is input into a pre-acquired target model to obtain the target temperature and target voltage. The target model is obtained by training a preset prediction model based on a dataset. The dataset includes the temperature, power supply voltage and clock data output by the crystal oscillator module that have a corresponding relationship. A first instruction is determined based on the target temperature, and the first instruction is transmitted to the temperature regulation module, triggering the temperature regulation module to adjust the temperature of the crystal oscillator module based on the first instruction. A second instruction is determined based on the target voltage, and the second instruction is transmitted to the voltage regulation module, triggering the voltage regulation module to adjust the power supply voltage of the crystal oscillator module based on the second instruction; Obtain the current temperature and current power supply voltage of the crystal oscillator module; When the current temperature is the target temperature and the current power supply voltage is the target voltage, the clock signal output by the crystal oscillator module is acquired.

2. The method according to claim 1, characterized in that, Also includes: If the current temperature is not the target temperature, a new first instruction is determined based on the current temperature and the target temperature, and the process returns to transmit the first instruction to the temperature adjustment module and subsequent operations.

3. The method according to claim 2, characterized in that, The step of determining a new first instruction based on the current temperature and the target temperature includes: Based on the difference between the current temperature and the target temperature and the first instruction, a new first instruction is obtained.

4. The method according to claim 1, characterized in that, Also includes: If the current supply voltage is not the target voltage, a new second instruction is determined based on the current supply voltage and the target voltage, and the process returns to transmit the second instruction to the voltage regulation module and subsequent operations.

5. The method according to claim 4, characterized in that, The step of determining a new second instruction based on the current supply voltage and the target voltage includes: Based on the difference between the current supply voltage and the target voltage, and the second instruction, a new second instruction is obtained.

6. The method according to claim 1, characterized in that, Before acquiring the first clock data, the process also includes: Collect a dataset, which includes multiple different data groups. Each data group includes the second clock data output by the crystal oscillator module under the test scenario, the test temperature corresponding to the second clock data, and the test power supply voltage. The dataset is input into a preset prediction model for training, and the parameters of the prediction model are updated to obtain the target model.

7. The method according to claim 6, characterized in that, The step of inputting the dataset into a preset prediction model for training, updating the parameters of the prediction model, and obtaining the target model includes: The prediction model is input into multiple second clock data from the dataset to obtain the predicted temperature and predicted voltage corresponding to each second clock data. The loss function value is determined based on the loss function, the predicted temperature, predicted voltage, test temperature, and test supply voltage corresponding to each of the second clock data. If the loss function value does not meet the preset conditions, backpropagation is performed to update the parameters of the prediction model, obtain a new prediction model, and return to execute the steps of inputting multiple second clock data from the dataset into the prediction model to obtain the predicted temperature and predicted voltage corresponding to each second clock data, as well as subsequent steps, until the loss function value meets the preset conditions, and the new prediction model is used as the target model.

8. The method according to claim 7, characterized in that, The loss function is the mean squared error function.

9. A field-programmable gate array, characterized in that, Applied to a clock generation system, the clock generation system further includes a crystal oscillator module, a temperature regulation module, and a voltage regulation module, and the field-programmable gate array is configured as follows: Acquire the first clock data; The first clock data is input into a pre-acquired target model to obtain the target temperature and target voltage. The target model is obtained by training a preset prediction model based on a dataset. The dataset includes the temperature, power supply voltage and clock data output by the crystal oscillator module that have a corresponding relationship. A first instruction is determined based on the target temperature, and the first instruction is transmitted to the temperature regulation module, triggering the temperature regulation module to adjust the temperature of the crystal oscillator module based on the first instruction. A second instruction is determined based on the target voltage, and the second instruction is transmitted to the voltage regulation module, triggering the voltage regulation module to adjust the power supply voltage of the crystal oscillator module based on the second instruction; Obtain the current temperature and current power supply voltage of the crystal oscillator module; When the current temperature is the target temperature and the current power supply voltage is the target voltage, the clock signal output by the crystal oscillator module is acquired.

10. A clock generation system, characterized in that, include: The crystal oscillator module, temperature regulation module, voltage regulation module, acquisition module, and the field-programmable gate array as described in claim 9; The first output terminal of the field-programmable gate array is connected to the input terminal of the temperature regulation module for outputting a first instruction, and the second output terminal of the field-programmable gate array is connected to the input terminal of the voltage regulation module for outputting a second instruction. The output terminal of the crystal oscillator module is connected to the first input terminal of the field-programmable gate array (FPGA) for outputting a clock signal. The first output terminal of the acquisition module is connected to the second input terminal of the FPGA for outputting the current temperature of the crystal oscillator module. The second output terminal of the acquisition module is connected to the third input terminal of the FPGA for outputting the current power supply voltage of the crystal oscillator module.

11. The clock generation system according to claim 10, characterized in that, The temperature regulation module includes a heating element, and the voltage regulation module includes a voltage regulation circuit.

12. The clock generation system according to claim 10, characterized in that, The acquisition module includes a temperature sensor, a voltage detection circuit, and an analog-to-digital conversion circuit. The temperature sensor is used to detect the temperature of the crystal oscillator module. The output terminal of the temperature sensor is connected to the first input terminal of the analog-to-digital converter circuit. The voltage detection circuit is used to detect the power supply voltage of the crystal oscillator module. The output terminal of the voltage detection circuit is connected to the second input terminal of the analog-to-digital converter circuit. The first output terminal of the analog-to-digital converter circuit is connected to the second input terminal of the field-programmable gate array (FPGA) to output the current temperature of the crystal oscillator module. The second output terminal of the analog-to-digital converter circuit is connected to the third input terminal of the FPGA to output the current power supply voltage of the crystal oscillator module.

13. The clock generation system according to claim 12, characterized in that: The acquisition module also includes a fifth circuit and a sixth circuit; The input terminal of the fifth circuit is connected to the output terminal of the temperature sensor, and the output terminal of the fifth circuit is connected to the first input terminal of the analog-to-digital converter circuit. The fifth circuit is used to amplify and filter the signal output by the temperature sensor. The input terminal of the sixth circuit is connected to the output terminal of the voltage detection circuit, and the output terminal of the sixth circuit is connected to the second input terminal of the analog-to-digital converter circuit. The sixth circuit is used to amplify and filter the signal output by the voltage detection circuit.

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