P2L mapping table storage method, garbage collection method, related device and medium

Abstract

The invention provides a P2L mapping table storage method, a garbage collection method, a related device and a medium. The method comprises the following steps: storing a P2L mapping table corresponding to each page of data written into a physical storage group in a data cache region, wherein the P2L mapping table records a conversion relationship from a physical address to a logic address of each page of data in the corresponding physical storage group; after only one data storage fragment in the physical storage group is not written with data, the P2L mapping table corresponding to each page of data in the physical storage group is stored from the data cache region to the data storage fragment in the physical storage group for persistent storage, and the data cache region is emptied, so that the time overhead for calculating the storage position of the P2L mapping table is reduced; and the storage space utilization rate of the NAND flash memory chip is improved.

Description

Technical Field

[0001] This disclosure belongs to the field of memory technology, specifically relating to a method for storing P2L mapping tables, a garbage collection method, related devices and media. Background Technology

[0002] To quickly identify the logical block address (LBA) of data during power outages or garbage collection, a solid-state drive (SSD) maintains a physical address to logical address (P2L) mapping table and stores it in the storage media module. During data writing to a superblock, the controller writes data to the storage media module in units of data storage fragments (e.g., 4 KB in size). The P2L mapping table corresponding to each page of data written is stored in the SSD's temporary storage area (e.g., a buffer, 4 KB in size). After writing a specific range of data into the superblock, the P2L mapping table corresponding to all written data is persistently stored from the temporary storage area into the data storage fragment at the end of that specific range of data in the superblock. In recent years, with the continuous development of NAND flash memory technology, the number of planes in NAND flash memory chips (dies) has been increasing, and even NAND flash memory chips with a non-power of 2 number of planes have emerged. However, for these NAND flash memory chips with a non-power of 2 number of planes, if the P2L mapping table is stored in the storage medium module according to the current storage scheme, it will increase the time overhead of calculating the storage location of the P2L mapping table, reduce the storage space utilization of the temporary storage area, and thus reduce the storage space utilization of the NAND flash memory chip. Summary of the Invention

[0003] In view of the above problems, this disclosure provides a method for storing P2L mapping tables, a garbage collection method, related apparatus and media, aiming to reduce the time overhead of calculating the storage location of P2L mapping tables and improve the storage space utilization of NAND flash memory chips.

[0004] According to a first aspect of this disclosure, a method for storing a P2L mapping table for a solid-state drive is provided. The solid-state drive includes a data cache and a storage medium module. The superblock of the storage medium module includes multiple planes, each plane including multiple physical storage groups. Each physical storage group includes a predetermined number of pages, and each page includes multiple data storage segments. The storage method includes:

[0005] The P2L mapping table corresponding to each page of data written to the physical storage group is stored in the data cache area, wherein the P2L mapping table records the conversion relationship between the physical address and the logical address of each page of data in the physical storage group.

[0006] After only one data storage segment remains unwritten in the physical storage group, the P2L mapping table corresponding to each page of data in the physical storage group is stored from the data cache to the data storage segment in the physical storage group for persistent storage, and the data cache is cleared.

[0007] Optionally, the storage space size of the data storage segment is equal to the storage space size of the data cache area.

[0008] Optionally, the storage space size of the data storage segment is equal to the product of the number of pages included in the physical storage group, the number of data storage segments included in each page, and the size of the P2L mapping table entry corresponding to the data stored in each data storage segment.

[0009] Optionally, before storing the P2L mapping table corresponding to each page of data written to the physical storage group in the data cache, the storage method further includes:

[0010] The number of pages included in the physical storage group is determined based on the storage space size of the data storage segment, the number of data storage segments included in each page, and the size of the P2L mapping table entries corresponding to the data stored in each data storage segment.

[0011] Optionally, each data storage segment has a storage space size of 4 KB, and the size of the P2L mapping table entry corresponding to the data stored in each data storage segment is 4 bytes.

[0012] According to a second aspect of this disclosure, a storage device for a P2L mapping table for a solid-state drive is provided, the solid-state drive including a data cache and a storage medium module, the storage medium module having a superblock comprising multiple planes, each plane comprising multiple physical storage groups, each physical storage group comprising a predetermined number of pages, each page comprising multiple data storage segments, the storage device comprising:

[0013] The P2L mapping table cache unit is used to store the P2L mapping table corresponding to each page of data written to the physical storage group in the data cache area, wherein the P2L mapping table records the conversion relationship between the physical address and the logical address of each page of data in the corresponding physical storage group.

[0014] The P2L mapping table migration unit is used to persistently store the P2L mapping table corresponding to each page of data in the physical storage group from the data cache to the data storage segment in the physical storage group after only one data storage segment remains unwritten in the physical storage group, and to clear the data cache.

[0015] According to a third aspect of this disclosure, a storage medium module for a solid-state drive is provided, the solid-state drive including a data cache and the storage medium module, the storage medium module comprising:

[0016] A superblock comprises multiple planes, each plane comprising multiple physical storage groups, each physical storage group comprising a predetermined number of pages, and each page comprising multiple data storage segments.

[0017] Specifically, the P2L mapping table corresponding to each page of data written to the physical storage group is stored in the data cache area, wherein the P2L mapping table records the conversion relationship between the physical address and logical address of each page of data in the physical storage group; after only one data storage segment remains unwritten in the physical storage group, the P2L mapping table corresponding to each page of data in the physical storage group is stored from the data cache area to the data storage segment in the physical storage group for persistent storage, and the data cache area is cleared.

[0018] According to a fourth aspect of this disclosure, a solid-state drive is provided, comprising:

[0019] The storage medium module has a superblock comprising multiple planes, each plane comprising multiple physical storage groups, each physical storage group comprising a predetermined number of pages, and each page comprising multiple data storage segments.

[0020] A controller, comprising a data cache and a storage device as described above, the storage device being configured to perform the method described in any of the preceding claims to persistently store the P2L mapping table corresponding to each page of data in the physical storage group from the data cache into the physical storage group.

[0021] According to a fifth aspect of this disclosure, a garbage collection method for a solid-state drive is provided, the solid-state drive including a storage medium module as described above, comprising:

[0022] Check whether the physical storage group in the superblock of the storage medium module stores the P2L mapping table corresponding to each page of the physical storage group;

[0023] If so, the corresponding P2L mapping table is compared with the L2P mapping table corresponding to each page of data in the physical storage group, and the valid data storage segment is determined based on the comparison result.

[0024] Move the data from the valid data storage segment to the free superblock.

[0025] According to a sixth aspect of this disclosure, a waste disposal apparatus for a solid-state drive is provided, the solid-state drive including a storage medium module as described above, comprising:

[0026] The checking unit is used to check whether the physical storage group in the superblock of the storage medium module stores the P2L mapping table corresponding to each page of the physical storage group;

[0027] The comparison unit is used to compare the corresponding P2L mapping table with the L2P mapping table corresponding to each page of data in the physical storage group if it exists, and to determine the valid data storage segment based on the comparison result.

[0028] A data migration unit is used to migrate data from the valid data storage segment to an idle superblock.

[0029] According to a seventh aspect of this disclosure, a storage medium is provided that stores a computer program or instructions, which, when executed by a processor, implement the steps of the method described in any of the preceding claims.

[0030] This disclosure brings the following beneficial effects:

[0031] The storage method disclosed herein stores the P2L mapping table corresponding to each page of data written to the physical storage group in a data cache. After only one data storage segment remains unwritten in the physical storage group, the P2L mapping table corresponding to each page of data in the physical storage group is persistently stored from the data cache into that data storage segment in the physical storage group, and the data cache is then cleared. The P2L mapping table records the physical address to logical address translation relationship of each page of data in the corresponding physical storage group. The P2L mapping tables of each plane in the flash memory chip are independent of each other. Each plane's P2L mapping table corresponding to each physical storage group only stores the P2L mapping table entries corresponding to the data stored in that physical storage group. For storage media modules in the flash memory chip with a number of planes that are not powers of 2 and a number that are powers of 2, the storage space of the data cache can be fully utilized, thereby fully utilizing the storage space of the data storage segment storing the P2L mapping table in the flash memory chip. Therefore, the storage space utilization of the data cache is improved, and consequently, the storage space utilization of the flash memory chip is improved. The calculation of the storage location of the P2L mapping table in flash memory chips only involves pages and data storage segments and avoids division operations. It only requires shift operations, which reduces the time overhead of calculating the storage location of the P2L mapping table and improves the calculation efficiency of the storage location of the P2L mapping table.

[0032] Other features and advantages of this disclosure will be set forth in the following description and will be apparent in part from the description or may be learned by practicing the disclosure. The objects and other advantages of this disclosure are realized and obtained through the structures particularly pointed out in the description and the drawings.

[0033] To make the above-mentioned objects, features and advantages of this disclosure more apparent and understandable, preferred embodiments are described below in detail with reference to the accompanying drawings. Attached Figure Description

[0034] The above and other objects, features and advantages of this disclosure will become clearer from the following description of embodiments with reference to the accompanying drawings, in which:

[0035] Figure 1 This diagram illustrates the structure of a computer system according to an embodiment of the present disclosure;

[0036] Figure 2 A schematic diagram of the storage scheme for P2L mapping tables in related technologies is shown;

[0037] Figure 3 A flowchart illustrating a method for storing a P2L mapping table for a solid-state drive according to an embodiment of the present disclosure is shown.

[0038] Figure 4 A schematic diagram illustrating a storage scheme for a P2L mapping table according to an embodiment of the present disclosure is shown.

[0039] Figure 5 A schematic flowchart of a waste collection method for a solid-state drive according to an embodiment of the present disclosure is shown.

[0040] Figure 6 A schematic diagram of a storage device with a P2L mapping table for a solid-state drive provided according to an embodiment of the present disclosure is shown.

[0041] Figure 7 A schematic diagram of a waste recycling apparatus for a solid-state drive according to an embodiment of the present disclosure is shown;

[0042] Figure 8 A schematic diagram of the structure of an electronic device provided according to an embodiment of the present disclosure is shown. Detailed Implementation

[0043] Various embodiments of the present disclosure will now be described in more detail with reference to the accompanying drawings. In the various drawings, the same elements are indicated by the same or similar reference numerals. For clarity, the various portions in the drawings are not drawn to scale.

[0044] The following terms are used in this document:

[0045] A solid-state drive (SSD) is a storage device that primarily consists of a controller and storage media modules (such as NAND flash memory chips). The controller is responsible for managing and controlling the operation of the storage media modules, including data reading, programming, and erasing.

[0046] NAND flash memory is a type of non-volatile memory. In NAND flash memory, the gate structure of a memory cell includes a tunneling dielectric layer, a floating gate, a gate dielectric layer, and a control gate stacked sequentially. By applying a read voltage to the control gate, the amount of charge in the floating gate can be obtained using the threshold voltage of the memory cell to achieve reading. In the power-off state of the flash memory, the charge in the floating gate is maintained due to the insulating effect of the tunneling dielectric layer.

[0047] The Flash Access Agent (FAA) is the physical address of a physical storage cell in the flash memory system. It is used to locate and access data within the flash memory system and has a 32-bit data structure. This data structure consists of five parts: FAA.block, FAA.page, FAA.die, FAA.plane, and FAA.frag. These five parts are arranged from most significant bit to least significant bit, and each part has a specific bit field that represents a specific location in the flash memory system. FAA.block is the block bit field value in the FAA, FAA.page is the page bit field value, FAA.die is the die bit field value, FAA.plane is the plane bit field value, and FAA.frag is the frag bit field value.

[0048] Figure 1 A schematic diagram of the structure of a computer system according to an embodiment of the present disclosure is shown. Figure 1As shown, the computer system 100 provided in this embodiment includes a computer device 110 and a solid-state drive 120, wherein the solid-state drive 120 can be understood as an external memory of the computer device 110. The computer device 110 includes a host 111. The solid-state drive 120 may include a controller 121 and a storage medium module 122. The controller 121 includes firmware (FW) 124 and a data buffer 123. The data buffer 123 is a temporary storage area in the solid-state drive 120. The storage medium module 122 may include a plurality of NAND flash memory chips (dies), for example, Die0 to DieR, where R is a positive integer. Each flash memory chip may include a plurality of planes, for example, Plane0 to PlaneL, where L is a positive integer. Each plane in each flash memory chip can operate concurrently. Each plane may include a plurality of blocks, such as Figure 1 The diagram shows Blocks 0 to M, where M is a positive integer. Blocks with the same block number in each plane of each flash memory chip form a super block (SPB). For example, SPB0 includes Blocks 0 in Planes 0 to Planes L from Die0 to DieR. Each block may include multiple pages (not shown). Each page may include multiple data storage fragments (not shown). Each data storage fragment can store a predetermined amount of data (e.g., 4 KB).

[0049] In some embodiments, in the field of data access, there is a distinction between logical pages and physical pages. The page structure on the storage medium module 122 is a physical page, and a page of stored data corresponds to a logical page. The mapping relationship between logical pages and physical pages can be recorded in an L2P (Logical address to Physical address) mapping table (used to identify the translation table from logical address to physical address) and / or the aforementioned P2L mapping table. In some embodiments, the P2L mapping table is stored in an appropriate location in the storage medium module 110 to describe the mapping relationship between the physical address and logical address of at least a portion of the data stored therein. In some embodiments, the storage medium module 122 is configured to use pages as the smallest read / write unit and blocks as the smallest erase unit. In some embodiments, an operating system may run on the computer device 110, which can be understood as the host 111 of the solid-state drive 120. The host 111 can send instructions (including read / write commands and Trim commands) to the firmware 124. When the host 111 sends a write command to the firmware 124, the firmware 124 can write data to the storage medium module 122 according to the write command.

[0050] It should be noted that, for ease of description, Figure 1 Taking the computer device 110 as an example, which does not include the solid-state drive 120, the solid-state drive 120 can also be included as part of the computer device 110.

[0051] Figure 2 This diagram illustrates a storage scheme for P2L mapping tables in related technologies. Specifically, Figure 2 The storage scheme of the P2L mapping table in a superblock (e.g., superblock 0) of storage medium module 122 is shown, such as... Figure 2 As shown, SPB0 includes Block0 from Plane0 to PlaneL within Die0 to DieR. Each block includes Page0 to PageN, where N is a positive integer. Each page may include multiple data storage segments, for example, Frag0 to FragT, where T is a positive integer. Each data storage segment can store 4 KB of data. The size of the P2L mapping table entry corresponding to the data stored in each data storage segment is 4 bytes.

[0052] In some embodiments, the number of planes included in each flash memory chip is a power of 2. For example, in some embodiments, the number of flash memory chips, the number of planes in each flash memory chip, and the number of data storage segments in each page are all set to 4. Figure 2 The size of the P2L mapping table entry corresponding to the data stored in a superpage is 4*4*4*4=256 bytes. During the data writing process to SPB0, firmware 124 writes data line by line to SPB0 in units of data storage segments. The P2L mapping table corresponding to the data of each written data storage segment is stored in data buffer 123 (data buffer 123 has a storage space of 4 KB). After writing 16 superpages (SPPs) of data into this superblock, and only the last data storage segment of the 16th superpage remains unwritten, the P2L mapping tables corresponding to all written data are stored from data buffer 123 into the last data storage segment of the 16th superpage in this superblock for persistent storage, and then data buffer 123 is cleared. Figure 2As shown, Frag3 within Page 15 of Plane 3 in Die 3 stores the P2L mapping table corresponding to all written data from SPP0 to SPP15. Similarly, Frag3 within Page 31 of Plane 3 in Die 3 stores the P2L mapping table corresponding to all written data from SPP16 to SPP31, and so on. It can be understood that the size of each P2L mapping table entry corresponding to the data stored in the 16 superpages is 4*4*4*4*16=4KB. With this P2L mapping table storage scheme, the P2L mapping table stored in the flash memory chip can fully utilize the storage space of the data cache 123, and also fully utilize the storage space of the data storage segments in the flash memory chip.

[0053] In some embodiments, such as Figure 2 As shown, for a flash memory chip containing a storage medium module 122 with a plane number that is a power of 2, the storage location of the P2L mapping table in the flash memory chip can be determined by accumulating the number of Frags in the "row" P2L base FAA. Once a certain number of Frags are accumulated, that number represents the storage location of the P2L mapping table. The specific calculation method is shown in the following formula.

[0054] (1)

[0055] Wherein, P2L offset is the storage location of the P2L mapping table in the flash memory chip, P2L base is the starting storage location of the storage medium module 122, and offset is the corresponding offset of the last data storage segment of the 16th superpage relative to P2L base.

[0056] In some embodiments, the number of planes included in each flash memory chip is a power other than 2. For example, the YMTC-X3-9070 NAND flash memory chip has 6 planes. Another example is the MICRON B58R NAND flash memory chip, which also has 6 planes. In some embodiments, taking a setting of 16 flash memory chips, 6 planes per chip, and 4 data storage segments per page as an example... Figure 2The size of the P2L mapping table entry corresponding to the data stored in a superpage is 4*4*6*16=1.5 KB. During the data writing process to SPB0, firmware 124 writes data line by line to SPB0 in units of data storage segments. The P2L mapping table corresponding to the data of each written data storage segment is stored in data buffer 123 (data buffer 123 has a storage space size of 4 KB). After writing data for two superpages (SPPs) in this superblock, and only the last data storage segment of the second superpage remains unwritten, the P2L mapping tables corresponding to all written data are stored from data buffer 123 to the last data storage segment of the second superpage in this superblock for persistent storage, and then data buffer 123 is cleared. Figure 2 As shown, in Die16, Frag3 of Page 1 in Plane 5 stores the P2L mapping table corresponding to all written data from SPP0 to SPP1. Similarly, Frag3 of Page 3 in Plane 5 stores the P2L mapping table corresponding to all written data from SPP2 to SPP3, and so on. It can be understood that the size of each P2L mapping table entry corresponding to the data stored in the two superpages is 4*4*6*16*2=3 KB. According to this P2L mapping table storage scheme, 1 KB of storage space is wasted in the data buffer 123, and 1 KB of storage space is wasted in the data storage segment of the flash memory chip storing the P2L mapping table. Therefore, according to the P2L mapping table storage scheme in related technologies, the storage space of the data buffer 123 is wasted, which in turn leads to a waste of storage space in the flash memory chip.

[0057] In some embodiments, such as Figure 2 As shown, for a flash memory chip containing a storage medium module 122 with a non-power of 2 number of planes, since the write (program) operations on data storage segments are performed sequentially, the calculation method for the storage location of the P2L mapping table in the flash memory chip is as follows:

[0058] (2)

[0059] Wherein, P2L offset is the storage location of the P2L mapping table in the flash memory chip, and program physicaloffset is the corresponding offset of the write (program) operation that writes the P2L mapping table to the flash memory chip.

[0060] In some embodiments, such as Figure 2As shown, for a flash memory chip containing a storage medium module 122 with a non-power of 2 number of planes, the order of read operations on data storage segments is uncertain. The storage location of the P2L mapping table in the flash memory chip needs to be calculated according to the FAA. The calculation method for the storage location of the P2L mapping table in the flash memory chip is shown in the following formula.

[0061] (3)

[0062] Where FAA.page is the page bit field value in FAA, FAA.die is the die bit field value in FAA, FAA.plane is the plane bit field value in FAA, FAA.frag is the frag bit field value in FAA, N1 = FRAG_MAX * PLANE_MAX * DIE_MAX, M1 = FRAG_MAX * PLANE_MAX, P = FRAG_MAX, Q = P2L Super Page number.

[0063] It is understandable that when the number of planes included in a flash memory chip is not a power of 2 (e.g., 6), the calculation formula for the storage location of the P2L mapping table in the flash memory chip in the related technology becomes quite complex. Since CPU division is very slow, if each FRAG is calculated according to formula (3), then when the number of planes included in the flash memory chip is 6, garbage collection of a die block will require an additional (2784 * 4 * 6) = 66816 division operations. For storage medium module 122 with a number of planes included in the flash memory chip that is not a power of 2, using the storage scheme of the P2L mapping table in the related technology increases the time overhead for calculating the P2L mapping table location.

[0064] Therefore, it is necessary to provide a storage scheme for the P2L mapping table provided in the embodiments of this disclosure to reduce the time overhead of calculating the P2L mapping table location and improve the storage space utilization of the flash memory chip.

[0065] Figure 3 This diagram illustrates a flowchart of a method for storing a P2L mapping table for a solid-state drive according to an embodiment of the present disclosure. The storage method of this embodiment can be... Figure 1 The controller 121 in the middle executes. For example... Figure 3 As shown, the storage method in this embodiment may include:

[0066] In step S310, the P2L mapping table corresponding to each page of data written to the physical storage group is stored in the data cache area, wherein the P2L mapping table records the conversion relationship between the physical address and logical address of each page of data in the corresponding physical storage group.

[0067] Refer again Figure 1 The superblock (e.g., SPB0) of the storage medium module 122 in the solid-state drive 120 includes multiple planes (e.g., Plane0 to PlaneL in Die0 to DieR). Each plane may include multiple physical storage groups (not shown), each physical storage group may include a predetermined number of pages (not shown), and each page may include multiple data storage segments (not shown). Each data storage segment is capable of storing a predetermined amount of data (e.g., 4 KB). The size of the P2L mapping table entry corresponding to the data stored in each data storage segment is 4 bytes. Figure 4 This diagram illustrates a storage scheme for a P2L mapping table according to an embodiment of the present disclosure. Specifically, Figure 4 The storage scheme of the P2L mapping table in a superblock (e.g., superblock 0) of storage medium module 122 is shown, such as... Figure 4 As shown, SPB0 includes Plane0 to PlaneL from Die0 to DieR. Each plane may include multiple physical storage groups 400, and each physical storage group 400 includes a predetermined number of pages. Each page may include Frag0 to FragT. In some embodiments, the storage space size of a data storage segment is equal to the storage space size of the data cache 123. In some embodiments, the storage space size of a data storage segment is equal to the product of the number of pages included in the physical storage group 400, the number of data storage segments included in each page, and the size of the P2L mapping table entry corresponding to the data stored in each data storage segment.

[0068] In some embodiments, before step S310, the number of pages included in the physical storage group 400 can be determined based on the storage space size of the data storage segments, the number of data storage segments included in each page, and the size of the P2L mapping table entry corresponding to the data stored in each data storage segment. In one example, taking a page in the plane with 4 data storage segments as an example, the storage space size of the data storage segments and the storage space size of the data cache 123 are both equal to 4 KB. The size of the P2L mapping table entry corresponding to the data stored in each data storage segment is 4 bytes. Therefore, each physical storage group 400 includes 256 pages.

[0069] In some embodiments, during the data writing process to the superblock (e.g., superblock 0), firmware 124 writes data to SPB0 in units of physical storage groups 400, and stores the P2L mapping table corresponding to the data written to each data storage segment in the physical storage group 400 in the data buffer 123. It is understood that the P2L mapping table corresponds to the physical storage group 400. The P2L mapping table records the physical address to logical address conversion relationship of each page data in the corresponding physical storage group 400. For example, assuming each physical storage group 400 includes 256 pages, each page includes 4 data storage segments, and the size of the P2L mapping table entry corresponding to the data stored in each data storage segment is 4 bytes, and the physical storage group 400 includes Pages 0 to 255 in Plane 0 of Die 0, the P2L mapping table corresponding to the data written to each data storage segment in Plane 0 of Die 0 is stored in the data buffer 123.

[0070] In step S320, after only one data storage segment remains unwritten in the physical storage group, the P2L mapping table corresponding to each page of data in the physical storage group is stored from the data cache to the data storage segment in the physical storage group for persistent storage, and the data cache is cleared.

[0071] In some embodiments, after only one data storage segment remains unwritten in the physical storage group 400 of the superblock (e.g., superblock 0), the P2L mapping table corresponding to each page of data in the physical storage group 400 is stored from the data cache 123 to the data storage segment in the physical storage group 400 for persistent storage, and the data cache 123 is cleared. For example, assuming each physical storage group 400 includes 256 pages, each page includes 4 data storage segments, and the size of the P2L mapping table entry corresponding to the data stored in each data storage segment is 4 bytes, and the physical storage group 400 includes Page 0 to Page 255 in Plane 0 of Die 0, after only Frag3 in Page 255 of Plane 0 of Die 0 remains unwritten in the physical storage group 400, the P2L mapping table corresponding to each page of data in the physical storage group 400 is stored from the data cache 123 to Frag3 in Page 255 of Plane 0 of Die 0 for persistent storage, and the data cache 123 is cleared. And so on. It can be understood that the size of the P2L mapping table entries corresponding to the data stored in 256 pages is 4*4*256=4 KB. According to the P2L mapping table storage scheme provided in this embodiment, for storage medium modules 122 in the flash memory chip with a non-power of 2 and a power of 2 number of planes, the storage space of the data buffer 123 can be fully utilized, thereby fully utilizing the storage space of the data storage segments storing the P2L mapping table in the flash memory chip. Therefore, the storage space utilization rate of the data buffer 123 is improved, and consequently, the storage space utilization rate of the flash memory chip is improved.

[0072] In some embodiments, such as Figure 4 As shown, taking a storage medium module 122 with 4 flash memory chips, 6 planes in each flash memory chip, 256 pages in each physical storage group 400 in the plane, 4 data storage segments in each page, and 4 bytes in the P2L mapping table corresponding to the data stored in each data storage segment as an example, the calculation method for the storage location of the P2L mapping table in the flash memory chip is as follows for a storage medium module 122 with a number of planes that are not powers of 2 and are powers of 2.

[0073] (4)

[0074] Wherein, P2L offset is the storage location of the P2L mapping table in the flash memory chip, P2L base is the starting storage location of the storage medium module 122, FAA.page is the page bit field value in FAA, and FAA.frag is the frag bit field value in FAA.

[0075] It is understood that the P2L mapping tables of each plane in the flash memory chip are independent of each other. The P2L mapping table corresponding to each physical storage group 400 in each plane only stores the P2L mapping table entries corresponding to the data stored in that physical storage group 400. As can be seen from formula (4), the calculation method of the storage location of the P2L mapping table in the flash memory chip in this embodiment only involves pages and data storage segments and avoids division operations. Only shift operations are needed. The calculation method of the storage location of the P2L mapping table in this embodiment is simpler and can improve the calculation efficiency of the storage location of the P2L mapping table. Because the CPU is inefficient at division operations, for example, the time taken by one division operation is 10 cycles, the time taken by one shift operation is 1 cycle, and the time taken by one addition operation is 1 cycle. In related technologies, the calculation method for the storage location of a P2L mapping table takes 13 cycles to calculate the storage location of a single P2L mapping table. However, the calculation method for the storage location of a P2L mapping table provided in this embodiment takes only 3 cycles. Obviously, in the garbage collection process, the calculation method for the storage location of a P2L mapping table provided in this embodiment can save 77% of the time required to calculate the storage location of a single P2L mapping table.

[0076] Figure 5 This diagram illustrates a flow chart of a garbage collection method for a solid-state drive according to an embodiment of the present disclosure. The garbage collection method of this embodiment can be provided by... Figure 1 The controller 121 in the middle executes, applied to Figure 1 The solid-state drive 120 in the image. For example... Figure 5 As shown, the waste recycling method of this disclosure embodiment may include:

[0077] In step S510, it is checked whether the physical storage group in the superblock of the storage medium module stores the P2L mapping table corresponding to each page of the physical storage group.

[0078] In one example, check one by one whether the physical storage group 400 in the superblock (e.g., superblock 0) stores the P2L mapping table corresponding to each page of the physical storage group.

[0079] In step S520, if any, the corresponding P2L mapping table is compared with the L2P mapping table corresponding to each page of data in the physical storage group, and the valid data storage segment is determined based on the comparison result.

[0080] In some embodiments, if any, the corresponding P2L mapping table is stored from the storage medium module to a temporary storage area in the controller 121, and the corresponding P2L mapping table is compared with the L2P mapping table corresponding to each page of data in the physical storage group, and the valid data storage segment is determined based on the comparison result.

[0081] In step S530, the data in the valid data storage segment is moved to an idle superblock.

[0082] In one example, data from valid data storage segments in various physical storage groups 400 within a superblock (e.g., superblock 0) is moved to an idle superblock.

[0083] After the data migration is complete, the original superblock can be erased.

[0084] Figure 6 A schematic diagram of a storage device for a P2L mapping table for a solid-state drive is shown according to an embodiment of the present disclosure. The storage device of this embodiment is used for... Figure 1 The solid-state drive 120 in the image. For example... Figure 6 As shown, the storage device includes a P2L mapping table cache unit 610 and a P2L mapping table transfer unit 620.

[0085] P2L mapping table cache unit 610 is used to store the P2L mapping table corresponding to each page of data written to the physical storage group in the data cache area, wherein the P2L mapping table records the conversion relationship between the physical address and logical address of each page of data in the corresponding physical storage group.

[0086] The P2L mapping table transfer unit 620 is used to, after only one data storage segment in the physical storage group has not been written to, store the P2L mapping table corresponding to each page of data in the physical storage group from the data cache area to the data storage segment in the physical storage group for persistent storage, and clear the data cache area.

[0087] Since the process of storing the P2L mapping table corresponding to the physical storage group using the storage method of this disclosure embodiment has been described in detail in the method embodiment above, it will not be repeated here.

[0088] Figure 7 A schematic diagram of a waste collection apparatus for a solid-state drive according to an embodiment of the present disclosure is shown. The waste collection apparatus of this disclosure embodiment is used for... Figure 1 The solid-state drive 120 in the image. For example... Figure 7 As shown, the waste recycling device includes an inspection unit 710, a comparison unit 720, and a data transfer unit 730.

[0089] The inspection unit 710 is used to check whether the physical storage group in the superblock of the storage medium module stores the P2L mapping table corresponding to each page of the physical storage group.

[0090] The comparison unit 720 is used to compare the corresponding P2L mapping table with the L2P mapping table corresponding to each page of data in the physical storage group if such a table exists, and to determine the valid data storage segment based on the comparison result.

[0091] The data transfer unit 730 is used to transfer data from the valid data storage segment to an idle superblock.

[0092] Since the process of garbage collection using the garbage collection method of this disclosure has been described in detail in the above method embodiments, it will not be repeated here.

[0093] This disclosure also provides an electronic device, such as... Figure 8 As shown, it includes a memory 820, a processor 810, and a program stored on the memory 820 and executable on the processor 810. When the program is executed by the processor 810, it can implement the various processes of the above-described storage method or garbage collection method and achieve the same technical effect. To avoid repetition, it will not be described again here.

[0094] Those skilled in the art will understand that all or part of the steps in the various methods of the above embodiments can be implemented by instructions, or by instructions controlling related hardware. These instructions can be stored in a computer-readable storage medium and loaded and executed by a processor. Therefore, this disclosure also provides a storage medium storing a computer program or instructions, which, when executed by a processor, can implement the various processes of the embodiments of the above storage methods or garbage collection methods.

[0095] Since the instructions stored in the storage medium can execute the steps of the storage method or garbage collection method provided in the embodiments of this disclosure, the beneficial effects achievable by the storage method or garbage collection method provided in the embodiments of this disclosure can be realized, as detailed in the preceding embodiments, and will not be repeated here. The specific implementation of each of the above operations can be found in the preceding embodiments, and will not be repeated here.

[0096] In summary, the storage method provided in this disclosure stores the P2L mapping table corresponding to each page of data written to the physical storage group in the data cache. After only one data storage segment remains unwritten in the physical storage group, the P2L mapping table corresponding to each page of data in the physical storage group is stored from the data cache to that data storage segment in the physical storage group for persistent storage, and the data cache is cleared. The P2L mapping table records the physical address to logical address conversion relationship of each page of data in the corresponding physical storage group. The P2L mapping tables of each plane in the flash memory chip are independent of each other. The P2L mapping table corresponding to each physical storage group in each plane only stores the P2L mapping table entries corresponding to the data stored in that physical storage group. For storage media modules in the flash memory chip with a number of planes that are not powers of 2 and a number that are powers of 2, the storage space of the data cache can be fully utilized, thereby fully utilizing the storage space of the data storage segment storing the P2L mapping table in the flash memory chip. Therefore, the storage space utilization of the data cache is improved, and thus the storage space utilization of the flash memory chip is improved. The calculation of the storage location of the P2L mapping table in flash memory chips only involves pages and data storage segments and avoids division operations. It only requires shift operations, which reduces the time overhead of calculating the storage location of the P2L mapping table and improves the calculation efficiency of the storage location of the P2L mapping table.

[0097] Finally, it should be noted that the above embodiments are merely examples for clearly illustrating this disclosure and are not intended to limit the implementation. Those skilled in the art can make other variations or modifications based on the above description. It is neither necessary nor possible to exhaustively list all possible implementations here. However, obvious variations or modifications derived therefrom are still within the scope of this disclosure.

Claims

1. A method for storing a P2L mapping table for a solid-state drive, the solid-state drive including a data cache and a storage medium module, the storage medium module having a superblock comprising multiple planes, each plane comprising multiple physical storage groups, each physical storage group comprising a predetermined number of pages, each page comprising multiple data storage segments, the storage method comprising: The P2L mapping table corresponding to each page of data written to the physical storage group is stored in the data cache area, wherein the P2L mapping table records the conversion relationship between the physical address and the logical address of each page of data in the corresponding physical storage group; After only one data storage segment remains unwritten in the physical storage group, the P2L mapping table corresponding to each page of data in the physical storage group is stored from the data cache to the data storage segment in the physical storage group for persistent storage, and the data cache is cleared.

2. The storage method according to claim 1, wherein, The storage space size of the data storage segment is equal to the storage space size of the data cache area.

3. The storage method according to claim 1, wherein, The storage space size of the data storage segment is equal to the product of the number of pages included in the physical storage group, the number of data storage segments included in each page, and the size of the P2L mapping table entry corresponding to the data stored in each data storage segment.

4. The storage method according to claim 3, wherein, Before storing the P2L mapping table corresponding to each page of data written to the physical storage group in the data cache, the storage method further includes: The number of pages in the physical storage group is determined based on the storage space size of the data storage segment, the number of data storage segments included in each page, and the size of the P2L mapping table entries corresponding to the data stored in each data storage segment.

5. The storage method according to claim 3, wherein, Each data storage segment has a storage space size of 4 KB, and the size of the P2L mapping table entry corresponding to the data stored in each data storage segment is 4 bytes.

6. A storage device for a P2L mapping table for a solid-state drive, the solid-state drive including a data cache and a storage medium module, the storage medium module having a superblock comprising multiple planes, each plane comprising multiple physical storage groups, each physical storage group comprising a predetermined number of pages, each page comprising multiple data storage segments, the storage device comprising: The P2L mapping table cache unit is used to store the P2L mapping table corresponding to each page of data written to the physical storage group in the data cache area, wherein the P2L mapping table records the conversion relationship between the physical address and the logical address of each page of data in the corresponding physical storage group. The P2L mapping table migration unit is used to persistently store the P2L mapping table corresponding to each page of data in the physical storage group from the data cache to the data storage segment in the physical storage group after only one data storage segment remains unwritten in the physical storage group, and then clear the data cache.

7. A storage medium module for a solid-state drive, the solid-state drive including a data cache and the storage medium module, the storage medium module comprising: A superblock comprises multiple planes, each plane comprising multiple physical storage groups, each physical storage group comprising a predetermined number of pages, and each page comprising multiple data storage segments. Specifically, the P2L mapping table corresponding to each page of data written to the physical storage group is stored in the data cache area, wherein the P2L mapping table records the conversion relationship between the physical address and logical address of each page of data in the physical storage group; after only one data storage segment remains unwritten in the physical storage group, the P2L mapping table corresponding to each page of data in the physical storage group is stored from the data cache area to the data storage segment in the physical storage group for persistent storage, and the data cache area is cleared.

8. A solid-state drive, comprising: The storage medium module, wherein the superblock of the storage medium module comprises multiple planes, the planes comprise multiple physical storage groups, the physical storage groups comprise a predetermined number of pages, and the pages comprise multiple data storage segments; A controller, comprising a data cache and a storage device as described in claim 6, the storage device being configured to perform the method of any one of claims 1 to 5 to persistently store the P2L mapping table corresponding to each page of data in the physical storage group from the data cache to the physical storage group.

9. A garbage collection method for a solid-state drive, the solid-state drive comprising a storage medium module as described in claim 7, comprising: Check whether the physical storage group in the superblock of the storage medium module stores the P2L mapping table corresponding to each page of the physical storage group; If so, the corresponding P2L mapping table is compared with the L2P mapping table corresponding to each page of data in the physical storage group, and the valid data storage segment is determined based on the comparison result. Move the data from the valid data storage segment to the free superblock.

10. A waste disposal device for a solid-state drive, the solid-state drive comprising a storage medium module as claimed in claim 7, comprising: The checking unit is used to check whether the physical storage group in the superblock of the storage medium module stores the P2L mapping table corresponding to each page of the physical storage group; The comparison unit is used to compare the corresponding P2L mapping table with the L2P mapping table corresponding to each page of data in the physical storage group if it exists, and to determine the valid data storage segment based on the comparison result. A data migration unit is used to migrate data from the valid data storage segment to an idle superblock.

11. A storage medium storing a computer program or instructions that, when executed by a processor, implement the steps of the method as described in any one of claims 1 to 5 and 9.

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