Implementation method of IOU cycle calculation based on FPGA

Abstract

The invention discloses an implementation method of IOU (Input / Output Unit) cyclic calculation based on an FPGA (Field Programmable Gate Array), which belongs to the field of convolutional neural network acceleration and comprises eight modules: an IOU cyclic calculation control center module for completing integral control and sending a control signal to a data read-write control module, an IOU calculation control module and an IOU threshold configuration module; the data read-write control module completes parallel-to-serial storage and parallel reading of the data of the detection frame through read-write control on the data cache module; the IOU calculation module accurately completes IOU value calculation through a coordinate conversion sub-module, an intersection area calculation sub-module, a union area calculation sub-module and an intersection-to-union ratio calculation sub-module; in combination with flexible threshold setting of the IOU threshold configuration module and a counting screening mechanism of the optimal frame selection module, target detection frames meeting requirements are reserved. The method supports data processing of any path and any type of detection frames, has the advantages of being flexible in configuration, efficient in calculation and high in universality, and can be widely applied to various convolutional neural network target detection systems based on the FPGA.

Description

Technical Field

[0001] In the field of data convolutional neural network acceleration, this invention provides a method for implementing cyclic IOU calculation based on FPGA. Background Technology

[0002] In object detection systems based on convolutional neural networks (CNNs), non-maximum suppression (NMS) is a crucial post-processing step used to eliminate highly overlapping redundant detection boxes and retain the optimal detection results. Intersection over Union (IOU), as a core metric for measuring the degree of overlap between detection boxes, directly impacts the performance of the NMS algorithm, and thus determines the overall accuracy and real-time performance of the object detection system.

[0003] Currently, mainstream object detection algorithms (such as YOLO, SSD, Faster R-CNN, etc.) are typically deployed on general-purpose computing platforms such as GPUs, leveraging their powerful parallel computing capabilities for IOU calculation and NMS processing. However, GPU solutions suffer from high power consumption, expensive hardware costs, and significant real-time response latency, making it difficult to meet the stringent requirements of embedded scenarios or high real-time applications (such as autonomous driving, industrial quality inspection, video surveillance, etc.). Field-programmable gate arrays (FPGAs), with their reconfigurability, low power consumption, and parallel processing capabilities, have become an ideal platform for accelerating high-performance object detection.

[0004] Although existing research has attempted to accelerate target detection networks on FPGAs, several technical challenges remain in post-processing, particularly in IOU cyclic calculation and redundant frame removal. First, existing FPGA implementations are often rigidly designed for specific network structures, lacking flexibility in parameters such as the number of detection head paths and the number of detection frames per path. This makes them difficult to adapt to different detection models or dynamically changing detection scenarios, resulting in poor versatility. Second, in terms of data reading and writing, existing solutions often employ single-port or dual-port storage architectures, making it difficult to efficiently write multiple parallel detection frame data paths and read multiple sets of detection frame data in parallel. Data transmission is prone to waiting bottlenecks, limiting the efficiency of IOU calculation. Third, traditional redundant frame suppression methods rely on sorting and iterative filtering logic, which is complex and resource-intensive in FPGA hardware implementation. Finally, most existing solutions use hard-coded IOU thresholds, which cannot be dynamically adjusted according to actual application scenarios. This makes it difficult to balance detection accuracy in complex environments, limiting their deployment in diverse scenarios.

[0005] Therefore, there is an urgent need in this field for an IOU loop calculation implementation method that can run on FPGA platforms and has high flexibility, high throughput, high accuracy and low power consumption, so as to adapt to different target detection models and application scenarios and improve the overall performance of FPGA target detection systems. Summary of the Invention

[0006] The purpose of this invention is to provide an implementation method for IOU loop calculation based on FPGA. The method includes (1) an IOU loop calculation control center module, (2) a data read / write control module, (3) a data cache module, (4) an IOU calculation control module, (5) an IOU calculation module, (6) an IOU threshold configuration module, (7) an IOU comparison module, and (8) an optimal box selection module. The specific implementation is as follows:

[0007] (1) IOU Loop Calculation Control Center Module: The IOU loop calculation control center module is the overall control center for IOU loop calculation. It receives externally input detection head information, realizes overall control of IOU loop calculation, configures and outputs data control signals including the number of parallel received detection head channels L, the number of detection box groups to be processed in each channel N, and the number of data in each detection box M to the data read and write control module according to the input detection head information, and receives the data preparation completion signal returned by the data read and write control module; after receiving the data preparation completion signal returned by the data read and write control module, it outputs the detection box data type T and the IOU calculation start signal to the IOU calculation control module; it outputs the IOU threshold configuration signal to the IOU threshold configuration module; it receives the optimal box index ID returned by the optimal box selection module, generates and outputs the optimal box selection signal to the data read and write control module according to the optimal box index ID;

[0008] (2) Data read / write control module: The data read / write control module receives the data control signal sent by the IOU loop calculation control center module, and obtains information such as the number of parallel incoming detection head channels L, the number of detection box groups to be processed in each channel N, and the number of data in each detection box M. Based on the number of detection head channels L, it performs parallel-to-serial conversion on the detection box data; it outputs the write port control signal and the read port 1 / 2 control signal to the data buffer module to complete the serial writing and parallel reading of the detection box data; after the IOU loop calculation is completed, the data read / write control module receives the optimal box selection signal sent by the IOU loop calculation control center module and outputs the read port 3 control signal to the data buffer module;

[0009] (3) Data caching module: The data caching module receives the write port control signal and read port 1 / 2 control signal from the data read / write control module, as well as the externally input detection box data. It writes the serial detection box data into the four-port register cache group in sequence, and reads the coordinate data of two sets of detection boxes in parallel from the four-port register cache group each time and outputs them to the IOU calculation module for IOU calculation. It receives the read port 3 control signal from the data read / write control module and reads the optimal detection box from the four-port register cache group.

[0010] (4) IOU Calculation Control Module: The IOU calculation control module receives the detection box data type T and the IOU calculation start signal sent by the IOU loop calculation control center module, obtains the coordinate data type of the detection box, selects the IOU calculation method, outputs the IOU calculation control signal and the IOU calculation method selection signal to the IOU calculation module, and starts the IOU calculation of the two sets of detection boxes.

[0011] (5) IOU Calculation Module: The IOU calculation module receives the IOU calculation control signal and IOU calculation mode selection signal sent by the IOU calculation control module, as well as the coordinate data of two sets of parallel detection boxes sent by the data buffer module. The coordinate data of the two sets of detection boxes are sequentially processed by the coordinate transformation submodule, the intersection area calculation submodule, the union area calculation submodule, and the intersection-union ratio calculation submodule to finally calculate the IOU value of the two detection boxes and output the IOU value to the IOU comparison module.

[0012] (6) IOU threshold configuration module: The IOU threshold configuration module receives the IOU threshold configuration signal sent by the IOU loop calculation control center module, configures the appropriate IOU threshold P according to the application scenario, and outputs the IOU threshold P and the IOU comparison control signal to the IOU comparison module.

[0013] (7) IOU Comparison Module: The IOU comparison module receives the IOU threshold P and IOU comparison control signal sent by the IOU threshold configuration module and the IOU value sent by the IOU calculation module. It compares the IOU value with the IOU threshold P and outputs the comparison result to the optimal box selection module.

[0014] (8) Optimal Box Selection Module: The optimal box selection module receives the comparison results sent by the IOU comparison module, retains the detection boxes that meet the IOU threshold screening requirements, and outputs the optimal box index ID to the IOU loop calculation control center module.

[0015] Compared with the prior art, the significant advantages of this invention are:

[0016] 1. This invention can flexibly configure core parameters such as the number of detection head paths, the number of detection box groups per path, and the number of data points per detection box group based on different detection head types of convolutional feature extraction networks. It breaks through the adaptation limitations of fixed-path detection heads and realizes unified processing of detection box data of any number of paths and any type, greatly improving the versatility and scenario adaptability of the method.

[0017] 2. The data caching module of this invention adopts a "one-write, three-read" four-port register cache group design, which, together with the "parallel-to-serial storage + parallel reading" logic of the data read and write control module, realizes the serial orderly writing of multiple detection head data and the parallel reading of two sets of calculation data and one set of result data, avoiding data transmission bottlenecks and ensuring the efficiency and real-time performance of IOU loop calculation.

[0018] 3. This invention innovatively proposes a redundant box judgment method based on a hardware counter. It uses a "counting threshold" mechanism to replace the traditional sorting suppression strategy, which reduces the complexity of hardware implementation and resource consumption, while improving the judgment efficiency of redundant boxes. Attached Figure Description

[0019] Figure 1 This is a block diagram illustrating the implementation method of cyclic IOU calculation based on FPGA according to the present invention.

[0020] Figure 2 This is a schematic diagram of the IOU value calculation of the present invention.

[0021] Figure 3 This is a schematic diagram of the detection box data type T=1 of the present invention.

[0022] Figure 4 This is a schematic diagram of the detection box data type T=0 in this invention. Detailed Implementation

[0023] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0024] See Figures 1-4 This embodiment provides an implementation method for cyclic IOU calculation based on FPGA.

[0025] In this embodiment, the outputs of the three detector heads of the YOLOv5s convolutional neural network are processed through a series of post-processing modules to obtain the detection box data that has been mapped back to the original image, which is then used as input. The specific parameters are:

[0026] 1) Number of parallel incoming detector heads L = 3

[0027] 2) The number of detection frames to be processed per channel is N = 9

[0028] 3) The number of data points in each detection frame is M = 6

[0029] 4) Detection box data type T = 1

[0030] 5) Confidence threshold P = 0.9

[0031] (1) IOU Loop Calculation Control Center Module: Based on the externally input detection head information, it completes the overall control of IOU loop calculation, outputs data control signals including the number of parallel incoming detection head channels L=3, the number of detection box groups to be processed per channel N=9, and the number of data in each detection box M=6 to the data read and write control module, and receives the data preparation completion signal returned by the data read and write control module; after receiving the data preparation completion signal returned by the data read and write control module, it outputs the detection box data type T=1 and the IOU calculation start signal to the IOU calculation control module; it outputs the IOU threshold configuration signal to the IOU threshold configuration module; it receives the optimal box index ID returned by the optimal box selection module and outputs the optimal box selection signal to the data read and write control module.

[0032] (2) Data Read / Write Control Module: The data read / write control module receives the data control signal sent by the IOU cyclic calculation control center module and obtains information such as the number of parallel incoming detection head channels L=3, the number of detection box groups to be processed in each channel N=9, and the number of data in each detection box group M=6. It performs parallel-to-serial conversion on the L=3 parallel incoming detection box data into one serial data. When the data valid signal arrives, it generates and outputs the write port control signal to the data buffer module, and writes L×N×M=162 detection box data into the four-port register buffer group in an address incrementing manner. At this time, there are L×N=27 groups of detection box data to be processed in the four-port register buffer group. After all the detection box data is written, it generates and outputs the read port 1 / 2 control signal to the data buffer module, and reads the coordinate data of the A / B detection boxes in parallel from the read port 1 / 2 of the four-port register buffer group. In this system, the detection frames A read from read port 1 serve as the comparison reference frames. When the i-th group (1≤i≤26) of detection frames is used as the comparison reference frames, it needs to be read from the four-port register buffer 27-i times within its comparison cycle. Within the comparison cycle of the i-th group of detection frames A serving as the comparison reference frames, the detection frames B read from read port 2, starting from the (i+1)-th group and ending at the L×N=27-th group, are sequentially compared with the i-th group of detection frames A for a total of 27-i IOU calculations. After the IOU cyclic calculation is completed, the data read / write control module also receives the optimal frame selection signal from the IOU cyclic calculation control center module, generates and outputs the read port 3 control signal to the data buffer module.

[0033] (3) Data Cache Module: The data cache module receives write port control signals and read port 1 / 2 control signals from the data read / write control module. It sequentially writes the serial detection frame data into the four-port register cache group and reads the coordinate data of two sets of detection frames in parallel from the four-port register cache group each time to the IOU calculation module for IOU calculation. It receives the read port 3 control signal from the data read / write control module and reads the optimal detection frame from the four-port register cache group. The cache entity of this module is a four-port register cache group with a width of 16 bits and a depth of 256 bits, supporting simultaneous one-way data writing and three-way data reading. The write port is used to write L×N×M=162 detection frame data to be processed, read ports 1 / 2 are used to read the coordinate data of two sets of detection frames in parallel, and read port 3 is used to read the optimal detection frame data after the IOU loop calculation is completed.

[0034] (4) IOU Calculation Control Module: The IOU Calculation Control Module receives the detection box data type T=1 and the IOU calculation start signal sent by the IOU Cyclic Calculation Control Center Module, outputs the IOU calculation control signal and the IOU calculation mode selection signal to the IOU Calculation Module, and starts the IOU calculation of the two sets of detection boxes.

[0035] (5) IOU Calculation Module: The IOU calculation module receives the IOU calculation control signal and IOU calculation mode selection signal from the IOU calculation control module, as well as the coordinate data (x, y, y) of two sets of parallel detection boxes from the data buffer module. a y a w a h a ) and (x b y b w b h b The process sequentially passes through a coordinate transformation submodule, a detection box intersection area calculation submodule, a detection box union area calculation submodule, and a detection box intersection-union ratio (IOU) calculation submodule to calculate the IOU values ​​of the two sets of detection boxes and output them to the IOU comparison module. The calculation methods for each module are as follows:

[0036] Detection box coordinate transformation submodule: Receives the coordinate data (x, y) of the detection boxes sent by the data buffer module in parallel A / B paths. a y a w a h a ) and (x b y b w b h b The box information is converted into two sets of coordinates: the top-left coordinate and the bottom-right coordinate (x). a_min y a_min x a_max ya_max ) and (x b_min y b_min x b_max y b_max The system outputs the two sets of transformed coordinate data to the detection box intersection area calculation submodule and the detection box union area calculation submodule. Taking detection box A as an example, the specific transformation formula is as follows:

[0037] x a_min =x a -w a / 2

[0038] y a_min =y a -h a / 2

[0039] x a_max =x a +w a / 2

[0040] y a_max =y a +h a / 2

[0041] The detection box intersection area calculation submodule receives two sets of coordinate-transformed data (x, y, y) from the detection box coordinate transformation submodule. a_min y a_min ,x a_max y a_max ) and (x b_min y b_min x b_max y b_max First, calculate the coordinates of the overlapping area using the formula shown below:

[0042] x inter_l =max(x a_min x b_min )

[0043] y inter_1 =max(y a_min y b_min )

[0044] x inter_2 =min(x a_max x b_max )

[0045] y inter_2 =min(y a_max y b_max )

[0046] Next, calculate the intersection area of ​​the two detection boxes, using the formula shown below:

[0047] S inter =(x inter_2 -x inter_1 )×(y inter_2 -y inter_1 )

[0048] After calculation, output the intersection area S of the two detection boxes. inter The submodules for calculating the area of ​​the union of the detection boxes and the submodules for calculating the intersection-union ratio of the detection boxes are included.

[0049] The detection box union area calculation submodule receives the coordinate data (x, y, y) of two sets of detection boxes from the detection box coordinate transformation submodule. a_min y a_min x a_max y a_max ), (x b_min y b_min x b_max y b_max The intersection area S of the two sets of detection boxes issued by the detection box intersection area calculation submodule. inter Then, calculate the area of ​​the union of the two detection boxes. The calculation method is shown in the following formula:

[0050] S union =(x a_max -x a_min )×(y a_max -y a_min )+(x b_max -x b_min )×(y b_max -y b_min )-S inter

[0051] After calculation, output the union area S of the two detection boxes. union The detection frame intersection and comparison calculation submodule.

[0052] The detection box intersection-union ratio calculation submodule receives the detection box intersection area S from the detection box intersection area calculation submodule. inter The submodule S calculates the area of ​​the union of the detection boxes. union The intersection-union ratio (CUP) of the two detection boxes is calculated as follows:

[0053]

[0054] (6) IOU threshold configuration module: The IOU threshold configuration module receives the IOU threshold configuration signal sent by the IOU loop calculation control center module, configures the appropriate IOU threshold P=0.9 according to the application scenario, and outputs the IOU threshold P=0.9 and the IOU comparison control signal to the IOU comparison module.

[0055] (7) IOU Comparison Module: The IOU comparison module receives the IOU threshold P=0.9 and the IOU comparison control signal sent by the IOU threshold configuration module and the IOU value sent by the IOU calculation module. It compares the IOU value with the IOU threshold and outputs the comparison result to the optimal box selection module.

[0056] (8) Optimal Box Selection Module: The optimal box selection module receives the comparison results from the IOU comparison module. It allocates L×N-1 = 26 registers to record the IOU comparison results between the 2nd to 27th groups of detection boxes and the benchmark box. Whenever the IOU threshold screening requirement is met (comparison result is 1), the corresponding register is incremented by 1. For the kth group (2≤k≤27), the group of detection boxes can only be retained if the maximum value in the corresponding register reaches k-1; otherwise, the group of detection boxes is discarded. The optimal box's index ID is obtained based on the values ​​in the L×N-1 = 26 registers, and this index ID is output to the IOU cyclic calculation control center module.

Claims

1. A method for implementing IOU loop calculation based on FPGA, characterized in that, It includes (1) IOU loop calculation control center module, (2) data read and write control module, (3) data cache module, (4) IOU calculation control module, (5) IOU calculation module, (6) IOU threshold configuration module, (7) IOU comparison module, and (8) optimal box selection module. The specific implementation is as follows: (1) IOU Cyclic Calculation Control Center Module: The IOU cyclic calculation control center module is the overall control center for IOU cyclic calculation. It receives externally input detection head information, realizes overall control of IOU cyclic calculation, configures and outputs data control signals to the data read and write control module based on the input detection head information, including the number of detection head channels L received in parallel, the number of detection box groups N to be processed in each channel, and the number of data in each detection box M. It also receives the data preparation completion signal returned by the data read and write control module. After receiving the data preparation completion signal returned by the data read and write control module, it outputs the detection box data type T and the IOU calculation start signal to the IOU calculation control module. Output IOU threshold configuration signal to IOU threshold configuration module; receive the optimal box index ID returned by optimal box selection module, generate and output optimal box selection signal to data read and write control module based on optimal box index ID; (2) Data read and write control module: The data read and write control module receives the data control signal sent by the IOU cyclic calculation control center module, and obtains information such as the number of parallel detection head channels L, the number of detection box groups to be processed in each channel N, and the number of data in each detection box M. Based on the number of detection head channels L, the detection box data is processed by parallel-to-serial conversion. The write port control signal and read port 1 / 2 control signal are output to the data buffer module to complete the serial writing and parallel reading of the detection box data; after the IOU loop calculation is completed, the data read and write control module receives the optimal box selection signal sent by the IOU loop calculation control center module and outputs the read port 3 control signal to the data buffer module. (3) Data caching module: The data caching module receives the write port control signal and read port 1 / 2 control signal from the data read / write control module, as well as the externally input detection box data. It writes the serial detection box data into the four-port register cache group in sequence, and reads the coordinate data of two sets of detection boxes in parallel from the four-port register cache group each time and outputs them to the IOU calculation module for IOU calculation. It receives the read port 3 control signal from the data read / write control module and reads the optimal detection box from the four-port register cache group. (4) IOU Calculation Control Module: The IOU calculation control module receives the detection box data type T and the IOU calculation start signal sent by the IOU loop calculation control center module, obtains the coordinate data type of the detection box, selects the IOU calculation method, outputs the IOU calculation control signal and the IOU calculation method selection signal to the IOU calculation module, and starts the IOU calculation of the two sets of detection boxes. (5) IOU Calculation Module: The IOU calculation module receives the IOU calculation control signal and IOU calculation mode selection signal sent by the IOU calculation control module, as well as the coordinate data of two sets of parallel detection boxes sent by the data buffer module. The coordinate data of the two sets of detection boxes are sequentially processed by the coordinate transformation submodule, the intersection area calculation submodule, the union area calculation submodule, and the intersection-union ratio calculation submodule to finally calculate the IOU value of the two detection boxes and output the IOU value to the IOU comparison module. (6) IOU threshold configuration module: The IOU threshold configuration module receives the IOU threshold configuration signal sent by the IOU loop calculation control center module, configures the appropriate IOU threshold P according to the application scenario, and outputs the IOU threshold P and the IOU comparison control signal to the IOU comparison module. (7) IOU Comparison Module: The IOU comparison module receives the IOU threshold P and IOU comparison control signal sent by the IOU threshold configuration module and the IOU value sent by the IOU calculation module. It compares the IOU value with the IOU threshold P and outputs the comparison result to the optimal box selection module. (8) Optimal Box Selection Module: The optimal box selection module receives the comparison results sent by the IOU comparison module, retains the detection boxes that meet the IOU threshold screening requirements, and outputs the optimal box index ID to the IOU loop calculation control center module.

2. The method for implementing FPGA-based IOU loop calculation according to claim 1, characterized in that, The IOU loop computation control center module can extract different detection head types from the convolutional feature extraction network, and configure the number of detection head paths, the number of detection box groups per path, the number of data in each detection box group, and the data type of the detection boxes. It is applicable to the processing of detection box data of any number of paths and any type.

3. The method for implementing FPGA-based IOU loop calculation according to claim 1, characterized in that, The data read / write control module converts the parallel L-channel detection box data into a single serial data stream. When the data valid signal arrives, it generates a write port control signal and sequentially writes the L×N×M detection box data into the four-port register buffer. Generate read port 1 / 2 control signal to read the coordinate data of detection frames A and B in parallel from read port 1 / 2 of the four-port register buffer group.

4. The method for implementing FPGA-based IOU loop calculation according to claim 1, characterized in that, The detection frame A read from read port 1 is the current comparison reference frame. When the i-th group (1≤i≤L×N-1) of detection frames is used as the comparison reference frame, it needs to be read from the four-port register buffer L×Ni times during its comparison period. During the comparison period when the i-th group of detection frames A is used as the comparison reference frame, the detection frames B read from read port 2 start from the (i+1)-th group and end at the L×N-th group, and are sequentially compared with the i-th group of detection frames A using L×Ni IOU calculations.

5. The method for implementing FPGA-based IOU loop calculation according to claim 1, characterized in that, The data caching module's cache entity is a four-port register cache group whose width and depth can be dynamically configured. It contains one write port and three read ports, supporting simultaneous one-way data writing and three-way data reading. The write port is used to write serially arriving detection box data, read ports 1 and 2 are used to read the coordinate data of two sets of detection boxes used for IOU calculation and comparison in parallel, and read port 3 is used to read the optimal detection box data after the IOU loop calculation is completed.

6. The method for implementing FPGA-based IOU loop calculation according to claim 1, characterized in that, The IOU calculation control module generates a corresponding IOU calculation mode selection signal to the IOU calculation module based on the detection box data type T sent by the IOU cyclic calculation control center module. When T=1, the detection box data type is x, y, w, h, p. max When index T=0, the data type of the detection box is x. min， y min， x max y max p max , index.

7. The method for implementing FPGA-based IOU loop calculation according to claim 1, characterized in that, The IOU calculation module consists of four sub-modules: 1) Detection box coordinate transformation submodule: Receives the coordinate data (x, y, y) of the detection boxes from the A / B parallel channels sent by the data buffer module. a y a w a h a ) and (x b y b w b h b The box information is converted into two sets of coordinates: the top-left coordinate and the bottom-right coordinate (x). a_min y a_min x a_max y a_max ) and (x b_min y b_min x b_max y b_max The system outputs the two sets of transformed coordinate data to the detection box intersection area calculation submodule and the detection box union area calculation submodule. Taking detection box A as an example, the specific transformation formula is as follows: x a_min =x a -w a / 2 y a_min =y a -h a / 2 x a_max =x a +w a / 2 y a_max =y a +h a / 2 2) Detection box intersection area calculation submodule: Receives two sets of coordinate-transformed data (x, y, y) from the detection box coordinate transformation submodule. a_min y a_min x a_max y a_max ) and (x b_min y b_min x b_max y b_max First, calculate the coordinates of the overlapping area using the formula shown below: x inter 1 =max(x a_min ,x b_min ) and inter_1 =max(y a_min ,and b_min ) x inter 2 =min(x a_max ,x b_max ) and inter 2 =min(y a_max ,and b_max ) Next, calculate the intersection area of ​​the two detection boxes, using the formula shown below: S inter =(x inter_2 -x inter 1 )×(y inter_2 -and inter_1 ) After calculation, output the intersection area S of the two detection boxes. inter The detection box union area calculation submodule and the detection box intersection-union ratio calculation submodule; 3) Detection box union area calculation submodule: Receives the coordinate data (x, y, y) of two sets of detection boxes from the detection box coordinate transformation submodule. a_min y a_min x a_max y a_max ), (x b_min y b_min x b_max y b_max The intersection area S of the two sets of detection boxes issued by the detection box intersection area calculation submodule. inter We then begin calculating the area of ​​the union of the two detection boxes, as shown in the following formula: S union =(x a_max -x a_min )×(y a_max -and a_min )+(x b_max -x b_min )×(y b_max -and b_min )-S inter After calculation, output the union area S of the two detection boxes. union The intersection and comparison calculation submodule is used to detect the frame. 4) Detection box intersection-union ratio calculation submodule: Receives the detection box intersection area S from the detection box intersection area calculation submodule. inter The submodule S calculates the area of ​​the union of the detection boxes. union The intersection-union ratio (CUP) of the two detection boxes is calculated as follows: After the calculation is completed, the IOU values ​​of the two detection boxes are output to the IOU comparison module.

8. The method for implementing FPGA-based IOU loop calculation according to claim 1, characterized in that, The IOU calculation module selects different IOU calculation methods based on the data type T of the detection boxes. If T=1, the coordinate data of the A / B detection boxes sent by the data caching module are sent to the detection box coordinate transformation submodule in the IOU calculation module, and then the intersection area, union area and IOU are calculated in sequence. If T=0, the coordinate data of the A / B detection boxes sent by the data caching module are sent directly to the detection box intersection area calculation submodule without going through the coordinate transformation submodule, and the intersection area, union area and IOU are calculated in sequence.

9. The method for implementing FPGA-based IOU loop calculation according to claim 1, characterized in that, The IOU threshold configuration module allows for flexible configuration of the IOU threshold to adapt to the requirements of different application scenarios regarding false negative rate and recall rate.

10. The method for implementing FPGA-based IOU loop calculation according to claim 1, characterized in that, The IOU threshold comparison module outputs a comparison result of 1 / 0. If the comparison result is 1, then the IOU value of the two sets of detection boxes is greater than the IOU threshold P; otherwise, it is less than the IOU threshold P.

11. The method for implementing FPGA-based IOU loop calculation according to claim 1, characterized in that, The optimal box selection module receives the comparison results from the IOU comparison module. It records the IOU comparison results between the detection boxes from the 2nd to the L×Nth groups and the comparison reference box by allocating L×N-1 register groups. Whenever the IOU threshold screening requirement is met (the comparison result is 0), the corresponding register group is incremented by 1. For the kth group (2≤k≤L×N1 detection boxes), the maximum value in the corresponding register group must reach k-1 for the detection box in the group to be retained; otherwise, the detection box in the group is discarded.

12. The method for implementing FPGA-based IOU loop calculation according to claim 1, characterized in that, The optimal box selection module outputs the optimal box index ID to the IOU cyclic calculation control center module. The ID starts from 0 and is an integer with a maximum value of L×N-1 and a step of 1, which uniquely identifies a detection box.

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