Phase loading method based on variable component sub-line and related device

Abstract

The invention discloses a variable component sub-line-based phase loading method and a related device. The method comprises the steps of obtaining n quantum bits; a variable component sub-circuit is constructed, the variable component sub-circuit comprises phase rotating doors and controlled NOT gates, the phase rotating doors are used for controlling rotation of phases, each quantum bit is only acted on one phase rotating door, and the phase rotating doors on the adjacent quantum bits act on different action time sequences; each quantum bit is a target quantum bit of one controlled NOT gate and a control quantum bit of the other controlled NOT gate; and operating the variable component sub-line to obtain a target quantum phase. Compared with the prior art, by designing a real chip-friendly phase loading method based on a variable component sub-line, effective approximate phase loading is completed, line demonstration can be effectively completed on a current superconducting quantum computer, and some algorithms and applications can be easily achieved on a real chip.

Description

Technical Field

[0001] This invention relates to the field of quantum computing technology, and in particular to a phase loading method and related apparatus based on variable quantum circuits. Background Technology

[0002] Quantum computing is a novel computing paradigm that manipulates quantum information units to perform calculations according to the laws of quantum mechanics. Unlike classical computing, quantum computing follows the laws of quantum mechanics and is a new computing paradigm that can break through the limitations of classical computing power. When a device processes and calculates quantum information and runs quantum algorithms, it is a quantum computer. Quantum computers have become a key technology under research because of their ability to process mathematical problems more efficiently than ordinary computers; for example, they can accelerate the time to crack RSA keys from hundreds of years to hours.

[0003] Many quantum algorithms can be categorized as variational phase loaders. For example, Grover phase flippers, quantum comparison phase flippers, the cost layer in QAOA, and analog-digital algorithms all require the use of phase loading methods.

[0004] Existing models, such as the QAOA algorithm, use RZZ gates in their design. The angle of the RZZ gate is implemented using two CX gates and one RZ gate. This requires a large number of SWAP gates to handle certain non-fully connected topologies. Algorithms in phase marking comparisons, for example, need to use multi-controlled Z-gates to filter out certain states and complete the state comparison and flipping. Furthermore, the oracle design in Grover's algorithm may require extremely complex circuitry and auxiliary bits, making it difficult to demonstrate on real chips. Summary of the Invention

[0005] The purpose of this invention is to provide a phase loading method and related apparatus based on variable quantum circuits to solve the technical problems in the prior art. It can be used to load the phase of quantum circuits, thereby enabling the successful operation of certain algorithms, or enabling them to run successfully on quantum computers with topological structures.

[0006] In a first aspect, the present invention provides a phase loading method based on a variable-quantum circuit, the method comprising:

[0007] Obtain n qubits;

[0008] A variable quantum circuit is constructed, which includes a phase rotation gate and a controlled NOT gate. The phase rotation gate is used to control the rotation of the phase. Each quantum bit is acted on only one phase rotation gate. The phase rotation gates on adjacent quantum bits act on different timing sequences. Each quantum bit is a target quantum bit of one controlled NOT gate and a control quantum bit of another controlled NOT gate.

[0009] Run the variable quantum circuit to obtain the target quantum phase.

[0010] The phase loading method based on variable component quantum circuits as described above, preferably, along the application timing, comprises multiple layers of sub-variable component quantum circuits, each layer of which has multiple phase rotation gates and multiple controlled NOT gates, wherein:

[0011] The quantum bits that act on the phase rotation gate in the subvariable sub-circuit are the control quantum bits of the controlled NOT gate in the same layer of the subvariable sub-circuit.

[0012] The qubits acting on the phase rotation gates within the subvariable quantum circuits are the target qubits of the controlled NOT gates within the subvariable quantum circuits of different layers.

[0013] In the phase loading method based on variable quantum circuits described above, preferably,

[0014] The controlled NOT gate includes a first controlled NOT gate and a second controlled NOT gate. Along the operating timing, the first controlled NOT gate is located in the previous subvariable quantum line, and the second controlled NOT gate is located in the next subvariable quantum line. The target qubit of the first controlled NOT gate is a control qubit of the second controlled NOT gate, and the control qubit of the first controlled NOT gate is the target qubit of another second controlled NOT gate.

[0015] In the phase loading method based on variable quantum circuits as described above, preferably, the phase rotation gate includes a first phase rotation gate and a second phase rotation gate. Along the operating timing, the first phase rotation gate is located in the preceding variable quantum circuit, and the second phase rotation gate is located in the following variable quantum circuit. The first phase rotation gate and the second phase rotation gate operate on adjacent qubits.

[0016] In the phase loading method based on variable sub-variable circuits as described above, preferably, along the action timing, an inverse circuit is also applied after the multi-layer variable sub-variable circuit. The inverse circuit includes several controlled NOT gates, and the several controlled NOT gates in the inverse circuit correspond to all the controlled NOT gates in the multi-layer variable sub-variable circuit. The action timing of the controlled NOT gates in the inverse circuit is opposite to the action timing of all the controlled NOT gates in the multi-layer variable sub-variable circuit.

[0017] In the phase loading method based on variable quantum circuits described above, preferably, the rotation parameters of the phase rotation gate satisfy the following formula:

[0018] θ≈(A T A) -1 A T f;

[0019] Wherein, θ represents the rotation parameter vector of the phase rotation gate, A represents the positive and negative coefficient matrix, and f represents the target phase function.

[0020] In the phase loading method based on variable quantum circuits described above, preferably, all quantum states are traversed and represented in matrix form as Aθ≈f, where the size of matrix A is N=2. n The vector consists of rows and m columns, where θ is a column vector of length m and f is a column vector of length N = 2. n Given a column vector, the parameter θ is solved using the least squares method. The result is θ≈(A T A) -1 A T f.

[0021] In a second aspect, the present invention provides a circuit fabrication apparatus, the apparatus comprising:

[0022] The module acquires n qubits;

[0023] A variable quantum circuit construction module is used to construct variable quantum circuits, which include phase rotation gates and controlled NOT gates. The phase rotation gates are used to control the rotation of the phase. Each quantum bit is acted upon by one and only one phase rotation gate. The phase rotation gates on adjacent quantum bits act upon different timing sequences. Each quantum bit is a target quantum bit of one controlled NOT gate and a control quantum bit of another controlled NOT gate.

[0024] The running module is used to run the variable quantum circuit to obtain the target quantum phase.

[0025] Thirdly, the present invention provides a storage medium storing a computer program, wherein the computer program is configured to implement the aforementioned method when running.

[0026] Fourthly, the present invention provides an electronic device including a memory and a processor, wherein the memory stores a computer program and the processor is configured to run the computer program to implement the aforementioned method.

[0027] Compared with existing technologies, this invention designs a phase loading method based on variable quantum circuits that is friendly to real chips, thereby achieving effective phase approximation loading, simplifying the phase loading circuit, effectively demonstrating the circuit on current superconducting quantum computers, and easily implementing certain algorithms and applications on real chips. Attached Figure Description

[0028] Figure 1 This is a network block diagram of a quantum circuit construction system provided in an embodiment of this application;

[0029] Figure 2 This is a schematic flowchart of a phase loading method based on a variable quantum line provided in an embodiment of this application;

[0030] Figure 3 This is a schematic diagram of a variable quantum circuit provided in an embodiment of the present invention;

[0031] Figure 4 This is a schematic diagram of a circuit fabrication apparatus provided in an embodiment of the present invention. Detailed Implementation

[0032] The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and should not be construed as limiting the present invention.

[0033] [Structure of a quantum circuit construction system]

[0034] Figure 1 This is a network block diagram of a quantum circuit construction system provided in an embodiment of this application. The quantum circuit construction system may include a network 110, a server 120, a wireless device 130, a client 140, a storage unit 150, a classical processing system 160, a quantum processing system 170, and may also include additional memory, a classical processor, a quantum processor, and other devices not shown.

[0035] Network 110 is a medium used to provide communication links between various devices and computers connected together within a quantum circuit construction system, including but not limited to the Internet, corporate intranets, local area networks, mobile communication networks, and combinations thereof. The connection method can be wired, wireless communication links, or fiber optic cables.

[0036] Server 120 and client 140 are conventional data processing systems that may contain data and applications or software tools that perform conventional computational processes. Client 140 may be a personal computer or a network computer, so the data may also be provided by server 120. Wireless device 130 may be a smartphone, tablet, laptop, smart wearable device, etc. Storage unit 150 may include database 151, which can be configured to store data such as qubit parameters, quantum logic gate parameters, quantum circuits, and quantum programs.

[0037] The classical processing system 160 (quantum processing system 170) may include a classical processor 161 (quantum processor 171) for processing classical data (quantum data) and a memory 163 (memory 172) for storing classical data (quantum data). The classical data (quantum data) may be a boot file, an operating system image, and an application program 162 (application program 173). The application program 162 (application program 173) may be used to implement a quantum algorithm compiled according to the quantum circuit construction method provided in the embodiments of this application.

[0038] Any data or information stored or generated in the classical processing system 160 (quantum processing system 170) can also be configured to be stored or generated in another classical (quantum) processing system in a similar manner, and any application executed therein can also be configured to be executed in another classical (quantum) processing system in a similar manner.

[0039] It should be noted that a true quantum computer has a hybrid structure, which includes at least... Figure 1 The system consists of two main parts: the classical processing system 160, which is responsible for performing classical calculations and control; and the quantum processing system 170, which is responsible for running quantum programs and thus realizing quantum computing.

[0040] The aforementioned classical processing system 160 and quantum processing system 170 can be integrated into a single device or distributed across two different devices. For example, the first device, including the classical processing system 160, runs a classical computer operating system that provides quantum application development tools and services, as well as the storage and network services required for quantum applications. Users develop quantum applications using the quantum application development tools and services on the second device and send the quantum program to the second device, including the quantum processing system 170, via the network services. The second device runs a quantum computer operating system, which parses the code of the quantum program and compiles it into instructions that can be recognized and executed by the quantum computer control system. The quantum processor 170 then implements the quantum algorithm corresponding to the quantum program based on these instructions.

[0041] In the classic silicon-based processing system 160, the units of the classic processor 161 are CMOS transistors. These computing units are not limited by time or coherence; that is, they are available at any time without time constraints. Furthermore, the number of these computing units in a silicon chip is sufficient; currently, a classic processor contains tens of thousands of computing units. The sufficient number of computing units and the fixed selectable computing logic of the CMOS transistors, such as AND logic, allow for computational efficiency through a combination of numerous CMOS transistors and limited logic functions.

[0042] Unlike the logic units in the classical processing system 160, the basic computational unit of the quantum processor 171 in the quantum processing system 170 is the qubit. The input of a qubit is limited by coherence and coherence time; that is, a qubit is limited by its available usage time and is not always readily available. Making full use of qubits within their available usage time is a key challenge in quantum computing. Furthermore, the number of qubits in a quantum computer is one of the representative indicators of its performance. Each qubit performs computational functions through on-demand configured logic functions. Given the limited number of qubits and the diverse logic functions available in quantum computing, such as Hadamard gates (H gates), Pauli-X gates (X gates), Pauli-Y gates (Y gates), Pauli-Z gates (Z gates), RX gates, RY gates, RZ gates, CNOT gates, CR gates, iSWAP gates, Tofoli gates, etc., quantum computing requires combining a limited number of qubits with diverse logic function combinations to achieve computational effects.

[0043] Based on these differences, the design of logical functions applied to qubits (including the design of whether qubits are used and the design of the efficiency of each qubit's use) is crucial to improving the computational performance of quantum computers and requires specialized design. The aforementioned design considerations for qubits are technical issues that ordinary computing devices do not need to address.

[0044] Phase loading method based on variable quantum circuits

[0045] Many quantum algorithms can be categorized as variational phase loaders. For example, Grover phase flippers, quantum comparison phase flippers, the cost layer in QAOA, and analog-digital algorithms all require the use of phase loading methods.

[0046] Assume it has quantum states: |q0q1,...,q n-1 The phase loading method provided by this invention aims to achieve the transformation of |q0q1,...,q n-1 >converted to Thus, effective quantum phase loading is achieved. Here, f is a real function of the input quantum state.

[0047] In the Grover phase flip application, assume there is a phase to be flipped to mark the desired amplitude. Then, the function f needs to be designed to turn it into an Oracle finder. Let the set S represent the quantum states to be queried. At this time, the function f can be written as

[0048] In the quantum comparison phase flipper, it is often necessary to filter out quantum states greater than or less than a certain integer. For example, there is Then, the function f can be written as an indicator jump function

[0049] In the cost layer design of QAOA, taking the fully connected max - cut problem as an example (only considering two - qubit gates), the desired cost layer is RZZ(α ij ), i < j. In fact, the phase corresponding to the implemented |q0q1,...,q n-1 > is:

[0050] Then, the function f can be written as:

[0051]

[0052] In existing phase loading methods, for example, the QAOA algorithm uses the RZZ gate for design. The angle of the RZZ gate is implemented through two CX gates and one RZ gate. This requires a large number of SWAP gates to be operated in the case of some non - fully - connected topologies. Or the algorithms in the comparison phase flipper need to use multi - controlled Z gates to filter out certain states to complete the state comparison flip. Or the Oracle design in the Grover algorithm may require extremely complex circuits and auxiliary qubits, making it difficult to demonstrate on a real chip.

[0053] Therefore, as shown in Figure 2 This invention provides a phase loading method based on variational quantum circuits with high generality and fully compatible with the chip topology, which is used to load the phase of the quantum circuit to complete the successful operation of certain algorithms or to successfully run on a quantum computer with a topology. Specifically, the phase loading method includes the following steps:

[0054] Step S101: Obtain n qubits. This number can be determined based on the number of qubits supported by the quantum device. Generally, it is less than or equal to the number of qubits supported. When the number of qubits supported by the quantum device is relatively large, the number of qubits required for preparation can be selected as appropriate.

[0055] Step S102: Construct a variable quantum circuit, which includes a phase rotation gate and a controlled NOT gate, wherein:

[0056] Phase rotation gates are used to control phase rotation. Each qubit is acted upon by one and only one phase rotation gate. The phase rotation gates on adjacent qubits act upon different timing sequences, making each phase rotation gate linearly independent and impossible to merge.

[0057] Each qubit consists of a target qubit with a controlled NOT gate and a control qubit with another controlled NOT gate. When a qubit acts as the target qubit, it will also act as the control qubit. This allows for better interaction of bit information and facilitates information exchange between any qubits in a multi-qubit system. This configuration makes it easy to implement at the current level of superconducting quantum computing chips.

[0058] Step S103: Run the variable quantum circuit to obtain the target quantum phase.

[0059] The above embodiments achieve effective phase approximation loading by designing a phase loading method based on variable quantum circuits that is friendly to real chips. This simplifies the phase loading circuit, enables circuit demonstration on current superconducting quantum computers, and facilitates the implementation of certain algorithms and applications on real chips.

[0060] Furthermore, in step S102, along the operating timing, the variable quantum circuit includes multiple layers of sub-variable quantum circuits. Each layer of sub-variable quantum circuits has multiple phase rotation gates and multiple controlled NOT gates. A sub-variable quantum circuit can be understood as performing a round of bit information exchange for each quantum bit. During the bit information exchange process, bit information exchange can be performed on all quantum bits in a sub-variable quantum circuit, or it is not necessary for each layer of sub-variable quantum circuits to exchange all bit information. Thus, the total number of controlled NOT gates included in different logic processing layers can be set differently, which helps to reduce the total number of controlled NOT gates required in the quantum circuit and is more conducive to implementation at the chip level.

[0061] in:

[0062] The qubits acted upon by phase rotation gates within a subvariable quantum circuit are the control qubits of controlled NOT gates within the same layer of the subvariable quantum circuit. The controlled NOT gates within the same layer act after the phase rotation gates. The qubits acted upon by phase rotation gates within a subvariable quantum circuit are the target qubits of controlled NOT gates in different layers of the subvariable quantum circuit. Each qubit is treated as a target qubit of a controlled NOT gate before a phase rotation gate is applied to adjust the phase state of the quantum state, thereby facilitating more accurate interaction of bit information.

[0063] Each phase rotation gate in a quantum bit has only one phase rotation gate, and is also a control quantum bit with a controlled NOT gate and a target quantum bit with another controlled NOT gate. This further reduces the total number of logic gates in the quantum circuit, making it easier to implement certain algorithms and applications on real chips.

[0064] In a variable quantum circuit, each controlled NOT gate acts on two preset qubits. These two qubits can be two adjacent qubits or two qubits at positions separated by a certain distance, depending on the circuit settings. No limitation is made here. Along the action sequence, each layer of the sub-variable quantum circuit includes at least one controlled NOT gate, and the controlled NOT gates in the same layer of the sub-variable quantum circuit all act on the same action sequence.

[0065] In the embodiments provided by the present invention, reference is made to Figure 3 As shown, Figure 3 This is a schematic diagram of a variable quantum circuit provided in an embodiment of the present invention. It should be understood that... Figure 3 This example uses four qubits controlled by a quantum circuit. In actual implementations, the number of qubits controlled by the quantum circuit can be limited according to specific circumstances. Figure 3 The text primarily presents a logic gate connection method for variable quantum circuits, specifically:

[0066] Each qubit within a variable quantum circuit needs to be uniquely identified; therefore, each qubit is assigned a unique number to distinguish different qubits. In the embodiments provided by this invention, the qubits within the variable quantum circuit are numbered sequentially from the least significant bit to the most significant bit. For example, referring to... Figure 3 As shown, the variable quantum circuit has 4 qubits, which are numbered sequentially from 1 to 4. Qubit 1 is located at the top of the diagram and is also the lowest qubit, while qubit 4 is located at the bottom of the diagram and is also the highest qubit.

[0067] The controlled NOT gate includes a first controlled NOT gate and a second controlled NOT gate. Along the operating sequence, the first controlled NOT gate is located in the preceding subvariable quantum circuit, and the second controlled NOT gate is located in the following subvariable quantum circuit. The target qubit of the first controlled NOT gate is the control qubit of the second controlled NOT gate, and the control qubit of the first controlled NOT gate is the target qubit of the second controlled NOT gate. This method facilitates the establishment of entanglement between the qubits, thereby enabling the qubits to exchange bit information.

[0068] Reference Figure 3 As shown, the quantum circuit within the dashed box on the left is the first subvariable quantum circuit. The first controlled NOT gate acts on every two adjacent qubits. The control qubit of the first controlled NOT gate is the relatively low-order qubit, i.e., the odd-numbered qubit, and the target qubit is the relatively high-order qubit, i.e., the even-numbered qubit. The quantum circuit within the dashed box on the right is the second subvariable quantum circuit. Excluding the lowest and highest qubits, the second controlled NOT gate acts on every two adjacent qubits. Among the adjacent qubits, the control qubit of the second controlled NOT gate is the relatively low-order qubit, i.e., the even-numbered qubit, and the target qubit is the relatively high-order qubit, i.e., the odd-numbered qubit. A second controlled NOT gate acts on both the lowest and highest qubits. The control qubit of this second controlled NOT gate is the highest-order qubit, and the target qubit is the lowest-order qubit.

[0069] The phase rotation gate includes a first phase rotation gate and a second phase rotation gate. Along the action sequence, the first phase rotation gate is located on the preceding subvariable quantum line, and the second phase rotation gate is located on the following subvariable quantum line. The first phase rotation gate and the second phase rotation gate act on adjacent qubits.

[0070] Reference Figure 3 As shown, the first phase rotation gates in the first subvariant quantum circuit are all applied to an even number of qubits, and there is a qubit between the two first phase rotation gates. In the second subvariant quantum circuit, the second phase rotation gates are all applied to an odd number of qubits, and there is a qubit between the two second phase rotation gates. Each phase rotation gate is linearly independent and cannot be merged.

[0071] Reference Figure 3 As shown, along the action sequence, after the multi-layer subvariable sub-circuit, there is also an inverse circuit. The inverse circuit includes several controlled NOT gates. The controlled NOT gates in the inverse circuit correspond to all the controlled NOT gates in the multi-layer subvariable sub-circuit. The action sequence of the controlled NOT gates in the inverse circuit is opposite to the action sequence of all the controlled NOT gates in the multi-layer subvariable sub-circuit.

[0072] In the embodiments provided by this invention, the phase rotation gate is an RZ gate or a P gate. Both RZ and P gates are single-qubit gates used to change the phase of a qubit without changing its probability amplitude. They are commonly used to introduce phase changes in quantum algorithms. Preferably, the phase rotation gate is an RZ gate, and the matrix form of an RZ gate is:

[0073]

[0074] by Figure 3 For example, a four-bit quantum phase is considered, and the desired quantum phase is... The variable quantum circuit can be determined based on the traversal results:

[0075] 0000→-θ1-θ2-θ3-θ4

[0076] |0001>→.... ...

[0078] 1111→-θ1-θ2+θ3+θ4

[0079] Each row needs to be approximately equal to f(q0,...,q). n-1 For example, the first row needs to be approximately equal to f(0, 0, 0, 0), the second row needs to be approximately equal to f(0, 0, 0, 1), and so on.

[0080] Therefore, we can write it in matrix form as Aθ≈f, where matrix A represents the positive and negative coefficient matrix, and the size of matrix A is N=2. n Rows, m columns, where m represents the number of phase rotation gates, θ is a column vector of length m, and f represents the target phase function, f is a column vector of length N=2. n The column vectors. For approximation, a SVD method (supreme square root method) is used to find the pseudo-inverse, i.e., the least squares method, to solve for the parameter θ. The solved parameter result can be expressed as θ≈(A T A) -1 A T f.

[0081] [Structure of the Circuit Fabrication Device]

[0082] See Figure 4 As shown, the circuit fabrication apparatus includes:

[0083] The acquisition module obtains n qubits, which can be determined based on the number of qubits supported by the quantum device. Generally, it is less than or equal to the number of supported qubits. When the quantum device supports a large number of qubits, the required number of qubits can be selected as needed.

[0084] The variable quantum circuit construction module is used to construct variable quantum circuits, which include phase rotation gates and controlled NOT gates. The phase rotation gate is used to control the rotation of the phase. Each quantum bit is acted on by one and only one phase rotation gate. The phase rotation gates on adjacent quantum bits act on different timing sequences, making each phase rotation gate linearly independent and impossible to merge.

[0085] Each qubit consists of a target qubit with a controlled NOT gate and a control qubit with another controlled NOT gate. When a qubit acts as the target qubit, it will also act as the control qubit. This allows for better interaction of bit information and facilitates information exchange between any qubits in a multi-qubit system. This configuration makes it easy to implement at the current level of superconducting quantum computing chips.

[0086] The execution module is used to run variable quantum circuits to obtain the target quantum phase.

[0087] The operating module is a quantum system capable of running quantum circuits. For example, a quantum hardware system including a quantum processor and a quantum measurement and control system with communication connection is a system. The quantum processor refers to a quantum chip, and the quantum measurement and control system is used to provide analog signals for implementing quantum logic gates in the quantum circuit. These analog signals act on the quantum chip to realize the operation of the quantum circuit.

[0088] [Structure of storage media]

[0089] This invention also provides a storage medium storing a computer program, wherein the computer program is configured to implement the steps in any of the above method embodiments when running.

[0090] Specifically, in this embodiment, the storage medium can be configured to store a computer program for implementing the following steps:

[0091] Step S101: Obtain n qubits.

[0092] Step S102: Construct a variable quantum circuit, which includes a phase rotation gate and a controlled NOT gate. The phase rotation gate is used to control the rotation of the phase. Each qubit is acted on by one and only one phase rotation gate. The phase rotation gates on adjacent qubits act on different timing sequences. Each qubit is the target qubit of one controlled NOT gate and the control qubit of another controlled NOT gate.

[0093] Step S103: Run the variable quantum circuit to obtain the target quantum phase.

[0094] Structure of electronic devices

[0095] This invention also provides an electronic device, including a memory and a processor, wherein the memory stores a computer program and the processor is configured to run the computer program to implement the steps in any of the above method embodiments.

[0096] Specifically, the aforementioned electronic device may further include a transmission device and an input / output device, wherein the transmission device is connected to the aforementioned processor, and the input / output device is connected to the aforementioned processor.

[0097] Specifically, in this embodiment, the processor described above can be configured to implement the following steps via a computer program:

[0098] Step S101: Obtain n qubits.

[0099] Step S102: Construct a variable quantum circuit, which includes a phase rotation gate and a controlled NOT gate. The phase rotation gate is used to control the rotation of the phase. Each qubit is acted on by one and only one phase rotation gate. The phase rotation gates on adjacent qubits act on different timing sequences. Each qubit is the target qubit of one controlled NOT gate and the control qubit of another controlled NOT gate.

[0100] Step S103: Run the variable quantum circuit to obtain the target quantum phase.

[0101] The above description, based on the embodiments shown in the figures, details the structure, features, and effects of the present invention. The above description is only a preferred embodiment of the present invention, but the present invention is not limited to the scope of implementation shown in the figures. Any changes made in accordance with the concept of the present invention, or equivalent embodiments modified to have equivalent changes, that do not exceed the spirit covered by the specification and figures, should be within the protection scope of the present invention.

Claims

1. A phase loading method based on a variable quantum circuit, characterized in that, The method includes: Obtain n qubits; A variable quantum circuit is constructed, which includes a phase rotation gate and a controlled NOT gate. The phase rotation gate is used to control the rotation of the phase. Each quantum bit is acted on only one phase rotation gate. The phase rotation gates on adjacent quantum bits act on different timing sequences. Each quantum bit is a target quantum bit of one controlled NOT gate and a control quantum bit of another controlled NOT gate. The variable quantum circuit is run to obtain the target quantum phase.

2. The method according to claim 1, characterized in that, Along the operational timing sequence, the variable component sub-circuit includes multiple layers of sub-variable component sub-circuit, each layer of which contains multiple phase rotation gates and multiple controlled NOT gates, wherein: The quantum bits that act on the phase rotation gate in the subvariable sub-circuit are the control quantum bits of the controlled NOT gate in the same layer of the subvariable sub-circuit. The qubits acting on the phase rotation gates within the subvariant quantum circuits are the target qubits of the controlled NOT gates within the subvariant quantum circuits of different layers.

3. The method according to claim 2, characterized in that, The controlled NOT gate includes a first controlled NOT gate and a second controlled NOT gate. Along the operating timing, the first controlled NOT gate is located in the previous subvariable quantum line, and the second controlled NOT gate is located in the next subvariable quantum line. The target qubit of the first controlled NOT gate is a control qubit of the second controlled NOT gate, and the control qubit of the first controlled NOT gate is the target qubit of another second controlled NOT gate.

4. The method according to claim 2, characterized in that: The phase rotation gate includes a first phase rotation gate and a second phase rotation gate. Along the operating timing, the first phase rotation gate is located on the preceding subvariable quantum line, and the second phase rotation gate is located on the following subvariable quantum line. The first phase rotation gate and the second phase rotation gate operate on adjacent qubits.

5. The method according to claim 2, characterized in that: Following the operating sequence, an inverse circuit operates after the multi-layer subvariable sub-circuit. The inverse circuit includes several controlled NOT gates, which correspond to all the controlled NOT gates in the multi-layer subvariable sub-circuit. The operating sequence of the controlled NOT gates in the inverse circuit is opposite to that of all the controlled NOT gates in the multi-layer subvariable sub-circuit.

6. The method according to claim 1, characterized in that: The rotation parameters of the phase rotation gate satisfy the following formula: θ≈(A T A) -1 A T f; Wherein, θ represents the rotation parameter vector of the phase rotation gate, A represents the positive and negative coefficient matrix, and f represents the target phase function.

7. The phase loading method based on variable quantum circuits according to claim 6, characterized in that: Traversing all quantum states, we can represent them in matrix form as Aθ≈f, where the size of matrix A is N=2. n The vector consists of rows and m columns, where θ is a column vector of length m and f is a column vector of length N = 2. n Given a column vector, we can use the least squares method to solve for the parameter θ. The result of the solution is θ≈(A T A) -1 A T f.

8. A circuit fabrication apparatus, characterized in that, The device includes: The module acquires n qubits; A variable quantum circuit construction module is used to construct variable quantum circuits, which include phase rotation gates and controlled NOT gates. The phase rotation gates are used to control the rotation of the phase. Each quantum bit is acted upon by one and only one phase rotation gate. The phase rotation gates on adjacent quantum bits act upon different timing sequences. Each quantum bit is a target quantum bit of one controlled NOT gate and a control quantum bit of another controlled NOT gate. The running module is used to run the variable quantum circuit to obtain the target quantum phase.

9. A storage medium, characterized in that, The storage medium stores a computer program, wherein the computer program is configured to implement the method according to any one of claims 1 to 7 when it is run.

10. An electronic device comprising a memory and a processor, characterized in that, The memory stores a computer program, and the processor is configured to run the computer program to implement the method according to any one of claims 1 to 7.

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