Printed circuit board

Abstract

Disclosed is a printed circuit board including: a first insulating layer having a first surface and a second surface opposite to each other in a thickness direction; the conductive via hole is formed in a through hole, and the through hole extends in the first insulating layer in the thickness direction; and a first pad on the first surface of the first insulating layer and including a first conductor layer and a second conductor layer, and the second conductor layer is disposed on the first conductor layer and the conductive via. The conductive via extends outwardly from the first surface of the first insulating layer beyond the first conductor layer.

Description

[0001] This application claims the benefit of priority to Korean Patent Application No. 10-2024-0142937, filed on October 18, 2024, with the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0002] This disclosure relates to a printed circuit board. Background Technology

[0003] In response to the latest trends in lightweighting and miniaturization of mobile devices, the demand for thinner and lighter printed circuit boards (PCBs) mounted on these devices is increasing. Furthermore, as mobile devices become lighter and thinner, undercutting can occur during the manufacturing process of fine circuitry, potentially leading to defects in these delicate circuits. To address this technological need, ongoing research is underway to implement circuits with fine linewidths and spacing (i.e., pitch) on PCBs and to improve the reliability of these PCBs. Summary of the Invention

[0004] This disclosure relates to providing a printed circuit board on which circuits with fine linewidths and spacing can be implemented.

[0005] According to an example embodiment of this disclosure, a printed circuit board includes: a first insulating layer having a first surface and a second surface opposite to each other in a thickness direction; a conductive via disposed in a through-hole, the through-hole being formed in the first insulating layer along the thickness direction; and a first pad disposed on the first surface side of the first insulating layer, and including a first conductor layer and a second conductor layer, the second conductor layer being disposed on the first conductor layer and the conductive via, wherein the conductive via has a form that protrudes beyond the first conductor layer from the first surface to the outside of the first insulating layer.

[0006] The conductive via can be connected to the second conductor layer, and the first conductor layer can surround the side surface of the conductive via.

[0007] The region of the second conductor layer corresponding to the conductive via may have an outwardly protruding shape.

[0008] The printed circuit board may further include an inner conductor layer disposed between the inner wall of the through hole and the conductive via.

[0009] The conductive via may have the form of protruding from the first surface outwards beyond the inner conductor layer of the first insulating layer.

[0010] The inner conductor layer can form an interface with the first conductor layer and can contact the first conductor layer.

[0011] The inner conductor layer can form an interface with the second conductor layer and can contact the second conductor layer.

[0012] The side surface of the inner conductor layer can contact the side surface of the first conductor layer.

[0013] The upper surface of the inner conductor layer and the upper surface of the first conductor layer can form a coplanar surface.

[0014] The upper surface of the inner conductor layer and the upper surface of the first conductor layer may contact the lower surface of the second conductor layer.

[0015] The inner conductor layer may not cover the upper surface of the first conductor layer.

[0016] The inner conductor layer may include a first inner conductor layer and a second inner conductor layer, wherein the first inner conductor layer may be configured to be closer to the inner wall of the via than the second inner conductor layer.

[0017] The conductive via may extend outward from the first surface of the first insulating layer beyond the first inner conductor layer and the second inner conductor layer.

[0018] The thickness of the first conductor layer can be greater than or equal to 0.5 μm and less than or equal to 2 μm.

[0019] The distance by which the first pad protrudes laterally relative to the inner wall of the through hole can be less than or equal to 25 μm.

[0020] According to another example embodiment of this disclosure, a printed circuit board includes: a first insulating layer having a first surface and a second surface opposite to each other in a thickness direction; a through-hole extending through the first insulating layer in the thickness direction; an inner conductor layer disposed on the inner wall of the through-hole; a conductive via disposed in the through-hole and protruding beyond the first insulating layer from both the first surface and the second surface; a first conductor layer disposed on the first surface of the first insulating layer and in contact with the conductive via; and a second conductor layer disposed on the second surface of the first insulating layer and in contact with the conductive via, wherein the conductive via protrudes beyond the inner conductor layer in both an upward and downward direction. Attached Figure Description

[0021] The above and other aspects, features and advantages of this disclosure will become clearer from the following detailed embodiments, taken in conjunction with the accompanying drawings, in which: Figure 1 It is a block diagram that schematically illustrates an example of an electronic device system; Figure 2 It is a perspective view schematically illustrating an example of an electronic device; Figure 3 This is a schematic cross-sectional view illustrating an example of a printed circuit board; Figure 4 yes Figure 3 A magnified view of region A; Figure 5 This is a schematic cross-sectional view illustrating another example of a printed circuit board; and Figures 6 to 14 An example of a method for manufacturing printed circuit boards is shown. Detailed Implementation

[0022] In the following description, embodiments of the present disclosure will be illustrated with reference to the accompanying drawings. However, the present disclosure may be exemplified in many different forms and should not be construed as being limited to the specific embodiments set forth herein. Rather, these embodiments are provided so that the present disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art. Therefore, for clarity of description, the shape and size of the elements in the drawings may be exaggerated, and in the drawings, elements denoted by the same reference numerals are the same elements.

[0023] Electronic devices Figure 1 This is a block diagram that schematically illustrates an example of an electronic device system.

[0024] Reference Figure 1 The electronic device 1000 may house a motherboard 1010. Chip-related components 1020, network-related components 1030, and other components 1040 may be physically and / or electrically connected to the motherboard 1010. These components may be connected to other electronic components described below via various signal lines 1090.

[0025] Chip-related components 1020 may include: memory chips, such as volatile memory (e.g., dynamic random access memory (DRAM)), non-volatile memory (e.g., read-only memory (ROM), flash memory), etc.; application processor chips, such as central processing units (e.g., central processing units (CPU)), graphics processing units (e.g., graphics processing units (GPUs)), digital signal processors, encryption processors, microprocessors, microcontrollers, etc.; and logic chips, such as analog-to-digital converters (ADCs), application-specific integrated circuits (ASICs), etc. However, chip-related components 1020 are not limited to these and may also include other types of chip-related components. Furthermore, chip-related components 1020 can be combined with each other. Chip-related components 1020 may be in the form of a package including the aforementioned chips or electronic components.

[0026] Network-related components 1030 may include components compatible with or operating according to protocols such as: Wireless Fidelity (Wi-Fi) (such as the IEEE 802.11 series), Global Microwave Access Interoperability (WiMAX) (such as the IEEE 802.16 series), IEEE 802.20, Long Term Evolution (LTE), Evolved Data Optimized (Ev-DO), High Speed ​​Packet Access+ (HSPA+), High Speed ​​Downlink Packet Access+ (HSDPA+), High Speed ​​Uplink Packet Access+ (HSUPA+), Global System for Mobile Communications (GSM), Evolution of GSM with Enhanced Data Rates (EDGE), Global Positioning System (GPS), General Packet Radio Service (GPRS), Code Division Multiple Access (CDMA), Time Division Multiple Access (TDMA), Digital Enhanced Cordless Telecommunications (DECT), Bluetooth, Wireless Local Area Network (Wireless LAN), 3G, 4G, and 5G protocols, and any other wireless or wired protocols specified after the aforementioned protocols. However, network-related component 1030 is not limited to these and may also include components compatible with or operating according to various other wireless or wired standards or protocols. Furthermore, network-related component 1030 may be combined with the aforementioned chip-related component 1020.

[0027] Other components 1040 may include high-frequency inductors, ferrite inductors, power inductors, ferrite beads, low-temperature co-fired ceramic (LTCC) components, electromagnetic interference (EMI) filters, multilayer ceramic capacitors (MLCCs), etc. However, other components 1040 are not limited to these and may also include passive components for various other purposes. Furthermore, other components 1040 may be combined with the aforementioned chip-related components 1020 and / or network-related components 1030.

[0028] Depending on the type of electronic device 1000, it may include other electronic components that are physically and / or electrically connected to the motherboard 1010 or not physically and / or electrically connected to the motherboard 1010. These other electronic components may include, for example, a camera 1050, an antenna 1060, a display 1070, and a battery 1080. However, other electronic components are not limited to these and may include audio codecs, video codecs, power amplifiers, compasses, accelerometers, gyroscopes, speakers, mass storage units (e.g., hard disk drives), optical disc (CD) drives, digital versatile disc (DVD) drives, etc. Depending on the type of electronic device 1000, it may also include other electronic components for various purposes.

[0029] Electronic device 1000 can be a smartphone, personal digital assistant (PDA), digital camera, digital video camera, network system, computer, monitor, tablet PC, laptop PC, netbook, television, video game console, smartwatch, automotive component, etc. However, electronic device 1000 is not limited to these and can be any other electronic device capable of processing data.

[0030] Figure 2 It is a perspective view schematically showing an example of an electronic device.

[0031] Reference Figure 2 The electronic device may be a smartphone 1100. A motherboard 1110 may be housed in the smartphone 1100, and various components 1120 may be physically connected to and / or electrically connected to the motherboard 1110. Furthermore, other electronic components (such as a camera module 1130 and / or a speaker 1140) that are physically connected to and / or electrically connected to the motherboard 1110 or not physically connected to and / or electrically connected to the motherboard 1110 may be housed in the smartphone 1100. A portion of component 1120 (e.g., component package 1121) may be a chip-related component, but its exemplary embodiments are not limited thereto. Component package 1121 may be in the form of a printed circuit board on which electronic components (including active and / or passive components) are surface-mounted. Alternatively, component package 1121 may be in the form of a printed circuit board in which electronic components (including active and / or passive components) are embedded. The electronic device is not necessarily limited to the smartphone 1100 and may be other electronic devices as described above.

[0032] Printed Circuit Board Figure 3 It is a schematic cross-sectional view of an example of a printed circuit board, and Figure 4 yes Figure 3 A magnified view of region A. (Refer to...) Figure 3 and Figure 4 The printed circuit board 100 according to this embodiment includes a first insulating layer 101, a conductive via 130, and a first pad 110 including a first conductor layer 111 and a second conductor layer 112. Here, the conductive via 130 extends outward from the first surface S1 of the first insulating layer 101 (towards...). Figure 3 The conductive via 130 (as shown above) extends (or protrudes) beyond the first conductor layer 111. When the conductive via 130 protrudes beyond the first conductor layer 111 and the second conductor layer 112 is connected to the conductive via 130, the electrical and physical contact characteristics between the conductive via 130 and the first pad 110 are improved. Additionally, this structure is suitable for minimizing the conductive via 130, the first conductor layer 111, the second conductor layer 112, etc., and reducing the pitch. The main elements of the printed circuit board will be described in more detail below.

[0033] The first insulating layer 101 may be a core insulating layer. The first insulating layer 101 may include an insulating material, such as an insulating resin (such as a thermosetting resin (such as epoxy resin) or a thermoplastic resin (such as polyimide)), a material prepared by mixing a thermosetting resin and / or a thermoplastic resin with an inorganic filler (such as silica), or a material prepared by impregnating a core material (such as glass fiber (such as glass fabric, for example glass cloth)) together with an inorganic filler into a thermosetting resin and / or a thermoplastic resin (e.g., copper-clad laminate (CCL)), but exemplary embodiments thereof are not limited thereto. The first insulating layer 101 has a thickness direction ( Figure 3 The first surface S1 and the second surface S2 are opposite to each other in the vertical direction shown in the diagram. Additionally, a through-hole H (such as...) is formed in the first insulating layer 101 along the thickness direction. Figure 7 As shown). Figure 3 As shown, the first insulating layer 101 may be thicker than the second insulating layer 102 and the third insulating layer 103, which are respectively disposed on the first surface S1 side and the second surface S2 side. In this case, the thickness of the corresponding layer can be measured using a scanning electron microscope or an optical microscope based on a cross-section obtained by polishing or cutting the printed circuit board in the vertical direction. When the thickness is not constant, the thickness relationship between the corresponding layers can be compared by using the average of the thicknesses of the corresponding layers measured at five arbitrary points.

[0034] The second insulating layer 102 may be disposed on the first surface S1 side, and the third insulating layer 103 may be disposed on the second surface S2 side. In this case, the second insulating layer 102 and the third insulating layer 103 may be stacked insulating layers. Each of the second insulating layer 102 and the third insulating layer 103 may include multiple stacked insulating layers, and in this case, the multiple stacked insulating layers may be integrated with each other without boundaries, or the multiple stacked insulating layers may be separated from each other. As an example of the insulating material that may be included in the second insulating layer 102 and the third insulating layer 103, insulating resins (such as thermosetting resins (such as epoxy resins) or thermoplastic resins (such as polyimide)) may be used, materials prepared by mixing thermosetting resins and / or thermoplastic resins with inorganic fillers (such as silica), or materials prepared by impregnating a core material (such as glass fiber (such as glass fabric, for example glass cloth)) together with inorganic fillers into thermosetting resins and / or thermoplastic resins (e.g., Ajinomoto stacked film (ABF), prepreg, etc.), but the exemplary embodiments are not limited thereto.

[0035] The printed circuit board 100 may further include a second pad 120 and an inner conductor layer 140. A conductive via 130 may be disposed in a via H, which is formed along the thickness direction in the first insulating layer 101, and the first pad 110 and the second pad 120 may be connected to each other through the conductive via 130. Additionally, the inner conductor layer 140 may be disposed between the inner wall of the via H and the conductive via 130, and in this case, the inner conductor layer 140 may include multiple conductor layers; for example, the inner conductor layer 140 may include a first inner conductor layer 141 and a second inner conductor layer 142. Here, the first inner conductor layer 141 may be positioned closer to the inner wall of the via H than the second inner conductor layer 142.

[0036] The conductive via 130 may comprise metallic materials such as copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof, and may perform various functions depending on its design. For example, the conductive via 130 may comprise a grounding via, a power via, a signal via, etc. In the example, after forming the inner conductor layer 140 by plating, the conductive via 130 may be formed by filling the via H with a plug. Based on the plane of the printed circuit board viewed from above, the conductive via 130 may have a generally circular or elliptical shape. Furthermore, in terms of ensuring adhesion by increasing the specific surface area, the conductive via 130 may have a polygonal shape and a flower shape in which many circles or ellipses are stacked on the aforementioned plane; for example, the flower shape may represent a shape in which multiple petals are arranged around a stamen in a radially symmetrical or bilaterally symmetrical manner. Specifically, when viewed from above, the conductive via 130 may have a trumpet shape, a lip shape, but is not limited to these; the conductive via 130 may have other flower shapes.

[0037] The first pad 110 is disposed on the first surface S1 side and includes a first conductor layer 111 and a second conductor layer 112. Here, the second conductor layer 112 is disposed on the first conductor layer 111 and the conductive via 130. The second pad 120 may be disposed on the second surface S2 side of the first insulating layer 101, and the second pad 120 may include a third conductor layer 121 and a fourth conductor layer 122. The second pad 120 may be implemented in the same form as the first pad 110, and the structure of the first pad 110 and the conductive via 130 located on the first surface S1 side of the first insulating layer 101 is described below, but this description is also equally applicable to the second pad 120 and the conductive via 130 disposed on the second surface S2 side of the first insulating layer 101.

[0038] In this embodiment, the conductive via 130 has the form of protruding beyond the first conductor layer 111 from the first surface S1 toward the outside of the first insulating layer 101. Therefore, as Figure 4As shown in the enlarged view of region A, the conductive via 130 can be connected to the second conductor layer 112, and a structure can be obtained where the first conductor layer 111 surrounds the side surface of the conductive via 130. In this case, although in Figure 3 and Figure 4 The diagram shows that the upper surface of the second conductor layer 112 has a flat structure, but the upper surface of the second conductor layer 112 may also have a protruding structure. That is, as shown in the variant example... Figure 5 As shown, the region of the second conductor layer 112 corresponding to the conductive via 130 may have an outwardly protruding shape.

[0039] Reference Figure 3 and Figure 4 The shapes of the first pad 110 and the conductive via 130 will be described in more detail. As mentioned above, the inner conductor layer 140 can be provided as a plating layer on the inner wall of the via. In this case, as... Figure 3 and Figure 4 As shown, the conductive via 130 may have a form that protrudes beyond the inner conductor layer 140 from the first surface S1 toward the outside of the first insulating layer 101. The inner conductor layer 140 may include a first inner conductor layer 141 and a second inner conductor layer 142, and in this case, the conductive via 130 may have a form that protrudes beyond the first inner conductor layer 141 and the second inner conductor layer 142 from the first surface S1 toward the outside of the first insulating layer 101. Figure 3 As shown, the conductive via 130 may have a form that protrudes beyond the inner conductor layer 140 in both the upward and downward directions. However, it is not limited to this; for example, the conductive via 130 may also have a form that protrudes beyond the inner conductor layer 140 only in one of the upward and downward directions.

[0040] Furthermore, the inner conductor layer 140 may form an interface with and contact the first conductor layer 111. As a more specific example, the side surface of the inner conductor layer 140 may contact the side surface of the first conductor layer 111. The inner conductor layer 140 may form an interface with and contact the second conductor layer 112. The formation of an interface between the inner conductor layer 140 and conductor layers 111 and 112 means that the interface between the inner conductor layer 140 and conductor layers 111 and 112 is identifiable, for example, observable using a scanning electron microscope or an optical microscope. Additionally, as... Figure 4As shown, the upper surface of the inner conductor layer 140 and the upper surface of the first conductor layer 111 can form a coplanar surface, and in this case, the upper surfaces of the inner conductor layer 140 and the first conductor layer 111 can also contact the lower surface of the second conductor layer 112. As described later, this coplanar structure can be obtained by performing a polishing process on the conductor layer disposed above the first conductor layer 111 and the inner conductor layer 140. Additionally, the inner conductor layer 140 can contact the side surface of the first conductor layer 111 without covering the upper surface of the first conductor layer 111. Furthermore, the inner conductor layer 140 may include a conductive material (e.g., a metal plating formed by a plating process), and as... Figure 3 As shown, the inner conductor layer 140 may protrude beyond both the first surface S1 and the second surface S2. However, it is not limited to this; for example, the inner conductor layer 140 may protrude beyond only one of the first surface S1 and the second surface S2.

[0041] As described above, in this embodiment, the inner conductor layer 140 can be formed by a separate process (e.g., a separate plating process) instead of being integrally formed with the first conductor layer 111 or the second conductor layer 112, so that the inner conductor layer 140 can form an interface with the conductor layers 111 and 112 and can contact each other. When the inner conductor layer 140 and the second conductor layer 112 are formed simultaneously by plating and are integrally formed with each other, it may be difficult to achieve fine circuitry in subsequent etching processes. In this embodiment, the inner conductor layer 140 can be formed separately from the first conductor layer 111 or the second conductor layer 112, so that the first pad 110 can be formed with a thin and narrow shape even after etching, thus allowing a greater number of conductive vias 130 to be provided in the same space. Specifically, the thickness t of the first conductor layer 111 can be greater than or equal to 0.5 μm and less than or equal to 2 μm, and the distance d by which the first pad 110 protrudes laterally relative to the inner wall of the via H can be reduced to less than or equal to 25 μm. Therefore, the size of the first pad 110 can be reduced and the alignment with the conductive via 130 can be improved. In addition, the spacing between the conductive vias 130 can be finer; for example, the spacing between adjacent conductive vias 130 can be less than or equal to 300 μm.

[0042] Furthermore, conductor patterns 151 and 161 may be disposed on the second insulating layer 102 and the third insulating layer 103, respectively. In this case, vias 152 connecting the first pad 110 and conductor pattern 151 and vias 162 connecting the second pad 120 and conductor pattern 161 may be provided. Alternatively, according to another example, the printed circuit board may also include conductor patterns disposed at the same height as the first pad 110 and the second pad 120.

[0043] In the following text, reference will be made to Figures 6 to 14An example describing a method for manufacturing printed circuit boards. First, refer to... Figure 6 and Figure 7 A first insulating layer 101 is prepared, and a through-hole H is formed penetrating the first insulating layer 101 along its thickness direction. Conductor layers 111 and 121 can be respectively formed on the first surface S1 and the second surface S2 of the first insulating layer 101, and conductor layers 111 and 121 can be formed as the first conductor layer 111 and the third conductor layer 121 respectively by subsequent processes. Additionally, sacrificial layers 211 and 221 can be provided to cover conductor layers 111 and 121 respectively. As an example, conductor layers 111 and 121 can be copper foil, and sacrificial layers 211 and 221 can be plating layers. The through-hole H can be formed by a suitable processing method (e.g., laser processing), followed by a cleaning process.

[0044] Next, as Figure 8 As shown, an inner conductor layer 140 can be formed in the via H, and in addition to forming the inner conductor layer 140 in the via H, the inner conductor layer 140 can also be formed on the first surface S1 side and the second surface S2 side of the first insulating layer (i.e., the inner conductor layer 140 can also be formed on the sacrificial layers 211 and 221). The inner conductor layer 140 may include a first inner conductor layer 141 and a second inner conductor layer 142. In this case, the first inner conductor layer 141 can be formed by an electroless plating process, and the second inner conductor layer 142 can be formed by an electrolytic plating process. Subsequently, refer to Figure 9 and Figure 10 The conductive via 130 is formed using processes such as filling a plunger into the through-hole H, and alternatively, plating processes applicable to related technical fields can also be used. Subsequently, if desired, the outwardly protruding areas of the conductive via 130 (e.g., ...) can be removed by a polishing process. Figure 10 (as shown in the image).

[0045] Next, as Figure 11 As shown, sacrificial layers 211 and 221 can be removed, thus at least a portion of the area of ​​the inner conductor layer 140 covering the first surface S1 and the second surface S2 can be removed. Additionally, the side surface of the conductive via 130 can be exposed by the process. The area of ​​the conductive via 130 protruding vertically beyond conductor layers 111 and 121 can be left as is, or alternatively, as... Figure 12 As shown, a portion of this area can be removed to adjust the height of the protrusion. (See reference) Figure 13 and Figure 14Subsequently, conductor layers 112 and 122 can be formed, corresponding to the second conductor layer 112 and the fourth conductor layer 122 described above, respectively. As an example of the process, conductor layers 112 and 122 can be formed by forming a mask layer 250 on conductor layers 111 and 121 and then performing a patterning plating process on the open areas of conductor layers 111 and 121 not covered by the mask layer 250. Subsequently, the mask layer 250 can be removed, and a portion of conductor layers 111, 112, 121, and 122 can be removed by an etching process to obtain the first pad 110 and the second pad 120 having the above-described structure (e.g., ...). Figure 13 (As shown in the diagram). Subsequently, a printed circuit board with the above structure can be obtained through a suitable deposition process.

[0046] In this disclosure, "section" can refer to the cross-sectional shape when an object is cut vertically or the shape when the object is viewed from the side. Furthermore, "plane" can refer to the cross-sectional shape when an object is cut horizontally or the planar shape when the object is viewed from the top or bottom.

[0047] In this disclosure, the term "upper" in "upper side," "upper part," and "upper surface" refers to the upward direction based on the cross-section in the drawings, and the term "lower" in "lower side," "lower part," and "lower surface" refers to the direction opposite to the upward direction. However, this definition of direction is for ease of explanation, and the scope of the claims is not specifically limited by the description of the direction, and the concepts of upper / lower may be changed at any time.

[0048] In this disclosure, "connection" includes not only direct connections but also indirect connections such as those via adhesive layers. Furthermore, "electrical connection" encompasses both physical and non-physical connections. Additionally, expressions such as "first" and "second" are used to distinguish one component from another and do not limit the order and / or importance of the components. In some cases, without departing from the scope of the claims, a first component may be referred to as a second component, or similarly, a second component may be referred to as a first component.

[0049] The term "example embodiment" as used in this disclosure does not imply the same embodiment, but is provided to illustrate different and unique features. However, the example embodiments presented above do not preclude implementation through combinations of features with other example embodiments. For example, unless there are descriptions in other example embodiments that contradict or contradict the descriptions in a particular example embodiment, even if the content described in a particular example embodiment is not described in other example embodiments, it may be understood as a description relating to other example embodiments.

[0050] The terminology used in this disclosure is for describing exemplary embodiments only and is not intended to limit the disclosure. In this context, singular expressions include plural expressions unless explicitly stated otherwise in the context.

[0051] As described above, the printed circuit board according to embodiments of the present disclosure may be provided with circuits having fine line widths and spacings.

[0052] While exemplary embodiments have been shown and described above, it will be readily understood by those skilled in the art that modifications and variations may be made without departing from the scope of this disclosure as defined by the appended claims.

Claims

1. A printed circuit board, comprising: The first insulating layer has a first surface and a second surface that are opposite to each other in the thickness direction; A conductive via is disposed in a through hole, the through hole being formed in the first insulating layer along the thickness direction; as well as A first pad is disposed on the first surface side of the first insulating layer, and includes a first conductor layer and a second conductor layer, wherein the second conductor layer is disposed on the first conductor layer and the conductive via. The conductive via extends outward from the first surface of the first insulating layer beyond the first conductor layer.

2. The printed circuit board according to claim 1, wherein, The conductive via is connected to the second conductor layer, and The first conductor layer surrounds the side surface of the conductive via.

3. The printed circuit board according to claim 2, wherein, The region of the second conductor layer corresponding to the conductive via has an outwardly protruding shape.

4. The printed circuit board according to claim 1, further comprising: An inner conductor layer is disposed between the inner wall of the through hole and the conductive via.

5. The printed circuit board according to claim 4, wherein, The conductive via protrudes outward from the first surface of the first insulating layer beyond the inner conductor layer.

6. The printed circuit board according to claim 4, wherein, The inner conductor layer forms an interface with and is in contact with the first conductor layer.

7. The printed circuit board according to claim 4, wherein, The inner conductor layer forms an interface with the second conductor layer and is in contact with the second conductor layer.

8. The printed circuit board according to claim 4, wherein, The side surface of the inner conductor layer is in contact with the side surface of the first conductor layer.

9. The printed circuit board according to claim 8, wherein, The upper surface of the inner conductor layer forms a coplanar surface with the upper surface of the first conductor layer.

10. The printed circuit board according to claim 9, wherein, The upper surface of the inner conductor layer and the upper surface of the first conductor layer are in contact with the lower surface of the second conductor layer.

11. The printed circuit board according to claim 8, wherein, The inner conductor layer does not cover the upper surface of the first conductor layer.

12. The printed circuit board according to claim 4, wherein, The inner conductor layer includes a first inner conductor layer and a second inner conductor layer, wherein the first inner conductor layer is configured to be closer to the inner wall of the via than the second inner conductor layer.

13. The printed circuit board according to claim 12, wherein, The conductive via protrudes outward from the first surface of the first insulating layer, extending beyond the first inner conductor layer and the second inner conductor layer.

14. The printed circuit board according to claim 1, wherein, The thickness of the first conductor layer is greater than or equal to 0.5 μm and less than or equal to 2 μm.

15. The printed circuit board according to claim 1, wherein, The distance by which the first pad protrudes laterally relative to the inner wall of the through hole is less than or equal to 25 μm.

16. A printed circuit board, comprising: The first insulating layer has a first surface and a second surface that are opposite to each other in the thickness direction; A through-hole extends along the thickness direction and penetrates the first insulating layer; An inner conductor layer is disposed on the inner wall of the through hole; A conductive via is disposed in the through hole and protrudes beyond the first insulating layer from both the first surface and the second surface; A first conductor layer is disposed on the first surface of the first insulating layer and is in contact with the conductive via. as well as A second conductor layer is disposed on the second surface of the first insulating layer and contacts the conductive via. The conductive via protrudes beyond the inner conductor layer in both the upward and downward directions.

17. The printed circuit board according to claim 16, wherein, The inner conductor layer comprises a conductive material and protrudes beyond the first surface and the second surface of the first insulating layer.

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