Grid line and preparation method thereof, and photovoltaic cell

Abstract

The invention discloses a grid line, a preparation method thereof and a photovoltaic cell, and relates to the technical field of photovoltaic cells, and the preparation method of the grid line comprises the steps: printing a first slurry on a to-be-manufactured piece of the grid line according to a preset pattern to form a first grid line; and printing second slurry on the first grid line according to a preset pattern to form a second grid line. According to the grid line preparation method provided by the invention, the second grid line is printed on the first grid line, compared with an existing method for preparing the grid line through single printing, the grid line is prepared by adopting two different kinds of slurry without being limited to silver-containing slurry, the usage amount of silver can be reduced, and meanwhile, the height-width ratio of the grid line can be effectively increased through a superposition printing mode, so that the manufacturing cost of the grid line is reduced. Therefore, low series resistance is ensured, low fill factor and power output are improved, and photoelectric performance and production economy are both considered.

Description

Technical Field

[0001] This application relates to the field of photovoltaic cell technology, and in particular to a grid line and its preparation method, and a photovoltaic cell. Background Technology

[0002] In the field of photovoltaic cell manufacturing, traditional screen printing technology, as the mainstream solution for metallization, has long faced an inherent contradiction between performance and cost: the thick-film silver paste used to achieve high conductivity not only increases manufacturing costs due to the high cost of raw materials, but the resulting wide main and auxiliary grid lines also significantly obstruct the cell surface, causing optical losses; if the amount of silver paste used is reduced or alternative materials are used to lower costs, it often leads to increased grid line resistance and deteriorated contact performance, thereby impairing the cell's fill factor and final conversion efficiency. Therefore, the photovoltaic industry currently faces bottlenecks in improving conversion efficiency and pressure to control costs, and urgently needs a technical solution that balances photoelectric performance and production economics. Summary of the Invention

[0003] The main purpose of this application is to propose a grid line and its preparation method, as well as a photovoltaic cell, which aims to solve the problem that existing grid line preparation methods cannot simultaneously achieve photoelectric performance and production economy.

[0004] To achieve the above objectives, the method for fabricating gate lines proposed in this application includes: The first grid line is formed by printing the first paste onto the grid line workpiece according to the preset pattern. According to a preset pattern, a second paste is printed on the first grid line to form a second grid line.

[0005] Preferably, the step of printing the first paste onto the grid line workpiece according to a preset pattern to form the first grid line includes: A laser is used to transfer the first paste onto the grid line workpiece using a carrier.

[0006] Preferably, the wavelength of the laser is 355~532 nm, the optical power is 8~12 W, and the scanning speed is 100~150 mm / s.

[0007] Preferably, the step of printing the second paste on the first grid line to form the second grid line includes: The second material is transferred onto the first grid line using a laser and a carrier.

[0008] Preferably, the wavelength of the laser is 355~532 nm, the optical power is 3~5 W, and the scanning speed is 50~80 mm / s.

[0009] Preferably, the first slurry and the second slurry each independently include at least one of copper, nickel, tin, silver, aluminum, gold, platinum, titanium, tungsten, molybdenum, conductive adhesive, graphene, carbon nanotubes, and niobium phosphide.

[0010] Preferably, the first paste and the second paste each independently include at least one of the following: electroplating copper paste, copper paste, gold paste, aluminum paste, platinum paste, titanium paste, tungsten paste, molybdenum paste, nickel-copper alloy paste, nickel-copper-silver alloy paste, aluminum-silicon alloy paste, copper-tin alloy paste, silver-coated copper paste, conductive adhesive, graphene, reduced graphene oxide, carbon nanotubes, and niobium phosphide.

[0011] This application also proposes a gate line, which is prepared using the gate line preparation method proposed in this application.

[0012] Preferably, the gate line includes a first gate line layer and a second gate line layer, wherein the cross-section of the first gate line layer includes one of a convex arc shape or a rectangle, and the cross-section of the second gate line layer includes one of a convex arc shape, a triangle, or a trapezoid.

[0013] This application also proposes a photovoltaic cell, including grid lines prepared using the grid line preparation method provided in this application.

[0014] The grid line fabrication method provided in this application, by printing a second grid line on a first grid line, compared with the existing method of fabricating grid lines by printing a second grid line in a single printing process, uses two different pastes and is not limited to silver-containing pastes to fabricate grid lines, which can reduce the amount of silver used; at the same time, by superimposing the printing process, the aspect ratio of the grid line can be effectively increased, thereby improving the low fill factor and power output while ensuring low series resistance, thus balancing optoelectronic performance and production economy. Attached Figure Description

[0015] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on the structures shown in these drawings without creative effort.

[0016] Figure 1 A schematic flowchart illustrating the method for fabricating gate lines provided in an embodiment of this application; Figure 2 This is a schematic diagram of the cross-sectional structure of the gate wire provided in an embodiment of this application; Figure 3 This is a schematic diagram of the cross-sectional structure of another gate line provided in an embodiment of this application; Figure 4 This is a schematic diagram of the cross-sectional structure of another gate line provided in an embodiment of this application.

[0017] Explanation of icon numbers: 100, gate line; 11, first gate line layer; 12, second gate line layer; 200, gate line component to be manufactured.

[0018] The realization of the purpose, functional features and advantages of this application will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation

[0019] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of the embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this application.

[0020] It should be noted that if the embodiments of this application involve directional indicators (such as up, down, left, right, front, back, etc.), the directional indicators are only used to explain the relative positional relationship and movement of the components in a specific posture. If the specific posture changes, the directional indicators will also change accordingly.

[0021] Furthermore, if the embodiments of this application involve descriptions such as "first" or "second," these descriptions are for descriptive purposes only and should not be construed as indicating or implying their relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined with "first" or "second" may explicitly or implicitly include at least one of those features. Additionally, the use of "and / or" or "and / or" throughout the text includes three parallel solutions. For example, "A and / or B" includes solution A, solution B, or a solution that simultaneously satisfies A and B. Furthermore, the technical solutions of the various embodiments can be combined with each other, but this must be based on the ability of those skilled in the art to implement them. When the combination of technical solutions is contradictory or impossible to implement, it should be considered that such a combination of technical solutions does not exist and is not within the scope of protection claimed in this application.

[0022] This application provides a method for fabricating a gate line, such as... Figure 1 As shown, it includes: S1. Print the first paste onto the grid line workpiece according to the preset pattern to form the first grid line; S2. According to the preset pattern, print the second paste on the first grid line to form the second grid line.

[0023] The first grid line is mainly used to achieve ohmic contact with the workpiece (such as a silicon wafer). The second grid line is precisely superimposed on the first grid line, thus constructing a double-layer grid line structure with composite functions. This method can achieve the fabrication of ultrafine grid lines smaller than 20 μm, improving the light-receiving area and efficiency of the battery.

[0024] By printing a second grid line on the first grid line, compared with the existing method of preparing grid lines by single printing, two different pastes can be used to prepare grid lines and it is not limited to silver-containing pastes, which reduces the amount of silver used. At the same time, by superimposing the printing, the aspect ratio of the grid lines can be effectively increased, thereby improving the low fill factor and power output while ensuring low series resistance, thus balancing optoelectronic performance and production economy.

[0025] In some implementations, the laser is a pulsed laser.

[0026] Further, in some embodiments, step S1 can be: using a laser source to irradiate the printed circuit board from above, causing the first paste to fall onto the grid line workpiece. Specifically, the first paste can be applied to a carrier, and a portion of the first paste can be transferred to the grid line workpiece according to a preset pattern by laser irradiation, thus completing the fabrication of the first grid line. The carrier can be a donor film, microcrystalline glass, etc. The grid line workpiece can be a battery silicon wafer, etc.

[0027] In some embodiments, the wavelength of the laser is 355–532 nm. For example, the wavelength of the laser can be 355 nm, 400 nm, 425 nm, 485 nm, 500 nm, or 532 nm, etc. The optical power is 8–12 W. For example, the optical power can be 8 W, 9 W, 10 W, 11 W, or 12 W, etc. The scanning speed is 100–150 mm / s. For example, the scanning speed can be 100 mm / s, 110 mm / s, 120 mm / s, 130 mm / s, 140 mm / s, or 150 mm / s, etc.

[0028] In some embodiments, step S2 can be: using a laser source to irradiate the printing substrate from above, causing the first paste to fall onto the first grid line. Specifically, a second paste can be applied to a carrier, and according to a preset pattern (identical to the shape of the first grid line), a portion of the second paste can be transferred to the first grid line by laser irradiation, thus completing the fabrication of the second grid line. The carrier can be a donor film, microcrystalline glass, etc.

[0029] In some embodiments, the wavelength of the laser is 355–532 nm. For example, the wavelength can be 355 nm, 400 nm, 425 nm, 485 nm, 500 nm, or 532 nm. The optical power is 3–5 W. For example, the optical power can be 3 W, 3.5 W, 4 W, 4.5 W, or 5 W. The scanning speed is 50–80 mm / s. For example, the scanning speed can be 50 mm / s, 60 mm / s, 70 mm / s, or 80 mm / s.

[0030] The first and second gate lines are fabricated using laser technology. Leveraging the micron-level positioning accuracy (visual positioning accuracy ±0.5 μm) and non-contact processing characteristics of lasers, the overprinting positioning accuracy is ≤2 μm. Simultaneously, precise laser energy control avoids thermal damage, and combined with end-to-end inspection (such as laser confocal film thickness measurement), the defect rate is reduced to below 0.3%, far lower than the 1%~2% level of traditional printing. Furthermore, by reducing the laser power in step S2, it is possible to avoid affecting the already fabricated first gate line during the fabrication process. If the laser power in S2 is too high, it may cause the first gate line to melt.

[0031] In some embodiments, the first paste includes at least one of copper, nickel, tin, silver, aluminum, gold, platinum, titanium, tungsten, molybdenum, conductive adhesive, graphene, carbon nanotubes, and niobium phosphide. Preferably, the first paste includes at least one of electroplated copper paste, copper paste, gold paste, aluminum paste, platinum paste, titanium paste, tungsten paste, molybdenum paste, nickel-copper alloy paste, nickel-copper-silver alloy paste, aluminum-silicon alloy paste, copper-tin alloy paste, silver-coated copper paste, low-temperature conductive adhesive, graphene, reduced graphene oxide, carbon nanotubes, and niobium phosphide.

[0032] In some embodiments, the second paste includes at least one of copper, nickel, tin, silver, aluminum, gold, platinum, titanium, tungsten, molybdenum, conductive adhesive, graphene, carbon nanotubes, and niobium phosphide. Preferably, the second paste includes at least one of electroplated copper paste, copper paste, gold paste, aluminum paste, platinum paste, titanium paste, tungsten paste, molybdenum paste, nickel-copper alloy paste, nickel-copper-silver alloy paste, aluminum-silicon alloy paste, copper-tin alloy paste, silver-coated copper paste, low-temperature conductive adhesive, graphene, reduced graphene oxide, carbon nanotubes, and niobium phosphide.

[0033] In existing technologies, thick-film silver paste is typically used to fabricate gate lines to achieve high conductivity. However, with the increasing price of silver, the fabrication cost of gate lines has further increased. The gate line fabrication method of this application uses two pastes with different contents, allowing for the selection of pastes containing silver, without silver, or with different silver contents, effectively reducing the amount of silver used and thus lowering the fabrication cost of the gate lines.

[0034] This application also proposes a gate line, which is prepared using the gate line preparation method described above. Since this gate line employs all the technical solutions of all the above embodiments, it possesses at least all the beneficial effects brought about by the technical solutions of the above embodiments, and will not be elaborated upon further here.

[0035] In some implementations, such as Figures 2-4 As shown, the gate line 100 includes a first gate line layer 11 and a second gate line layer 12. The cross-section of the first gate line layer 11 includes either a convex arc shape or a rectangle, and the cross-section of the second gate line layer 12 includes either a convex arc shape, a triangle, or a trapezoid. For example, as... Figure 2 As shown, the cross-section of the first gate layer 11 is convex arc-shaped, and the cross-section of the second gate layer 12 is also convex arc-shaped; as Figure 3 As shown, the cross-section of the first gate layer 11 is rectangular, and the cross-section of the second gate layer 12 is triangular; and so on. Figure 4 As shown, the cross-section of the first gate layer 11 is rectangular, and the cross-section of the second gate layer 12 is trapezoidal. Gate lines 100 are disposed on the gate line workpiece 200.

[0036] In some embodiments, a first grid line 11 with a cross-section including one of a convex arc or a rectangle and a second grid line layer 12 with a cross-section including one of a convex arc, a triangle, or a trapezoid are formed by creating grooves of corresponding shapes on a carrier of the first and second slurries. For example, the first slurry is coated on a carrier with arc-shaped grooves, with the side of the carrier coated with the first slurry facing the grid line workpiece; a laser emitted from a laser source is used to irradiate the carrier from the side of the carrier away from the grid line workpiece, causing the first slurry to fall onto the grid line workpiece, thereby achieving the fabrication of the first grid line with a convex arc cross-section.

[0037] This application also proposes a photovoltaic cell, including grid lines prepared by the grid line preparation method described above or grid lines as described above.

[0038] In some embodiments, a photovoltaic cell includes a cell and multiple grid lines disposed on the surface of the cell.

[0039] In some implementations, the photovoltaic cell can be a PERC cell, a TOPCon cell, or an HJT cell.

[0040] The following specific examples provide further details.

[0041] Example 1 (1) Coating a silver-coated copper paste on a printing substrate with a preset pattern and an arc-shaped groove, and placing it above the grid line workpiece with the first paste facing the grid line workpiece, and using a laser to irradiate from above the printing substrate, setting the laser wavelength to 355 nm, the optical power to 12 W, and the scanning speed to 100 mm / s. (2) Coating copper paste with a pre-defined pattern and an arc-shaped groove on another printed substrate and placing it above the grid line workpiece after step (1) with the second paste facing the grid line workpiece. Using a laser to irradiate from above the printed substrate, the laser wavelength is set to 355 nm, the optical power is 3 W, and the scanning speed is 50 mm / s to prepare grid lines on the grid line workpiece.

[0042] Example 2 (1) Coating a silver-coated copper paste on a printing substrate with a preset pattern and a rectangular cross-section, and placing it above the grid line workpiece with the second paste facing the grid line workpiece, and using a laser to irradiate from above the printing substrate, setting the laser wavelength to 435 nm, the optical power to 10 W, and the scanning speed to 120 mm / s. (2) Apply low-temperature conductive adhesive to another printed substrate with a preset pattern and a groove with a triangular cross-section, and place it above the grid line to be made after step (1) with the second paste facing the grid line to be made. Use a laser to irradiate from above the printed substrate, setting the laser wavelength to 435 nm, the optical power to 4 W, and the scanning speed to 70 mm / s, so as to prepare the grid line on the grid line to be made.

[0043] Example 3 (1) Copper paste is applied to a printed substrate with a preset pattern and a rectangular cross-section, and placed above the grid line workpiece with the second paste facing the grid line workpiece. A laser is used to irradiate from above the printed substrate, with the laser wavelength set to 532nm, the optical power set to 8W, and the scanning speed set to 150 mm / s. (2) Copper paste is applied to another printed substrate with a preset pattern and a groove with a triangular cross-section, and placed above the grid line to be fabricated after step (1) with the second paste facing the grid line to be fabricated. A laser is used to irradiate from above the printed substrate, with the laser wavelength set to 532 nm, the optical power to 5 W, and the scanning speed to 50 mm / s, so as to fabricate grid lines on the grid line to be fabricated.

[0044] Comparative Example 1 single-printed grid lines The aspect ratio of the grid lines prepared in Examples 1, 2, 3 and Comparative Example 1 was tested, and their series resistance was also tested. The results are shown in Table 1.

[0045] Table 1. Grid line aspect ratio and series resistance test results

[0046] As can be seen from Table 1, the aspect ratio of the gate lines prepared by the gate line preparation method in this application embodiment is 1.2~1.5, while the aspect ratio of the gate lines prepared by single laser printing technology is 0.8. The series resistance of the gate lines prepared by the gate line preparation method in this application embodiment is 0.3~0.6 Ω·cm², while the series resistance of the gate lines prepared by Comparative Example 1 is 0.8 Ω·cm². This shows that the gate line preparation method in this application embodiment can effectively increase the aspect ratio of the gate lines while ensuring low series resistance, improving low fill factor and power output, and balancing photoelectric performance and production economy while reducing the amount of silver used.

[0047] The above description is merely an exemplary embodiment of this application and does not limit the patent scope of this application. Any equivalent structural transformations made based on the technical concept of this application and the contents of the specification and drawings of this application, or direct / indirect applications in other related technical fields, are included within the patent protection scope of this application.

Claims

1. A method for fabricating a gate line, characterized in that, include: The first grid line is formed by printing the first paste onto the grid line workpiece according to the preset pattern. According to a preset pattern, a second paste is printed on the first grid line to form a second grid line.

2. The method for fabricating the gate line as described in claim 1, characterized in that, The step of printing the first paste onto the grid line workpiece according to a preset pattern to form the first grid line includes: A laser is used to transfer the first paste onto the grid line workpiece using a carrier.

3. The method for fabricating the gate line as described in claim 2, characterized in that, The laser has a wavelength of 355~532 nm, an optical power of 8~12 W, and a scanning speed of 100~150 mm / s.

4. The method for fabricating the gate line as described in claim 1, characterized in that, The step of printing the second paste on the first grid line to form the second grid line includes: The second material is transferred onto the first grid line using a laser and a carrier.

5. The method for fabricating the gate line as described in claim 4, characterized in that, The laser has a wavelength of 355~532 nm, an optical power of 3~5 W, and a scanning speed of 50~80 mm / s.

6. The method for fabricating the gate line as described in claim 1, characterized in that, The first slurry and the second slurry each independently include at least one of copper, nickel, tin, silver, aluminum, gold, platinum, titanium, tungsten, molybdenum, conductive adhesive, graphene, carbon nanotubes, and niobium phosphide.

7. The method for fabricating the gate line as described in claim 6, characterized in that, The first paste and the second paste each independently include at least one of the following: electroplating copper paste, copper paste, gold paste, aluminum paste, platinum paste, titanium paste, tungsten paste, molybdenum paste, nickel-copper alloy paste, nickel-copper-silver alloy paste, aluminum-silicon alloy paste, copper-tin alloy paste, silver-coated copper paste, conductive adhesive, graphene, reduced graphene oxide, carbon nanotubes, and niobium phosphide.

8. A grid line, characterized in that, It is prepared by the preparation method according to any one of claims 1 to 7.

9. The gate line according to claim 8, characterized in that, The gate line includes a first gate line layer and a second gate line layer. The cross-section of the first gate line layer includes either a convex arc shape or a rectangle, and the cross-section of the second gate line layer includes either a convex arc shape, a triangle shape, or a trapezoid shape.

10. A photovoltaic cell, characterized in that, This includes gate lines prepared using the preparation method described in any one of claims 1 to 7.

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