Silicon carbide power MOSFET and manufacturing method thereof

By implanting a silicon-rich layer on a silicon carbide substrate and forming a gate oxide layer, the interface roughness problem was solved, the carrier mobility was improved, and the device performance was enhanced.

CN121909755APending Publication Date: 2026-04-21MICROCHIP TECHNOLOGY INC
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-09-22
Publication Date
2026-04-21

AI Technical Summary

Technical Problem

The rough interface between the silicon carbide substrate and the gate oxide layer leads to reduced carrier mobility, which limits device performance.

Method used

A silicon-rich layer is implanted on a silicon carbide substrate, and a gate oxide layer is formed on the silicon-rich layer by thermal oxidation or chemical vapor deposition to improve interface smoothness.

Benefits of technology

Improved carrier mobility and enhanced device performance can be achieved through a smooth interface.

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Abstract

A method of manufacturing a semiconductor device is provided. The method may include implanting a silicon-rich layer on a surface of a silicon carbide substrate, and growing a gate oxide layer on the silicon-rich layer on the surface of the silicon carbide substrate.
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Description

Cross-references to related applications

[0001] This application claims priority to U.S. Nonprovisional Patent Application No. 18 / 891,853, filed September 20, 2024, and U.S. Provisional Patent Application No. 63 / 539,754, filed September 21, 2023, the contents of which are incorporated herein by reference in their entirety. Technical Field

[0002] This disclosure generally relates to methods for manufacturing semiconductor devices, and more specifically to manufacturing semiconductor devices having a silicon carbide substrate and a gate oxide interface with the silicon carbide substrate. Summary of the Invention

[0003] According to one aspect of one or more examples, a method for manufacturing a semiconductor device is provided. The method may include implanting a silicon-rich layer on the surface of a silicon carbide substrate and growing a gate oxide layer on the silicon-rich layer. The silicon-rich layer may have a carbon-to-silicon ratio equal to or less than about 0.98. The silicon-rich layer may have a carbon-to-silicon ratio of approximately 1e. 19 atoms / cubic centimeter and 5e 22 The silicon concentration is between atoms per cubic centimeter. Forming the gate oxide layer may include oxidizing silicon from a silicon-rich layer to form a silicon dioxide gate oxide layer. This silicon dioxide gate oxide layer can be formed or grown via a thermal oxidation process of the silicon-rich layer. Alternatively, the silicon dioxide gate oxide layer can be formed or grown via a chemical vapor deposition (CVD) process of the silicon-rich layer. The thickness of the silicon-rich layer can be approximately half the thickness of the gate oxide layer. The thickness of the silicon-rich layer can also be approximately equal to the thickness of the gate oxide layer.

[0004] According to another aspect of one or more examples, a semiconductor device is provided, the semiconductor device comprising a silicon carbide substrate, a silicon-rich layer formed on a surface of the silicon carbide substrate, and a gate oxide layer formed on the silicon-rich layer. The silicon-rich layer may have a carbon-to-silicon ratio equal to or less than about 0.98. The silicon-rich layer may have a carbon-to-silicon ratio of approximately 1e. 19 atoms / cubic centimeter and 5e 22 The silicon concentration is between atoms per cubic centimeter. The thickness of this silicon-rich layer can be approximately half the thickness of the gate oxide layer. The thickness of this silicon-rich layer can be approximately equal to the thickness of the gate oxide layer. Attached Figure Description

[0005] Figure 1 A method for manufacturing a semiconductor device is shown according to one or more examples. Detailed Implementation

[0006] Reference will now be made to the various examples shown in the accompanying drawings, in which the same reference numerals always denote the same elements. These examples may be presented in various forms, and are not limited to those described herein.

[0007] Figure 1 A method 100 for manufacturing a semiconductor device according to one or more examples is illustrated. Silicon carbide (SiC) is commonly used as a substrate to create many semiconductor devices and, compared to other materials, can produce lower switching losses, higher power density, improved heat dissipation, and increased bandwidth. Some semiconductor devices, such as metal-oxide-semiconductor field-effect transistors (MOSFETs), include a gate oxide layer, which is a dielectric layer separating the silicon carbide substrate from the gate electrode, which may be made of a metal or other conductive material.

[0008] When a gate oxide layer is formed on a silicon carbide substrate, the interface between the silicon carbide substrate and the gate oxide layer (e.g., a gate oxide layer made of silicon dioxide) can be very rough. This rough interface can reduce carrier mobility in the silicon carbide substrate, potentially limiting device performance. [Reference] Figure 1 A silicon carbide substrate 110 serves as the base substrate. A silicon-rich layer 120 can be grown on the surface of the silicon carbide substrate 110 or embedded within the upper portion of the silicon carbide substrate 110. According to one or more examples, the silicon-rich layer 120 can be approximately 100 angstroms to 500 angstroms thick, although other thicknesses may be used depending on the application. For example, the amount of silicon used to create the silicon-rich layer 120 can depend on the thickness of the gate oxide layer 130 to be formed on the silicon-rich layer 120. According to one or more example embodiments, the thickness of the silicon-rich layer 120 can be approximately half the thickness of the gate oxide layer 130. According to one or more examples, the thickness of the silicon-rich layer 120 can be approximately equal to the thickness of the gate oxide layer 130. The silicon-rich layer 120 can be a high-dose layer. For example, the silicon-rich layer 120 can have a high dose of approximately 1 angstrom. 19 atoms / cubic centimeter and 5e 22 Silicon concentration between atoms per cubic centimeter. According to one or more example embodiments, the silicon-rich layer 120 can have a very low carbon-to-silicon ratio. For example, the carbon-to-silicon ratio can be equal to or less than about 0.98.

[0009] like Figure 1As shown, a gate oxide layer 130 can be formed on the silicon-rich layer 120. For example, the gate oxide layer 130 can be a silicon dioxide (SiO2) layer, which can be formed or grown by a thermal oxidation process of the silicon-rich layer 120. In various examples, the gate oxide layer 130 can be a SiO2 layer, which can be formed or grown by a chemical vapor deposition (CVD) process of the silicon-rich layer 120. By forming the gate oxide layer 130 on the silicon-rich layer 120, which has a higher silicon concentration than, for example, the silicon concentration of the silicon carbide substrate 110, the interface between the gate oxide layer 130 and the silicon-rich layer 120 can be smoother, which can improve carrier mobility.

[0010] Various examples have been disclosed herein in conjunction with the foregoing description and accompanying drawings. It should be understood that describing and illustrating each combination and sub-combination of these examples literally would be an undue repetition. Therefore, all examples can be combined in any manner and / or combination, and this specification (including the accompanying drawings) should be construed as constituting a complete written description of all combinations and sub-combinations of the examples described herein, as well as the ways and processes of preparing and using them, and should support any claims to any such combinations or sub-combinations.

[0011] Those skilled in the art will understand that the examples described herein are not limited to those specifically shown and described above. Furthermore, unless the contrary is mentioned above, it should be noted that all figures are not drawn to scale. Various modifications and variations are possible in accordance with the above teachings.

Claims

1. A method for manufacturing a semiconductor device, the method comprising: A silicon-rich layer is implanted on the surface of a silicon carbide substrate; as well as A gate oxide layer is grown on the silicon-rich layer on the surface of the silicon carbide substrate.

2. The method of claim 1, wherein the silicon-rich layer has a carbon-silicon ratio equal to or less than about 0.

98.

3. The method of claim 1, wherein the silicon-rich layer has approximately 1e 19 atoms / cubic centimeter and 5e 22 Silicon concentration between atoms per cubic centimeter.

4. The method of claim 1, wherein forming the gate oxide layer comprises oxidizing silicon from the silicon-rich layer to form a silicon dioxide gate oxide layer.

5. The method of claim 1, wherein the thickness of the silicon-rich layer is approximately half the thickness of the gate oxide layer.

6. The method of claim 4, wherein the gate oxide layer of silicon dioxide is formed or grown by a thermal oxidation process of the silicon-rich layer.

7. The method of claim 4, wherein the gate oxide layer of silicon dioxide is formed or grown by a chemical vapor deposition (CVD) process of the silicon-rich layer.

8. The method of claim 1, wherein the thickness of the silicon-rich layer is approximately equal to the thickness of the gate oxide layer.

9. A semiconductor device, the semiconductor device comprising: silicon carbide substrate; A silicon-rich layer is formed on the surface of the silicon carbide substrate; as well as A gate oxide layer is formed on the silicon-rich layer.

10. The semiconductor device of claim 9, wherein the silicon-rich layer has a carbon-silicon ratio equal to or less than about 0.

98.

11. The semiconductor device of claim 9, wherein the silicon-rich layer has approximately 1e 19 atoms / cubic centimeter and 5e 22 Silicon concentration between atoms per cubic centimeter.

12. The semiconductor device of claim 9, wherein the thickness of the silicon-rich layer is approximately half the thickness of the gate oxide layer.

13. The semiconductor device of claim 9, wherein the thickness of the silicon-rich layer is approximately equal to the thickness of the gate oxide layer.