Hybrid electric vehicle circuit board control method and system

By generating optimal PCB layout data through iterative optimization algorithms and routing algorithms, the problem of unreasonable layout caused by unreasonable component placement is solved, achieving efficient routing and cost reduction of the circuit board.

CN121920301APending Publication Date: 2026-04-24JIANGXI ZHONGLUO ELECTRONICS CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
JIANGXI ZHONGLUO ELECTRONICS CO LTD
Filing Date
2024-03-06
Publication Date
2026-04-24

AI Technical Summary

Technical Problem

In the existing technology, unreasonable component placement leads to unreasonable circuit board layout, which affects the overall wiring effect of the circuit board.

Method used

The algorithm combines automatic layout and manual adjustment with routing algorithms, and generates optimal PCB layout data through iterative optimization algorithms, including bio-symbiotic balance parameters, maze algorithms, and line exploration algorithms oriented towards the target, to optimize component layout and routing data.

Benefits of technology

It improves the rationality of PCB layout, reduces costs, and enhances the quality of the circuit board.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention relates to the technical field of circuit board wiring, and discloses a hybrid vehicle circuit board control method and system, and the method comprises the following steps: obtaining a circuit design drawing, and generating circuit board element typesetting data based on the circuit design drawing; manual adjustment is carried out after automatic typesetting; based on the circuit board element typesetting data, generating circuit board wiring data by adopting a wiring algorithm; the circuit board element typesetting data and the circuit board wiring data are iteratively optimized, optimal circuit board typesetting data are generated, and the optimal circuit board typesetting data comprise optimal circuit board wiring data and optimal element typesetting data; according to the method and the device, the circuit board element typesetting data is optimized by adopting the first optimization algorithm based on the generated circuit board wiring data, so that the optimal wiring data and the optimal element typesetting data are obtained, the reasonability of circuit typesetting and wiring can be effectively improved, the cost is effectively reduced, and the quality of the circuit board is improved.
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Description

Technical Field

[0001] This invention relates to the field of circuit board wiring technology, and more specifically, to a control method and system for a hybrid vehicle circuit board. Background Technology

[0002] Existing technology first generates the component layout on the circuit board using a circuit diagram, and then generates the circuit board layout using a routing algorithm.

[0003] The layout of the circuit board is greatly affected by the component placement, and the component placement is subject to many human control factors. An unreasonable component placement will lead to an unreasonable overall layout of the circuit board. Summary of the Invention

[0004] The purpose of this invention is to provide a hybrid vehicle circuit board control method and system to solve the above-mentioned problems.

[0005] This invention provides a method for controlling a circuit board in a hybrid vehicle, comprising the following steps:

[0006] Step 1: Obtain the circuit design diagram and generate PCB board component layout data based on the circuit design diagram; use automatic layout and then manually adjust.

[0007] Step 2: Based on the PCB component layout data, generate PCB wiring data using a wiring algorithm;

[0008] Step 3: Iteratively optimize the PCB board component layout data and PCB board routing data, and generate the optimal PCB board layout data, which includes the optimal PCB board routing data and the optimal component layout data.

[0009] The iterative optimization of PCB component layout data and PCB wiring data to generate optimal PCB layout data includes the following steps:

[0010] Step 301: Update the PCB board component layout data based on the first PCB board routing data using the first optimization algorithm; when step 301 is executed for the first time, the first PCB board routing data is the PCB board routing data in step 2;

[0011] Step 302: Regenerate PCB board routing data using a routing algorithm based on the updated PCB board component layout data;

[0012] Step 303: Calculate the biosymbiotic balance parameter G1 of the regenerated PCB board wiring data, calculate the biosymbiotic balance parameter G2 of the regenerated PCB board wiring data, and calculate the evolutionary degree parameter JH. The evolutionary degree parameter JH is proportional to the difference between the biosymbiotic balance parameter G1 and the biosymbiotic balance parameter G2. If the evolutionary degree parameter is less than the set first parameter threshold, replace the updated PCB board wiring data with the current first PCB board wiring data and return to step 301; if the evolutionary degree parameter is not less than the set first parameter threshold, proceed to the next step.

[0013] The formula for calculating the biological symbiotic balance parameter is as follows:

[0014] G i =L Z +M

[0015] Among them, L Z The bus length represents the PCB board routing data, and M indicates the contention relationship.

[0016] The regenerated PCB board routing data in step 302 is used as the output PCB board component layout data.

[0017] As a further optimization of the present invention, the first optimization algorithm includes the following steps:

[0018] Obtain PCB component layout data and PCB wiring data, define the interactions between components, including mutualistic symbiosis, mutualistic detrimental symbiosis, and parasitic symbiosis. Specifically, two components with direct wiring connections have a mutualistic symbiotic relationship, while two components without direct wiring connections have a mutualistic detrimental symbiotic relationship.

[0019] Constructing a connection matrix or adjacency list: Representing the connections between components as a connection matrix or adjacency list. A connection matrix is ​​a two-dimensional matrix where each element represents a connection between components. An adjacency list is a data structure that represents the connection relationships between components, recording the connection relationship and connection method for each component.

[0020] Components with a mutually detrimental symbiotic relationship are in competition with each other (M).

[0021] M represents the length ratio of parallel line segments with a distance less than D between individuals. Individuals are component pairs, and components include parasites, independent entities, and multiple connected entities.

[0022] Determine whether two individuals with a strong competitive relationship contain parasites. If they do, rearrange the parasites.

[0023] As a further optimization of the present invention, the method of rearranging the parasite includes: arranging the parasite at the intersection of the connecting line between the components of one individual and the connecting line between the components of another individual.

[0024] As a further optimization of the present invention, the wiring algorithm includes a maze algorithm, a line exploration algorithm toward the target, and a hierarchical wiring algorithm.

[0025] As a further optimization of the present invention, the line exploration algorithm toward the target includes the following steps:

[0026] Step S1: Generate routing obstacle data and connection point dataset on the PCB board based on the PCB board component layout data. The connection point dataset includes the coordinates of the routing source point and the corresponding target point coordinates.

[0027] Step S2: Based on the wiring obstacle data and the dataset of points to be connected, generate wiring data, specifically including the following steps:

[0028] Step S2.1: Set initial parameters, including: setting the current exploration point as (X). c Y c The coordinates of the source point and the target point of the wiring are (X, X, ...). a Y a ) and (X b Y b ), initialize the current exploration point to (X a Y a The starting point is the current exploration point. L=0 indicates that the current point (i.e., the starting point) has not started exploration. L1=None indicates that the exploration method of the current point is pending. KF=0, IB indicates the completion flag of the previous exploration line. IB=0 or 1. When IB=0, it means that the previous exploration line has failed to be completed. When IB=1, it means that the previous exploration line has been completed successfully. KB indicates the completion flag of the current exploration line. KB=0 or 1. When KB=0, it means that the current exploration line has failed to be completed. When KB=1, it means that the current exploration line has been completed successfully. KF indicates the exploration direction of the previous exploration line. KC indicates the exploration direction of the current exploration line. KP indicates the exploration status. Based on the initialization parameter values, a connection list node is established and added to the connection list as the head node.

[0029] Step S2.2: Set the exploration range and fill the exploration boundary line as a temporary obstacle into the connection list.

[0030] Step S2.3: Determine the exploration direction L1. If X b -X a <Y b -Y a , with the current point (X) c Yc Taking (X) as the starting point for exploration, with (X) b Y b ) as the predetermined endpoint, conduct lateral exploration, if X b -X a >Y b -Y a Then take the current point (X) c Y c Taking (X) as the starting point for exploration, with (X) b Y b ) as the predetermined endpoint, conduct vertical exploration, if X b -X a <Y b -Y a This indicates that starting from the target direction along the Y-axis is more advantageous than starting from the X-axis, and is the primary target direction. Vertical exploration should be the first choice, while horizontal exploration is preferable.

[0031] Step S2.4: Determine if KC is less than 0. If KC is not less than 0, continue to determine if the exploration was successful. If the exploration was successful, then change the actual endpoint coordinates (X...) of the exploration line. d Y d ), explore the direction and layer number, push them into the wiring stack, and proceed to step S2.6;

[0032] Step S2.5: If the exploration fails, determine whether the actual endpoint of the current exploration line is the exploration starting point. Otherwise, determine that the exploration process has encountered a dead point or critical point. If so, determine whether L is equal to 1. If L = 1, determine that the exploration starting point has failed the first time and change the exploration method. If L ≠ 1, determine that the exploration process has encountered a dead point or critical point. When the exploration process encounters a dead point or critical point, call the preset processing program to explore a new path and determine whether there is a new path. If there is, generate a new connection list node and add it to the connection list. If there is no new path, exit.

[0033] Step S2.6: Determine whether the current exploration line is successfully routed. If it is successfully routed, delete all temporary lines entered into the connection list, optimize the routing path, and enter the optimized routing result into the connection list and exit point. If the route fails, return to step S2.3.

[0034] As a further optimization of the present invention, the exploration process includes the following steps:

[0035] Step S3.1: Define variables, assign initial values, set the current exploration point as point A, the predetermined destination as point B, KF, IB, exploration step size, and obstacle chain;

[0036] Step S3.2: Determine the current exploration direction KC;

[0037] Step S3.3: Take out one obstacle at a time. If the removal is successful, draw the enclosing rectangle of the obstacle.

[0038] Step S3.4: Determine whether the enclosing rectangle obstructs the connection of line segment AB. If so, calculate the deflection offset of the obstacle and the actual point C1 reached by the exploration line; otherwise, return to step S3.3.

[0039] Step S3.5: Compare the obstacle deflection of the previous obstacle with the actual point C0 reached by the exploration line to determine the actual endpoint C2 of the exploration line and the obstacle deflection, and return to step S3.3;

[0040] Step S3.6: If obstacle removal fails, the actual deflection of the exploration line and the actual exploration point C and its related parameters KP,KB are finally determined, and the process ends.

[0041] As a further optimization of the present invention, the critical point includes Type I critical points and Type II critical points. For example, if IB = 0, the current point is a Type I critical point. At this time, the previous exploration has reached the predetermined endpoint, but the current exploration has failed. The handling methods include forward exploration and obstacle avoidance exploration.

[0042] (a) Explore forward, continue exploring forward in the direction KF of the previous section until you encounter an obstacle. If the exploration is successful, switch the exploration direction and move towards the target point.

[0043] (b) Obstacle exploration: There are two options for obstacle avoidance: one is to go around the obstacle forward in the direction of KF from the upper section, and the other is to go around the obstacle backward.

[0044] As a further optimization of the present invention, the Type II critical point is another critical state value besides the Type I critical point. It is a critical point where the current exploration direction KC < 0 and the exploration direction is undetermined. The exploration processing methods for the Type II critical point include obstacle bypass exploration and forward exploration.

[0045] (a) Obstacle bypass exploration: Determine the exploration direction based on the direction KF of the final exploration line and the obstacle bypass offset.

[0046] (b) Forward exploration: Ignoring the obstacle offset, first take the direction of the previous exploration line as the exploration direction of the current point and explore forward until an obstacle is encountered. If the exploration is successful, change the exploration method. Otherwise, take the direction opposite to KC as the exploration direction of the current point and start exploring from the current point until an obstacle is encountered. Then switch the exploration method and explore towards the target point.

[0047] As a further optimization of the present invention, the dead-point obstacle simultaneously obstructs the two target directions for exploration at the current exploration point. The methods for handling dead-point obstacles include: reverse exploration and backward obstacle bypass exploration.

[0048] (a) Reverse exploration: that is, exploration in the opposite direction of the target. If the current exploration point is a dead point, explore in the opposite direction of the current exploration direction, step by step, to check if there is an exit leading to the target, or use maximum reverse exploration, that is, extend as far forward as possible in the opposite direction of the target until the exploration is blocked.

[0049] (b) Backward obstacle avoidance exploration: If the exit to the target cannot be found by reverse exploration, the backward obstacle avoidance exploration method is adopted. Backward obstacle avoidance exploration means gradually retreating along the previous exploration direction KF. Each time you retreat, you first try to explore in the direction of the target. If there is no way out, you continue to retreat and explore. When you retreat along the KF direction to a certain point and successfully explore in the direction of the target at that point, you record the actual endpoint reached by the exploration. The backward obstacle avoidance exploration at the dead point is successful.

[0050] A hybrid vehicle circuit board control system for executing the hybrid vehicle circuit board control method described above, the system comprising:

[0051] The data acquisition module is used to acquire circuit design diagrams;

[0052] The data preprocessing module generates PCB board component layout data based on the circuit design diagram;

[0053] The routing module is used to acquire PCB board component layout data and generate PCB board routing data based on the PCB board component layout data.

[0054] The optimization module is used to build an optimization model, iteratively optimize the PCB board component layout data and PCB board routing data, and finally output the optimal PCB board routing data.

[0055] The beneficial effects of the present invention are as follows: The present invention can optimize the PCB board component layout data based on the generated PCB board wiring data using a first optimization algorithm, thereby forming an iterative optimization of the PCB board wiring data until the final PCB board wiring data reaches the preset parameters and the iteration terminates, thereby obtaining the optimal wiring data and component layout data, which can effectively improve the rationality of PCB layout and wiring, thereby effectively reducing costs and improving the quality of PCB boards. Attached Figure Description

[0056] Figure 1 This is a first flowchart of a hybrid vehicle circuit board control method according to the present invention;

[0057] Figure 2 This is a second flowchart of a hybrid vehicle circuit board control method according to the present invention;

[0058] Figure 3 This is a schematic diagram of a circuit board control system for a hybrid vehicle according to the present invention. Detailed Implementation

[0059] The subject matter described herein will now be discussed with reference to exemplary embodiments. It should be understood that these embodiments are discussed merely to enable those skilled in the art to better understand and implement the subject matter described herein. Furthermore, features described in some examples may be combined in other examples.

[0060] like Figure 1-2 As shown, a method for controlling a circuit board in a hybrid vehicle includes the following steps:

[0061] Step 1: Obtain the circuit design diagram and generate PCB board component layout data based on the circuit design diagram; use automatic layout and then manually adjust.

[0062] Step 2: Based on the PCB component layout data, generate PCB wiring data using a wiring algorithm;

[0063] Step 3: Iteratively optimize the PCB board component layout data and PCB board routing data, and generate the optimal PCB board layout data, which includes the optimal PCB board routing data and the optimal component layout data.

[0064] The iterative optimization of PCB component layout data and PCB wiring data to generate optimal PCB layout data includes the following steps:

[0065] Step 301: Update the PCB board component layout data based on the first PCB board routing data using the first optimization algorithm; when step 301 is executed for the first time, the first PCB board routing data is the PCB board routing data in step 2;

[0066] Step 302: Regenerate PCB board routing data using a routing algorithm based on the updated PCB board component layout data;

[0067] Step 303: Calculate the biosymbiotic balance parameter G1 of the regenerated PCB board wiring data, calculate the biosymbiotic balance parameter G2 of the regenerated PCB board wiring data, and calculate the evolutionary degree parameter JH. The evolutionary degree parameter JH is proportional to the difference between the biosymbiotic balance parameter G1 and the biosymbiotic balance parameter G2. If the evolutionary degree parameter is less than the set first parameter threshold, replace the updated PCB board wiring data with the current first PCB board wiring data and return to step 301; if the evolutionary degree parameter is not less than the set first parameter threshold, proceed to the next step.

[0068] The formula for calculating the biological symbiotic balance parameter is as follows:

[0069] G i =L Z +M

[0070] Among them, L Z The bus length represents the PCB board routing data, and M indicates the contention relationship.

[0071] 304. Use the regenerated PCB board routing data from step 302 as the output PCB board component layout data.

[0072] It should be noted that the threshold of the first parameter can be set according to the actual parameters. A decrease in the biological symbiosis balance parameter indicates that the component layout is more reasonable, the total wiring length is shorter, the cost is lower, and the degree of mutual influence between components is lower.

[0073] The first optimization algorithm includes the following steps:

[0074] Obtain PCB component layout data and PCB wiring data, define the interactions between components, including mutualistic symbiosis, mutualistic detrimental symbiosis, and parasitic symbiosis. Specifically, two components with direct wiring connections have a mutualistic symbiotic relationship, while two components without direct wiring connections have a mutualistic detrimental symbiotic relationship.

[0075] Constructing a connection matrix or adjacency list: Representing the connections between components as a connection matrix or adjacency list. A connection matrix is ​​a two-dimensional matrix where each element represents a connection between components. An adjacency list is a data structure that represents the connection relationships between components, recording the connection relationship and connection method for each component.

[0076] Components with a mutually detrimental symbiotic relationship are in competition with each other (M).

[0077] M is the length ratio of parallel line segments with a distance less than D between individuals. Individuals are component pairs, and components include parasites (which can serve as line intersections), independent entities (connecting a single line), and multi-connection entities (connecting multiple lines).

[0078] The default value of D is 10cm. The length of the parallel line segment represents the degree of mutual interference between two individuals during wiring. An excessively long parallel line segment may be required for the unified arrangement of multi-pin components or for antenna settings. Therefore, a threshold D is set, which is adjusted proportionally to the size of the circuit board.

[0079] Determine whether two individuals with a strong competitive relationship contain parasites. If they do, rearrange the parasites.

[0080] One method of rearranging the parasite is to place the parasite at the intersection of the connecting lines between the components of one individual and the connecting lines between the components of another individual.

[0081] Among them, the wiring algorithms include maze algorithms, line exploration algorithms towards the target, and hierarchical wiring algorithms;

[0082] The line exploration algorithm towards the target includes the following steps:

[0083] Step S1: Generate routing obstacle data and connection point dataset on the PCB board based on the PCB board component layout data. The connection point dataset includes the coordinates of the routing source point and the corresponding target point coordinates.

[0084] The routing obstacle data includes pads, vias, and existing traces on the circuit board. During the routing process, obstacles such as pads, vias, and existing traces can be regarded as combinations of basic graphic elements such as line segments, arcs, and circles. Since obstacles such as pads and vias have different shapes, in order to enable the circuit to successfully bypass irregular obstacles and form a shorter connection path, and to avoid too many turning points and bends when bypassing obstacles, each obstacle is preprocessed before routing, that is, the enclosing rectangle of the obstacle is created, and the enclosing rectangle is used as the routing obstacle data.

[0085] Step S2: Generate wiring data based on wiring obstacle data and the dataset of points to be connected;

[0086] Specifically:

[0087] Step S2.1: Set initial parameters, including: setting the current exploration point as (X). c Y c The coordinates of the source point and the target point of the wiring are (X, X, ...). a Y a ) and (X b Y b ), initialize the current exploration point to (X a Y a The starting point is the current exploration point. L=0 indicates that the current point (i.e., the starting point) has not started exploration. L1=None indicates that the exploration method of the current point is pending. KF=0, IB indicates the completion flag of the previous exploration line. IB=0 or 1. When IB=0, it means that the previous exploration line has failed to be completed. When IB=1, it means that the previous exploration line has been completed successfully. KB indicates the completion flag of the current exploration line. KB=0 or 1. When KB=0, it means that the current exploration line has failed to be completed. When KB=1, it means that the current exploration line has been completed successfully. KF indicates the exploration direction of the previous exploration line. KC indicates the exploration direction of the current exploration line. KP indicates the exploration status. Based on the initialization parameter values, a connection list node is established and added to the connection list as the head node.

[0088] Step S2.2: Set the exploration range and fill the exploration boundary line as a temporary obstacle into the connection list.

[0089] Step S2.3: Determine the exploration direction L1. If X b -X a <Y b -Y a , with the current point (X) c Y c Taking (X) as the starting point for exploration, with (X) b Y b ) as the predetermined endpoint, conduct lateral exploration, if X b -X a >Y b -Y a Then take the current point (X) c Y c Taking (X) as the starting point for exploration, with (X) b Y b ) as the predetermined endpoint, conduct vertical exploration, if X b -X a <Y b -Y a This indicates that starting from the target direction along the Y-axis is more advantageous than starting from the X-axis, and is the primary target direction. Vertical exploration should be the first choice, while horizontal exploration is preferable.

[0090] Step S2.4: Determine if KC is less than 0. If KC is not less than 0, continue to determine if the exploration was successful. If the exploration was successful, then change the actual endpoint coordinates (X...) of the exploration line. d Y d ), explore the direction and layer number, push them into the wiring stack, and proceed to step S2.6;

[0091] Step S2.5: If the exploration fails, determine whether the actual endpoint of the current exploration line is the exploration starting point. Otherwise, determine that the exploration process has encountered a dead point or critical point. If so, determine whether L is equal to 1. If L = 1, determine that the exploration starting point has failed the first time and change the exploration method. If L ≠ 1, determine that the exploration process has encountered a dead point or critical point. When the exploration process encounters a dead point or critical point, call the preset processing program to explore a new path and determine whether there is a new path. If there is, generate a new connection list node and add it to the connection list. If there is no new path, exit.

[0092] Step S2.6: Determine whether the exploration line in this segment is successfully routed. If it is successfully routed, delete all temporary lines filled into the connection list, optimize the routing path, and fill the optimized routing result into the connection list and exit. If the route fails, return to step S2.3.

[0093] The exploration process includes the following steps:

[0094] Step S3.1: Define variables, assign initial values, set the current exploration point as point A, the predetermined destination as point B, KF, IB, exploration step size, and obstacle chain;

[0095] Step S3.2: Determine the current exploration direction KC;

[0096] Step S3.3: Take out one obstacle at a time. If the removal is successful, draw the enclosing rectangle of the obstacle.

[0097] Step S3.4: Determine whether the enclosing rectangle obstructs the connection of line segment AB. If so, calculate the deflection offset of the obstacle and the actual point C1 reached by the exploration line; otherwise, return to step S3.3.

[0098] Step S3.5: Compare the obstacle deflection of the previous obstacle with the actual point C0 reached by the exploration line to determine the actual endpoint C2 of the exploration line and the obstacle deflection, and return to step S3.3;

[0099] Step S3.6: If obstacle removal fails, the actual deflection of the exploration line and the actual exploration point C and its related parameters KP,KB are finally determined, and the process ends.

[0100] The critical point includes Type I critical points and Type II critical points. For example, if IB = 0, the current point is a Type I critical point. In this case, the previous exploration has reached the predetermined endpoint, but the current exploration has failed. There are two possible handling methods:

[0101] (a) Explore forward, continue exploring in the direction of the previous section (KF direction) until you encounter an obstacle. If the exploration is successful (KP = success), switch the exploration direction and move towards the target point.

[0102] (b) Obstacle exploration: There are two obstacle avoidance options: one is to bypass the obstacle forward in the direction of the upper section (KF direction), and the other is to bypass the obstacle backward.

[0103] Among them, the Type II critical point is another critical state value besides the Type I critical point. It is a critical point where KC < 0 in the current exploration direction and the exploration direction is undetermined. There are two ways to handle the exploration of the Type II critical point:

[0104] (a) Obstacle bypass exploration: Determine the exploration direction based on the direction KF of the final exploration line and the obstacle bypass offset.

[0105] (b) Forward exploration: Ignoring the obstacle offset, first take the direction of the previous exploration line as the exploration direction of the current point and explore forward until an obstacle is encountered. If the exploration is successful, change the exploration method. Otherwise, take the direction opposite to KC as the exploration direction of the current point and start exploring from the current point until an obstacle is encountered. Then switch the exploration method and explore towards the target point.

[0106] Among them, dead-point obstacles are a special type of obstacle encountered during the wiring process. The characteristic of this type of obstacle is that it simultaneously blocks the two target directions of the current exploration point. There are two ways to deal with dead-point problems: reverse exploration and backward exploration around the obstacle.

[0107] (a) Reverse exploration, i.e., exploration in the opposite direction to the target. If the current exploration point is a dead end, explore in the opposite direction of the current exploration direction, step by step, to check if there is an exit leading to the target;

[0108] Alternatively, the maximum reverse exploration method can be adopted, which means extending forward as far as possible in the opposite direction of the target until the exploration is blocked, so as to ensure that no possible paths are missed.

[0109] (b) Explore around the obstacle backwards. If the current exploration point is a dead point and the exit to the target cannot be found by reverse exploration, then the method of exploring around the obstacle backwards shall be adopted.

[0110] The so-called backward obstacle avoidance exploration refers to gradually retreating along the previous exploration direction (KF). With each step back, a probe is first made in the target direction. If there is no way out, the retreat continues and exploration continues. When the retreat along the KF direction reaches a certain point and the probe in the target direction at that point is successful, the actual endpoint of the exploration is recorded, and the backward obstacle avoidance exploration at the dead point is successful.

[0111] like Figure 3 As shown, the present invention also provides a hybrid vehicle circuit board control system for executing the hybrid vehicle circuit board control method described above. The system includes:

[0112] The data acquisition module is used to acquire circuit design diagrams;

[0113] The data preprocessing module generates PCB board component layout data based on the circuit design diagram;

[0114] The routing module is used to acquire PCB board component layout data and generate PCB board routing data based on the PCB board component layout data.

[0115] The optimization module is used to build an optimization model, iteratively optimize the PCB board component layout data and PCB board routing data, and finally output the optimal PCB board routing data.

[0116] The above description of this embodiment is not limited to the specific implementation described above. The specific implementation described above is merely illustrative and not restrictive. Those skilled in the art can make many other forms based on the guidance of this embodiment, all of which are within the protection scope of this embodiment.

Claims

1. A control method for a circuit board in a hybrid vehicle, characterized in that, Includes the following steps: Step 1: Obtain the circuit design diagram and generate PCB board component layout data based on the circuit design diagram; use automatic layout and then manually adjust. Step 2: Based on the PCB board component layout data, generate PCB board routing data using a routing algorithm; Step 3: Iteratively optimize the PCB board component layout data and PCB board routing data, and generate the optimal PCB board layout data, which includes the optimal PCB board routing data and the optimal component layout data. The iterative optimization of PCB component layout data and PCB wiring data to generate optimal PCB layout data includes the following steps: Step 301: Update the PCB board component layout data based on the first PCB board routing data using the first optimization algorithm; when step 301 is executed for the first time, the first PCB board routing data is the PCB board routing data in step 2. Step 302: Regenerate PCB board routing data using a routing algorithm based on the updated PCB board component layout data; Step 303: Calculate the biosymbiotic balance parameter G1 of the regenerated PCB board wiring data, calculate the biosymbiotic balance parameter G2 of the regenerated PCB board wiring data, and calculate the evolutionary degree parameter JH. The evolutionary degree parameter JH is proportional to the difference between the biosymbiotic balance parameter G1 and the biosymbiotic balance parameter G2. If the evolutionary degree parameter is less than the set first parameter threshold, replace the updated PCB board wiring data with the current first PCB board wiring data and return to step 301; if the evolutionary degree parameter is not less than the set first parameter threshold, proceed to the next step. The formula for calculating the biological symbiotic balance parameter is as follows: G i =L Z +M Among them, L Z The bus length represents the PCB board routing data, and M indicates the contention relationship. The regenerated PCB board routing data in step 302 is used as the output PCB board component layout data.

2. The hybrid vehicle circuit board control method according to claim 1, characterized in that, The first optimization algorithm includes the following steps: Obtain PCB component layout data and PCB wiring data, define the interactions between components, including mutualistic symbiosis, mutualistic detrimental symbiosis, and parasitic symbiosis. Specifically, two components with direct wiring connections have a mutualistic symbiotic relationship, while two components without direct wiring connections have a mutualistic detrimental symbiotic relationship. Constructing a connection matrix or adjacency list: Representing the connection relationships between components as a connection matrix or adjacency list; a connection matrix is ​​a two-dimensional matrix in which the elements represent the connection relationships between components; an adjacency list is a data structure that represents the connection relationships between components, recording the connection relationship and connection method of each component; Components with a mutually detrimental symbiotic relationship are in competition with each other (M). M represents the length ratio of parallel line segments with a distance less than D between individuals. Individuals are component pairs, and components include parasites, independent entities, and multiple connected entities. Determine whether two individuals with a strong competitive relationship contain parasites. If they do, rearrange the parasites.

3. The hybrid vehicle circuit board control method according to claim 2, characterized in that, The method of rearranging the parasite includes placing the parasite at the intersection of the connecting line between the components of one individual and the connecting line between the components of another individual.

4. The hybrid vehicle circuit board control method according to claim 3, characterized in that, The wiring algorithms include maze algorithms, target-oriented line exploration algorithms, and hierarchical wiring algorithms.

5. The hybrid vehicle circuit board control method according to claim 4, characterized in that, The line-finding algorithm toward the target includes the following steps: Step S1: Generate routing obstacle data and connection point dataset on the PCB board based on the PCB board component layout data. The connection point dataset includes the coordinates of the routing source point and the corresponding target point coordinates. Step S2: Based on the wiring obstacle data and the dataset of points to be connected, generate wiring data, specifically including the following steps: Step S2.1: Set initial parameters, including: setting the current exploration point as (X). c Y c The coordinates of the source point and the target point of the wiring are (X, X, ...). a Y a ) and (X b Y b ), initialize the current exploration point to (X a Y a The starting point is the current exploration point. L=0 indicates that the current point (i.e., the starting point) has not started exploration. L1=None indicates that the exploration method of the current point is pending. KF=0, IB indicates the completion flag of the previous exploration line. IB=0 or 1. When IB=0, it means that the previous exploration line has failed to be completed. When IB=1, it means that the previous exploration line has been completed successfully. KB indicates the completion flag of the current exploration line. KB=0 or 1. When KB=0, it means that the current exploration line has failed to be completed. When KB=1, it means that the current exploration line has been completed successfully. KF indicates the exploration direction of the previous exploration line. KC indicates the exploration direction of the current exploration line. KP indicates the exploration status. Based on the initialization parameter values, a connection list node is established and added to the connection list as the head node. Step S2.2: Set the exploration range and fill the exploration boundary line as a temporary obstacle into the connection list; Step S2.3: Determine the exploration direction L1. If X b -X a <Y b -Y a , with the current point (X) c Y c Taking (X) as the starting point for exploration, with (X) b Y b ) as the predetermined endpoint, conduct lateral exploration, if X b -X a >Y b -Y a Then take the current point (X) c Y c Taking (X) as the starting point for exploration, with (X) b Y b ) as the predetermined endpoint, conduct vertical exploration, if X b -X a <Y b -Y a This indicates that starting from the target direction along the Y-axis is more advantageous than starting from the X-axis, and is the primary target direction. Vertical exploration should be the first choice, while horizontal exploration is preferable. Step S2.4: Determine if KC is less than 0. If KC is not less than 0, continue to determine if the exploration was successful. If the exploration was successful, then change the actual endpoint coordinates (X...) of the exploration line. d Y d ), explore the direction and layer number, push them into the wiring stack, and proceed to step S2.6; Step S2.5: If the exploration fails, determine whether the actual endpoint of the current exploration line is the exploration starting point. Otherwise, determine that the exploration process has encountered a dead point or critical point. If so, determine whether L is equal to 1. If L = 1, determine that the exploration starting point has failed the first time and change the exploration method. If L ≠ 1, determine that the exploration process has encountered a dead point or critical point. When the exploration process encounters a dead point or critical point, call the preset processing program to explore a new path and determine whether there is a new path. If there is, generate a new connection list node and add it to the connection list. If there is no new path, exit. Step S2.6: Determine whether the current exploration line is successfully routed. If it is successfully routed, delete all temporary lines entered into the connection list, optimize the routing path, and enter the optimized routing result into the connection list and exit point. If the route fails, return to step S2.

3.

6. The hybrid vehicle circuit board control method according to claim 5, characterized in that, The exploration process includes the following steps: Step S3.1: Define variables, assign initial values, set the current exploration point as point A, the predetermined destination as point B, KF, IB, exploration step size, and obstacle chain; Step S3.2: Determine the current exploration direction KC; Step S3.3: Take out one obstacle at a time. If the removal is successful, draw the enclosing rectangle of the obstacle. Step S3.4: Determine whether the enclosing rectangle obstructs the connection of line segment AB. If so, calculate the deflection offset of the obstacle and the actual point C1 reached by the exploration line. Otherwise, return to step S3.

3. Step S3.5: Compare the obstacle deflection of the previous obstacle with the actual point C0 reached by the exploration line to determine the actual endpoint C2 of the exploration line and the obstacle deflection, and return to step S3.3; Step S3.6: If obstacle removal fails, the actual deflection of the exploration line and the actual exploration point C and its related parameters KP,KB are finally determined, and the process ends.

7. A hybrid vehicle circuit board control method according to claim 6, characterized in that, The critical points include Type I critical points and Type II critical points. For example, if IB = 0, the current point is a Type I critical point. At this time, the previous exploration has reached the predetermined endpoint, but the current exploration has failed. The handling methods include forward exploration and obstacle avoidance exploration. (a) Explore forward, continue exploring forward in the direction KF of the previous section until you encounter an obstacle. If the exploration is successful, switch the exploration direction and move towards the target point. (b) Obstacle exploration: There are two options for obstacle avoidance: one is to go around the obstacle forward in the direction of KF from the upper section, and the other is to go around the obstacle backward.

8. A hybrid vehicle circuit board control method according to claim 7, characterized in that, The Type II critical point is another critical state value besides the Type I critical point. It is a critical point where KC < 0 in the current exploration direction and the exploration direction is yet to be determined. The exploration handling methods for Type II critical points include obstacle bypass exploration and forward exploration. (a) Obstacle bypass exploration: Determine the exploration direction based on the direction KF of the final exploration line and the obstacle bypass offset; (b) Forward exploration: Ignoring the offset around obstacles, first take the direction of the previous exploration line as the exploration direction of the current point and explore forward until an obstacle is encountered. If the exploration is successful, change the exploration method. Otherwise, take the direction opposite to KC as the exploration direction of the current point and start exploring from the current point until an obstacle is encountered. Then switch the exploration method and explore towards the target point.

9. A hybrid vehicle circuit board control method according to claim 8, characterized in that, The dead-point type obstacle simultaneously obstructs the two target directions for exploration from the current exploration point. The methods for handling dead-point type obstacles include: reverse exploration and backward exploration around the obstacle. (a) Reverse exploration: that is, exploration in the opposite direction of the target. If the current exploration point is a dead point, explore in the opposite direction of the current exploration direction, step by step, to check if there is an exit leading to the target. Or use maximum reverse exploration, that is, extend as far forward as possible in the opposite direction of the target until the exploration is blocked. (b) Backward obstacle avoidance exploration: If the exit to the target cannot be found by reverse exploration, the backward obstacle avoidance exploration method is adopted. Backward obstacle avoidance exploration means gradually retreating along the previous exploration direction KF. Each time you retreat, you first try to explore in the direction of the target. If there is no way out, you continue to retreat and explore. When you retreat along the KF direction to a certain point and successfully explore in the direction of the target at that point, you record the actual endpoint reached by the exploration. The backward obstacle avoidance exploration at the dead point is successful.

10. A hybrid vehicle circuit board control system for executing the hybrid vehicle circuit board control method as described in any one of claims 1-9, the system comprising: The data acquisition module is used to acquire circuit design diagrams; The data preprocessing module generates PCB board component layout data based on the circuit design diagram; The routing module is used to acquire PCB board component layout data and generate PCB board routing data based on the PCB board component layout data. The optimization module is used to build an optimization model, iteratively optimize the PCB board component layout data and PCB board routing data, and finally output the optimal PCB board routing data.