Preparation method of patterned P-type ohmic reflecting electrode of vertical-structure LED (light-emitting diode)

Abstract

The invention provides a preparation method of a vertical-structure LED patterned P-type ohmic reflection electrode, and the method comprises the following steps: providing an LED epitaxial wafer which comprises a substrate, and an N-type semiconductor layer, an active layer and a P-type semiconductor layer which are sequentially stacked on the substrate; activating the P-type semiconductor layer; depositing an insulating material on the whole surface of the P-type semiconductor layer; patterning photoresist is formed on the insulating material in a photoetching mode, the insulating material in an area not protected by the patterning photoresist is removed, and the remaining insulating material is a P-face passivation and current blocking layer; processing the LED epitaxial wafer by using a hydrochloric acid aqueous solution, and pre-baking the LED epitaxial wafer; evaporating a P-type ohmic reflecting electrode on the whole surface; etching to obtain a patterned P-type ohmic reflecting electrode; and alloying the patterned P-type ohmic reflecting electrode to finish the preparation. According to the invention, the P-surface passivation and current blocking layer and the patterned P-type ohmic electrode are prepared through one-step photoetching, so that a primary photoetching step is saved, and pattern alignment deviation caused by secondary photoetching is avoided.

Description

Technical Field

[0001] This invention relates to the field of semiconductor manufacturing technology, and in particular to a method for preparing a patterned P-type ohmic reflective electrode for a vertical LED structure. Background Technology

[0002] The core objectives of optimizing the performance of vertical LED chips are to improve luminous efficacy and ensure reliability. Improving the luminous efficacy of the P-side relies on two technologies: first, a high-reflectivity P-type ohmic electrode to reduce light loss; and second, a current blocking layer to optimize current distribution. Ensuring reliability requires passivation treatment of the P-side trench area, with the resulting passivation layer acting as a protective barrier. The current blocking layer and the passivation layer can be fabricated simultaneously.

[0003] The current mainstream vertical-structure chip P-type ohmic electrode fabrication process employs wet etching, with the following steps: First, a passivation layer is fabricated across the entire chip surface. The passivation layer pattern is defined using photolithography, and after etching to form the passivation layer, residual photoresist is removed. Subsequently, metal evaporation is performed to form a uniform base metal film on the passivation layer surface. The electrode pattern is then defined again using photolithography, and finally, the P-type ohmic electrode is fabricated using etching. However, this two-step photolithography process has significant drawbacks: it increases production complexity and cost, reduces throughput, and is prone to pattern alignment errors.

[0004] The core reason for requiring two-step photolithography is the characteristics of P-type semiconductors: their low hole concentration and the high interface quality requirements of ohmic contacts. Typically, higher temperatures are used to evaporate the metal film to ensure density and adhesion. However, high temperatures can cause residual photoresist solvent to vaporize and permeate the interface, leading to contact failure. Therefore, thorough photoresist removal is necessary first. This requirement necessitates separating the passivation layer definition and electrode definition into two separate photolithography steps, thus causing the aforementioned problems.

[0005] Chinese invention patent CN109768137A proposes a scheme using Al as a sacrificial layer. Although it eliminates one photolithography step, it adds Al evaporation and Al etching steps. While reducing one photolithography step, the addition of Al evaporation and Al etching steps does not substantially optimize the process complexity and production efficiency. Summary of the Invention

[0006] Based on this, the present invention provides a method for fabricating a patterned P-type ohmic reflective electrode for a vertical LED structure, which can be completed in a single photolithography step.

[0007] This invention provides a method for fabricating a patterned P-type ohmic reflective electrode for a vertical LED structure, comprising the following steps: S1. Provide an LED epitaxial wafer, which includes a substrate and an epitaxial layer. The epitaxial layer includes, from bottom to top, an N-type semiconductor layer, an active layer, and a P-type semiconductor layer sequentially stacked on the substrate. S2, activate the P-type semiconductor layer; S3. Deposit insulating material over the entire surface of the P-type semiconductor layer; S4. A patterned photoresist is formed on the insulating material by photolithography. The insulating material in the area not protected by the patterned photoresist is removed. The remaining insulating material is the P-side passivation and current blocking layer. S5. Treat the LED epitaxial wafer with hydrochloric acid aqueous solution, and then pre-bake the LED epitaxial wafer at a baking temperature of 50℃~95℃. S6, Full-surface evaporation P-type ohmic reflective electrode; evaporation temperature is 50℃~95℃, evaporation rate is 2Å / s~5Å / s; S7. Remove the patterned photoresist and the P-type ohmic reflective electrode above the patterned photoresist to obtain the patterned P-type ohmic reflective electrode. S8. Alloying is performed on the patterned P-type ohmic reflective electrode to complete the preparation.

[0008] The fabrication method provided by this invention simultaneously controls the evaporation temperature and evaporation rate, resulting in high-quality evaporated P-type ohmic reflective electrodes. Furthermore, the photoresist properties are relatively stable at this temperature, allowing for the evaporation of the P-type ohmic reflective electrode while still obtaining a high-quality metal film. This invention fabricates the P-side passivation and current blocking layer and patterned P-type ohmic electrode in a single photolithography step, saving one photolithography step and avoiding pattern alignment deviations caused by secondary photolithography. In addition, it eliminates the need for a metal sacrificial layer, simplifying the process, reducing costs, and resulting in good chip linearity.

[0009] As an alternative to the preparation method of the present invention, the patterned P-type ohmic reflective electrode is formed by stacking any periodic unit of Ni / Ag or Ni / Au, and the number of stacked periods is greater than or equal to 1.

[0010] As an optional embodiment of the preparation method of the present invention, the thickness of the patterned P-type ohmic reflective electrode is 1000Å to 2000Å.

[0011] As an optional embodiment of the preparation method of the present invention, the patterned photoresist is a negative photoresist, and the evaporation temperature of the P-type ohmic reflective electrode is 50℃~75℃; or the patterned photoresist is a positive photoresist, and the evaporation temperature of the P-type ohmic reflective electrode is 50℃~95℃.

[0012] As an optional embodiment of the preparation method of the present invention, in step S5, the volume ratio of hydrochloric acid to water in the hydrochloric acid aqueous solution is 1:1 to 3:1; the pre-baking of the LED epitaxial wafer is performed in an electron beam evaporation coating machine, and the baking time is 5 min to 20 min. As an optional embodiment of the preparation method of the present invention, in step S2, the activation temperature is 550℃, the time is 3 min, and the atmosphere is O2 and N2.

[0013] As an optional embodiment of the preparation method of the present invention, in step S8 the alloy is annealed using an annealing furnace, and the annealing conditions are 385°C for 25s or 350°C for 100s, and the annealing gases are O2 and N2.

[0014] As an optional embodiment of the preparation method of the present invention, the insulating material is a multilayer structure composed of one or more of SiO2, SiNx, and Al2O3, the thickness of the insulating material is 1000Å to 4000Å, and the temperature for depositing the insulating material is 220℃ to 300℃.

[0015] As an optional embodiment of the preparation method of the present invention, the epitaxial layer is a group III nitride epitaxial layer or a group III phosphide epitaxial layer.

[0016] As an optional embodiment of the preparation method of the present invention, in step S7, a metal stripper is used to strip away the patterned photoresist and the P-type ohmic reflective electrode above the patterned photoresist.

[0017] Additional aspects and advantages of the invention will be set forth in part in the description which follows, some of which will become clear as the description proceeds, and others will be learned by practicing the invention. Attached Figure Description

[0018] Figure 1 This is a top view diagram after step S4 is completed in the embodiment of this application.

[0019] Figure 2 This is a cross-sectional view after step S4 is completed in the embodiment of this application.

[0020] Figure 3 This is a top view diagram after step S7 is completed in the embodiment of this application.

[0021] Figure 4 This is a cross-sectional view after step S7 is completed in the embodiment of this application.

[0022] Figure 5 This is a SEM image of the patterned P-type ohmic reflective electrode after it was fabricated in the embodiments of this application.

[0023] Figure 6 This is a SEM image of the patterned P-type ohmic reflective electrode prepared in the comparative example of this application.

[0024] Figure 7 This is a top view of the fabricated patterned P-type ohmic reflective electrode in an embodiment of this application.

[0025] Figure 8 This is a top view of the patterned P-type ohmic reflective electrode after it has been fabricated in the comparative example of this application.

[0026] Figure 9This is a comparison of the IV curves of the LED chips in the embodiments and comparative examples of this application.

[0027] Figure 10 This is a comparison of the EQE curves of the LED chips in the embodiments and comparative examples of this application.

[0028] In the figure, 1 is the substrate, 2 is the N-type semiconductor layer, 3 is the active layer, 4 is the P-type semiconductor layer, 5 is the P-side passivation and current blocking layer, 6 is the patterned P-type ohmic reflective electrode, and 7 is the patterned photoresist. Detailed Implementation

[0029] The present invention will be further described below with reference to the accompanying drawings and embodiments.

[0030] It should be noted that the following detailed descriptions are exemplary and intended to provide further illustration of the invention. Unless otherwise specified, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains.

[0031] It should be noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the scope of exemplary embodiments according to the invention. As used herein, the singular form is intended to include the plural form as well, unless the context clearly indicates otherwise. Furthermore, it should be understood that when the terms "comprising" and / or "including" are used in this specification, they indicate the presence of features, steps, operations, devices, components, and / or combinations thereof.

[0032] Where there is no conflict, the embodiments and features in the embodiments of the present invention can be combined with each other.

[0033] This application provides a method for fabricating a patterned P-type ohmic reflective electrode for a vertical LED structure, comprising the following steps: S1. Provide an LED epitaxial wafer, which includes a substrate 1 and an epitaxial layer. The epitaxial layer includes, from bottom to top, an N-type semiconductor layer 2, an active layer 3 and a P-type semiconductor layer 4 sequentially stacked on the substrate. S2. Activate the P-type semiconductor layer 4. By first activating the P-type semiconductor layer, the hole concentration on the surface of the P-type semiconductor layer is significantly increased, thereby improving the effect of subsequent ohmic contact formation. S3. Deposit insulating material over the entire surface of the P-type semiconductor layer 4; S4. A patterned photoresist 7 is formed on the insulating material by photolithography. The insulating material in the area not protected by the patterned photoresist 7 is removed. The remaining insulating material is the P-side passivation and current blocking layer 5. S5. Treat the LED epitaxial wafer with hydrochloric acid aqueous solution, and then pre-bake the LED epitaxial wafer at a baking temperature of 50℃~95℃; pre-baking improves the film-forming properties and adhesion of the subsequently evaporated P-type ohmic reflective electrode. S6, Full-surface evaporation P-type ohmic reflective electrode; evaporation temperature is 50℃~95℃, evaporation rate is 2Å / s~5Å / s; S7. Remove the patterned photoresist 7 and the P-type ohmic reflective electrode above the patterned photoresist 7 to obtain the patterned P-type ohmic reflective electrode 6. S8. Alloying is performed on the patterned P-type ohmic reflective electrode 6 to complete the preparation.

[0034] In some embodiments, the patterned P-type ohmic reflective electrode 6 is formed by stacking any periodic units of Ni / Ag or Ni / Au, with a stacking period number greater than or equal to 1. Ni is used as the bottom metal, and NiO is formed after alloying. The work function of NiO matches well with the work function of the P-type semiconductor layer 4, ensuring good ohmic contact. Ag and Au not only have high conductivity but also high reflectivity; therefore, using Ni / Ag or Ni / Au for the patterned P-type ohmic reflective electrode 6 can achieve both good ohmic contact and high reflectivity.

[0035] In some embodiments, the thickness of the patterned P-type ohmic reflective electrode 6 is 1000 Å to 2000 Å. This thickness of reflective electrode provides good ESD yield. A sufficiently thick, highly conductive Ag film can act as an efficient "drainage channel," rapidly and uniformly dispersing the ESD pulse current before it reaches and breaks down fragile semiconductor junctions (such as the GaN PN junction of an LED), and guiding it to the ground terminal. However, when the Ag thickness becomes larger, due to Ag's coefficient of thermal expansion of 18.9 × 10⁻⁶, [further issues arise]. -6 / K is much greater than the thermal expansion coefficient of GaN, which is 5.6 × 10⁻⁶. -6 / K leads to the accumulation of internal stress, resulting in poor adhesion of the Ag film and the potential generation of microcracks. Therefore, under ESD thermal shock, it may peel off or penetrate from the defect point. Moreover, the larger the ESD, the more significant the decrease in its IR yield.

[0036] In some embodiments, the patterned photoresist 7 is a negative photoresist, and the evaporation temperature of the P-type ohmic reflective electrode is 50°C to 75°C. The purpose of the heat treatment is to ensure that the epitaxial wafer is dry and to maintain a suitable substrate temperature for subsequent process steps, thus resulting in better P-electrode film quality. Due to the poor stability of negative photoresist, temperatures exceeding 75°C may bake out impurities, affecting the cleanliness of the epitaxial wafer interface. Positive photoresist has better stability, and it has been verified that evaporation at 95°C does not result in interface contamination.

[0037] In some embodiments, in step S5, the volume ratio of hydrochloric acid to water in the hydrochloric acid aqueous solution is 1:1 to 3:1; the pre-baking of the LED epitaxial wafer is performed in an electron beam evaporation coating machine, and the baking time is 5 min to 20 min. Pre-evaporation baking ensures that the epitaxial wafer and cavity are dry. In some embodiments, in step S2, the activation temperature is 550°C, the time is 3 min, and the atmosphere is O2 and N2. High-temperature activation releases the Mg acceptors that were originally compensated (passivated) by hydrogen atoms, making them effective acceptors capable of accepting electrons and generating holes, thereby increasing the hole concentration.

[0038] In some embodiments, the alloy in step S8 is annealed using an annealing furnace under annealing conditions of 385°C for 25 seconds or 350°C for 100 seconds, with O2 and N2 as the annealing gases. The trace amount of O2 ensures that Ag does not oxidize, and the Ni layer is partially converted into p-type NiO, becoming a highly efficient ohmic contact layer.

[0039] In some embodiments, the insulating material is a multilayer structure composed of one or more of SiO2, SiNx, and Al2O3, with a thickness of 1000 Å to 4000 Å and a deposition temperature of 220°C to 300°C. This passivation layer thickness and deposition temperature ensure that other junction structures are not corroded by phosphate when removing the epitaxial layer material from the dicing path, and prevents the epitaxial layer material from cracking due to excessive stress caused by an excessively thick passivation layer, thus exhibiting good reliability.

[0040] In some embodiments, the epitaxial layer is a group III nitride epitaxial layer or a group III phosphide epitaxial layer. A group III nitride epitaxial layer refers to an epitaxial layer composed of gallium nitride and its related ternary and quaternary alloys (such as InGaN, AlGaN, AlInGaN). GaN is a direct bandgap semiconductor, in which energy can be released efficiently in the form of photons when electrons and holes recombine, resulting in extremely high luminous efficiency. Gallium nitride has a wide bandgap, and by adjusting the proportion of indium, the emission wavelength of InGaN alloy can be made to cover ultraviolet light (about 365 nm) to green light (about 550 nm). A group III phosphide epitaxial layer refers to an epitaxial layer composed of materials such as gallium phosphide, gallium arsenide indium phosphide, etc. By adjusting the proportion of group III elements such as In, Al, and Ga, the emission wavelength of phosphide materials can be made to cover yellow light (about 560 nm) to deep red light (above 650 nm).

[0041] In some embodiments, in step S7, a metal stripper is used to strip and remove the patterned photoresist 7 and the P-type ohmic reflective electrode above the patterned photoresist 7.

[0042] The following are some embodiments of this application. The embodiments of the present invention will further describe in detail each technical step and process parameter in the preparation process. Example 1

[0043] This embodiment provides a method for fabricating a patterned P-type ohmic reflective electrode for a vertical LED. Taking a 700μm×700μm LED as an example, it should be noted that any size and pattern design of vertical LED chip can be used to fabricate a patterned P-type ohmic reflective electrode using this method.

[0044] The preparation method includes the following steps: Step S1: Provide an LED epitaxial wafer, which includes a substrate 1 and an epitaxial layer. The epitaxial layer includes, from bottom to top, an N-type semiconductor layer 2, an active layer 3, and a P-type semiconductor layer 4, which are sequentially stacked on the substrate. The substrate 1 is a silicon substrate, the N-type semiconductor layer 2 is N-type GaN, the active layer 3 is an InGaN / GaN multiple quantum well layer, and the P-type semiconductor layer 4 is P-type GaN.

[0045] Step S2: Activate the P-type semiconductor layer 4.

[0046] Specifically, before activating the P-type semiconductor layer 4, the LED epitaxial wafer is first cleaned with acetone for 5 minutes, then with alcohol for 5 minutes to remove organic matter from the surface of the LED epitaxial wafer. After rinsing with water for 6 minutes, it is cleaned with SPM (sulfuric acid and hydrogen peroxide mixed solution) at 90°C for 10 minutes to remove metal contaminants from the surface of the epitaxial wafer. After rinsing with water for 10 minutes, the LED epitaxial wafer is spun dry.

[0047] The dried LED epitaxial wafer was placed in an annealing furnace for annealing at 550°C for 3 minutes in an annealing atmosphere of O2 and N2. After activation of the P-type GaN, the hole concentration on the P-type GaN surface increased significantly, enabling the subsequently fabricated P-type ohmic reflective electrode to form a good ohmic contact with the P-type semiconductor layer 4, thereby reducing the operating voltage.

[0048] Step S3: 2000 Å SiO2 is deposited on the entire surface of the P-type semiconductor layer 4 using the PECVD method at a deposition temperature of 220 °C.

[0049] Step S4: The LED epitaxial wafer is sent to the photolithography room. Photolithography includes six sub-steps: baking the adhesive, coating positive photoresist, pre-baking, exposure, development, and hardening. First, the adhesive is baked for 13 minutes to ensure the entire chip surface is covered with adhesive. The adhesive enhances the adhesion between the photoresist and the epitaxial wafer. Then, the photoresist is automatically coated using RZJ-390PG-50 positive photoresist. After coating, the epitaxial wafer undergoes pre-baking to cure the photoresist and evaporate most of the solvent. Pre-baking conditions are 120°C for 2 minutes on a heated stage. The fourth step is exposure, with an exposure energy of 100 mJ / cm². 2The fifth step is development, where the exposed photoresist is dissolved in developer to complete the patterning. Finally, hardening is performed at 120°C for 2 minutes on a heated stage to completely evaporate the solvent and further solidify the photoresist. After photolithography, the LED epitaxial wafer is treated in an oxygen atmosphere for 380 seconds to completely remove the photoresist substrate in the developed areas, forming patterned photoresist 7. Patterned photoresist 7 covers the non-light-emitting areas, while the light-emitting areas are not covered by patterned photoresist 7.

[0050] After peroxidation, the LED epitaxial wafer is etched for approximately 160 seconds using a 7:1 BOE solution (40% ammonium fluoride aqueous solution: 49% hydrofluoric acid = 7:1 volume ratio) to remove the SiO2 from the light-emitting areas not protected by the patterned photoresist 7. The remaining SiO2 forms the P-side passivation and current blocking layer 5. The patterned photoresist 7 above the P-side passivation and current blocking layer 5 is retained, as shown in the top view diagram. Figure 1 As shown in the schematic cross-sectional view Figure 2 As shown.

[0051] Step S5: Treat the LED epitaxial wafer with a hydrochloric acid solution (hydrochloric acid:water = 3:1 volume ratio) for 10 minutes. The hydrochloric acid treatment removes oxides from the GaN surface generated during the PECVD deposition process, thus reducing the operating voltage. After hydrochloric acid treatment, rinse the epitaxial wafer with water and spin dry. Then, pre-bake the LED epitaxial wafer at a temperature of 50℃~95℃ to improve the film formation and adhesion of the subsequently evaporated P-type ohmic reflective electrode.

[0052] Step S6: Electron beam evaporation is used to evaporate a P-type ohmic reflective electrode on the entire surface of the LED epitaxial wafer. The evaporated metal is a Ni / Ag stack with two cycles, and its structure is Ni1Å / Ag1000Å / Ni7Å / Ag1000Å. The evaporation temperature is 70℃ and the evaporation rate is 3Å / s. The obtained Ag film has good quality.

[0053] Step S7: Soak the epitaxial wafer in acetone for 10 minutes, then soak it in alcohol for 5 minutes. After drying, use a metal stripper to peel off the metal. After peeling, use a photoresist remover to completely remove the photoresist, thus obtaining a patterned P-type ohmic reflective electrode. Its top view is shown below. Figure 3 As shown in the schematic cross-sectional view Figure 4 As shown.

[0054] Step S8: Anneal the LED epitaxial wafer at 385℃ for 25s in an O2 and N2 atmosphere to form an ohmic contact between the patterned P-type ohmic reflective electrode and the P-type semiconductor layer 2, completing the fabrication. The SEM image of the completed P-type ohmic reflective electrode is shown below. Figure 5 As shown. Comparative Example 1

[0055] This comparative example also provides a method for preparing a patterned P-type ohmic reflective electrode for a vertical LED structure, which is basically the same as that in Example 1, except for steps S4, S6, and S7. The specific differences are as follows: After the P-side passivation and current blocking layer 5 in step S4 of this comparative example are prepared, the patterned photoresist 7 above the P-side passivation and current blocking layer 5 is removed.

[0056] In step S6 of this comparative example, the evaporation temperature of the P-type ohmic reflective electrode is 120℃, and the evaporation rate is 6 Å / s.

[0057] In step S7 of this comparative example, the electrode pattern needs to be defined by photolithography, and then the patterned P-type ohmic reflective electrode 6 is prepared by etching process.

[0058] The SEM image of the final fabricated patterned P-type ohmic reflective electrode in this comparative example is shown below. Figure 6 As shown. Comparison Figure 5 and Figure 6 It can be seen that the patterned P-type ohmic reflective electrodes prepared in the embodiments and comparative examples of this application have high film quality, and the films are continuous and pore-free.

[0059] Figure 7 This is a top view of the fabricated patterned P-type ohmic reflective electrode in an embodiment of this application. Figure 8 This is a top view of the fabricated patterned P-type ohmic reflective electrode in the comparative example of this application. (Comparison) Figure 7 and Figure 8 It can be seen that the patterned P-type ohmic reflective electrodes prepared in the embodiments and comparative examples of this application have similar appearances.

[0060] Figure 9 This document compares the IV curves of the LED chips in the embodiments and comparative examples of this application. Figure 10 This document compares the EQE curves of the LED chips in the embodiments and comparative examples of this application. Figure 9 and Figure 10 It can be seen that the photoelectric properties of the patterned P-type ohmic reflective electrodes prepared in the embodiments and comparative examples of this application are very similar.

[0061] In summary, the embodiments of this application save one photolithography step, but the key performance characteristics of the fabricated patterned P-type ohmic reflective electrode remain stable.

[0062] In this specification, the phrase "some embodiments" means that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. In this specification, illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0063] The embodiments described above are merely illustrative of several implementations of the present invention, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of the present invention. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these modifications and improvements all fall within the scope of protection of the present invention. Therefore, the scope of protection of this patent should be determined by the appended claims.

Claims

1. A method for fabricating a patterned P-type ohmic reflective electrode for a vertically structured LED, characterized in that, Includes the following steps: S1. Provide an LED epitaxial wafer, the LED epitaxial wafer including a substrate and an epitaxial layer, the epitaxial layer including an N-type semiconductor layer, an active layer and a P-type semiconductor layer sequentially stacked on the substrate from bottom to top; S2, activate the P-type semiconductor layer; S3. Deposit insulating material over the entire surface of the P-type semiconductor layer; S4. A patterned photoresist is formed on the insulating material by photolithography. The insulating material in the area not protected by the patterned photoresist is removed. The remaining insulating material is the P-side passivation and current blocking layer. S5. Treat the LED epitaxial wafer with hydrochloric acid aqueous solution, and then pre-bake the LED epitaxial wafer at a baking temperature of 50℃~95℃. S6. Full-surface evaporation of P-type ohmic reflective electrode; the evaporation temperature is 50℃~95℃, and the evaporation rate is 2Å / s~5Å / s; S7. Remove the patterned photoresist and the P-type ohmic reflective electrode above the patterned photoresist to obtain the patterned P-type ohmic reflective electrode. S8. Alloying is performed on the patterned P-type ohmic reflective electrode to complete the preparation.

2. The preparation method according to claim 1, characterized in that: The patterned P-type ohmic reflective electrode is composed of stacked periodic units of either Ni / Ag or Ni / Au, with a stacking period number greater than or equal to 1.

3. The preparation method according to claim 1 or 2, characterized in that: The thickness of the patterned P-type ohmic reflective electrode is 1000 Å to 2000 Å.

4. The preparation method according to claim 1, characterized in that: The patterned photoresist is a negative photoresist, and the evaporation temperature of the P-type ohmic reflective electrode is 50℃~75℃; or the patterned photoresist is a positive photoresist, and the evaporation temperature of the P-type ohmic reflective electrode is 50℃~95℃.

5. The preparation method according to claim 1, characterized in that: In step S5, the volume ratio of hydrochloric acid to water in the hydrochloric acid aqueous solution is 1:1 to 3:1; the pre-baking of the LED epitaxial wafer is carried out in an electron beam evaporation coating machine, and the baking time is 5 min to 20 min.

6. The preparation method according to claim 1, characterized in that: In step S2, the activation temperature is 550℃, the time is 3 minutes, and the atmosphere is O2 and N2.

7. The preparation method according to claim 1, characterized in that: In step S8, the alloy is annealed using an annealing furnace under the following conditions: 385°C for 25 seconds or 350°C for 100 seconds, with O2 and N2 as the annealing gases.

8. The preparation method according to claim 1, characterized in that: The insulating material is a multilayer structure composed of one or more of SiO2, SiNx, and Al2O3, with a thickness of 1000 Å to 4000 Å and a deposition temperature of 220°C to 300°C.

9. The preparation method according to claim 1, characterized in that: The epitaxial layer is a group III nitride epitaxial layer or a group III phosphide epitaxial layer.

10. The preparation method according to claim 1, characterized in that, In step S7, a metal stripper is used to remove the patterned photoresist and the P-type ohmic reflective electrode above the patterned photoresist.

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