High quality transcoding efficient texture format

Abstract

Techniques for transcoding textures are described that include computing a plurality of endpoint colors of a macroblock. In a first technique, a forward discrete cosine transform (DCT) is applied (406) to a macroblock or portion thereof and used to represent the corresponding portion. In a second technique, a mean value of the endpoint colors and a difference between the endpoint colors are calculated (206), where the mean value and the difference establish (208) a projection vector in a color space. Means and differences are compressed (210), and per-pixel distances along the projection vector are calculated (212) and used together with corresponding mean and differences to represent macroblocks.

Description

Technical Field

[0001] This application relates to a technically innovative and unconventional solution that is necessarily rooted in computer technology and produces specific technical improvements, and more specifically relates to a high-quality transcoding and efficient texture format. Background Technology

[0002] In computer simulations such as computer games, objects are rendered in part using "texture" data that describes their surfaces. The more texture data a given object has, the higher the rendering resolution. However, for bandwidth purposes, it is desirable not to send large texture data structures to the rendering device. Summary of the Invention

[0003] Therefore, an apparatus includes at least one processor component configured to compute, for each of at least some macroblocks of at least one computer graphics texture, a plurality of endpoint colors, a mean of the endpoint colors, and a difference between the endpoint colors. The mean and difference establish a projection vector in a color space. The processor component is configured to compress the mean and difference, compute a per-pixel distance along the projection vector, and represent the macroblock using the corresponding mean, difference, and per-pixel distance for each macroblock.

[0004] In some examples, the processor component may be configured to store the corresponding mean, difference, and per-pixel distance for each macroblock. In other examples, the processor component may be configured to send the corresponding mean, difference, and per-pixel distance for each macroblock to at least one receiver, such that the receiver decodes the corresponding mean, difference, and per-pixel distance for each macroblock to render a texture on a video display. The apparatus may include a receiver.

[0005] In an example implementation, the processor component can be configured to pair first and second 4 × 8 or 8 × 4 macroblocks and process the first and second macroblocks into an 8 × 8 macroblock. In another example implementation, the processor component can be configured to generate bytecode representing the size of the macroblock when it is first identified. The macroblock can be written as a compressed byte stream of the macroblock size.

[0006] If needed, the processor component can be configured to initially divide the computer graphics texture into multiple tiles, and for each tile, divide the tile into macroblocks.

[0007] On the other hand, an apparatus includes at least one processor component configured to compute a plurality of endpoint colors for each of at least some macroblocks of at least one computer graphics texture. The processor component is configured to represent the endpoint colors as expressions (RGBA0+RGBA1) / 2 and (signBit(RGBA1-RGBA0)<<7)|rounded(127) Normalization (RGBA1-RGBA0). The processor component is configured to apply a forward discrete cosine transform (DCT) to the expression for at least a portion of the first macroblock, and to represent the corresponding portion using the corresponding result of applying the forward DCT to the corresponding portion. If necessary, the processor component is configured to quantize the result of applying the forward DCT.

[0008] The processor component can be configured to store the corresponding results and / or transmit the corresponding results to at least one receiver, such that the receiver decodes the corresponding results to render the texture on a video display. The apparatus may include a receiver.

[0009] In an embodiment, the processor component may be configured to, in response to a first portion of the first macroblock satisfying a size, apply an inverse DCT to the lowest DCT coefficients of the first portion, and store the result of applying the inverse DCT as a representation of the first portion. The processor component may also be configured to, in response to a first portion of the first macroblock satisfying a size, apply an inverse DCT to the lowest DCT coefficients of the first portion, and compress the result of applying the inverse DCT.

[0010] In some examples, the processor component can be configured to sort the coefficients generated by applying the forward DCT to the corresponding part in a zigzag order from left to right and from top to bottom relative to the corresponding part.

[0011] In an example implementation, the processor component may be configured to initially divide at least some macroblocks into multiple subblocks to establish the corresponding portions.

[0012] In another approach, one method includes: for each of at least some macroblocks of at least one computer graphics texture, calculating a plurality of endpoint colors. The method also includes performing one or two techniques on the macroblocks. A first technique includes applying a forward discrete cosine transform (DCT) to at least a portion of a first macroblock, and representing the corresponding portion using the corresponding result of applying the forward DCT to the corresponding portion. A second technique includes calculating the mean of the endpoint colors and the difference between the endpoint colors, wherein the mean and difference construct a projection vector in a color space, then compressing the mean and difference, calculating the per-pixel distance along the projection vector, and representing the macroblock using the corresponding mean, difference, and per-pixel distance for each macroblock.

[0013] The details of this disclosure regarding its structure and operation can be best understood with reference to the accompanying drawings, wherein like reference numerals denote like parts, and wherein: Attached Figure Description

[0014] Figure 1 It is a block diagram of an example system that includes examples consistent with this principle;

[0015] Figure 2The first example compression technique is illustrated in an example flowchart format;

[0016] Figure 3 This shows a 256 × 256 tile of a texture divided into macroblocks;

[0017] Figure 4 The second example compression technique, built upon the first example compression technique, is illustrated in an example flowchart format.

[0018] Figure 5 and Figure 6 This illustrates a macroblock that is difficult to compress in BC 7;

[0019] Figure 7 It shows the accompanying Figure 4 The second technique is forward DCT coefficient sorting; and

[0020] Figure 8 It shows the accompanying Figure 4 The second technique is the sorting of inverse DCT coefficients. Detailed Implementation

[0021] This disclosure generally relates to the computer ecosystem, including various aspects of consumer electronics (CE) device networks, such as, but not limited to, computer gaming networks. Systems described herein may include server and client components that can be networked, enabling the exchange of data between client and server components. Client components may include one or more computing devices, including game consoles such as Sony PlayStation® or game consoles manufactured by Microsoft, Nintendo, or other manufacturers; extended reality (XR) headsets such as virtual reality (VR) headsets; augmented reality (AR) headsets; portable televisions (e.g., smart TVs, internet-enabled televisions); portable computers such as laptops and tablets; and other mobile devices including smartphones and additional examples discussed below. These client devices may operate with a variety of operating environments. For example, by way of example, some client computers may run on a Linux operating system, an operating system from Microsoft, or a Unix operating system, or an operating system manufactured by Apple, Inc., or Google, or a Berkeley Software distribution or Berkeley Standard Distribution (BSD) OS (including descendants of BSD). These operating environments can be used to execute one or more browsing programs, such as browsers made by Microsoft, Google, or Mozilla, or other browser programs that can access websites hosted by the internet servers discussed below. Furthermore, operating environments based on this principle can be used to execute one or more computer game programs.

[0022] A server and / or gateway may be used, which may include one or more processors executing instructions that configure the server to receive and send data over a network such as the Internet. Alternatively, the client and server may connect via a local intranet or virtual private network. The server or controller may be instantiated from a game console such as a Sony PlayStation®, a personal computer, etc.

[0023] Information can be exchanged between clients and servers over a network. For this purpose, and for security, servers and / or clients may include firewalls, load balancers, temporary storage, and proxies, as well as other network infrastructure for reliability and security. One or more servers can form a means of implementing methods to provide network members with a secure community, such as an online social networking site or a gaming network.

[0024] A processor can be a single-chip or multi-chip processor that executes logic via various lines such as address lines, data lines, and control lines, as well as registers and shift registers. A processor that includes a digital signal processor (DSP) can be an embodiment of a circuit. A processor assembly can include one or more processors.

[0025] Components included in one embodiment may be used in other embodiments in any suitable combination. For example, any of the various components described herein and / or depicted in the accompanying drawings may be combined, interchanged, or excluded from other embodiments.

[0026] "A system having at least one of A, B and C" (similarly, "a system having at least one of A, B or C" and "a system having at least one of A, B, and C") includes systems having only A, only B, only C, A and B together, A and C together, B and C together and / or A, B and C together.

[0027] Now for reference Figure 1An example system 10 is illustrated, which may include one or more of the example devices mentioned above and further described below in accordance with this principle. A first example device among the example devices included in system 10 is a consumer electronics (CE) device, such as an audio-visual device (AVD) 12, such as, but not limited to, a projector-based theater display system, or an internet-enabled TV with a TV tuner (equivalently, a set-top box controlling the TV). The AVD 12 may alternatively also be a computerized internet-enabled (“smart”) phone, tablet computer, laptop computer, head-mounted device (HMD) and / or headset (such as smart glasses or VR headsets), another wearable computerized device, a computerized internet-enabled music player, a computerized internet-enabled headset, a computerized internet-enabled implantable device (such as an implantable skin device), etc. In any case, it should be understood that the AVD 12 is configured to take this principle (e.g., communicate with other CE devices to take this principle, perform the logic described herein, and perform any other functions and / or operations described herein).

[0028] Therefore, to implement this principle, the AVD 12 can be constructed from some or all of the components shown. For example, the AVD 12 may include one or more touch-enabled displays 14, which may be implemented using a high-definition or ultra-high-definition "4K" or higher flat panel screen. The touch-enabled displays 14 may include, for example, a capacitive or resistive touch sensing layer having an electrode grid for touch sensing consistent with this principle.

[0029] AVD 12 may also include one or more speakers 16 for outputting audio according to these principles, and at least one additional input device 18, such as an audio receiver / microphone, for inputting audible commands to control AVD 12. Example AVD 12 may also include one or more network interfaces 20 for communicating over at least one network 22 (such as the Internet, WAN, LAN, etc.) under the control of one or more processors 24. Thus, interface 20 may be, but is not limited to, a Wi-Fi transceiver, which is an example of a wireless computer network interface, such as, but not limited to, a mesh network transceiver. It should be understood that processor 24 controls AVD 12 to perform these principles, including other elements of AVD 12 described herein, such as controlling display 14 to present images thereon and receive input from it. Furthermore, note that network interface 20 may be a wired or wireless modem or router, or other suitable interface, such as a wireless telephone transceiver or a Wi-Fi transceiver as described above.

[0030] In addition to the above, the AVD 12 may also include one or more input and / or output ports 26, such as an HDMI port or a USB port, for physical connection to another CE device and / or a headphone port for connecting headphones to the AVD 12 to present audio from the AVD 12 to the user via headphones. For example, input port 26 may be connected via a cable or satellite source 26a to audio / video content, either wired or wirelessly. Therefore, source 26a may be a standalone or integrated set-top box or satellite receiver. Alternatively, source 26a may be a game console or disc player containing content. When implemented as a game console, source 26a may include some or all of the components described below with respect to CE device 48.

[0031] AVD 12 may also include one or more computer memory / computer-readable storage media 28, such as disk storage or solid-state storage for non-transitory signals, which in some cases are embodied in the chassis of the AVD as a standalone device or personal video recording device (PVR) or video disk player, located inside or outside the AVD chassis for playing AV programs, or as a removable storage medium or a server as described below. Furthermore, in some embodiments, AVD 12 may include a location or place receiver, such as, but not limited to, a mobile phone receiver, a GPS receiver, and / or an altimeter 30, configured to receive geolocation information from a satellite or mobile phone base station and provide that information to the processor 24 and / or determine the height at which the AVD 12 is placed with the processor 24.

[0032] Continuing the description of AVD 12, in some embodiments, AVD 12 may include one or more cameras 32, which may be thermal imaging cameras, digital cameras such as webcams, IR sensors, event-based sensors, and / or cameras integrated into AVD 12 and controllable by processor 24 to collect pictures / images and / or videos in accordance with these principles. AVD 12 may also include a Bluetooth® transceiver 34 and other near-field communication (NFC) elements 36 for communicating with other devices using Bluetooth and / or NFC technologies, respectively. An example NFC element may be a radio frequency identification (RFID) element.

[0033] Furthermore, the AVD 12 may include one or more auxiliary sensors 38 that provide input to the processor 24. For example, one or more of the auxiliary sensors 38 may include one or more pressure sensors forming a layer of the touch-enabled display 14 itself, and may be, but are not limited to, piezoelectric pressure sensors, capacitive pressure sensors, piezoresistive strain gauges, optical pressure sensors, electromagnetic pressure sensors, etc. Other sensor examples include pressure sensors, motion sensors (such as accelerometers, gyroscopes, tachometers) or magnetic sensors, infrared (IR) sensors, optical sensors, speed and / or rhythm sensors, event-based sensors, gesture sensors (e.g., for sensing gesture commands). Thus, the sensors 38 may be implemented by one or more motion sensors, such as individual accelerometers, gyroscopes, and magnetometers, and / or inertial measurement units (IMUs) that typically include a combination of accelerometers, gyroscopes, and magnetometers, to determine the position and orientation of the AVD 12 in three dimensions, or by event-based sensors, such as event detection sensors (EDS). Consistent with this disclosure, the EDS provides an output indicating changes in light intensity sensed by at least one pixel of the light sensing array. For example, if the light sensed by the pixel is decreasing, the output of EDS can be -1; if it is increasing, the output of EDS can be +1. No change in light intensity below a certain threshold can be indicated by an output binary signal of 0.

[0034] The AVD 12 may also include an over-the-air (OTA) television broadcast port 40 for receiving OTA television broadcasts that provide input to the processor 24. In addition to the foregoing, it should be noted that the AVD 12 may also include an infrared (IR) transmitter and / or an IR receiver and / or an IR transceiver 42, such as an IR data association (IRDA) device. A battery (not shown) may be provided to power the AVD 12, such as a kinetic energy harvester that can convert kinetic energy into electrical energy to charge the battery and / or power the AVD 12. A graphics processing unit (GPU) 44 and a field-programmable gate array (FPGA) 46 may also be included. One or more tactile / vibration generators 47 may be provided to generate tactile signals that can be felt by a person holding or touching the device. Therefore, the haptic generator 47 can use an electric motor to vibrate all or part of the AVD 12, which is connected to an eccentric and / or unbalanced weight via a rotatable shaft, such that the shaft can be rotated under the control of the motor (which can in turn be controlled by a processor (e.g., processor 24)) to generate vibrations of various frequencies and / or amplitudes as well as force simulations of various directions.

[0035] It may also include a light source such as a projector (such as an infrared (IR) projector).

[0036] In addition to AVD 12, System 10 may include one or more other CE device types. In one example, the first CE device 48 may be a computer game console that can be used to send computer game audio and video to AVD 12 via commands sent directly to AVD 12 and / or via a server described below, while the second CE device 50 may include components similar to the first CE device 48. In the example shown, the second CE device 50 may be configured as a computer game controller operated by a player or a head-mounted display (HMD) worn by a player. The HMD may include a heads-up transparent or opaque display for presenting AR / MR content or VR content (more generally, extended reality (XR) content), respectively. The HMD may be configured as a glasses-type display sold by a computer game device manufacturer or a larger VR-type display.

[0037] In the example shown, only two CE devices are illustrated; it should be understood that fewer or more devices may be used. The devices described herein may implement some or all of the components shown for AVD 12. Any components shown in the following figures may be combined with some or all of the components shown in the case of AVD 12.

[0038] Referring now to at least one server 52 described above, it includes at least one server processor 54, at least one tangible computer-readable storage medium 56 (such as a disk-based or solid-state storage device), and at least one network interface 58, which, under the control of the server processor 54, allows communication with other illustrated devices via network 22 and, in practice, facilitates communication between server and client devices according to this principle. Note that the network interface 58 may be, for example, a wired or wireless modem or router, a Wi-Fi transceiver, or other suitable interface, such as a wireless telephone transceiver.

[0039] Therefore, in some embodiments, server 52 may be an internet server or an entire server "farm" and may include and perform "cloud" functionality, enabling devices of system 10 to access a "cloud" environment via server 52 in example embodiments for, for example, online gaming applications. Alternatively, server 52 may be implemented by one or more game consoles or other computers in the same room as other devices shown or nearby.

[0040] The components shown in the following figures may include some or all of the components shown herein. Any user interface (UI) described herein may be combined and / or extended, and UI elements may be mixed and matched between UIs.

[0041] This principle can be applied to various machine learning models, including deep learning models. Machine learning models consistent with this principle can be trained using a variety of algorithms, including supervised learning, unsupervised learning, semi-supervised learning, reinforcement learning, feature learning, self-learning, and other forms of learning. Examples of such algorithms that can be implemented by computer circuits include one or more neural networks, such as convolutional neural networks (CNNs), recurrent neural networks (RNNs), and RNN types known as long short-term memory (LSTM) networks. Generative pre-trained transformers (GPTTs) can also be used. Support vector machines (SVMs) and Bayesian networks can also be considered examples of machine learning models. In addition to the network types described above, the models in this paper can be implemented using classifiers.

[0042] As understood in this paper, performing machine learning can therefore involve accessing and then training a model on training data so that the model can process further data to make inferences. Thus, an artificial neural network / AI model trained via machine learning can include an input layer, an output layer, and multiple hidden layers in between, which are configured and weighted to make inferences about the appropriate output.

[0043] After turning Figure 2 Previously, a "texture" was a data structure that could be mapped onto an image to represent the surface of a rendered object. The basic data element of a texture data structure is a texture element, or texel (a combination of texture and pixel). A texture is represented by an array of texels that represents the texture space. Tessells are mapped to pixels in the image to be rendered to define the rendering surface of the image.

[0044] Various types of compression can be applied to textures. One type is block compression, sometimes referred to as BCn compression, which is a lossy texture compression that can be decompressed in-situ by the graphics processing unit (GPU). Block compression does not require decompressing the entire image, so the GPU can decompress the data structure while sampling the texture, as if it were not compressed at all. A specific type of block compression is BC7, where the texture is subdivided into fixed-size 4 × 4 blocks, and each block is compressed to a fixed number of bits (e.g., BC7 uses 128 bits per block). Ignoring partitions for now, pixels in a block are represented by a single pair of endpoint colors shared across all pixels in the block and 16 per-pixel interpolation index values, defined by how much to blend between the two endpoint colors. The pixel color in a compressed block is calculated by blending the two endpoint colors by the amount specified by the pixel interpolation index.

[0045] from Figure 2 Starting from state 200, the texture is divided into 256 × 256 tiles. These tiles are then processed independently in the logic below.

[0046] Move to state 202, such as Figure 3 Each tile of tile 300 shown is divided into macroblocks of variable size, for example, macroblocks of sizes 4 × 8, 8 × 4, 8 × 8, 16 × 8, 8 × 16, 16 × 16, ..., 64 × 64. The size is chosen to be as large as possible while keeping the error below a certain threshold. Note that 4 × 8 blocks can be paired and treated as a single 8 × 8 block; the same applies to 8 × 4 blocks. In a particular example, tiles can be scanned from left to right and from top to bottom. If necessary, bytecode representing the size of a macroblock can be written upon its first access. The bytecode written for this example includes 8 × 8, 16 × 16, 8 × 8, 8 × 16, 8 × 8, 8 × 8, 16 × 16, 16 × 8. Therefore, macroblocks can be written as compressed byte streams of macroblock size, for example, by using a lossless compression algorithm such as LZ.

[0047] The logic proceeds from state 202 to state 204, where, for each macroblock, two optimal 8-bit endpoint colors, RGBA0 and RGBA1, are calculated. In state 206, the mean and difference of the endpoint values ​​are calculated and stored as (RGBA0 + RGBA1) / 2 and (signBit(RGBA1 - RGBA0)) respectively. 128) + round (127) normalize(abs(RGBA1-RGBA0))), where:

[0048] int4 signBit(int4 rgba) {

[0049] int4 s;

[0050] if (rgba.r < 0) sr = 1; else sr = 0;

[0051] if (rgba.g < 0) sg = 1; else sg = 0;

[0052] if (rgba.b < 0) sb = 1; else sb = 0;

[0053] if (rgba.a < 0) sa = 1; else sa = 0;

[0054] return s;

[0055] }

[0056] int4 abs(int4 rgba) {

[0057] if (rgba.r < 0) rgba.r = -rgba.r;

[0058] if (rgba.g < 0) rgba.g = -rgba.g;

[0059] if (rgba.b < 0) rgba.b = -rgba.b;

[0060] if (rgba.a < 0) rgba.a = -rgba.a;

[0061] return rgba;

[0062] }

[0063] float4 normalize(int4 rgba) {

[0064] float len ​​= sqrt(rgba.r rgba.r + rgba.g rgba.g + rgba.b rgba.b +rgba.a rgba);

[0065] float4 normalized = rgba;

[0066] normalized.r / = len;

[0067] normalized.g / = len;

[0068] normalized.b / = len;

[0069] normalized.a / = len;

[0070] return normalized;

[0071] }

[0072] State 208 indicates that the mean and difference form a projection vector in the color space. At state 210, the mean and difference are compressed, and at state 212, the distance per pixel is calculated along the projection vector. This... Figure 3 As shown in the figure, 302 shows the average color of an example macroblock, while 304 shows the example distance along the projection vector.

[0073] Figure 4 The diagram illustrates the compression along the line formed by... Figure 2The technique for calculating the distance to the projection vector generated in state 212. From Figure 4 Starting with status 404, from Figure 2 Each 256 × 256 tile generated by state 202 can optionally be divided into smaller sub-tiles, the potential sizes of which can be the same as the larger macroblocks: 4 × 8, 8 × 4, 8 × 8, 16 × 8, 8 × 16, ..., 64 × 64, suitable for Discrete Cosine Transform (DCT). The sub-tile size is chosen to minimize the entropy of the DCT coefficients. The sub-tile size can be written and compressed in the same way as the macroblock size.

[0074] From state 404, the logic proceeds to state 406. For each sub-block, a forward discrete cosine transform (DCT) is applied along the path... Figure 2 The distance of the projection vector is calculated in state 212, and then the result is quantized.

[0075] State 408 indicates that if the DCT subblock is larger than a predetermined size, such as 8 × 8, the logic can move to state 410 to apply the inverse DCT to the lowest (width / 8) × (height / 8) DCT coefficients. The result is compressed and stored in state 412.

[0076] For entropy code coefficients, standard JPEG methods, binary arithmetic coding, or asymmetric digital systems can be used.

[0077] If the test at state 408 is negative or starts from state 412, the logic moves to state 414 to compress difficult-to-compress macroblocks (such as...). Figure 5 Macroblock 500 shown is as follows Figure 6 The BC7 format 600 shown is stored directly in the bitstream.

[0078] Regarding the details of the DCT coefficients mentioned above, as stated above, in state 406, the forward DCT is applied to the sub-block, and the resulting coefficients are quantized. For example... Figure 7 As shown, the coefficients can be sorted in a zigzag order. For example, for an 8 × 8 sub-block, starting from the coefficient in the top left corner, move forward to the next coefficient in the top row, then down to the second coefficient in the first column, then down to the third coefficient in the first column, then up to the third coefficient in the top row, then to the fourth coefficient in the top row, then down to the third coefficient in the first column, then down to the fifth coefficient in the first column, and so on. Figure 7 The zigzag line 700 is shown in the figure, where the internal coefficients on line 700 are ordered according to their positions on the line.

[0079] Figure 8 This shows how to target sub-block pairs of size (W × H). Figure 4The inverse coefficients of the operation at state 410 are sorted. As described above, the inverse DCT is applied to the lowest (W / 8 × H / 8) frequency DCT coefficients. For example, for Figure 8 The 16 × 16 sub-block 800 shown has its inverse DCT applied to the 2 × 2 coefficients 802 in the square pattern in the upper left corner of sub-block 800. Low-frequency values ​​of these transforms can be compressed, for example, using LZ. When entropy encoding the remaining coefficients, coefficients 802 (W / 8 × H / 8) can be skipped. The pattern of inverse DCT coefficient application can be similar to that described above for… Figure 7 The same zigzag pattern is used, such as Figure 8 The zigzag line 804 is shown in the figure.

[0080] The compressed representation of the texture described above can be stored and / or sent to a source that can be, for example, […]. Figure 1 The receiver, as shown, is implemented using any device to invert the relevant encoding during decoding and display textures in computer simulations such as computer games.

[0081] While specific techniques are shown and described in detail herein, it should be understood that the subject matter covered by this application is limited only by the claims.

Claims

1. An apparatus comprising: At least one processor component is configured as follows: For each macroblock in at least some macroblocks of at least one computer graphics texture, a plurality of endpoint colors, the mean of the endpoint colors, and the difference between the endpoint colors are calculated, and the mean and the difference are used to construct a projection vector in a color space. Compress the mean and the difference; Calculate the distance per pixel along the projection vector; as well as The macroblock is represented using the corresponding mean, difference, and distance per pixel for each macroblock.

2. The apparatus according to claim 1, wherein, The processor component is configured to store the corresponding mean, difference, and distance per pixel for each macroblock.

3. The apparatus according to claim 1, wherein, The processor component is configured to send the corresponding mean, difference, and per-pixel distance of each macroblock to at least one receiver, such that the receiver is able to decode the corresponding mean, difference, and per-pixel distance of each macroblock for rendering the texture on a video display.

4. The apparatus of claim 3, comprising the receiver.

5. The apparatus according to claim 1, wherein, The processor component is configured as follows: The first and second 4 × 8 macroblocks are paired and the first and second macroblocks are processed into 8 × 8 macroblocks.

6. The apparatus according to claim 1, wherein, The processor component is configured as follows: When a macroblock is first identified, bytecode representing the size of the macroblock is generated.

7. The apparatus according to claim 6, wherein, The processor component is configured as follows: The macroblock is written as a compressed byte stream of the macroblock size.

8. The apparatus according to claim 1, wherein, The processor component is configured as follows: The computer graphics texture is divided into multiple tiles; and For each tile, the tile is divided into macroblocks.

9. An apparatus comprising: At least one processor component is configured as follows: For each macroblock in at least some macroblocks of at least one computer graphics texture, calculate multiple endpoint colors; Represent the endpoint color as the expression (RGBA0+RGBA1) / 2 and (signBit(RGBA1-RGBA0)<<7)|rounded (127) Normalization (RGBA1-RGBA0)); For at least a portion of the first macroblock, the forward discrete cosine transform (DCT) is applied to the expression; as well as The corresponding part is represented by the corresponding result of applying the forward DCT to the corresponding part.

10. The apparatus according to claim 9, wherein, The processor component is configured to store the corresponding results.

11. The apparatus according to claim 9, wherein, The processor component is configured to send the corresponding result to at least one receiver, such that the receiver is able to decode the corresponding result for rendering the texture on a video display.

12. The apparatus of claim 11, comprising the receiver.

13. The apparatus according to claim 9, wherein, The processor component is configured as follows: In response to the first portion of the first macroblock satisfying the size, an inverse DCT is applied to the lowest DCT coefficient of the first portion; as well as The result of applying the inverse DCT is stored as a representation of the first part.

14. The apparatus according to claim 13, wherein, The processor component is configured as follows: In response to the first portion of the first macroblock satisfying the size, an inverse DCT is applied to the lowest DCT coefficients of the first portion; and The results of the inverse DCT are compressed and applied.

15. The apparatus according to claim 9, wherein, The processor component is configured as follows: The order coefficients generated by applying forward DCT to the corresponding part in a zigzag order from left to right and from top to bottom relative to the corresponding part.

16. The apparatus according to claim 9, wherein, The processor component is configured as follows: At least some macroblocks are split into multiple subblocks to build the corresponding parts.

17. The apparatus according to claim 9, wherein, The processor component is configured as follows: The results of the forward DCT are applied quantitatively.

18. A method comprising: For each macroblock in at least some macroblocks of at least one computer graphics texture, calculate multiple endpoint colors; At least A and / or B are performed on the macroblock, where A includes: For at least a portion of the first macroblock, a forward discrete cosine transform (DCT) is applied, and the corresponding portion is represented by the corresponding result of applying the forward DCT to the corresponding portion; B includes: Calculate the mean of the endpoint colors and the difference between the endpoint colors, establish a projection vector in the color space using the mean and the difference, compress the mean and the difference, calculate the per-pixel distance along the projection vector, and represent the macroblock using the corresponding mean, difference, and per-pixel distance for each macroblock.

19. The method of claim 18, comprising performing A.

20. The method of claim 18, comprising performing B.

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