Integrated circuit multilayer structure defect nondestructive testing method based on terahertz time-domain spectroscopy

Abstract

The invention discloses an integrated circuit multilayer structure defect nondestructive testing method based on terahertz time-domain spectroscopy, and relates to the technical field of integrated circuit defect detection, and the method comprises the following steps: testing the terahertz time-domain spectroscopy of an integrated circuit, and converting the terahertz time-domain spectroscopy into an intensity reflection spectrum; performing feature extraction on waves in the intensity reflectance spectrum to obtain waveform features of the intensity reflectance spectrum; preparing a test sample of the integrated circuit, and acquiring waveform characteristics of the test sample to obtain normal characteristics; carrying out deep learning on the normal features, and analyzing to obtain a judgment standard of the normal features; performing nondestructive testing on the defects of the integrated circuit based on the judgment standard; the method is used for solving the problem that the defects of the integrated circuit cannot be accurately recognized due to the fact that the existing integrated circuit defect detection technology is insufficient in applicability and incomplete in defect recognition of the integrated circuit.

Description

Technical Field

[0001] This invention relates to the field of integrated circuit defect detection technology, specifically to a non-destructive testing method for multilayer structure defects in integrated circuits based on terahertz time-domain spectroscopy. Background Technology

[0002] Integrated circuit defect detection technology refers to a technical system that uses physical, chemical, or optical methods to identify, locate, and analyze various abnormalities, defects, or deviations in the chip structure throughout the entire process of integrated circuit manufacturing, packaging, and testing. Its core objective is to ensure chip functionality and reliability, and it is a key link in chip yield control and quality management.

[0003] Existing integrated circuit defect detection technologies are generally limited in their ability to detect defects in multilayer integrated circuits. Furthermore, these technologies typically require defect detection during the integrated circuit manufacturing process, i.e., wafer defect detection. However, integrated circuits involve multiple other manufacturing processes, and wafer-level defect detection alone cannot encompass all these processes, making accurate defect identification impossible. For example, patent application CN115015289A discloses a "method for detecting integrated circuit defects," which performs wafer defect detection during the wafer fabrication stage. However, since integrated circuits involve other manufacturing processes, wafer-level defect detection alone cannot accurately identify the presence of defects. Therefore, existing integrated circuit defect detection technologies suffer from insufficient applicability and incomplete defect identification, leading to the inability to accurately identify integrated circuit defects. Summary of the Invention

[0004] This invention aims to at least partially solve one of the technical problems in the prior art. It involves testing the terahertz time-domain spectrum of an integrated circuit and converting it into an intensity reflection spectrum. Feature points are then extracted from the intensity reflection spectrum, and feature extraction is performed on these feature points to obtain waveform features of the intensity reflection spectrum. Test samples of the integrated circuit are used to collect waveform features to obtain normal features. Deep learning is then applied to these normal features to obtain reference features. Based on these reference features, a judgment criterion for normal features is analyzed. Finally, based on this judgment criterion, non-destructive testing of defects in the integrated circuit is performed. This addresses the problem that existing integrated circuit defect detection technologies suffer from insufficient applicability and incomplete defect identification, leading to inaccurate identification of integrated circuit defects.

[0005] To achieve the above objectives, this application provides a non-destructive testing method for defects in multilayer structures of integrated circuits based on terahertz time-domain spectroscopy, comprising the following steps: Test the terahertz time-domain spectrum of the integrated circuit and convert the terahertz time-domain spectrum into an intensity reflection spectrum; Feature extraction is performed on the waves in the intensity reflection spectrum to obtain the waveform features of the intensity reflection spectrum; The test sample is equipped with an integrated circuit, and the waveform characteristics of the test sample are collected to obtain normal characteristics; Deep learning is used to analyze normal features and obtain the criteria for judging normal features; Non-destructive testing of integrated circuit defects is performed based on judgment criteria.

[0006] Furthermore, testing the terahertz time-domain spectrum of the integrated circuit and converting the terahertz time-domain spectrum into an intensity reflection spectrum includes the following sub-steps: The terahertz time-domain spectrum of the integrated circuit was tested and acquired using broadband terahertz pulses. The terahertz time-domain spectrum is processed using a terahertz time-domain spectral processing model to output the intensity reflection spectrum.

[0007] Furthermore, feature extraction is performed on the waves in the intensity reflection spectrum to obtain the waveform features of the intensity reflection spectrum, including the following sub-steps: Extract feature points from the intensity reflectance spectrum; Feature extraction is performed on the feature points to obtain the waveform features of the intensity reflection spectrum.

[0008] Furthermore, extracting feature points from the intensity reflectance spectrum includes the following sub-steps: Obtain the coordinates of the peaks and troughs in the intensity reflectance spectrum, and name them the peak points and trough points, respectively. The peaks are numbered from left to right, using the symbol F. n It is represented as follows, where n is a non-zero natural number and n is the index of F; Will be in F n The first valley point on the right is marked as G. n ; Connect F with a straight line n With G n At the same time, F is connected by a straight line. n With G n-1 Mark the resulting straight line as L. n Label the resulting straight lines as L from left to right. m At the same time, it will be with L m Curves within the same X-axis range are labeled LB. m ; Find LB n Above and L n The coordinates point furthest apart are named the relay point, and L is... m The corresponding relay point is marked as Z. mThe peaks, valleys, and relay points are collectively referred to as feature points.

[0009] Further, feature extraction is performed on the feature points to obtain the waveform features of the intensity reflection spectrum, including the following sub-steps: By connecting adjacent peaks with a smooth curve, a continuous curve is obtained, which is named the peak shape feature. By connecting adjacent valley points with a smooth curve, a continuous curve is obtained, which is named the valley feature. By connecting adjacent relay points with a smooth curve, a continuous curve is obtained, which is named the relay feature. The peak-shaped features, valley-shaped features, and relay features are collectively referred to as waveform features.

[0010] Furthermore, for test samples equipped with integrated circuits, acquiring the waveform characteristics of the test samples to obtain normal characteristics includes the following sub-steps: Select a batch of integrated circuits known to be free of defects as test samples; The waveform features of the test samples are extracted to obtain normal features.

[0011] Furthermore, non-destructive testing of integrated circuit defects based on judgment criteria includes the following sub-steps: Deep learning is applied to normal features to obtain reference features for normal features; Criteria for judging normal features based on reference feature analysis.

[0012] Furthermore, deep learning is performed on normal features to obtain reference features for normal features, including the following sub-steps: All peak features in the normal features are placed in the same intensity reflection spectrum, while valley features and relay features in the intensity reflection spectrum are removed to obtain the peak learning map. All valley-shaped features in the normal features are placed in the same intensity reflection spectrum, while peak-shaped features and relay features in the intensity reflection spectrum are removed to obtain the valley-shaped learning map. All relay features in the normal features are placed in the same intensity reflection spectrum, while valley-shaped and peak-shaped features in the intensity reflection spectrum are removed to obtain the relay learning map. The peak-shaped learning map, valley-shaped learning map, and relay learning map are collectively referred to as the feature learning map, which is the reference feature.

[0013] Furthermore, the criteria for judging normal features based on reference feature analysis include the following sub-steps: When analyzing any reference feature, name it the target analysis feature, and name the waveform feature in the target analysis feature the target analysis waveform. The left endpoints of the target analysis waveform are numbered in top-to-bottom order, using the symbol T. i This indicates that the right endpoints of the target analysis waveform are numbered in descending order, using the symbol R. i This indicates that i and j are both non-zero natural numbers and i is the index of T and R; T by smoothing the curve i and T i+1 Connect the components and simultaneously smooth the R curve. i and R i+1 Connect the curves to obtain the left closed curve and the right closed curve. Name the closed space enclosed by the target analysis waveform, the left closed curve, and the right closed curve as the judgment reference data. The outline of the judgment reference data is obtained and named waveform trend data. The waveform trend data obtained by analyzing the peak learning graph, valley learning graph and relay learning graph are named peak trend data, valley trend data and relay trend data respectively. The peak trend data, valley trend data and relay trend data are the judgment criteria.

[0014] Furthermore, non-destructive testing of integrated circuit defects based on judgment criteria includes the following sub-steps: The integrated circuit that needs to be non-destructively tested is named the circuit to be tested. The peak shape feature, valley shape feature and relay feature of the circuit to be tested are extracted and named peak shape detection feature, valley shape detection feature and relay detection feature, respectively. Determine whether the peak detection feature is within the closed area enclosed by the peak trend data, and determine whether the valley detection feature is within the closed area enclosed by the valley trend data. At the same time, determine whether the relay detection feature is within the closed area enclosed by the relay trend data. If all are yes, the output circuit outputs a normal signal; otherwise, the output circuit outputs an abnormal signal. If the output circuit sends an abnormal signal, the circuit under test will be marked as a defective circuit.

[0015] The beneficial effects of this invention are as follows: This invention tests the terahertz time-domain spectrum of an integrated circuit and converts it into an intensity reflection spectrum. Then, it extracts feature points from the intensity reflection spectrum and performs feature extraction on these feature points to obtain the waveform features of the intensity reflection spectrum. The advantage lies in the fact that by scanning the integrated circuit with a terahertz pulse, the pulse propagates internally. When it encounters a defect, it generates a reflection and obtains a reflection peak. The peaks in the intensity reflection spectrum have certain characteristics, namely waveform characteristics. There are certain differences in the waveform characteristics between normal integrated circuits and integrated circuits with defects, thereby identifying defects. In addition, after the integrated circuit is manufactured, defect detection is performed on the integrated circuit, and the multilayer structure in the integrated circuit can be detected by the terahertz pulse, which improves the accuracy and applicability of integrated circuit defect detection. This invention is equipped with integrated circuit test samples, collects waveform features of the test samples to obtain normal features, performs deep learning on the normal features to obtain reference features of the normal features, analyzes the judgment criteria of the normal features based on the reference features, and finally performs non-destructive testing on the integrated circuit defects based on the judgment criteria. The advantage is that integrated circuits in the same batch usually have the same structure. By learning the normal features, the waveform features of integrated circuits without defects can be obtained, and then defect detection is performed on subsequent integrated circuits, which improves the accuracy and effectiveness of integrated circuit defect detection. Attached Figure Description

[0016] Figure 1 This is a flowchart illustrating the steps of the method of the present invention; Figure 2 This is a schematic diagram of the intensity reflection spectrum of the present invention; Figure 3 This is a schematic diagram of the peaks and valleys of the present invention; Figure 4 For the L of the present invention m A schematic diagram; Figure 5 This is a schematic diagram of the relay point of the present invention; Figure 6 This is a schematic diagram of the peak shape characteristics of the present invention; Figure 7 This is a schematic diagram of the peak shape learning plot of the present invention; Figure 8 This is a schematic diagram of the reference data for judgment in this invention. Detailed Implementation

[0017] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0018] Example 1, please refer to Figure 1 As shown, this application provides a non-destructive testing method for defects in multilayer structures of integrated circuits based on terahertz time-domain spectroscopy, comprising the following steps: Step S1 involves testing the terahertz time-domain spectrum of the integrated circuit and converting the terahertz time-domain spectrum into an intensity reflection spectrum. Step S1 includes the following sub-steps: Step S101: Test and acquire the terahertz time-domain spectrum of the integrated circuit through broadband terahertz pulses; Please see Figure 2As shown, in step S102, the terahertz time-domain spectrum is processed by the terahertz time-domain spectral processing model to output the intensity reflection spectrum. In practice, the processing of terahertz time-domain spectra is an existing process. The data analyzed in this embodiment is the intensity reflection spectrum obtained by terahertz pulse scanning. The processing and principle of converting terahertz time-domain spectra into intensity reflection spectra are existing technologies and are not limited to this embodiment. Therefore, they are not specifically described in this embodiment.

[0019] Step S2 involves extracting features from the waves in the intensity reflection spectrum to obtain the waveform features of the intensity reflection spectrum. Step S2 includes the following sub-steps: Step S201: Extract feature points from the intensity reflectance spectrum; Step S201 includes the following sub-steps: Please see Figure 3 As shown, in step S2011, the coordinate points corresponding to the peaks and troughs in the intensity reflection spectrum are obtained and named as peak points and trough points, respectively. Step S2012: Number the peaks from left to right, using the symbol F. n It is represented as follows, where n is a non-zero natural number and n is the index of F; Step S2013, will be in F n The first valley point on the right is marked as G. n ; Please see Figure 4 As shown, in step S2014, F is connected by a straight line. n With G n At the same time, F is connected by a straight line. n With G n-1 Mark the resulting straight line as L. n Label the resulting straight lines as L from left to right. m At the same time, it will be with L m Curves within the same X-axis range are labeled LB. m ; Please see Figure 5 As shown, in step S2015, find LB. n Above and L n The coordinates point furthest apart are named the relay point, and L is... m The corresponding relay point is marked as Z. m Peaks, valleys, and relay points are collectively referred to as characteristic points; In specific implementation, the peak points and valley points are obtained as follows: Figure 3 As shown, F1 to F7 are obtained by numbering, and G1 to G7 are also obtained. Connecting them gives L. m like Figure 4 As shown, Figure 4The dashed line in the middle is L. m , with L m Curves that lie within the same range on the X-axis are LB. m The relay points are extracted as follows: Figure 5 As shown, Figure 5 The white coordinates in the diagram are the relay points, from which Z1 to Z... 13 .

[0020] Step S202: Extract features from the feature points to obtain the waveform features of the intensity reflection spectrum; Step S202 includes the following sub-steps: Please see Figure 6 As shown, in step S2021, adjacent peak points are connected by a smooth curve to obtain a continuous curve, which is named peak feature. Step S2022: Connect adjacent valley points with a smooth curve to obtain a continuous curve, which is named the valley feature. Step S2023: Connect adjacent relay points with a smooth curve to obtain a continuous curve, which is named relay feature; Step S2024: Peak features, valley features, and relay features are collectively referred to as waveform features; In practice, since the extraction and analysis processes for peak features, valley features, and relay features are all the same, this embodiment only uses peak features as an example to illustrate the extraction of waveform features and subsequent analysis processes. The peak features obtained by connecting them are as follows: Figure 6 As shown, valley-shaped features and relay features are extracted in the same way.

[0021] Step S3: Equipped with a test sample of an integrated circuit, the waveform characteristics of the test sample are acquired to obtain normal characteristics; Step S3 includes the following sub-steps: Step S301: Select a batch of integrated circuits known to be free of defects as test samples; Step S302: Extract waveform features from the test sample to obtain normal features; In practice, the test samples are provided by the manufacturer. All test samples use defect-free integrated circuits. The waveform features of the test samples are then extracted to obtain normal features. For example, if there are 1,000 test samples, 1,000 normal features are finally extracted, including 1,000 peak features, 1,000 valley features, and 1,000 relay features.

[0022] Step S4 involves performing deep learning on normal features to analyze and obtain the judgment criteria for normal features; Step S4 includes the following sub-steps: Step S401: Perform deep learning on the normal features to obtain reference features for the normal features; Step S401 includes the following sub-steps: Please see Figure 7 As shown, in step S4011, all peak features in the normal features are placed in the same intensity reflection spectrum, while valley features and relay features in the intensity reflection spectrum are removed to obtain the peak learning map. Step S4012: Place all valley-shaped features in the normal features into the same intensity reflection spectrum, and remove peak-shaped features and relay features in the intensity reflection spectrum to obtain the valley-shaped learning map. Step S4013: Place all relay features in the normal features into the same intensity reflection spectrum, and remove valley-shaped features and peak-shaped features in the intensity reflection spectrum to obtain the relay learning map. Step S4014: The peak-shaped learning map, valley-shaped learning map, and relay learning map are collectively referred to as the feature learning map, which is the reference feature. In practice, due to the large amount of data, it is inconvenient to list everything in detail in this embodiment. Therefore, this embodiment only uses four peak features as examples to illustrate the construction of the peak learning graph. Meanwhile, the construction and analysis process of the valley learning graph and the relay learning graph is the same as that of the peak learning graph. Therefore, this embodiment will not provide a detailed explanation of the construction and analysis process of the valley learning graph and the relay learning graph. All peak features in the normal features are placed in the same intensity reflectance spectrum, while valley features and relay features in the intensity reflectance spectrum are removed to obtain the peak learning graph as shown below. Figure 7 As shown, because the manufacturing process of integrated circuits is very precise and the test samples are defect-free, the similarity of each peak feature is extremely high, with only slight deviations. This type of deviation is normal. If the deviation exceeds this type, it indicates that there are defects inside the integrated circuit.

[0023] Step S402: Analyze the judgment criteria for normal features based on reference features; Step S402 includes the following sub-steps: Step S4021: When analyzing any reference feature, name it as the target analysis feature, and name the waveform feature in the target analysis feature as the target analysis waveform. Step S4022: Number the left endpoints of the target analysis waveform in top-to-bottom order, using the symbol T. i This indicates that the right endpoints of the target analysis waveform are numbered in descending order, using the symbol R. i This indicates that i and j are both non-zero natural numbers and i is the index of T and R; Please see Figure 8 As shown, in step S4023, T is smoothed using a curve. i and T i+1 Connect the components and simultaneously smooth the R curve.i and R i+1 Connect the curves to obtain the left closed curve and the right closed curve. Name the closed space enclosed by the target analysis waveform, the left closed curve, and the right closed curve as the judgment reference data. Step S4024: Obtain the outline of the judgment reference data and name it waveform trend data. Name the waveform trend data obtained from the analysis of the peak learning graph, valley learning graph and relay learning graph as peak trend data, valley trend data and relay trend data respectively. Peak trend data, valley trend data and relay trend data are the judgment criteria. In practical implementation, taking the peak-shaped learning graph as the target analysis feature as an example... Figure 7 There are a total of 4 target analysis waveforms, numbered T1 to T4, and R1 to R4, which are then connected to obtain the judgment reference data. Figure 8 As shown, Figure 8 The gray area in the image represents the reference data for judgment. Figure 8 The reference data for judgment in the middle is obtained from the analysis of the peak shape learning plot, therefore Figure 8 The data actually shows a peak-shaped trend.

[0024] Step S5 involves performing non-destructive testing on defects in the integrated circuit based on the judgment criteria. Step S5 includes the following sub-steps: Step S501: The integrated circuit that needs to be non-destructively tested is named the circuit to be tested. The peak shape feature, valley shape feature and relay feature of the circuit to be tested are extracted and named peak shape detection feature, valley shape detection feature and relay detection feature, respectively. Step S502: Determine whether the peak detection feature is within the closed area enclosed by the peak trend data, and determine whether the valley detection feature is within the closed area enclosed by the valley trend data. At the same time, determine whether the relay detection feature is within the closed area enclosed by the relay trend data. If all are yes, the output circuit will output a normal signal; otherwise, the output circuit will output an abnormal signal. Step S503: If the output circuit has an abnormal signal, the circuit to be tested is marked as a defective circuit. In practice, the peak detection features are placed in the peak learning graph. If all the peak detection features are within the gray peak trend data, it means that the peak detection features conform to the normal peak characteristics of integrated circuits. The same applies to the judgment of valley detection features and relay detection features. If all of them conform, it means that the circuit under test has no defects. If one of them does not conform, it means that the circuit under test has defects.

[0025] Example 2: This application provides an electronic device, which may include a processor, a communication interface, a memory, and a communication bus. The processor, communication interface, and memory communicate with each other via the communication bus. The memory stores computer-readable instructions, and the processor can call these instructions. When the processor executes a computer-readable instruction, it performs steps such as those in the non-destructive testing method for multilayer defects in integrated circuits based on terahertz time-domain spectroscopy to achieve the following functions: testing the terahertz time-domain spectrum of the integrated circuit and converting it into an intensity reflection spectrum; extracting features from the waves in the intensity reflection spectrum to obtain waveform features; equipping a test sample of the integrated circuit and acquiring the waveform features of the test sample to obtain normal features; performing deep learning on the normal features to analyze and obtain judgment criteria for normal features; and performing non-destructive testing on defects in the integrated circuit based on the judgment criteria.

[0026] Furthermore, when the logical instructions in the aforementioned memory can be implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or a portion of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0027] Example 3: This application also provides a computer program product, which includes a computer program stored on a computer-readable storage medium. The computer program includes program instructions. When the program instructions are executed by a computer, the computer can execute the non-destructive testing method for multilayer structure defects of integrated circuits based on terahertz time-domain spectroscopy provided by the above methods. The method includes: testing the terahertz time-domain spectrum of the integrated circuit and converting the terahertz time-domain spectrum into an intensity reflection spectrum; extracting features from the waves in the intensity reflection spectrum to obtain waveform features of the intensity reflection spectrum; equipping a test sample of the integrated circuit and collecting the waveform features of the test sample to obtain normal features; performing deep learning on the normal features to analyze and obtain the judgment criteria for normal features; and performing non-destructive testing on defects of the integrated circuit based on the judgment criteria.

[0028] Example 4: This application also provides a computer-readable storage medium storing a computer program. When the computer program is executed by a processor, it performs the steps described above in the non-destructive testing method for multilayer structure defects in integrated circuits based on terahertz time-domain spectroscopy, to achieve the following functions: testing the terahertz time-domain spectrum of the integrated circuit and converting the terahertz time-domain spectrum into an intensity reflection spectrum; extracting features from the waves in the intensity reflection spectrum to obtain waveform features of the intensity reflection spectrum; equipping a test sample of the integrated circuit and collecting the waveform features of the test sample to obtain normal features; performing deep learning on the normal features to analyze and obtain the judgment criteria for normal features; and performing non-destructive testing on defects in the integrated circuit based on the judgment criteria.

[0029] Based on the above description of the embodiments, the embodiments of the present invention can be provided as methods, systems, or computer program products. Based on this understanding, the above technical solutions, in essence or in terms of their contribution to the prior art, can be embodied in the form of a software product. This computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, magnetic disk, optical disk, etc., and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute the methods described in the various embodiments or certain parts of the embodiments.

[0030] In the embodiments provided in this application, it should be understood that the disclosed system or method can be implemented in other ways. The embodiments described above are merely illustrative. For example, the division of modules or units is only a logical functional division, and there may be other division methods in actual implementation. Furthermore, multiple modules or units may be combined or integrated into another system, or some features may be ignored or not executed. Additionally, the coupling or direct coupling or communication connection shown or discussed may be through some communication interfaces. The indirect coupling or communication connection between systems, modules, and units may be electrical, mechanical, or other forms.

[0031] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application.

Claims

1. A non-destructive testing method for defects in multilayer structures of integrated circuits based on terahertz time-domain spectroscopy, characterized in that, Includes the following steps: Test the terahertz time-domain spectrum of the integrated circuit and convert the terahertz time-domain spectrum into an intensity reflection spectrum; Feature extraction is performed on the waves in the intensity reflection spectrum to obtain the waveform features of the intensity reflection spectrum; The test sample is equipped with an integrated circuit, and the waveform characteristics of the test sample are collected to obtain normal characteristics; Deep learning is used to analyze normal features and obtain the criteria for judging normal features; Non-destructive testing of integrated circuit defects is performed based on judgment criteria.

2. The non-destructive testing method for defects in multilayer structures of integrated circuits based on terahertz time-domain spectroscopy according to claim 1, characterized in that, Testing the terahertz time-domain spectrum of an integrated circuit and converting the terahertz time-domain spectrum into an intensity reflection spectrum includes the following sub-steps: The terahertz time-domain spectrum of the integrated circuit was tested and acquired using broadband terahertz pulses. The terahertz time-domain spectrum is processed using a terahertz time-domain spectral processing model to output the intensity reflection spectrum.

3. The non-destructive testing method for defects in multilayer structures of integrated circuits based on terahertz time-domain spectroscopy according to claim 2, characterized in that, Extracting features from the intensity reflection spectrum to obtain its waveform features includes the following sub-steps: Extract feature points from the intensity reflectance spectrum; Feature extraction is performed on the feature points to obtain the waveform features of the intensity reflection spectrum.

4. The non-destructive testing method for defects in multilayer structures of integrated circuits based on terahertz time-domain spectroscopy according to claim 3, characterized in that, Extracting feature points from intensity reflectance spectra includes the following sub-steps: Obtain the coordinates of the peaks and troughs in the intensity reflectance spectrum, and name them the peak points and trough points, respectively. The peaks are numbered from left to right, using the symbol F. n It is represented as follows, where n is a non-zero natural number and n is the index of F; Will be in F n The first valley point on the right is marked as G. n ; Connect F with a straight line n With G n At the same time, F is connected by a straight line. n With G n-1 Mark the resulting straight line as L. n Label the resulting straight lines as L from left to right. m At the same time, it will be with L m Curves within the same X-axis range are labeled LB. m ; Find LB n Above and L n The coordinates point furthest apart are named the relay point, and L is... m The corresponding relay point is marked as Z. m The peaks, valleys, and relay points are collectively referred to as feature points.

5. The non-destructive testing method for defects in multilayer structures of integrated circuits based on terahertz time-domain spectroscopy according to claim 4, characterized in that, Feature extraction of feature points to obtain the waveform features of the intensity reflection spectrum includes the following sub-steps: By connecting adjacent peaks with a smooth curve, a continuous curve is obtained, which is named the peak shape feature. By connecting adjacent valley points with a smooth curve, a continuous curve is obtained, which is named the valley feature. By connecting adjacent relay points with a smooth curve, a continuous curve is obtained, which is named the relay feature. The peak-shaped features, valley-shaped features, and relay features are collectively referred to as waveform features.

6. The non-destructive testing method for defects in multilayer structures of integrated circuits based on terahertz time-domain spectroscopy according to claim 5, characterized in that, The process of acquiring normal characteristics from waveform features of a test sample equipped with an integrated circuit includes the following sub-steps: Select a batch of integrated circuits known to be free of defects as test samples; The waveform features of the test samples are extracted to obtain normal features.

7. The non-destructive testing method for defects in multilayer structures of integrated circuits based on terahertz time-domain spectroscopy according to claim 6, characterized in that, Non-destructive testing of integrated circuit defects based on judgment criteria includes the following sub-steps: Deep learning is applied to normal features to obtain reference features for normal features; Criteria for judging normal features based on reference feature analysis.

8. The non-destructive testing method for defects in multilayer structures of integrated circuits based on terahertz time-domain spectroscopy according to claim 7, characterized in that, The process of performing deep learning on normal features to obtain reference features for normal features includes the following sub-steps: All peak features in the normal features are placed in the same intensity reflection spectrum, while valley features and relay features in the intensity reflection spectrum are removed to obtain the peak learning map. All valley-shaped features in the normal features are placed in the same intensity reflection spectrum, while peak-shaped features and relay features in the intensity reflection spectrum are removed to obtain the valley-shaped learning map. All relay features in the normal features are placed in the same intensity reflection spectrum, while valley-shaped and peak-shaped features in the intensity reflection spectrum are removed to obtain the relay learning map. The peak-shaped learning map, valley-shaped learning map, and relay learning map are collectively referred to as the feature learning map, which is the reference feature.

9. The non-destructive testing method for defects in multilayer structures of integrated circuits based on terahertz time-domain spectroscopy according to claim 8, characterized in that, The criteria for judging normal features based on reference feature analysis include the following sub-steps: When analyzing any reference feature, name it the target analysis feature, and name the waveform feature in the target analysis feature the target analysis waveform. The left endpoints of the target analysis waveform are numbered in top-to-bottom order, using the symbol T. i This indicates that the right endpoints of the target analysis waveform are numbered in descending order, using the symbol R. i This indicates that i and j are both non-zero natural numbers and i is the index of T and R; T by smoothing the curve i and T i+1 Connect the components and simultaneously smooth the R curve. i and R i+1 Connect the curves to obtain the left closed curve and the right closed curve. Name the closed space enclosed by the target analysis waveform, the left closed curve, and the right closed curve as the judgment reference data. The outline of the judgment reference data is obtained and named waveform trend data. The waveform trend data obtained by analyzing the peak learning graph, valley learning graph and relay learning graph are named peak trend data, valley trend data and relay trend data respectively. The peak trend data, valley trend data and relay trend data are the judgment criteria.

10. The non-destructive testing method for defects in multilayer structures of integrated circuits based on terahertz time-domain spectroscopy according to claim 9, characterized in that, Non-destructive testing of integrated circuit defects based on judgment criteria includes the following sub-steps: The integrated circuit that needs to be non-destructively tested is named the circuit to be tested. The peak shape feature, valley shape feature and relay feature of the circuit to be tested are extracted and named peak shape detection feature, valley shape detection feature and relay detection feature, respectively. Determine whether the peak detection feature is within the closed area enclosed by the peak trend data, and determine whether the valley detection feature is within the closed area enclosed by the valley trend data. At the same time, determine whether the relay detection feature is within the closed area enclosed by the relay trend data. If all are yes, the output circuit outputs a normal signal; otherwise, the output circuit outputs an abnormal signal. If the output circuit sends an abnormal signal, the circuit under test will be marked as a defective circuit.

Images