FFC cable time domain reflection impedance de-embedding measurement method, device, equipment and medium

By employing a time-domain reflection impedance de-embedding measurement method for FFC cables that eliminates the need for physical load termination, and utilizing total reflection characteristic points and bandwidth adaptive filtering, the problems of unstable contact resistance and algorithm divergence are solved, achieving high-precision impedance measurement and ensuring the accuracy and reliability of the measurement results.

CN121933809APending Publication Date: 2026-04-28FOSHAN SHUNDE HEHUI ELECTRONICE CO LTD
View PDF 0 Cites 0 Cited by

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
FOSHAN SHUNDE HEHUI ELECTRONICE CO LTD
Filing Date
2026-01-13
Publication Date
2026-04-28

AI Technical Summary

Technical Problem

Existing technologies for measuring FFC cables suffer from problems such as unstable contact resistance leading to misjudgment of good products, and difficulty in balancing fixture noise and cable impedance characteristics under open-circuit testing due to algorithm divergence and filtering issues.

Method used

A time-domain reflection impedance de-embedding measurement method for FFC cables without physical load termination is adopted. By acquiring the reflected voltage signal in the open-circuit state at the end, the total reflection characteristic point is determined, an extended signal segment converging towards the preset matching impedance is generated, and bandwidth adaptive filtering is performed to construct a virtual matching load, thereby achieving high-precision impedance measurement.

Benefits of technology

It effectively solves the problems of contact resistance interference and algorithm divergence, realizes high-precision impedance measurement, avoids misjudging good products, and fully preserves the true impedance characteristics of the cable, thus improving the reliability and accuracy of the measurement results.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN121933809A_ABST
    Figure CN121933809A_ABST
Patent Text Reader

Abstract

The invention relates to an FFC cable time domain reflection impedance de-embedding measurement method and device, equipment and a medium. The method comprises the steps of obtaining a reflection voltage signal of a target cable in a tail end open circuit state, and obtaining a full-path time domain reflection waveform sequence according to the reflection voltage signal; determining a total reflection feature point based on tail end waveform data of the full-path time domain reflection waveform sequence, taking the total reflection feature point as a signal segment starting point, generating an extension signal segment converged to preset matching impedance, and splicing the extension signal segment with the full-path time domain reflection waveform sequence to obtain an extension reflection waveform sequence; according to the method, the problems of divergence and unstable physical contact of a traditional de-embedding algorithm under an open circuit test can be solved by constructing a virtual matching signal segment and segmented variable bandwidth filtering; the invention relates to high-precision measurement of characteristic impedance of an FFC cable without physical load termination.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] This application relates to the technical field of pulse reflection method for detecting cables, and in particular to a method, apparatus, equipment and medium for measuring the time-domain reflection impedance de-embedding of FFC cables. Background Technology

[0002] With the development of transmission technology, FFC cables serve as key interconnection components in laptops, industrial robots, and smart grids, primarily functioning as electrical connections and signal conduction. In high-frequency transmission scenarios, even minor changes in their physical dimensions can cause fluctuations in characteristic impedance, thereby affecting signal quality. Therefore, it is essential to ensure that their impedance distribution along the length is uniform and meets preset standards.

[0003] Existing technologies generally employ physical load termination for de-embedding measurements; however, this method faces severe technical bottlenecks: First, in micro-pitch testing, the contact resistance between the probe and the cable exhibits random fluctuations of 0.1 to 5 ohms, which, when directly superimposed on the measured value, can lead to a misjudgment of good products as having excessive impedance; Second, if an open-circuit test is used to avoid the influence of contact resistance, the reflection coefficient approaches 1, causing the denominator of the recursive formula in existing de-embedding algorithms to approach zero, resulting in divergence or severe non-physical oscillations in the impedance calculation value, thus causing the software algorithm to fail; Third, data processing struggles to balance filtering out parasitic noise from the fixture with preserving the true impedance characteristics of the cable. Strong filtering can smooth out the impedance details of the cable itself, while retaining high bandwidth can introduce overshoot interference.

[0004] Therefore, there is an urgent need for a new measurement method that can effectively solve the problems of contact resistance interference and algorithm divergence mentioned above. Summary of the Invention

[0005] Therefore, it is necessary to provide a method, apparatus, equipment, and medium for measuring the time-domain reflection impedance de-embedding of FFC cables that can measure the characteristic impedance of FFC cables with high precision without physical load termination, in order to at least solve the technical problems of divergence of traditional de-embedding algorithms and instability of physical contact under open-circuit testing in related technologies.

[0006] On the one hand, a method for de-embedding the time-domain reflection impedance of FFC cables is provided, the method comprising:

[0007] Acquire the reflected voltage signal of the target cable in the open-circuit state at the end, and obtain the full-path time-domain reflected waveform sequence based on the reflected voltage signal;

[0008] Based on the end waveform data of the full-path time-domain reflection waveform sequence, the total reflection feature point is determined. The total reflection feature point is used as the starting point of the signal segment to generate an extended signal segment that converges to the preset matching impedance. The extended signal segment is then spliced ​​with the full-path time-domain reflection waveform sequence to obtain the extended reflection waveform sequence.

[0009] The interface reflection segment boundary delay threshold is determined based on the structural parameters of the test interface connected to the target cable. Based on the interface reflection segment boundary delay threshold, bandwidth adaptive filtering is performed on multiple time segments of the extended reflection waveform sequence to obtain the filtered waveform sequence.

[0010] The reflection coefficient is determined for each time-domain position of the filtered waveform sequence. Based on the reflection coefficient, a characteristic impedance distribution along the length of the target cable is generated, and the actual characteristic impedance distribution corresponding to the effective physical length of the target cable is extracted from the characteristic impedance distribution.

[0011] In one embodiment, determining the total reflection feature points based on the end waveform data of the full-path time-domain reflection waveform sequence includes:

[0012] Based on a preset time interval, the curvature of multiple waveform subsequences in the full-path time-domain reflection waveform sequence is determined, and a curvature sequence is generated based on the curvature of the multiple waveform subsequences.

[0013] The curvature of multiple waveform subsequences in the curvature sequence is sequentially differentially processed to obtain multiple curvature difference values, and the starting time position of the waveform subsequence corresponding to the maximum curvature difference value is determined so as to determine the starting time position as the starting point of the edge field capacitance effect.

[0014] Based on the preset backoff offset and the starting point of the edge field capacitance effect, the total reflection feature point is determined in the full-path time-domain reflection waveform sequence.

[0015] In one embodiment, generating an extended signal segment that converges to a preset matched impedance, using the total internal reflection feature point as the starting point of the signal segment, includes:

[0016] Extract the instantaneous slope of the total reflection feature point from the full-path time-domain reflection waveform sequence;

[0017] Construct an initial spline interpolation function, set the time position at the total reflection feature point as the function starting point, and set the function starting boundary constraints. The starting boundary constraints include at least: the voltage amplitude at the function starting point is equal to the voltage amplitude at the total reflection feature point, and the instantaneous slope at the function starting point is equal to the instantaneous slope at the total reflection feature point.

[0018] A preset convergence constraint parameter is applied to the termination segment of the initial spline interpolation function so that the voltage value at the termination point of the function tends to the steady-state voltage value corresponding to the preset matching impedance, thereby generating a transition curve.

[0019] At least one steady-state signal segment with a constant voltage amplitude is extracted from the full-path time-domain reflection waveform sequence, and the steady-state signal segment is spliced ​​with the transition curve to obtain the extended signal segment.

[0020] In one embodiment, extracting the instantaneous slope of the full-path time-domain reflection waveform sequence at the total reflection feature point includes:

[0021] Using the total reflection feature point as the sampling endpoint, backtrack along the time axis from the starting direction of the full-path time-domain reflection waveform sequence, and select at least one set of continuous sampling points that meet the preset time length;

[0022] Based on the voltage amplitude and time coordinates of the continuous sampling points, a linear regression operation is performed on the continuous sampling points to obtain a regression line, and the slope of the regression line is determined as the instantaneous slope at the total reflection feature point.

[0023] In one embodiment, the full-path time-domain reflection waveform sequence includes at least a first reflection waveform sequence generated by the test interface structure and a second reflection waveform sequence generated by the transmission path of the target cable. Determining the interface reflection boundary delay threshold based on the structural parameters of the test interface connected to the target cable includes:

[0024] Obtain the structural parameters of the test interface, wherein the structural parameters include at least one or more of the following: physical transmission path length, electromagnetic wave propagation speed of the medium;

[0025] The theoretical transmission delay is obtained based on the ratio of the physical transmission path length to the propagation speed of the electromagnetic wave in the medium. The theoretical transmission delay is then determined as the interface reflection distinction boundary delay threshold to determine the termination position of the interface reflection response in the time domain. This distinguishes the time interval corresponding to the first reflection waveform sequence from the time interval corresponding to the second reflection waveform sequence on the time axis.

[0026] In one embodiment, performing bandwidth adaptive filtering on multiple time segments of the extended reflection waveform sequence to obtain a filtered waveform sequence includes:

[0027] Based on a preset time slice, the extended reflection waveform sequence is divided into multiple sequence segments and the start time of each sequence segment is determined.

[0028] If the start time of the segment is before the interface reflection distinction boundary delay threshold, the sequence segment is determined to be the first sequence segment. The first sequence segment is filtered based on the low-pass filter parameter of the interface segment filter cutoff frequency to generate the first filtered sequence segment.

[0029] If the start time of the segment is after the interface reflection distinction boundary delay threshold, the sequence segment is determined to be the second sequence segment. The second sequence segment is then filtered based on the low-pass filter parameters of the cable segment filter cutoff frequency to generate a second filtered sequence segment.

[0030] The first filtered sequence segment and the second filtered sequence segment are spliced ​​and smoothed to obtain the filtered waveform sequence.

[0031] In one embodiment, determining the reflection coefficients time-domain position by time-domain position of the filtered waveform sequence, and generating a characteristic impedance distribution along the length of the target cable based on multiple reflection coefficients, includes:

[0032] The filtered waveform sequence is input into a discrete layer stripping recursive model, which calculates the local reflection coefficients distributed on the current layer of the filtered waveform sequence layer by layer.

[0033] The characteristic impedance value is set as the system reference impedance value as the starting point of the recursion. Based on the local reflection coefficient of the current layer and the characteristic impedance value of the previous layer, the characteristic impedance value of the current layer is recursively calculated to generate the characteristic impedance distribution by recursively calculating layer by layer.

[0034] During the recursive calculation process, the characteristic impedance value calculated by the current layer is monitored in real time.

[0035] If the characteristic impedance value calculated by the current layer exceeds the preset value range, it is determined that there is a risk of divergence in the algorithm of the discrete layer stripping recursive model. The characteristic impedance value of the current layer is replaced with a preset limit clamping value, and the recursive operation of subsequent layers is terminated.

[0036] On the other hand, a time-domain reflection impedance de-embedding measurement device for FFC cables is provided, the device comprising:

[0037] The signal acquisition module is used to acquire the reflected voltage signal of the target cable in the open-circuit state at the end, and to obtain the full-path time-domain reflected waveform sequence based on the reflected voltage signal;

[0038] The extension module is used to determine the total reflection feature point based on the end waveform data of the full-path time-domain reflection waveform sequence, use the total reflection feature point as the starting point of the signal segment, generate an extended signal segment that converges to a preset matching impedance, and splice the extended signal segment with the full-path time-domain reflection waveform sequence to obtain an extended reflection waveform sequence.

[0039] The filtering module is used to determine the interface reflection zone boundary delay threshold according to the structural parameters of the test interface connected to the target cable, and to perform bandwidth adaptive filtering on multiple time segments of the extended reflection waveform sequence according to the interface reflection zone boundary delay threshold to obtain the filtered waveform sequence.

[0040] The impedance determination module is used to determine the reflection coefficient for each time-domain position of the filtered waveform sequence, generate a characteristic impedance distribution along the length of the target cable based on the reflection coefficient, and extract the actual characteristic impedance distribution corresponding to the effective physical length of the target cable from the characteristic impedance distribution.

[0041] In another aspect, a computer device is provided, the device including: a memory, a processor, and a computer program stored in the memory and executable on the processor;

[0042] Memory, used to store computer programs;

[0043] A processor, used to perform the following steps when executing the computer program:

[0044] Acquire the reflected voltage signal of the target cable in the open-circuit state at the end, and obtain the full-path time-domain reflected waveform sequence based on the reflected voltage signal;

[0045] Based on the end waveform data of the full-path time-domain reflection waveform sequence, the total reflection feature point is determined. The total reflection feature point is used as the starting point of the signal segment to generate an extended signal segment that converges to the preset matching impedance. The extended signal segment is then spliced ​​with the full-path time-domain reflection waveform sequence to obtain the extended reflection waveform sequence.

[0046] The interface reflection segment boundary delay threshold is determined based on the structural parameters of the test interface connected to the target cable. Based on the interface reflection segment boundary delay threshold, bandwidth adaptive filtering is performed on multiple time segments of the extended reflection waveform sequence to obtain the filtered waveform sequence.

[0047] The reflection coefficient is determined for each time-domain position of the filtered waveform sequence. Based on the reflection coefficient, a characteristic impedance distribution along the length of the target cable is generated, and the actual characteristic impedance distribution corresponding to the effective physical length of the target cable is extracted from the characteristic impedance distribution.

[0048] In another aspect, a computer-readable storage medium is provided on which a computer program is stored, which, when executed by a processor, performs the following steps:

[0049] Acquire the reflected voltage signal of the target cable in the open-circuit state at the end, and obtain the full-path time-domain reflected waveform sequence based on the reflected voltage signal;

[0050] Based on the end waveform data of the full-path time-domain reflection waveform sequence, the total reflection feature point is determined. The total reflection feature point is used as the starting point of the signal segment to generate an extended signal segment that converges to the preset matching impedance. The extended signal segment is then spliced ​​with the full-path time-domain reflection waveform sequence to obtain the extended reflection waveform sequence.

[0051] The interface reflection segment boundary delay threshold is determined based on the structural parameters of the test interface connected to the target cable. Based on the interface reflection segment boundary delay threshold, bandwidth adaptive filtering is performed on multiple time segments of the extended reflection waveform sequence to obtain the filtered waveform sequence.

[0052] The reflection coefficient is determined for each time-domain position of the filtered waveform sequence. Based on the reflection coefficient, a characteristic impedance distribution along the length of the target cable is generated, and the actual characteristic impedance distribution corresponding to the effective physical length of the target cable is extracted from the characteristic impedance distribution.

[0053] The aforementioned method, apparatus, computer equipment, and storage medium for measuring the time-domain reflection impedance of FFC cables determine the total reflection characteristic points through waveform data at the end of the full-path time-domain reflection waveform sequence. It then constructs an extended signal segment converging towards a preset matching impedance and splices it with the original waveform to create a virtual matching load. This not only mathematically eliminates the problem of the algorithm's denominator approaching zero caused by the reflection coefficient approaching 1 due to an open circuit at the end, preventing numerical divergence and non-physical oscillations in the layer stripping algorithm, but also enables high-precision open-circuit impedance measurement without the need for a physical termination load resistor. This avoids the problems caused by unstable contact resistance in existing physical termination tests. The problem of misjudging good products is fundamentally solved, addressing the issue of false defects caused by contact uncertainty in micro-pitch cable testing. Simultaneously, by determining the interface reflection boundary delay threshold based on the structural parameters of the test interface, and performing segmented bandwidth adaptive filtering on the extended reflection waveform sequence, strong suppression of high-frequency parasitic ringing at the test interface and preservation of details of minute impedance fluctuations in the cable itself are achieved. This not only effectively filters out overshoot interference introduced by the fixture but also completely preserves the cable's true impedance characteristics. This overcomes the technical shortcomings of existing technologies that struggle to balance noise removal and impedance detail preservation under single-bandwidth filtering, thus improving the reliability and accuracy of impedance measurement results. Attached Figure Description

[0054] Figure 1This is a diagram illustrating the application environment of a cable measurement method in one embodiment;

[0055] Figure 2 This is a flowchart illustrating a cable measurement method in one embodiment;

[0056] Figure 3 This is a structural block diagram of a cable measuring device in one embodiment;

[0057] Figure 4 This is a diagram of the internal structure of a computer device. Detailed Implementation

[0058] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0059] This application provides a method for de-embedding the time-domain reflection impedance of FFC cables, which can be applied to, for example... Figure 1 In the application environment shown, computer device 102 is connected to test interface device 104 via a coaxial cable. Test interface device 104 is physically connected to one end of target cable 106, and the end of target cable 106 remains open-circuited, requiring no physical matching load termination. During actual measurement, computer device 102 controls an internal or external time-domain reflection signal generation module to send a step pulse signal to target cable 106 and collects the voltage signal reflected back via test interface device 104, generating a full-path time-domain reflection waveform sequence. Computer device 102, as the computing entity, executes the de-embedding measurement logic of this application: it constructs a virtual extended signal segment based on the open-circuit data at the end to prevent algorithm divergence; then, it performs bandwidth adaptive filtering according to the structural parameters of test interface device 104 to separate fixture noise from cable details; it calculates the true characteristic impedance distribution of target cable 106 along its length direction using a discrete layer stripping recursive model and renders the results on the display interface for user analysis. The computer device 102 can be a combination of a standalone personal computer and a sampling oscilloscope, or it can be a high-performance time-domain reflectometry instrument itself with an integrated computing processing unit; the test interface device 104 can be an SMA to FFC fixture, probe station or dedicated test board customized for FFC cable spacing.

[0060] In one embodiment, such as Figure 2 As shown, a method for de-embedding the time-domain reflection impedance of FFC cables is provided, which is then applied to... Figure 1 Taking computer device 102 as an example, the following steps are included:

[0061] Step 201: Obtain the reflected voltage signal of the target cable in the open-circuit state at the end, and obtain the full-path time-domain reflected waveform sequence based on the reflected voltage signal;

[0062] The full-path time-domain reflection waveform sequence refers to a sequence in which the end of the target cable is suspended, and the incident signal from the initial end of the target cable undergoes total reflection upon reaching the end. The reflected echo signal is sampled and quantized to generate a discrete voltage sequence containing the reflection section of the test interface and the reflection section of the target cable body, which is also known as the full-path time-domain reflection voltage sequence. The full-path time-domain reflection waveform sequence is not only a single set of voltage values, but also a historical record of voltage values ​​distributed along the time axis. In the time domain, the first part of the full-path time-domain reflection waveform sequence mainly represents the impedance change inside the test fixture; the middle part of the full-path time-domain reflection waveform sequence represents the characteristic impedance of the FFC cable body, which is the target information that this invention needs to extract.

[0063] Step 202: Determine the total reflection feature point based on the end waveform data of the full path time domain reflection waveform sequence, use the total reflection feature point as the starting point of the signal segment, generate an extended signal segment that converges to the preset matching impedance, and splice the extended signal segment with the full path time domain reflection waveform sequence to obtain the extended reflection waveform sequence.

[0064] Step 203: Determine the interface reflection boundary delay threshold based on the structural parameters of the test interface connected to the target cable, and perform bandwidth adaptive filtering on multiple time segments of the extended reflection waveform sequence based on the interface reflection boundary delay threshold to obtain the filtered waveform sequence.

[0065] Step 204: Determine the reflection coefficient for each time-domain position of the filtered waveform sequence, generate the characteristic impedance distribution along the length of the target cable based on multiple reflection coefficients, and extract the actual characteristic impedance distribution corresponding to the effective physical length of the target cable from the characteristic impedance distribution.

[0066] In the aforementioned FFC cable time-domain reflection impedance de-embedding measurement method, an extended signal segment converging towards a preset matching impedance is constructed based on the end data of the full-path time-domain reflection waveform sequence. This segment is then spliced ​​with the original waveform to construct a virtual load. This not only mathematically eliminates the problem of the denominator approaching zero in the layer stripping algorithm caused by the reflection coefficient approaching 1 due to an open circuit at the end, effectively preventing numerical divergence and non-physical oscillations during the calculation process, but also enables high-precision impedance measurement without the need for a physical termination load resistor. This completely avoids the problem of misjudging good products due to random fluctuations in contact resistance in existing physical termination tests. At the same time, by determining the interface reflection boundary delay threshold based on the structural parameters of the test interface, a segmented bandwidth adaptive filtering is performed on the waveform sequence. This achieves strong suppression of high-frequency parasitic ringing at the test interface and complete preservation of the details of minute impedance fluctuations in the cable body. This effectively overcomes the technical defects of existing technologies that are difficult to balance the filtering of fixture noise and the preservation of cable feature details under single bandwidth filtering, significantly improving the authenticity and reliability of the de-embedding measurement results.

[0067] This application provides a time-domain reflection impedance de-embedding measurement method for FFC cables, aiming to resolve the contradiction between the physical termination instability faced by FFC cables in micro-pitch testing and the divergence of traditional de-embedding algorithms under open-circuit conditions. By introducing a combination of virtual matching and time-varying filtering techniques, high-precision measurement of the characteristic impedance of FFC cables is achieved without the need for physical load termination. Time-domain reflection impedance refers to the characteristic impedance distribution spectrum of the FFC cable along its physical length, obtained using time-domain reflection technology. This is achieved by sending a step pulse signal to the FFC cable and collecting a full-path time-domain reflection waveform sequence containing test interface and cable response data, followed by impedance distribution data calculation. Here, "time domain" refers to the physical dimension of observing and analyzing the voltage signal changes of the target cable with time as the independent variable; de-embedding refers to the process of using mathematical algorithms to remove the parasitic effects of the test fixture and interface from the measurement results, thereby restoring the true impedance characteristics of the device under test, i.e., the target cable.

[0068] The aforementioned time-domain reflection impedance de-embedding measurement method for FFC cables utilizes the stability of open-circuit testing, avoiding random fluctuations in physical load contact resistance and the mathematical convergence of virtual terminals. By artificially constructing virtual matching signal segments at the algorithm level, the divergent open-circuit reflection coefficient is pulled back to the convergence interval, thus enabling the classic layer stripping algorithm to be applied to open-circuit test data. Simultaneously, through segmented variable bandwidth filtering, the contradiction between test interface parasitic parameter ringing and the preservation of high-frequency details of FFC cables is resolved. This method not only eliminates the high-frequency physical load of expensive consumable materials but also significantly improves the accuracy and robustness of automated production line testing.

[0069] In one embodiment, determining total reflection feature points based on the end waveform data of the full-path time-domain reflection waveform sequence includes:

[0070] Based on a preset time interval, the curvature of multiple waveform subsequences in the full-path time-domain reflection waveform sequence is determined, and a curvature sequence is generated based on the curvature of the multiple waveform subsequences.

[0071] The curvature of multiple waveform subsequences in the curvature sequence is differentially processed sequentially to obtain multiple curvature difference values. The starting time position of the waveform subsequence corresponding to the maximum curvature difference value is determined so as to determine the starting time position as the starting point of the edge field capacitance effect.

[0072] Based on the preset backoff offset and the starting point of the edge field capacitance effect, the total reflection feature point is determined in the full-path time-domain reflection waveform sequence.

[0073] The preset time interval is a pre-stored configuration parameter, usually set to a time span of 3 to 5 sampling points, such as 15ps to 25ps, in order to smooth out the high-frequency noise introduced during time-domain reflection sampling while capturing the waveform change trend of the full-path time-domain reflection waveform sequence; the waveform subsequence refers to a set of continuous voltage and time data points intercepted within the preset time interval, centered on the current calculation point.

[0074] Preferably, generating a curvature sequence based on the curvature of multiple waveform sub-sequences includes the following steps: the rising region at the end of the full-path time-domain reflection waveform sequence corresponds to each time-domain sampling point; the waveform sub-sequence corresponding to the time-domain sampling point is extracted; the curvature value of the point is solved according to the discrete curvature calculation logic; and the calculated curvature values ​​are arranged in chronological order to form a curvature sequence corresponding to the time axis of the original waveform sequence.

[0075] It is worth noting that the curvature of multiple waveform subsequences in the curvature sequence is sequentially differentially processed to obtain multiple curvature difference values. The starting time position of the waveform subsequence corresponding to the maximum curvature difference value is determined, and the starting time position is used to determine the starting point of the edge field capacitance effect. The curvature sequence generated above is subjected to a first-order forward differential operation to obtain a curvature difference value sequence reflecting the rate of curvature change. The peak point with the largest value is searched in the curvature difference value sequence. This peak point, which is the maximum curvature difference value, physically corresponds to the pole of the full-path time-domain reflection waveform sequence where the waveform changes from linear rise to nonlinear bending. The time axis coordinates corresponding to this peak point are locked and marked as the starting point of the edge field capacitance effect. Data after this point is considered to be data contaminated by parasitic capacitance and cannot be used for impedance calculation. The edge field capacitance effect refers to the nonlinear, gentle rounded transition of the electric field lines of the target cable at the end section of the physically cut target cable due to the abrupt change between the conductor and the dielectric layer of the target cable. The equivalent parasitic electroinduced open-circuit reflection voltage formed between the conductor and the environment before reaching the theoretical peak value is a result of the overflow of the electric field lines of the target cable.

[0076] Preferably, the preset backoff offset refers to the safe time margin for backtracking from the edge field starting point in the negative direction of the time axis to ensure that the selected total reflection feature point is completely located within the normal transmission section of the target cable. Preferably, the preset backoff offset can be calculated by obtaining the rise time of the step signal of the current domain reflection, multiplying the rise time by a preset scaling factor, such as 10% to 20%. Determining the total reflection feature point in the full-path time-domain reflection waveform sequence refers to obtaining the target time point by subtracting the backoff offset from the edge field capacitance effect starting point, and indexing the voltage amplitude and time index corresponding to the target time point in the full-path time-domain reflection waveform sequence. This point is the total reflection feature point, representing the most reliable data point at the end of the effective physical end area of ​​the target cable, and also serving as the splicing starting point for the subsequent generation of virtual extended signal segments.

[0077] Specifically, in this embodiment, to prevent high-amplitude reflection peaks caused by mid-cable breakage, severe indentation, or insulation damage from being misidentified as end total reflection feature points, a verification and fault prediction step is included before determining the total reflection feature point. The specific implementation of this step includes:

[0078] Obtain the nominal physical length L and allowable tolerance ratio Q of the target cable, and calculate the expected time-domain window distribution range of the total internal reflection signal at the end of the target cable, based on the known propagation speed v of electromagnetic waves in the medium. , where the window start boundary and termination boundary The calculation formulas are as follows:

[0079] ;

[0080] ;

[0081] After generating a curvature sequence based on the curvature of multiple waveform subsequences, the time-domain window is searched only at the effective end. Within the window, the system searches for and locates the maximum curvature difference in the curvature sequence, and locks the position corresponding to the maximum curvature difference within the window as the starting point of the candidate edge field capacitance effect. Through this spatial constraint, the system actively ignores interference peaks that may exist outside the window.

[0082] The starting boundary of the search time domain window is at the effective end. Within the previous time range, the curvature difference is scanned. If the curvature difference of any waveform subsequence exceeds the preset breakage alarm threshold within the time range, it is determined that the target cable has a physical breakage or severe impedance discontinuity defect at the corresponding position. In response to the determination of physical breakage, the system immediately triggers the fuse protection mechanism, stops the subsequent extension signal segment generation and impedance de-embedding calculation steps, and outputs a fault alarm signal of physical open circuit or severe damage.

[0083] Specifically, in this embodiment, when a cable breaks in the middle, the reflection coefficient at the break point is also close to 1, which is easily mistaken by the algorithm as the end of the cable. This leads to incorrect unembedding and acceptance of the broken section of the cable, resulting in serious missed detections. This embodiment defines an effective time domain window, forcing the algorithm to only look for the end at the location where the end appears, thus avoiding false locking of the middle false end. Furthermore, any abnormally high reflection before the normal window will trigger an immediate alarm, enabling the invention to extend from simple impedance measurement to physical defect diagnosis, significantly improving the robustness and safety of the algorithm when facing defective cables in industrial settings.

[0084] In one embodiment, using a total internal reflection feature point as the starting point of the signal segment, an extended signal segment converging towards a preset matched impedance is generated, including:

[0085] Extract the instantaneous slope of the time-domain reflection waveform sequence of the entire path at the total reflection feature point;

[0086] Construct an initial spline interpolation function, set the time position at the total reflection feature point as the function start point, and set the function start boundary constraints. The start boundary constraints include at least the following: the voltage amplitude at the function start point is equal to the voltage amplitude at the total reflection feature point, and the instantaneous slope at the function start point is equal to the instantaneous slope at the total reflection feature point.

[0087] A preset convergence constraint parameter is applied to the termination segment of the initial spline interpolation function so that the voltage value at the termination point of the function tends to the steady-state voltage value corresponding to the preset matching impedance, thereby generating a transition curve.

[0088] Extract at least one steady-state signal segment with a constant voltage amplitude from the full-path time-domain reflection waveform sequence, and splice the steady-state signal segment with the transition curve to obtain the extended signal segment.

[0089] The instantaneous slope refers to the instantaneous rate of change of the voltage at a specific moment in the discrete waveform sequence, which is the total reflection feature point. Preferably, the extraction process can be achieved by setting a backtracking time window, such as 10 picoseconds to 20 picoseconds, and selecting all discrete sampling points within the backtracking time window for least squares fitting.

[0090] Specifically, instantaneous slope It is obtained by selecting forward from the total reflection feature point as the endpoint. Continuous sampling points Construct a linear regression model: The slope is calculated using the least squares formula:

[0091] ;

[0092] in, This represents the index number of the sampling point, with a value ranging from 1 to... ; Representing the The time coordinate values ​​of each sampling point in the full-path time-domain reflection waveform sequence; Representing the The voltage amplitude of each sampling point in the full-path time-domain reflection waveform sequence; the slope obtained by this calculation will be used as the starting slope boundary condition for subsequent spline interpolation, thereby ensuring the continuity at the splice.

[0093] Specifically, in this embodiment, by extracting the instantaneous slope at the total internal reflection feature point and constructing a virtual transition curve that satisfies the continuity of the instantaneous slope using a spline interpolation function, the constraint that the amplitude and slope of the transition curve at the starting point are continuous with the data at the total internal reflection feature point can effectively solve the high-frequency pseudo-ripple phenomenon caused by direct signal splicing or hard truncation in the prior art. Specifically, the simple virtual extension in the prior art introduces a high-frequency step component at the splicing point, causing the calculated characteristic impedance spectrum to exhibit non-physical, severe pseudo-oscillations at the end, thus leading to test misjudgment. This application, by constraining the continuity of the amplitude and slope at the starting point, ensures a smooth transition of the extended waveform sequence, suppresses spectral leakage, and eliminates the pseudo-ripples at the end of the impedance spectrum, thereby significantly improving the accuracy and robustness of the impedance measurement at the end of the FFC cable without the need for physical load; at the same time, the above-mentioned smooth convergence boundary conditions also effectively prevent the recursive divergence of the discrete layer stripping algorithm.

[0094] Furthermore, using a spline interpolation function to generate a transition curve, the time length in the transition region is... At that time, the time within the transition zone is The formula for calculating the transition curve is:

[0095] , where the coefficient Determined by the following boundary conditions:

[0096] ;

[0097] ;

[0098] ;

[0099] ;

[0100] in, This represents the calculated virtual transition voltage value; This represents the cutoff voltage amplitude, i.e., the measured voltage value at the total reflection characteristic point of the full-path time-domain reflection waveform sequence; This represents the instantaneous slope calculated in the previous step. This represents the preset matching voltage value, which is the reference impedance. The corresponding ideal voltage level; This represents the duration of the virtual transition zone. In this embodiment, this value can be set to 1.5 times the rise time of the FFC cable, for example, 100ps. The coefficients are undetermined coefficients determined by the boundary continuity conditions, namely the continuity of the starting position, the continuity of the slope, and the numerical convergence of the ending point. The numerical solution ensures that the virtual waveform is smoothly embedded in the time domain without parasitic high-frequency components, and is used to determine the curve shape. By constraining the instantaneous slope continuity of the splicing point through this algorithm, the waveform does not have abrupt changes, and there are no high-frequency step components in the impedance spectrum, preventing non-physical spurious oscillations at the end of the impedance spectrum.

[0101] The preset convergence constraint parameters include the virtual buffer time length and the steady-state voltage value. The virtual buffer time length can be obtained by calculating the rise time of the full-path time-domain reflection waveform sequence and multiplying it by a preset coefficient, such as 1.5, to ensure the naturalness of the transition. The steady-state voltage value refers to the preset matching impedance, which is usually the ideal voltage level corresponding to 50 ohms or 100 ohms in time-domain reflection measurement. The steady-state signal segment refers to a data array whose value is constant at the steady-state voltage value.

[0102] In one embodiment, extracting the instantaneous slope of the full-path time-domain reflection waveform sequence at the total reflection feature point includes:

[0103] Using the total reflection feature point as the sampling endpoint, trace back along the time axis of the entire path of the time-domain reflection waveform sequence from the starting direction, and select at least one set of continuous sampling points that meet the preset time length.

[0104] Based on the voltage amplitude and time coordinates of continuous sampling points, a linear regression operation is performed on the continuous sampling points to obtain a regression line, and the slope of the regression line is determined as the instantaneous slope at the total reflection feature point.

[0105] Among them, continuous sampling points refer to a set of voltage and time data pairs that are continuously and sequentially arranged from the full-path time-domain reflection waveform sequence; preset time length refers to the time span of the sliding window used for slope estimation; preferably, the preset time length is selected based on the time-domain reflection sampling rate and signal rise time, covering a time window of 10 picoseconds to 20 picoseconds. This preset time length can contain enough sample points to filter out random noise, and is short enough to approximately represent instantaneous characteristics, avoiding the introduction of trend deviations caused by premature historical data.

[0106] It is worth noting that, based on the voltage amplitude and time coordinates of continuous sampling points, a linear regression operation is performed on the continuous sampling points to obtain a regression line, and the slope of the regression line is determined as the instantaneous slope at the total reflection feature point. The purpose is to eliminate the influence of quantization noise and high-frequency glitches through mathematical fitting. The linear regression operation refers to the least squares fitting, that is, finding a straight line that minimizes the sum of the squares of the vertical distances from all sampling points to the line.

[0107] Furthermore, a linear regression operation is performed on a set of continuous sampling points to calculate the slope of the regression line. The formula for linear regression is:

[0108] ;

[0109] in, This represents the actual physical trend of voltage change over time at the fitted instantaneous slope, i.e., at the total internal reflection feature point. The time sampling point selected for backtracking is in seconds or picoseconds. Represents the corresponding number Voltage amplitude at each sampling point; This represents the average value at the selected time points; This represents the average value of the selected voltage amplitude. This represents the number of backtracking sampling points, ranging from 5 to 9, corresponding to a time window of approximately 10 to 20 ps.

[0110] in, The calculation formula is: ;

[0111] in, The calculation formula is: ;

[0112] Furthermore, this embodiment utilizes the averaging effect of multi-point data to offset random quantization noise in single-point data. Even if a point deviates from the true trajectory due to noise, the fitted slope still stably points in the direction of signal rise, ensuring the correct starting direction of subsequent virtual stitching and enhancing the algorithm's noise robustness.

[0113] Specifically, this embodiment abandons the traditional method of calculating the slope using single-point difference analysis and instead adopts multi-point regression analysis. Specifically, the preset time length for backtracking is preferably 10 ps to 50 ps. Starting from the total reflection feature point, a set of continuous sampling points of the preset time length is selected backtracking towards the origin of the time axis, i.e., the signal stable region, and linear regression is performed on this set of points. Through fitting, the average effect of multi-point data is used to effectively smooth out the unavoidable random quantization noise in the single-point sampling data, ensuring that the extracted slope represents the true physical change trend of the signal, rather than instantaneous fluctuations caused by noise. This provides accurate starting data for the subsequent construction of a virtual matching signal segment. In contrast, existing technologies often only use simple processing logic to select... The slope is calculated by differentiating the cutoff point from the previous point. At the open-circuit high level, a single bit jump in the signal represents a large voltage change. If the cutoff point happens to be at the peak or trough of the noise, the instantaneous slope calculated based on the above two or three points will be extremely unstable and contrary to the real trend. This will cause the subsequently generated virtual extension segment to mistakenly extend the noise as a trend, thus destroying the de-embedding result. In this embodiment, the slope fitted by linear regression has a very high noise tolerance. Even if there are large quantization errors or glitches at individual sampling points, it will not significantly change the slope direction of the regression line, ensuring that the starting direction of the virtual splicing is correct and avoiding abrupt changes at the splicing point due to slope estimation errors. This further ensures the computational stability of the discrete layer stripping algorithm under open-circuit conditions.

[0114] In one embodiment, the full-path time-domain reflection waveform sequence includes at least a first reflection waveform sequence generated by the test interface structure and a second reflection waveform sequence generated by the transmission path of the target cable. Determining the interface reflection separation boundary delay threshold based on the structural parameters of the test interface connected to the target cable includes:

[0115] Obtain the structural parameters of the test interface. The structural parameters shall include at least one or more of the following: physical transmission path length and electromagnetic wave propagation speed of the medium.

[0116] The theoretical transmission delay is obtained based on the ratio of the physical transmission path length to the propagation speed of electromagnetic waves in the medium. This theoretical transmission delay is then used as the interface reflection separation threshold to distinguish the time interval corresponding to the first reflection waveform sequence from the time interval corresponding to the second reflection waveform sequence on the time axis.

[0117] Among them, the test interface refers to the physical adapter used to connect the coaxial cable and the target cable; the physical transmission path length refers to the physical length of the conductive path of the electrical signal inside the test interface device, from the coaxial connector to the contact point with the target cable; the medium electromagnetic wave propagation speed refers to the effective phase velocity of the electrical signal in the insulating medium of the test interface, which can be obtained by converting the effective dielectric constant of the medium.

[0118] Preferably, the purpose of determining the interface reflection separation boundary delay threshold is to calculate the precise time required for the point signal to travel back and forth once in the test fixture, thereby accurately separating the fixture influence area and the cable test area on the time axis; the theoretical transmission delay refers to the time required for the point signal to pass through the test interface device in one direction; the interface reflection separation boundary delay threshold refers to the time coordinate point in the time domain reflected echo signal corresponding to the physical interface between the test interface and the target cable.

[0119] Specifically, the interface reflection distinction boundary delay threshold The calculation formula is:

[0120] ;

[0121] in, This represents the theoretical transmission time from the measurement reference plane to the starting point of the FFC cable. Represents the physical transmission path length of the test interface; This represents the effective dielectric constant of the transmission medium of the test interface; Representing the speed of light in a vacuum, take .

[0122] Furthermore, the interface reflection distinction boundary delay threshold To achieve a smooth transition from the first bandwidth (strong filtering) to the second bandwidth (weak filtering) within the neighborhood, this embodiment constructs a time-varying weighting function. The final output purified waveform Based on the first bandwidth filtering result Second bandwidth filtering result The result is obtained by weighted summation, where the first bandwidth filtering result and the second bandwidth filtering result are derived from the filtering results of the same extended reflection waveform sequence on the same time axis; to avoid... Direct hard switching of bandwidth at any given moment causes a jump in spectral energy. This embodiment introduces a time-domain transition window, within which the signal smoothly transitions from being dominated by strong filtering to being dominated by weak filtering. Specifically, this is achieved through the following time-varying weighting function. The formula for calculating the weighted transfer of energy is as follows:

[0123] ;

[0124] Among them, the weight function The range of values ​​is ;

[0125] In one specific embodiment, a cosine transition weight is used:

[0126] ;

[0127] in, This represents the voltage sequence after filtering at the interface segment, such as a 2GHz filtered voltage sequence. This represents the voltage sequence after filtering through the cable segment at a cutoff frequency such as 15GHz. This represents the weighting of high-frequency components. When the system exhibits strong low-pass behavior, it will also exhibit strong low-pass behavior. At that time, the system exhibits weak low-pass behavior; These represent the start and end times of the transition window, respectively; for example, if Window width set to ,but By modulating the cosine weights as described above, the switching point is ensured. Not only is the waveform amplitude continuous, but the spectral energy distribution of the waveform also transitions smoothly, completely eliminating the influence of impedance pseudo-data caused by switching.

[0128] In one embodiment, bandwidth adaptive filtering is performed on multiple time segments of the extended reflection waveform sequence to obtain a filtered waveform sequence, including:

[0129] Based on a preset time slice, the extended reflection waveform sequence is divided into multiple sequence segments and the start time of each segment is determined.

[0130] If the fragment start time is before the interface reflection distinction boundary delay threshold, the sequence fragment is determined to be the first sequence fragment. The first sequence fragment is filtered based on the low-pass filter parameters of the interface segment filter cutoff frequency to generate the first filtered sequence fragment.

[0131] If the fragment start time is after the interface reflection boundary delay threshold, the sequence fragment is determined to be the second sequence fragment. The second sequence fragment is then filtered based on the low-pass filter parameters of the cable segment filter cutoff frequency to generate the second filtered sequence fragment.

[0132] The first and second filtered sequence segments are spliced ​​together and smoothed to obtain the filtered waveform sequence.

[0133] Among them, the preset time slice refers to the time window corresponding to a single sampling point in the extended reflection waveform sequence, or the sliding window used to perform short-time convolution operations; the interface segment filter cutoff frequency refers to the low-pass filter threshold used for the test interface area; the interface segment filter cutoff frequency is set to a relatively narrow bandwidth, such as 1GHz to 2GHz, to strongly suppress the severe high-frequency ringing and overshoot caused by the probe inductance in the test interface device; the cable segment filter cutoff frequency refers to the low-pass filter threshold used for the target cable area; the cable segment filter cutoff frequency is set to a relatively wide bandwidth, such as 10GHz to 15GHz, to preserve the high-frequency detail features of the FFC cable body caused by small impedance changes to the greatest extent.

[0134] Among them, forward time series filtering refers to the conventional processing of data using digital filter difference equations, where the filter coefficients are... and For the input sequence Calculate the output :

[0135] ;

[0136] Preferably, the first filter sequence segment and the second filter sequence segment are spliced ​​and smoothed to eliminate the influence of impedance pseudo-data generated at the junction due to the switching of the two frequency band filters.

[0137] In one embodiment, determining the reflection coefficient at each time-domain position of the filtered waveform sequence and generating a characteristic impedance distribution along the length of the target cable based on multiple reflection coefficients includes:

[0138] The filtered waveform sequence is input into the discrete layer stripping recursive model, which then calculates the local reflection coefficients distributed on the current layer of the filtered waveform sequence layer by layer.

[0139] The characteristic impedance value is set as the system reference impedance value as the starting point of the recursion. Based on the local reflection coefficient of the current layer and the characteristic impedance value of the previous layer, the characteristic impedance value of the current layer is recursively calculated to generate the characteristic impedance distribution by recursively calculating layer by layer.

[0140] During the recursive calculation process, the characteristic impedance value calculated by the current layer is monitored in real time.

[0141] If the characteristic impedance value calculated by the current layer exceeds the preset value range, it is determined that there is a risk of divergence in the algorithm of the discrete layer stripping recursive model. The characteristic impedance value of the current layer is replaced with the preset limit clamping value, and the recursive operation of subsequent layers is terminated.

[0142] Among them, in the first Local reflection coefficient of the layer Incident wave from the current layer and reflected waves The calculation formula is:

[0143] ;

[0144] in, Is the reflected wave from the current layer at The value, Is the incident wave at The value of .

[0145] No. characteristic impedance of the layer The derived formula is expressed as follows:

[0146] ;

[0147] Derivation of the first The formula for the discrete layer stripping algorithm of the layer waveform is:

[0148] ;

[0149] in Representing the Characteristic impedance of the layer; Representing the Layer and First The reflection coefficient of the interface layer; Representing the The forward transmission wave of the layer is the incident wave; Representing the The reverse transmission wave of the layer is the reflected wave; This represents the sampling interval time, corresponding to the single-layer transmission delay. The algorithm described above starts from the first layer, calculates the local reflection coefficient of that layer, and then removes the reflection component generated by that layer from the total waveform, thereby deducing the pure waveform incident on the next layer.

[0150] Furthermore, in this embodiment, during the recursive process and layer-by-layer calculation, the calculated characteristic impedance value is monitored in real time. If the impedance value at a certain point suddenly changes to outside the preset physical reasonable range, such as exceeding 3000 ohms or falling below 1 ohm, or if an abnormal value occurs, the discrete layer stripping algorithm will immediately trigger a protection interruption, clamping the impedance value of the current layer to the preset physical limit value and stopping the recursion of subsequent layers. This effectively prevents the algorithm from diverging due to individual bad data points. Finally, a characteristic impedance spectrum distributed along the length of the FFC cable is output. Quality inspectors or automated equipment can directly read the average impedance, maximum or minimum impedance of the corresponding effective area of ​​the cable in the characteristic impedance spectrum and compare it with the specification standard to automatically generate a pass / fail judgment result.

[0151] Specifically, this embodiment monitors the calculation results in real time. Once the impedance value is detected to exceed the physical reasonable range, clamping is immediately initiated and subsequent recursion is terminated. This prevents the cascading amplification of errors, filters out false results, and ensures that the measurement software still has extremely high numerical stability and engineering robustness when facing extreme signals or calculation noise.

[0152] Specifically, when the FFC cable time-domain reflection impedance de-embedding measurement method is applied to a multi-channel test scenario involving multiple parallel cables, it addresses the inter-line crosstalk present in parallel testing of multiple cables by acquiring the reflected voltage signal of the target cable in an open-circuit state at its end. The specific steps include:

[0153] S401 marks the test channels connected to multiple target cables as channels 1 to N respectively, and controls all test channels to be in silent receiving state at the initial moment of test start;

[0154] The silent reception state means that the test channel only turns on the high impedance voltage sampling port and turns off the step pulse transmission; the step pulse transmission is used to generate a high-frequency, fast-edge step voltage signal, which is injected into the target cable as a probe signal.

[0155] S402, set channels 1 to N as preset channels in sequence, and activate the current test channel i in sequence according to the preset channel order. Specifically, each test channel has non-overlapping measurement time slots. When the current system time is within the measurement time slot of channel i, i.e. channel i is selected, a step pulse signal is transmitted to channel i, and the reflected voltage signal of channel i is acquired synchronously to generate the corresponding full-path time-domain reflection waveform sequence.

[0156] S403, when the system time is within the measurement time slot of channel i, force the remaining N-1 non-test channels to remain in silent reception state. By placing the non-test channels in silent reception state, ensure that only channel i works as a single signal source within the current measurement time slot.

[0157] This eliminates crosstalk between adjacent target cables that emit simultaneously, ensuring that the acquired full-path time-domain reflection waveform sequence contains only the reflection characteristics of the target cable itself.

[0158] S404, after channel i completes the acquisition of the full-path time-domain reflection waveform sequence, and before switching to the next measurement time slot of channel i+1, a waiting interval of a preset duration is inserted. The preferred value range for the waiting interval is 10. Up to 100 During this waiting interval, all channels are in a silent state, and all test channels stop transmitting step signals. The target cable forms a discharge circuit through the system reference impedance of the test circuit, releasing the stored charge accumulated in the coaxial structure and cable medium due to the open circuit test, so that the residual voltage on the cable decays to the system zero potential, preventing the residual energy of the previous channel from being superimposed on the measurement of the next channel.

[0159] S405, repeat steps S402 to S404 until all target cables have completed the acquisition of the full-path time-domain reflection waveform sequence; then, for the waveform sequence acquired independently for each channel, perform the de-embedding process of steps 202 to 204 in parallel.

[0160] Specifically, in this embodiment, to address the crosstalk characteristics caused by the tightly packed and unshielded FFC cables, a non-overlapping measurement time slot allocation mechanism is adopted. This ensures that the generation path of crosstalk is cut off on a time scale through single-point excitation and multi-point silencing, enabling high signal-to-noise ratio measurements without the need for expensive physical isolation fixtures. Simultaneously, to address the charge accumulation effect caused by open-circuit testing at the ends, this embodiment introduces a silent dissipation waiting interval. This utilizes the system's internal resistance to release parasitic charges and residual polarization energy in the open-circuit transmission line, eliminating residual energy between channels and ensuring that each measurement is initiated at a zero-potential reference. This significantly improves the reproducibility and numerical stability of automated batch testing.

[0161] In one embodiment, such as Figure 3 As shown, a time-domain reflection impedance de-embedding measurement device for FFC cables is provided; the device includes:

[0162] The signal acquisition module is used to control the sampling hardware, acquire the reflected voltage signal of the target cable in the open-circuit state at the end, and obtain the full-path time-domain reflected waveform sequence based on the reflected voltage signal;

[0163] The extension module is used to construct the virtual load. Specifically, it is used to determine the total reflection feature point based on the end waveform data of the full-path time-domain reflection waveform sequence, use the total reflection feature point as the starting point of the signal segment, generate the extended signal segment that converges to the preset matching impedance through spline interpolation, and splice the segments to obtain the extended reflection waveform sequence.

[0164] The filtering module is used to perform segmented zero-phase filtering. Specifically, it is used to determine the interface reflection boundary delay threshold based on the structural parameters of the test interface connected to the target cable, and to perform segmented forward and reverse bandwidth adaptive filtering on the extended reflection waveform sequence.

[0165] The impedance determination module is used to execute the discrete layer stripping algorithm. Specifically, it inputs the filtered waveform into the recursive model, calculates the reflection coefficient and characteristic impedance distribution layer by layer, and integrates the aforementioned divergence monitoring and numerical clamping submodules.

[0166] In one embodiment, a computer device is provided, which may be a server, and its internal structure diagram may be as follows: Figure 4 As shown, the computer device includes a processor, memory, network interface, and database connected via a system bus. The processor provides computational and control capabilities. The memory includes a non-volatile storage medium and internal memory. The non-volatile storage medium stores the operating system, computer programs, and the database. The internal memory provides an environment for the operation of the operating system and computer programs in the non-volatile storage medium. The database stores FFC cable time-domain reflection impedance de-embedding measurement data. The network interface communicates with external terminals via a network connection. When the computer program is executed by the processor, it implements a method for measuring the time-domain reflection impedance of FFC cables.

[0167] Those skilled in the art will understand that Figure 4 The structure shown is merely a block diagram of a portion of the structure related to the present application and does not constitute a limitation on the computer device to which the present application is applied. Specific computer devices may include more or fewer components than those shown in the figure, or combine certain components, or have different component arrangements.

[0168] In one embodiment, a computer device is provided, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to perform the following steps:

[0169] Acquire the reflected voltage signal of the target cable in the open-circuit state at the end, and obtain the full-path time-domain reflected waveform sequence based on the reflected voltage signal;

[0170] The total reflection feature point is determined based on the end waveform data of the full path time domain reflection waveform sequence. The total reflection feature point is used as the starting point of the signal segment to generate an extended signal segment that converges to the preset matching impedance. The extended signal segment is then spliced ​​with the full path time domain reflection waveform sequence to obtain the extended reflection waveform sequence.

[0171] The interface reflection segment boundary delay threshold is determined based on the structural parameters of the test interface connected to the target cable. Based on the interface reflection segment boundary delay threshold, bandwidth adaptive filtering is performed on multiple time segments of the extended reflection waveform sequence to obtain the filtered waveform sequence.

[0172] The reflection coefficient is determined for each time-domain position of the filtered waveform sequence. Based on multiple reflection coefficients, a characteristic impedance distribution along the length of the target cable is generated, and the actual characteristic impedance distribution corresponding to the effective physical length of the target cable is extracted from the characteristic impedance distribution.

[0173] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium. When executed, the computer program can include the processes of the embodiments of the above methods. Any references to memory, storage, databases, or other media used in the embodiments provided in this application can include non-volatile and / or volatile memory. Non-volatile memory may include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), or flash memory. Volatile memory may include random access memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in a variety of forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), dual data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), RAMbus direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM), etc.

[0174] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0175] The above embodiments merely illustrate several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the invention patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.

Claims

1. A method for measuring the time-domain reflection impedance de-embedding of FFC cables, characterized in that, include: Acquire the reflected voltage signal of the target cable in the open-circuit state at the end, and obtain the full-path time-domain reflected waveform sequence based on the reflected voltage signal; Based on the end waveform data of the full-path time-domain reflection waveform sequence, the total reflection feature point is determined. The total reflection feature point is used as the starting point of the signal segment to generate an extended signal segment that converges to the preset matching impedance. The extended signal segment is then spliced ​​with the full-path time-domain reflection waveform sequence to obtain the extended reflection waveform sequence. The interface reflection segment boundary delay threshold is determined based on the structural parameters of the test interface connected to the target cable. Based on the interface reflection segment boundary delay threshold, bandwidth adaptive filtering is performed on multiple time segments of the extended reflection waveform sequence to obtain the filtered waveform sequence. The reflection coefficient is determined for each time-domain position of the filtered waveform sequence. Based on the reflection coefficient, a characteristic impedance distribution along the length of the target cable is generated. The actual characteristic impedance distribution corresponding to the effective physical length of the target cable is extracted from the characteristic impedance distribution.

2. The method for de-embedding the time-domain reflection impedance of an FFC cable according to claim 1, characterized in that, The determination of total reflection feature points based on the end waveform data of the full-path time-domain reflection waveform sequence includes: Based on a preset time interval, the curvature of multiple waveform subsequences in the full-path time-domain reflection waveform sequence is determined, and a curvature sequence is generated based on the curvature of the multiple waveform subsequences. The curvature of multiple waveform subsequences in the curvature sequence is sequentially differentially processed to obtain multiple curvature difference values, and the starting time position of the waveform subsequence corresponding to the maximum curvature difference value is determined so as to determine the starting time position as the starting point of the edge field capacitance effect. Based on the preset backoff offset and the starting point of the edge field capacitance effect, the total reflection feature point is determined in the full-path time-domain reflection waveform sequence.

3. The method for de-embedding the time-domain reflection impedance of an FFC cable according to claim 2, characterized in that, The step of generating an extended signal segment that converges to a preset matched impedance, using the total internal reflection feature point as the starting point of the signal segment, includes: Extract the instantaneous slope of the total reflection feature point of the full-path time-domain reflection waveform sequence; Construct an initial spline interpolation function, set the time position at the total reflection feature point as the function starting point, and set the function starting boundary constraints. The starting boundary constraints include at least: the voltage amplitude at the function starting point is equal to the voltage amplitude at the total reflection feature point, and the instantaneous slope at the function starting point is equal to the instantaneous slope at the total reflection feature point. A preset convergence constraint parameter is applied to the termination segment of the initial spline interpolation function so that the voltage value at the termination point of the function tends to the steady-state voltage value corresponding to the preset matching impedance, thereby generating a transition curve. At least one steady-state signal segment with a constant voltage amplitude is extracted from the full-path time-domain reflection waveform sequence, and the steady-state signal segment is spliced ​​with the transition curve to obtain the extended signal segment.

4. The method for de-embedding the time-domain reflection impedance of an FFC cable according to claim 3, characterized in that, The step of extracting the instantaneous slope of the full-path time-domain reflection waveform sequence at the total reflection feature point includes: Using the total reflection feature point as the sampling endpoint, backtrack along the time axis from the starting direction of the full-path time-domain reflection waveform sequence, and select at least one set of continuous sampling points that meet the preset time length; Based on the voltage amplitude and time coordinates of the continuous sampling points, a linear regression operation is performed on the continuous sampling points to obtain a regression line, and the slope of the regression line is determined as the instantaneous slope at the total reflection feature point.

5. The method for de-embedding the time-domain reflection impedance of an FFC cable according to claim 1, characterized in that, The full-path time-domain reflection waveform sequence includes at least a first reflection waveform sequence generated by the test interface structure and a second reflection waveform sequence generated by the transmission path of the target cable. Determining the interface reflection boundary delay threshold based on the structural parameters of the test interface connected to the target cable includes: Obtain the structural parameters of the test interface, wherein the structural parameters include at least one or more of the following: physical transmission path length, electromagnetic wave propagation speed of the medium; The theoretical transmission delay is obtained based on the ratio of the physical transmission path length to the propagation speed of the electromagnetic wave in the medium. The theoretical transmission delay is then determined as the interface reflection distinction boundary delay threshold to determine the termination position of the interface reflection response in the time domain. This distinguishes the time interval corresponding to the first reflection waveform sequence from the time interval corresponding to the second reflection waveform sequence on the time axis.

6. The method for de-embedding the time-domain reflection impedance of an FFC cable according to claim 5, characterized in that, The process of performing bandwidth adaptive filtering on multiple time segments of the extended reflection waveform sequence to obtain a filtered waveform sequence includes: Based on a preset time slice, the extended reflection waveform sequence is divided into multiple sequence segments and the start time of each sequence segment is determined. If the start time of the segment is before the interface reflection distinction boundary delay threshold, the sequence segment is determined to be the first sequence segment. The first sequence segment is filtered based on the low-pass filter parameter of the interface segment filter cutoff frequency to generate the first filtered sequence segment. If the start time of the segment is after the interface reflection distinction boundary delay threshold, the sequence segment is determined to be the second sequence segment. The second sequence segment is then filtered based on the low-pass filter parameters of the cable segment filter cutoff frequency to generate a second filtered sequence segment. The first filtered sequence segment and the second filtered sequence segment are spliced ​​and smoothed to obtain the filtered waveform sequence.

7. The method for de-embedding the time-domain reflection impedance of an FFC cable according to claim 1, characterized in that, The step of determining the reflection coefficient at each time-domain position of the filtered waveform sequence and generating a characteristic impedance distribution along the length of the target cable based on multiple reflection coefficients includes: The filtered waveform sequence is input into a discrete layer stripping recursive model, which calculates the local reflection coefficients distributed on the current layer of the filtered waveform sequence layer by layer. The characteristic impedance value is set as the system reference impedance value as the starting point of the recursion. Based on the local reflection coefficient of the current layer and the characteristic impedance value of the previous layer, the characteristic impedance value of the current layer is recursively calculated to generate the characteristic impedance distribution by recursively calculating layer by layer. During the recursive calculation process, the characteristic impedance value calculated by the current layer is monitored in real time. If the characteristic impedance value calculated by the current layer exceeds the preset value range, it is determined that there is a risk of divergence in the algorithm of the discrete layer stripping recursive model. The characteristic impedance value of the current layer is replaced with a preset limit clamping value, and the recursive operation of subsequent layers is terminated.

8. A device for measuring the time-domain reflection impedance de-embedding of FFC cables, characterized in that, The device includes: The signal acquisition module is used to acquire the reflected voltage signal of the target cable in the open-circuit state at the end, and to obtain the full-path time-domain reflected waveform sequence based on the reflected voltage signal; The extension module is used to determine the total reflection feature point based on the end waveform data of the full-path time-domain reflection waveform sequence, use the total reflection feature point as the starting point of the signal segment, generate an extended signal segment that converges to a preset matching impedance, and splice the extended signal segment with the full-path time-domain reflection waveform sequence to obtain an extended reflection waveform sequence. The filtering module is used to determine the interface reflection zone boundary delay threshold based on the structural parameters of the test interface connected to the target cable, and to perform bandwidth adaptive filtering on multiple time segments of the extended reflection waveform sequence based on the interface reflection zone boundary delay threshold to obtain the filtered waveform sequence. The impedance determination module is used to determine the reflection coefficient for each time-domain position of the filtered waveform sequence, generate a characteristic impedance distribution along the length of the target cable based on the reflection coefficient, and extract the actual characteristic impedance distribution corresponding to the effective physical length of the target cable from the characteristic impedance distribution.

9. A computer device, characterized in that, include: A memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that: Memory, used to store computer programs; A processor, configured to execute the computer program to implement the steps of the FFC cable time-domain reflection impedance de-embedding measurement method as described in any one of claims 1 to 7.

10. A computer-readable storage medium, characterized in that, A computer-readable storage medium stores a computer program that, when executed by a processor, implements the steps of the FFC cable time-domain reflection impedance de-embedding measurement method as described in any one of claims 1 to 7.