Linear Hall Sensor and its Temperature Compensation Method

Abstract

This invention discloses a linear Hall sensor and its temperature compensation method. The linear Hall sensor includes a Hall element, a chopper modulation switching circuit, a first-stage instrumentation amplifier, a chopper demodulation switching circuit, and a second-stage instrumentation amplifier. The chopper modulation switching circuit is used to chop and modulate the output voltage of the Hall element in two diagonal directions. The first-stage instrumentation amplifier is used to amplify the differential Hall voltage signal chopped and modulated by the chopper modulation switching circuit. The chopper demodulation switching circuit is used to demodulate the modulated signal amplified by the first-stage instrumentation amplifier. The second-stage instrumentation amplifier is used to further amplify the Hall voltage signal obtained by the chopper demodulation switching circuit, obtaining a voltage amplification factor that varies with temperature, so that the voltage amplification factor of the Hall voltage signal varying with temperature cancels out the Hall voltage change caused by the temperature coefficient of the Hall element itself. This invention can improve the accuracy and stability of the linear Hall sensor.

Description

Technical Field

[0001] This invention belongs to the field of sensor technology, and relates to a Hall sensor, and more particularly to a temperature compensation method for a linear Hall sensor. Background Technology

[0002] Linear Hall sensors are magnetic sensors based on the Hall effect, capable of outputting an analog voltage signal that is linearly related to the strength of the surrounding magnetic field. They are widely used in modern industry and consumer electronics, such as smartphone flip detection and precision rotor position detection in servo motors, and are one of the key technologies for achieving non-contact precision detection and control. Utilizing advanced CMOS technology, integrated linear Hall sensors can achieve low power consumption and miniaturization to meet the needs of portable and IoT devices.

[0003] A typical linear Hall sensor chip using standard CMOS technology mainly consists of: a Hall element, an offset cancellation circuit, a differential amplifier circuit, and a temperature compensation circuit. The Hall element is the core module for sensing magnetic fields. It typically uses an N-well resistor to form a square conductive sheet, through which current flows. When a magnetic field exists in the surrounding environment, the Hall element generates a measurable potential difference, i.e., the Hall voltage, perpendicular to both the current and the magnetic field. The Hall element is usually used perpendicular to the magnetic field. Due to the randomness of the manufacturing process, the Hall element has an offset voltage. After subsequent amplification, this can cause zero drift in the output voltage, affecting the chip's measurement accuracy. This offset can be eliminated by a chopper offset cancellation circuit, which removes the offset from both the Hall element and the amplifier circuit. The differential amplifier circuit amplifies the weak Hall voltage generated by the Hall element to a usable range and outputs it. Because the N-well resistor Hall element has a large temperature coefficient, the output voltage changes with temperature under the same magnetic field. The temperature compensation circuit compensates for this change, ensuring consistent output.

[0004] According to the Hall voltage formula V H ∝I*B Z Among them, V H I is the Hall voltage, and I is the current flowing through the Hall plate. In a typical structure, I depends on the power supply voltage and the resistance of the Hall plate. Temperature changes cause changes in the resistance of the Hall plate, which ultimately leads to changes in the sensitivity of the Hall element to the magnetic field. This directly determines the accuracy and stability of the sensor, which can be solved by introducing temperature compensation.

[0005] Currently, there are three main and most effective compensation methods: digital compensation and calibration, constant current source driving, and gain adjustment. Digital compensation and calibration is the most advanced and accurate method, primarily used in high-performance Hall effect chips. It requires integrated temperature sensors and microcontroller cores within the chip, making it complex and costly to develop, and thus only suitable for high-end instruments. The constant current source driving method uses a temperature-independent current to drive the Hall element. Maintaining a constant driving current ensures the Hall voltage is only related to the magnetic field. This method is simple in principle and moderately costly, but requires an additional constant current generation circuit, and accurately replicating the constant current consumes additional voltage margin, making it unsuitable for low-voltage, low-power scenarios. The gain adjustment method uses the same resistor as the Hall element in the signal amplification path. By adjusting the amplifier gain, its change with temperature is opposite to that of the Hall voltage, compensating for changes in sensitivity. It features low power consumption, simple design, and low cost. However, because N-well resistors typically have a high voltage coefficient, the amplifier gain changes significantly with different output voltages, causing sensitivity to vary with magnetic field strength, thus limiting the final accuracy.

[0006] Figure 1 This diagram illustrates a traditional linear Hall effect sensor circuit, consisting of a Hall element, a chopper amplifier, and a common-mode regulated amplifier circuit. According to the Hall voltage generation mechanism, the Hall voltage generated by the Hall element is positively correlated with the ambient magnetic field strength and the current flowing through it. In this structure, the current flowing through the Hall element is determined by both the power supply voltage and the Hall element resistance. Because the N-well resistor of the Hall element has a large temperature coefficient, its resistance changes with temperature, and the current flowing through it also changes, causing the Hall voltage generated under the same magnetic field to vary with temperature—an undesirable outcome in applications. One solution is to compensate for the temperature coefficient using the resistors in the subsequent amplifier stage. For example, R3 can use the same type of resistor as the Hall element, and R4 can use a resistor with a very small temperature coefficient, compensating by using R3 with the same temperature coefficient as the Hall element. However, the N-well resistor of a typical Hall element generally has a large voltage coefficient, which causes the gain to vary with the output voltage, which is unacceptable in applications.

[0007] Another classic solution is to use a constant current source to drive the Hall effect sensor. Figure 2 This is a schematic diagram of a traditional linear Hall sensor circuit structure driven by a constant current source. This scheme introduces a constant current source to ensure that the current flowing through the Hall plate remains constant at any temperature, thus obtaining a Hall voltage with zero temperature coefficient. Combined with subsequent amplification circuits, a magnetic field sensitivity that does not change with temperature can be obtained. However, since an additional reference current generation circuit is required, the chip power consumption will increase, making it unsuitable for low power supply voltage and low power consumption applications.

[0008] In view of this, there is an urgent need to design a new linear Hall sensor in order to overcome at least some of the aforementioned defects of existing linear Hall sensors. Summary of the Invention

[0009] This invention provides a linear Hall sensor and its temperature compensation method, which can improve the accuracy and stability of the linear Hall sensor.

[0010] To solve the above-mentioned technical problems, according to one aspect of the present invention, the following technical solution is adopted:

[0011] A linear Hall sensor, comprising: a Hall plate, a chopper modulation switching circuit, a first-stage instrumentation amplifier, a chopper demodulation switching circuit, and a second-stage instrumentation amplifier.

[0012] The chopper modulation switch circuit is connected to the Hall plate to chopper modulate the output voltage in the two diagonal directions of the Hall plate, and modulates the original low-frequency Hall signal onto the frequency of the chopper clock and its odd harmonics.

[0013] The first-stage instrumentation amplifier is connected to the chopper modulation switch circuit to amplify the differential Hall voltage signal that has been chopped and modulated by the chopper modulation switch circuit. The first-stage instrumentation amplifier includes a first operational amplifier, a second operational amplifier, and a first resistor network. The first operational amplifier and the second operational amplifier are respectively connected to the first resistor network.

[0014] The chopper demodulation switch circuit is connected to the first-stage instrumentation amplifier to demodulate the modulated signal amplified by the first-stage instrumentation amplifier, and to move the amplified Hall voltage signal back to the baseband, so that the real magnetic field signal is restored to its original low-frequency form, while the offset and noise signals are modulated to a higher frequency band. The high-frequency components are filtered out by a low-pass filter to obtain the amplified Hall voltage signal.

[0015] The second-stage instrumentation amplifier is connected to the chopper demodulation switch circuit to further amplify the Hall voltage signal obtained by the chopper demodulation switch circuit, obtaining a voltage amplification factor that varies with temperature. The second-stage instrumentation amplifier includes a third operational amplifier and a second resistor network, with the third operational amplifier connected to the second resistor network. The types and / or resistance values ​​of the resistors in the first and second resistor networks are set so that the voltage amplification factor of the Hall voltage signal that varies with temperature cancels out the Hall voltage change caused by the temperature coefficient of the Hall plate itself.

[0016] In one embodiment of the present invention, the first resistor network includes a first resistor, a second resistor a, and a second resistor b; the non-inverting input of the first operational amplifier is connected to the output of the chopper modulation switch circuit, and the inverting input of the first operational amplifier is connected to the first terminal of the first resistor and the first terminal of the second resistor a; the output of the first operational amplifier is connected to the second terminal of the second resistor a and the input of the chopper demodulation switch circuit; the non-inverting input of the second operational amplifier is connected to the output of the chopper modulation switch circuit, and the inverting input of the second operational amplifier is connected to the second terminal of the first resistor and the first terminal of the second resistor b; the output of the second operational amplifier is connected to the second terminal of the second resistor b and the input of the chopper demodulation switch circuit.

[0017] The second resistor network includes a third a resistor, a third b resistor, a fourth a resistor, and a fourth b resistor; the first end of the fourth a resistor is connected to the output terminal VoA of the chopper demodulation switch circuit, and the first end of the fourth b resistor is connected to the output terminal VoB of the chopper demodulation switch circuit; the first end of the third a resistor is connected to the reference voltage VCM; the non-inverting input terminal of the third operational amplifier is connected to the second end of the third a resistor and the second end of the fourth a resistor, respectively; the inverting input terminal of the third operational amplifier is connected to the first end of the third b resistor and the second end of the fourth b resistor, respectively; the output terminal of the third operational amplifier is connected to the second end of the third b resistor, and the output terminal of the third operational amplifier outputs an output voltage VOUT.

[0018] In one embodiment of the present invention, the Hall plate includes a first port H1, a second port H2, a third port H3, and a fourth port H4; the first port H1 and the third port H3 are diagonally arranged, and the second port H2 and the fourth port H4 are diagonally arranged.

[0019] The linear Hall sensor further includes a first current switch Si1, a second current switch Si2, a third current switch Si3, and a fourth current switch Si4; the first current switch Si1 and the second current switch Si2 are respectively connected to the power supply voltage, and the third current switch Si3 and the fourth current switch Si4 are respectively grounded.

[0020] The first port H1 is connected to the first current switch Si1, the second port H2 is connected to the second current switch Si2, the third port H3 is connected to the third current switch Si3, and the fourth port H4 is connected to the fourth current switch Si4. The chopper modulation switch circuit includes a first modulation switch Sv1, a second modulation switch Sv2, a third modulation switch Sv3, and a fourth modulation switch Sv4. The first terminal of the first modulation switch Sv1 is connected to the first current switch Si1, and the second terminal of the first modulation switch Sv1 is connected to the non-inverting input of the first operational amplifier. The first terminal of the second modulation switch Sv2 is connected to the second current switch Si2, and the second terminal of the second modulation switch Sv2 is connected to the non-inverting input of the first operational amplifier. The first terminal of the third modulation switch Sv3 is connected to the third current switch Si3, and the second terminal of the third modulation switch Sv3 is connected to the non-inverting input of the second operational amplifier. The first terminal of the fourth modulation switch Sv4 is connected to the fourth current switch Si4, and the second terminal of the fourth modulation switch Sv4 is connected to the non-inverting input of the second operational amplifier.

[0021] The chopper demodulation switch circuit includes a first demodulation switch K1, a second demodulation switch K2, a third demodulation switch K3, a fourth demodulation switch K4, a first buffer, a second buffer, a third buffer, a fourth buffer, and an RC filter circuit. The first terminal of the first demodulation switch K1 is connected to the output terminal of the first operational amplifier, and the second terminal of the first demodulation switch K1 is connected to the first terminal of the first buffer. The first terminal of the second demodulation switch K2 is connected to the output terminal of the first operational amplifier, and the second terminal of the second demodulation switch K2 is connected to the first terminal of the second buffer. The first terminal of the third demodulation switch K3 is connected to the output terminal of the second operational amplifier, and the second terminal of the third demodulation switch K3 is connected to the first terminal of the third buffer. The first terminal of the fourth demodulation switch K4 is connected to the output terminal of the second operational amplifier, and the second terminal of the fourth demodulation switch K4 is connected to the first terminal of the fourth buffer. The second terminals of the first, second, third, and fourth buffers are respectively connected to the RC filter circuit. The chopper modulation switch circuit and the chopper demodulation switch circuit operate synchronously, and the operating states of each switch in the chopper modulation switch circuit correspond one-to-one with the corresponding switches in the chopper demodulation switch circuit.

[0022] In one embodiment of the present invention, the second resistor a and the second resistor b have the same resistance value; the third resistor a and the third resistor b have the same resistance value; and the fourth resistor a and the fourth resistor b have the same resistance value. The second resistor a, the second resistor b, the third resistor a, and the third resistor b are resistors with low temperature coefficients; the first resistor, the fourth resistor a, and the fourth resistor b are resistors with negative temperature coefficients. The resistance value of the first resistor is R1, the resistance value of the second resistor a and the second resistor b is R2, the resistance value of the third resistor a and the third resistor b is R3, and the resistance value of the fourth resistor a and the fourth resistor b is R4.

[0023] The amplification factor of the first-stage instrumentation amplifier is G1 = (1 + 2 * R2 / R1); the second-stage instrumentation amplifier amplifies the differential voltage VoA-VoB output from the chopper demodulation switching circuit by R3 / R4 times and adds VCM to the output terminal, i.e., VOUT = VCM + (VoA - VoB) * R3 / R4.

[0024] The non-inverting input of the first operational amplifier is connected to the first output VH1 and the second output VH2 of the chopper modulation switch circuit, and the inverting input of the first operational amplifier is connected to the first resistor network; the first output VH1 is connected to the second terminal of the first modulation switch Sv1, and the second output VH2 is connected to the second terminal of the second modulation switch Sv2.

[0025] The non-inverting input of the second operational amplifier is connected to the third output VH3 and the fourth output VH4 of the chopper modulation switch circuit, and the inverting input of the second operational amplifier is also connected to the first resistor network; the third output VH3 is connected to the second terminal of the third modulation switch Sv3, and the fourth output VH4 is connected to the second terminal of the fourth modulation switch Sv4.

[0026] The output terminal VoA of the RC filter circuit is connected to the first terminal of the fourth resistor a, and the output terminal VoB of the RC filter circuit is connected to the first terminal of the fourth resistor b; the output voltage of the output terminal VoA is VoA=G1*(VH2+VH3) / 2, and the output voltage of the output terminal VoB is VoB=G1*(VH1+VH4) / 2; the chopper demodulation switch circuit restores the amplified Hall voltage signal and filters out noise and offset signals.

[0027] In one embodiment of the present invention, the chopper modulation switching circuit modulates the Hall voltages in two mutually perpendicular directions of the Hall plate, dividing them into two phases, namely the zero phase Φ0 and the first phase Φ1.

[0028] At the zero phase Φ0, the first current switch Si1 and the third current switch Si3 are turned on, and the second current switch Si2 and the fourth current switch Si4 are turned off, generating a current from the power supply voltage VDD to ground, which flows through the Hall plate along the direction from the first port H1 to the third port H3. At this time, the Hall plate generates a Hall voltage along the direction from the second port H2 to the fourth port H4 under the action of the magnetic field.

[0029] In the first phase Φ1, the second current switch Si2 and the fourth current switch Si4 are turned on, and the first current switch Si1 and the third current switch Si3 are turned off, generating a current along the direction from the second port H2 to the fourth port H4. After flowing through the Hall plate, a Hall voltage is generated along the direction from the third port H3 to the first port H1 under the action of the magnetic field.

[0030] Under the same magnetic field strength, the Hall voltages at the zero phase Φ0 and the first phase Φ1 are equal in magnitude but opposite in direction. The zero-point drift caused by the Hall plate and operational amplifier offset is eliminated by the chopper demodulation switching circuit.

[0031] Ignoring the amplification factor, the first stage outputs VH+Voffset at Φ0 and -VH+Voffset at Φ1; the demodulation switch outputs VH+Voffset at Φ0 and VH-Voffset at Φ1; the offsets are canceled out after averaging by RC.

[0032] In one embodiment of the present invention, the Hall plate is a square N-well resistor sheet integrated on a wafer, used perpendicular to the magnetic field direction. After current flows through one horizontal diagonal direction, a differential Hall voltage generated by the Hall effect under the action of the magnetic field is output in the other diagonal direction; the second a resistor, the second b resistor, the third a resistor and the third b resistor are P+ polycrystalline silicon resistors.

[0033] According to another aspect of the present invention, the following technical solution is adopted: a temperature compensation method for a linear Hall sensor, the temperature compensation method comprising:

[0034] The chopper modulation switching circuit chopper modulates the output voltage of the Hall plate of the linear Hall sensor in two diagonal directions, modulating the original low-frequency Hall signal onto the frequency of the chopper clock and its odd harmonics.

[0035] The first-stage instrumentation amplifier amplifies the differential Hall voltage signal that has been chopped and modulated by the chopper modulation switching circuit. The first-stage instrumentation amplifier includes a first operational amplifier, a second operational amplifier, and a first resistor network. The first operational amplifier and the second operational amplifier are respectively connected to the first resistor network.

[0036] The chopper demodulation switch circuit demodulates the modulated signal amplified by the first-stage instrumentation amplifier, and moves the amplified Hall voltage signal back to the baseband, so that the real magnetic field signal is restored to its original low-frequency form, while the offset and noise signals are modulated to a higher frequency band. The high-frequency components are filtered out by a low-pass filter to obtain a pure amplified Hall voltage signal.

[0037] The second-stage instrumentation amplifier further amplifies the Hall voltage signal obtained by the chopper demodulation switching circuit to obtain a voltage amplification factor that varies with temperature. The second-stage instrumentation amplifier includes a third operational amplifier and a second resistor network, with the third operational amplifier connected to the second resistor network. The types and / or resistance values ​​of the resistors in the first and second resistor networks are set so that the voltage amplification factor of the Hall voltage signal that varies with temperature cancels out the Hall voltage change caused by the temperature coefficient of the Hall plate itself.

[0038] In one embodiment of the present invention, the first resistor network includes a first resistor, a second resistor a, and a second resistor b. The non-inverting input of the first operational amplifier is connected to the output of the chopper modulation switch circuit, and the inverting input of the first operational amplifier is connected to the first terminal of the first resistor and the first terminal of the second resistor a, respectively. The output of the first operational amplifier is connected to the second terminal of the second resistor a and the input of the chopper demodulation switch circuit. The non-inverting input of the second operational amplifier is connected to the output of the chopper modulation switch circuit, and the inverting input of the second operational amplifier is connected to the second terminal of the first resistor and the first terminal of the second resistor b, respectively. The output of the second operational amplifier is connected to the second terminal of the second resistor b and the input of the chopper demodulation switch circuit.

[0039] The second resistor network includes a third a resistor, a third b resistor, a fourth a resistor, and a fourth b resistor. The first terminal of the fourth a resistor is connected to the output terminal VoA of the chopper demodulation switch circuit, and the first terminal of the fourth b resistor is connected to the output terminal VoB of the chopper demodulation switch circuit. The first terminal of the third a resistor is connected to the reference voltage VCM; the non-inverting input terminal of the third operational amplifier is connected to the second terminals of the third a resistor and the fourth a resistor, respectively; the inverting input terminal of the third operational amplifier is connected to the first terminal of the third b resistor and the second terminal of the fourth b resistor, respectively; the output terminal of the third operational amplifier is connected to the second terminal of the third b resistor, and the output terminal of the third operational amplifier outputs an output voltage VOUT.

[0040] In one embodiment of the present invention, the Hall plate includes a first port H1, a second port H2, a third port H3, and a fourth port H4; the first port H1 and the third port H3 are diagonally arranged, and the second port H2 and the fourth port H4 are diagonally arranged.

[0041] The linear Hall sensor further includes a first current switch Si1, a second current switch Si2, a third current switch Si3, and a fourth current switch Si4; the first current switch Si1 and the second current switch Si2 are respectively connected to a power supply voltage, and the third current switch Si3 and the fourth current switch Si4 are respectively grounded. The first port H1 is connected to the first current switch Si1, the second port H2 is connected to the second current switch Si2, the third port H3 is connected to the third current switch Si3, and the fourth port H4 is connected to the fourth current switch Si4.

[0042] The chopper modulation switch circuit includes a first modulation switch Sv1, a second modulation switch Sv2, a third modulation switch Sv3, and a fourth modulation switch Sv4. The first terminal of the first modulation switch Sv1 is connected to a first current switch Si1, and the second terminal of the first modulation switch Sv1 is connected to the non-inverting input terminal of a first operational amplifier. The first terminal of the second modulation switch Sv2 is connected to a second current switch Si2, and the second terminal of the second modulation switch Sv2 is connected to the non-inverting input terminal of the first operational amplifier. The first terminal of the third modulation switch Sv3 is connected to a third current switch Si3, and the second terminal of the third modulation switch Sv3 is connected to the non-inverting input terminal of a second operational amplifier. The first terminal of the fourth modulation switch Sv4 is connected to a fourth current switch Si4, and the second terminal of the fourth modulation switch Sv4 is connected to the non-inverting input terminal of the second operational amplifier.

[0043] The chopper demodulation switch circuit includes a first demodulation switch K1, a second demodulation switch K2, a third demodulation switch K3, a fourth demodulation switch K4, a first buffer, a second buffer, a third buffer, a fourth buffer, and an RC filter circuit. The first terminal of the first demodulation switch K1 is connected to the output terminal of the first operational amplifier, and the second terminal of the first demodulation switch K1 is connected to the first terminal of the first buffer. The first terminal of the second demodulation switch K2 is connected to the output terminal of the first operational amplifier, and the second terminal of the second demodulation switch K2 is connected to the first terminal of the second buffer. The first terminal of the third demodulation switch K3 is connected to the output terminal of the second operational amplifier, and the second terminal of the third demodulation switch K3 is connected to the first terminal of the third buffer. The first terminal of the fourth demodulation switch K4 is connected to the output terminal of the second operational amplifier, and the second terminal of the fourth demodulation switch K4 is connected to the first terminal of the fourth buffer. The second terminals of the first, second, third, and fourth buffers are respectively connected to the RC filter circuit. The chopper modulation switch circuit and the chopper demodulation switch circuit operate synchronously, and the operating states of each switch in the chopper modulation switch circuit correspond one-to-one with the corresponding switches in the chopper demodulation switch circuit.

[0044] In one embodiment of the present invention, the second resistor a and the second resistor b have the same resistance value; the third resistor a and the third resistor b have the same resistance value; and the fourth resistor a and the fourth resistor b have the same resistance value. The second resistor a, the second resistor b, the third resistor a, and the third resistor b are resistors with low temperature coefficients; the first resistor, the fourth resistor a, and the fourth resistor b are resistors with negative temperature coefficients; the resistance value of the first resistor is R1, the resistance value of the second resistor a and the second resistor b is R2; the resistance value of the third resistor a and the third resistor b is R3, and the resistance value of the fourth resistor a and the fourth resistor b is R4.

[0045] The amplification factor of the first-stage instrumentation amplifier is G1 = (1 + 2 * R2 / R1); the second-stage instrumentation amplifier amplifies the differential voltage VoA-VoB output from the chopper demodulation switching circuit by R3 / R4 times and adds VCM to the output terminal, i.e., VOUT = VCM + (VoA - VoB) * R3 / R4.

[0046] The non-inverting input of the first operational amplifier is connected to the first output VH1 and the second output VH2 of the chopper modulation switch circuit, and the inverting input of the first operational amplifier is connected to the first resistor network; the first output VH1 is connected to the second terminal of the first modulation switch Sv1, and the second output VH2 is connected to the second terminal of the second modulation switch Sv2.

[0047] The non-inverting input of the second operational amplifier is connected to the third output VH3 and the fourth output VH4 of the chopper modulation switch circuit, and the inverting input of the second operational amplifier is also connected to the first resistor network; the third output VH3 is connected to the second terminal of the third modulation switch Sv3, and the fourth output VH4 is connected to the second terminal of the fourth modulation switch Sv4.

[0048] The output terminal VoA of the RC filter circuit is connected to the first terminal of the fourth resistor a, and the output terminal VoB of the RC filter circuit is connected to the first terminal of the fourth resistor b; the output voltage of the output terminal VoA is VoA=G1*(VH2+VH3) / 2, and the output voltage of the output terminal VoB is VoB=G1*(VH1+VH4) / 2; the chopper demodulation switch circuit restores the amplified Hall voltage signal and filters out noise and offset signals.

[0049] The chopper modulation switching circuit modulates the Hall voltages in two mutually perpendicular directions of the Hall plate, dividing them into two phases, namely the zero phase Φ0 and the first phase Φ1.

[0050] At the zero phase Φ0, the first current switch Si1 and the third current switch Si3 are turned on, and the second current switch Si2 and the fourth current switch Si4 are turned off, generating a current from the power supply voltage VDD to ground, which flows through the Hall plate along the direction from the first port H1 to the third port H3. At this time, the Hall plate generates a Hall voltage along the direction from the second port H2 to the fourth port H4 under the action of the magnetic field.

[0051] In the first phase Φ1, the second current switch Si2 and the fourth current switch Si4 are turned on, and the first current switch Si1 and the third current switch Si3 are turned off, generating a current along the direction from the second port H2 to the fourth port H4. After flowing through the Hall plate, a Hall voltage is generated along the direction from the third port H3 to the first port H1 under the action of the magnetic field.

[0052] Under the same magnetic field strength, the Hall voltages at the zero phase Φ0 and the first phase Φ1 are equal in magnitude but opposite in direction. The zero-point drift caused by the Hall plate and operational amplifier offset is eliminated by the chopper demodulation switching circuit.

[0053] The beneficial effects of this invention are as follows: The linear Hall sensor and its temperature compensation method proposed in this invention can solve the problem of sensitivity variation with temperature in traditional linear Hall sensor structures under the premise of low power supply voltage, low power consumption and low cost, thereby improving the accuracy and stability of linear Hall sensors.

[0054] In cost-constrained applications, it is often difficult to guarantee low power consumption while maintaining high accuracy and temperature stability. The linear Hall sensor proposed in this invention can be designed based on the resistance parameters in different processes. It utilizes the gain temperature coefficient of a two-stage instrumentation amplifier to offset the Hall voltage change caused by variations in the N-well resistance, thus obtaining an output voltage that is approximately dependent only on the magnetic field strength. As the temperature increases, the resistance of the N-well Hall element increases, and the current flowing through the Hall element decreases, resulting in a smaller Hall voltage generated under the same magnetic field at higher temperatures. Similarly, due to the different resistance temperature coefficients in the amplifier, the amplifier gain has a positive temperature coefficient, which offsets the negative temperature coefficient of the Hall voltage, thus achieving a Hall sensitivity with a small temperature coefficient. Attached Figure Description

[0055] Figure 1 This is a schematic diagram of a traditional linear Hall sensor circuit structure.

[0056] Figure 2 This is a schematic diagram of the circuit structure of a temperature-compensated linear Hall sensor driven by a constant current source.

[0057] Figure 3 This is a schematic diagram of the circuit structure of a linear Hall sensor in one embodiment of the present invention. Detailed Implementation

[0058] The preferred embodiments of the present invention will now be described in detail with reference to the accompanying drawings.

[0059] To further understand the present invention, preferred embodiments of the present invention are described below in conjunction with examples. However, it should be understood that these descriptions are only for further illustrating the features and advantages of the present invention, and not for limiting the scope of the claims of the present invention.

[0060] The description in this section pertains to only a few typical embodiments, and the present invention is not limited to the scope of the embodiments described. Substitution of identical or similar prior art methods with some technical features in the embodiments is also within the scope of the description and protection of this invention.

[0061] The steps described in the various embodiments in the specification are for illustrative purposes only, and the implementation of this application is not limited by the order of the steps.

[0062] The term "coupled" or "connected" in the specification includes both direct and indirect connections, such as connections made through active devices, passive devices, or electrical conduction media; it may also include connections made by other active or passive devices that are known to those skilled in the art and can achieve the same or similar functional purpose, such as connections made through circuits or components such as switches or follower circuits.

[0063] This invention discloses a linear Hall sensor. Figure 3 This is a schematic diagram of the circuit structure of a linear Hall sensor according to an embodiment of the present invention; please refer to [link / reference]. Figure 3 The linear Hall sensor includes: a Hall plate 1, a chopper modulation switch circuit 2, a first-stage instrumentation amplifier 3, a chopper demodulation switch circuit 4, and a second-stage instrumentation amplifier 5.

[0064] The chopper modulation switch circuit 2 is connected to the Hall plate 1 to chopper modulate the output voltage in the two diagonal directions of the Hall plate 1, and modulate the original low-frequency Hall signal onto the frequency of the chopper clock and its odd harmonics.

[0065] The first-stage instrumentation amplifier 3 is connected to the chopper modulation switch circuit 2 to amplify the differential Hall voltage signal that has been chopper-modulated by the chopper modulation switch circuit 2; the first-stage instrumentation amplifier 3 includes a first operational amplifier 31, a second operational amplifier 32 and a first resistor network, and the first operational amplifier 31 and the second operational amplifier 32 are respectively connected to the first resistor network.

[0066] The chopper demodulation switch circuit 4 is connected to the first-stage instrumentation amplifier 3 to demodulate the modulated signal amplified by the first-stage instrumentation amplifier 3, and to move the amplified Hall voltage signal back to the baseband, so that the real magnetic field signal is restored to its original low-frequency form, while the offset and noise signals are modulated to a higher frequency band. The high-frequency components are filtered out by a low-pass filter to obtain a pure amplified Hall voltage signal.

[0067] The second-stage instrumentation amplifier 5 is connected to the chopper demodulation switch circuit 4 to further amplify the Hall voltage signal obtained by the chopper demodulation switch circuit 4, thereby obtaining a voltage amplification factor that varies with temperature. The second-stage instrumentation amplifier 5 includes a third operational amplifier 51 and a second resistor network, wherein the third operational amplifier 51 is connected to the second resistor network. The types and / or resistance values ​​of the resistors in the first and second resistor networks are set so that the voltage amplification factor of the Hall voltage signal that varies with temperature cancels out the Hall voltage change caused by the temperature coefficient of the Hall plate itself.

[0068] In one embodiment of the present invention, the Hall plate 1 can be a square N-well resistor, in use, current flows through one diagonal, and the current generates a Hall voltage on the other diagonal under the action of a magnetic field. The Hall plate is a square resistor sheet integrated on a wafer, which can be used perpendicular to the magnetic field direction. After current flows through one horizontal diagonal direction, a differential Hall voltage generated by the Hall effect is output in the other diagonal direction.

[0069] In one embodiment of the present invention, the linear Hall sensor further includes a first current switch Si1, a second current switch Si2, a third current switch Si3, and a fourth current switch Si4; the first current switch Si1 and the second current switch Si2 are respectively connected to the power supply voltage VDD, and the third current switch Si3 and the fourth current switch Si4 are respectively grounded. The first current switch Si1 and the second current switch Si2 may be PMOS, while the third current switch Si3 and the fourth current switch Si4 may be NMOS.

[0070] The Hall effect sensor 1 includes a first port H1, a second port H2, a third port H3, and a fourth port H4; the first port H1 and the third port H3 are diagonally arranged, and the second port H2 and the fourth port H4 are diagonally arranged. The first port H1 is connected to a first current switch Si1, the second port H2 is connected to a second current switch Si2, the third port H3 is connected to a third current switch Si3, and the fourth port H4 is connected to a fourth current switch Si4.

[0071] The chopper modulation switch circuit 2 includes a first modulation switch Sv1, a second modulation switch Sv2, a third modulation switch Sv3, and a fourth modulation switch Sv4. The first terminal of the first modulation switch Sv1 is connected to a first current switch Si1, and the second terminal of the first modulation switch Sv1 is connected to the non-inverting input terminal of the first operational amplifier 31. The first terminal of the second modulation switch Sv2 is connected to a second current switch Si2, and the second terminal of the second modulation switch Sv2 is connected to the non-inverting input terminal of the first operational amplifier 31. The first terminal of the third modulation switch Sv3 is connected to a third current switch Si3, and the second terminal of the third modulation switch Sv3 is connected to the non-inverting input terminal of the second operational amplifier 32. The first terminal of the fourth modulation switch Sv4 is connected to a fourth current switch Si4, and the second terminal of the fourth modulation switch Sv4 is connected to the non-inverting input terminal of the second operational amplifier 32.

[0072] The chopper demodulation switch circuit 4 includes a first demodulation switch K1, a second demodulation switch K2, a third demodulation switch K3, a fourth demodulation switch K4, a first buffer, a second buffer, a third buffer, a fourth buffer, and an RC filter circuit. The first terminal of the first demodulation switch K1 is connected to the output terminal of the first operational amplifier, and the second terminal of the first demodulation switch K1 is connected to the first terminal of the first buffer. The first terminal of the second demodulation switch K2 is connected to the output terminal of the first operational amplifier, and the second terminal of the second demodulation switch K2 is connected to the first terminal of the second buffer. The first terminal of the third demodulation switch K3 is connected to the output terminal of the second operational amplifier, and the second terminal of the third demodulation switch K3 is connected to the first terminal of the third buffer. The first terminal of the fourth demodulation switch K4 is connected to the output terminal of the second operational amplifier, and the second terminal of the fourth demodulation switch K4 is connected to the first terminal of the fourth buffer. The second terminals of the first, second, third, and fourth buffers are respectively connected to the RC filter circuit.

[0073] The chopper modulation switch circuit 2 and the chopper demodulation switch circuit 4 work synchronously. The working states of each switch in the chopper modulation switch circuit 2 and the corresponding switches in the chopper demodulation switch circuit 4 (for example, the first modulation switch Sv1 corresponds to the first demodulation switch K1, the second modulation switch Sv2 corresponds to the second demodulation switch K2, the third modulation switch Sv3 corresponds to the third demodulation switch K3, and the fourth modulation switch Sv4 corresponds to the fourth demodulation switch K4) are in one-to-one correspondence.

[0074] In one embodiment of the present invention, the first resistor network includes a first resistor R1, a second a resistor R2a, and a second b resistor R2b; the non-inverting input of the first operational amplifier 31 is connected to the output of the chopper modulation switch circuit 2, and the inverting input of the first operational amplifier 31 is connected to the first terminal of the first resistor R1 and the first terminal of the second a resistor R2a; the output of the first operational amplifier 31 is connected to the second terminal of the second a resistor R2a and the input of the chopper demodulation switch circuit 4. The inverting input of the second operational amplifier 32 is connected to the output of the chopper modulation switch circuit 2, and the non-inverting input of the second operational amplifier 32 is connected to the second terminal of the first resistor R1 and the first terminal of the second b resistor R2b; the output of the second operational amplifier 32 is connected to the second terminal of the second b resistor R2b and the input of the chopper demodulation switch circuit 4.

[0075] The second resistor network includes a third a resistor R3a, a third b resistor R3b, a fourth a resistor R4a, and a fourth b resistor R4b. The first terminal of the fourth a resistor R4a is connected to the output terminal of the chopper demodulation switch circuit 4, and the first terminal of the fourth b resistor R4b is also connected to the output terminal of the chopper demodulation switch circuit 4. The first terminal of the third a resistor R3a is connected to the reference voltage VCM; the non-inverting input terminal of the third operational amplifier 51 is connected to the second terminals of the third a resistor R3a and the fourth a resistor R4a, respectively; the inverting input terminal of the third operational amplifier 51 is connected to the first terminal of the third b resistor R3b and the second terminal of the fourth b resistor R4b, respectively; and the output terminal of the third operational amplifier 51 is connected to the second terminal of the third b resistor R3b.

[0076] In one embodiment of the present invention, the second a resistor R2a and the second b resistor R2b have the same resistance value; the third a resistor R3a and the third b resistor R3b have the same resistance value; and the fourth a resistor R4a and the fourth b resistor R4b have the same resistance value. The second a resistor R2a, the second b resistor R2b, the third a resistor R3a, and the third b resistor R3b are resistors with low temperature coefficients, i.e., resistors with a very small temperature coefficient (TCR) (very low absolute value). In one embodiment, the second a resistor R2a, the second b resistor R2b, the third a resistor R3a, and the third b resistor R3b can be selected as resistors with the smallest temperature coefficients under the set process parameters; for example, the second a resistor, the second b resistor, the third a resistor, and the third b resistor can be P+ polysilicon resistors.

[0077] The first resistor R1, the fourth a resistor R4a, and the fourth b resistor R4b can be resistors with a negative temperature coefficient. In one embodiment, the first resistor R1, the fourth a resistor R4a, and the fourth b resistor R4b are high-resistance polysilicon resistors. The resistance value of the first resistor is R1, the resistance value of the second a resistor and the second b resistor is R2; the resistance value of the third a resistor and the third b resistor is R3, and the resistance value of the fourth a resistor and the fourth b resistor is R4.

[0078] The amplification factor of the first-stage instrumentation amplifier 3 is G1 = (1 + 2 * R2 / R1). The second-stage instrumentation amplifier 5 amplifies the differential voltage VoA-VoB output from the chopper demodulation switching circuit 4 by a factor of R3 / R4, adds VCM, and outputs it to the output terminal, i.e., VOUT = VCM + (VoA - VoB) * R3 / R4.

[0079] The non-inverting input of the first operational amplifier is connected to the first output VH1 and the second output VH2 of the chopper modulation switch circuit, and the inverting input of the first operational amplifier is connected to the first resistor network; the first output VH1 is connected to the second terminal of the first modulation switch Sv1, and the second output VH2 is connected to the second terminal of the second modulation switch Sv2.

[0080] The non-inverting input of the second operational amplifier 32 is connected to the third output VH3 and the fourth output VH4 of the chopper modulation switch circuit, and the inverting input of the second operational amplifier 32 is also connected to the first resistor network; the third output VH3 is connected to the second terminal of the third modulation switch Sv3, and the fourth output VH4 is connected to the second terminal of the fourth modulation switch Sv4.

[0081] The output terminal VoA of the RC filter circuit is connected to the first terminal of the fourth resistor a, and the output terminal VoB of the RC filter circuit is connected to the first terminal of the fourth resistor b; the output voltage of the output terminal VoA is VoA=G1*(VH2+VH3) / 2, and the output voltage of the output terminal VoB is VoB=G1*(VH1+VH4) / 2; the chopper demodulation switch circuit restores the amplified Hall voltage signal and filters out noise and offset signals.

[0082] In one embodiment of the present invention, the chopper modulation switching circuit modulates the Hall voltages in two mutually perpendicular directions of the Hall plate, dividing them into two phases, namely the zero phase Φ0 and the first phase Φ1.

[0083] At the zero phase Φ0, the first current switch Si1 and the third current switch Si3 are turned on, and the second current switch Si2 and the fourth current switch Si4 are turned off, generating a current from the power supply voltage VDD to ground, which flows through the Hall plate along the direction from the first port H1 to the third port H3. At this time, the Hall plate generates a Hall voltage along the direction from the second port H2 to the fourth port H4 under the action of the magnetic field.

[0084] In the first phase Φ1, the second current switch Si2 and the fourth current switch Si4 are turned on, and the first current switch Si1 and the third current switch Si3 are turned off, generating a current along the direction from the second port H2 to the fourth port H4. After flowing through the Hall plate, a Hall voltage is generated along the direction from the third port H3 to the first port H1 under the action of the magnetic field.

[0085] Under the same magnetic field strength, the Hall voltages at the zero phase Φ0 and the first phase Φ1 are equal in magnitude but opposite in direction. The zero-point drift caused by the Hall plate and operational amplifier offset is eliminated by the chopper demodulation switching circuit.

[0086] In one application scenario of this invention, the first-stage instrumentation amplifier 3 outputs VH+Voffset at the zero phase Φ0 and -VH+Voffset at the first phase Φ1; the demodulation switch of the chopper demodulation switching circuit 4 outputs VH+Voffset at the zero phase Φ0 and VH-Voffset at the first phase Φ1. The offset signal Voffset can be canceled by averaging through the RC filter circuit.

[0087] This invention further discloses a temperature compensation method for a linear Hall sensor, the temperature compensation method comprising:

[0088] The chopper modulation switching circuit chopper modulates the output voltage of the Hall plate of the linear Hall sensor in the two diagonal directions, modulating the original low-frequency Hall signal onto the frequency of the chopper clock and its odd harmonics.

[0089] The first-stage instrumentation amplifier amplifies the differential Hall voltage signal that has been chopped and modulated by the chopper modulation switching circuit. The first-stage instrumentation amplifier includes a first operational amplifier, a second operational amplifier, and a first resistor network. The first operational amplifier and the second operational amplifier are respectively connected to the first resistor network.

[0090] The chopper demodulation switch circuit demodulates the modulated signal amplified by the first-stage instrumentation amplifier through a switch synchronized with the chopper modulation switch circuit. The amplified Hall voltage signal is then moved back to the baseband, restoring the original low-frequency form of the real magnetic field signal. Meanwhile, the offset and noise signals are modulated to a higher frequency band. The high-frequency components are filtered out by a low-pass filter to obtain a pure amplified Hall voltage signal.

[0091] The second-stage instrumentation amplifier further amplifies the Hall voltage signal obtained by the chopper demodulation switching circuit to obtain a voltage amplification factor that varies with temperature; the second-stage instrumentation amplifier includes a third operational amplifier and a second resistor network, wherein the third operational amplifier is connected to the second resistor network.

[0092] The types and / or values ​​of the resistors in the first and second resistor networks are configured such that the voltage amplification factor of the Hall voltage signal as a function of temperature cancels out the Hall voltage change caused by the temperature coefficient of the Hall plate itself.

[0093] In one application scenario of this invention, a linear Hall sensor based on a standard CMOS process is disclosed, the structure of which is shown in the figure below. Figure 3 As shown, in one application scenario of the present invention, the Hall plate adopts an N-well resistor in CMOS process with a temperature coefficient of approximately Tc1=5.9m. It is designed as a square resistor sheet and used perpendicular to the magnetic field direction. In application, a current is applied in one diagonal direction, and a differential Hall voltage generated by the Hall effect is output in the other diagonal direction.

[0094] The chopper modulation switching circuit is used to chop and modulate the output voltage of the Hall plate in two diagonal directions. The original low-frequency Hall signal, containing offset and 1 / f noise, is modulated onto the frequency of the chopper clock and its odd harmonics. The Hall voltage signal is then restored after subsequent chopper demodulation and filtering, removing noise and offset. Si1 and Si2 are PMOS transistors, while Si3 and Si4 are NMOS transistors. The chopping function is achieved by switching transistors with different Φ0 values ​​during the two chopping cycles. At the zero phase Φ0, the two current switches Si1 and Si3 are turned on, while Si2 and Si4 are turned off, generating a current from VDD to ground. This current flows through the Hall plate along the direction H1~H3. At this time, the Hall plate generates a Hall voltage along the direction H2~H4 under the influence of a magnetic field. The Hall voltage value can be expressed as VH0 = VH2 - VH4. At the first phase Φ1, current switches Si2 and Si4 are turned on, while Si1 and Si3 are turned off, generating a current along the direction from H2 to H4. After flowing through the Hall plate, a Hall voltage is generated along the direction from H3 to H1 under the action of the magnetic field. The Hall voltage value can be expressed as VH1 = VH3 - VH1. Under the same magnetic field strength, VH0 and VH1 are equal in magnitude and opposite in direction. After passing through, the zero-point drift caused by the Hall plate and operational amplifier misalignment can be eliminated.

[0095] The first-stage instrumentation amplifier contains two operational amplifiers and a set of resistor networks, which are used to amplify the chopper-modulated differential Hall voltage signal. The amplification factor A1 is determined by the resistance values ​​of R2 and R1, and can be expressed as G1=(1+2*R2 / R1).

[0096] The chopper demodulation switch circuit demodulates the amplified modulation signal through a switch synchronized with the chopper modulation switch circuit, shifting the amplified Hall voltage signal back to the baseband (low frequency). At this point, the real magnetic field signal recovers its original low-frequency form, while the offset and noise signals are modulated to a higher frequency band. Finally, a simple low-pass filter is used to filter out the high-frequency components, resulting in a pure, amplified Hall voltage signal.

[0097] The second-stage instrumentation amplifier contains an operational amplifier and a set of resistor networks to further amplify the Hall voltage signal. The amplification factor is determined by the resistance values ​​of R3 and R4, and can be expressed as G2 = R3 / R4.

[0098] By combining R1, R2, R3, and R4 with different temperature coefficients, the voltage amplification factor that varies with temperature can be obtained. This amplification cancels out the Hall voltage change caused by the temperature coefficient of the Hall element itself, thus achieving accurate sensitivity that does not change with temperature. In this case, R2 uses a P+ polysilicon resistor with a very small temperature coefficient, Tc1≈0; R1 uses a high-resistance polysilicon resistor with a negative temperature coefficient, approximately Tc1=3.1m. Assuming 2R2 / R1=K, where K can be determined based on the temperature coefficients of the P+ polysilicon resistor and the N-well of the Hall element in the specific process, the relationship between the first-stage amplification factor and temperature can be expressed as: .

[0099] Similarly, R3 uses a P+ polysilicon resistor with a very small temperature coefficient, and R4 uses a high-resistance polysilicon resistor with a negative temperature coefficient. The relationship between the first-stage amplification factor and temperature can be expressed as: .

[0100] The relationship between overall gain and temperature can be expressed as: .

[0101] Assume V H =C*I*B Z I = V / Rh, where C is the Hall constant, Rh is the resistance along the diagonal of the Hall plate with a temperature coefficient of -5.9 m, and V... H The relationship with temperature can be expressed as: .

[0102] The output voltage can then be expressed as: .

[0103] After simplification and omitting higher-order terms, we get: .

[0104] In this application example, based on the temperature coefficients of the N-well resistor and the high-resistance polysilicon resistor used for compensation, it can be seen that when K=9, the correlation between the output voltage and temperature is reduced to the minimum, that is, the sensitivity temperature coefficient is the smallest at this time.

[0105] As described above, the compensation method proposed in this invention utilizes resistors with different temperature coefficients to offset the temperature coefficient of the Hall element itself. Furthermore, the ratio of the first-stage amplification resistors can be adjusted according to the different temperature coefficients in different processes, resulting in a wide range of applications. The total amplification factor is unlimited and can be adjusted via the second-stage amplification factor. This circuit structure is simple and suitable for applications with low power supply voltage and low power consumption, overcoming the shortcomings of traditional linear Hall sensor temperature compensation structures.

[0106] In summary, the linear Hall sensor and its temperature compensation method proposed in this invention can solve the problem of sensitivity variation with temperature in traditional linear Hall sensor structures under the premise of low power supply voltage, low power consumption, and low cost, thereby improving the accuracy and stability of linear Hall sensors.

[0107] In cost-constrained applications, it is often difficult to guarantee low power consumption while maintaining high accuracy and temperature stability. The linear Hall sensor proposed in this invention can be designed based on the resistance parameters in different processes. It utilizes the gain temperature coefficient of a two-stage instrumentation amplifier to offset the Hall voltage change caused by variations in the N-well resistance, thus obtaining an output voltage that is approximately dependent only on the magnetic field strength. As the temperature increases, the resistance of the N-well Hall plate increases, and the current flowing through the Hall plate decreases, resulting in a smaller Hall voltage generated under the same magnetic field at higher temperatures. Similarly, due to the different resistance temperature coefficients in the amplifier, the amplifier gain has a positive temperature coefficient, which offsets the negative temperature coefficient of the Hall voltage, thus achieving a Hall sensitivity with a small temperature coefficient.

[0108] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0109] The description and application of the present invention herein are illustrative and not intended to limit the scope of the invention to the embodiments described above. Effects or advantages involved in the embodiments may not be apparent due to various factors, and the description of effects or advantages is not intended to limit the embodiments. Variations and modifications of the embodiments disclosed herein are possible, and various substitutions and equivalents of the components in the embodiments are well known to those skilled in the art. It should be apparent to those skilled in the art that the invention can be implemented in other forms, structures, arrangements, proportions, and with other components, materials, and parts without departing from the spirit or essential characteristics of the invention. Other variations and modifications can be made to the embodiments disclosed herein without departing from the scope and spirit of the invention.

Claims

1. A linear Hall sensor, characterized in that, The linear Hall sensor includes: Hall effect film; A chopper modulation switch circuit is connected to the Hall plate to chopper modulate the output voltage in the two diagonal directions of the Hall plate, and modulates the original low-frequency Hall signal to the frequency of the chopper clock and its odd harmonics. The first-stage instrumentation amplifier is connected to the chopper modulation switch circuit to amplify the differential Hall voltage signal that has been chopper-modulated by the chopper modulation switch circuit. The first-stage instrumentation amplifier includes a first operational amplifier, a second operational amplifier, and a first resistor network. The first operational amplifier and the second operational amplifier are respectively connected to the first resistor network. The chopper demodulation switch circuit is connected to the first-stage instrumentation amplifier to demodulate the modulated signal amplified by the first-stage instrumentation amplifier, and to move the amplified Hall voltage signal back to the baseband so that the real magnetic field signal is restored to its original low-frequency form, while the offset and noise signals are modulated to a higher frequency band. The high-frequency components are filtered out by a low-pass filter to obtain the amplified Hall voltage signal. The second-stage instrumentation amplifier is connected to the chopper demodulation switch circuit to further amplify the Hall voltage signal obtained by the chopper demodulation switch circuit, thereby obtaining a voltage amplification factor that varies with temperature; the second-stage instrumentation amplifier includes a third operational amplifier and a second resistor network, wherein the third operational amplifier is connected to the second resistor network. By setting the type and / or value of the resistors in the first and second resistor networks, the voltage amplification factor of the first-stage instrumentation amplifier and the second-stage instrumentation amplifier changes with temperature, thereby offsetting the temperature coefficient of the Hall plate itself and ensuring stable sensitivity at different temperatures.

2. The linear Hall sensor according to claim 1, characterized in that: The first resistor network includes a first resistor, a second resistor a, and a second resistor b; The non-inverting input of the first operational amplifier is connected to the output of the chopper modulation switch circuit, and the inverting input of the first operational amplifier is connected to the first terminal of the first resistor and the first terminal of the second resistor a, respectively; the output of the first operational amplifier is connected to the second terminal of the second resistor a and the input of the chopper demodulation switch circuit, respectively. The non-inverting input of the second operational amplifier is connected to the output of the chopper modulation switch circuit, and the inverting input of the second operational amplifier is connected to the second terminal of the first resistor and the first terminal of the second b resistor, respectively; the output of the second operational amplifier is connected to the second terminal of the second b resistor and the input of the chopper demodulation switch circuit, respectively. The second resistor network includes a third a resistor, a third b resistor, a fourth a resistor, and a fourth b resistor; The first end of the fourth resistor a is connected to the output terminal VoA of the chopper demodulation switch circuit, and the first end of the fourth resistor b is connected to the output terminal VoB of the chopper demodulation switch circuit. The first terminal of the third resistor a is connected to the reference voltage VCM; the non-inverting input terminal of the third operational amplifier is connected to the second terminal of the third resistor a and the second terminal of the fourth resistor a, respectively; the inverting input terminal of the third operational amplifier is connected to the first terminal of the third resistor b and the second terminal of the fourth resistor b, respectively; the output terminal of the third operational amplifier is connected to the second terminal of the third resistor b, and the output terminal of the third operational amplifier outputs the output voltage VOUT.

3. The linear Hall sensor according to claim 2, characterized in that: The Hall plate includes a first port H1, a second port H2, a third port H3, and a fourth port H4; the first port H1 and the third port H3 are diagonally arranged, and the second port H2 and the fourth port H4 are diagonally arranged. The linear Hall sensor further includes a first current switch Si1, a second current switch Si2, a third current switch Si3, and a fourth current switch Si4; the first current switch Si1 and the second current switch Si2 are respectively connected to the power supply voltage, and the third current switch Si3 and the fourth current switch Si4 are respectively grounded. The first port H1 is connected to the first current switch Si1, the second port H2 is connected to the second current switch Si2, the third port H3 is connected to the third current switch Si3, and the fourth port H4 is connected to the fourth current switch Si4. The chopper modulation switch circuit includes a first modulation switch Sv1, a second modulation switch Sv2, a third modulation switch Sv3, and a fourth modulation switch Sv4. The first terminal of the first modulation switch Sv1 is connected to the first current switch Si1, and the second terminal of the first modulation switch Sv1 is connected to the non-inverting input terminal of the first operational amplifier. The first terminal of the second modulation switch Sv2 is connected to the second current switch Si2, and the second terminal of the second modulation switch Sv2 is connected to the non-inverting input terminal of the first operational amplifier. The first terminal of the third modulation switch Sv3 is connected to the third current switch Si3, and the second terminal of the third modulation switch Sv3 is connected to the non-inverting input terminal of the second operational amplifier. The first terminal of the fourth modulation switch Sv4 is connected to the fourth current switch Si4, and the second terminal of the fourth modulation switch Sv4 is connected to the non-inverting input terminal of the second operational amplifier. The chopper demodulation switch circuit includes a first demodulation switch K1, a second demodulation switch K2, a third demodulation switch K3 and a fourth demodulation switch K4, a first buffer, a second buffer, a third buffer, a fourth buffer and an RC filter circuit; The first terminal of the first demodulation switch K1 is connected to the output terminal of the first operational amplifier, and the second terminal of the first demodulation switch K1 is connected to the first terminal of the first buffer. The first terminal of the second demodulation switch K2 is connected to the output terminal of the first operational amplifier, and the second terminal of the second demodulation switch K2 is connected to the first terminal of the second buffer. The first terminal of the third demodulation switch K3 is connected to the output terminal of the second operational amplifier, and the second terminal of the third demodulation switch K3 is connected to the first terminal of the third buffer. The first terminal of the fourth demodulation switch K4 is connected to the output terminal of the second operational amplifier, and the second terminal of the fourth demodulation switch K4 is connected to the first terminal of the fourth buffer. The second ends of the first buffer, the second buffer, the third buffer, and the fourth buffer are respectively connected to an RC filter circuit. The chopper modulation switch circuit and the chopper demodulation switch circuit work synchronously, and the working state of each switch in the chopper modulation switch circuit corresponds one-to-one with the working state of the corresponding switch in the chopper demodulation switch circuit.

4. The linear Hall sensor according to claim 3, characterized in that: The second resistor a and the second resistor b have the same resistance value; the third resistor a and the third resistor b have the same resistance value; and the fourth resistor a and the fourth resistor b have the same resistance value. The second resistor a, the second resistor b, the third resistor a, and the third resistor b are resistors with low temperature coefficients; the first resistor, the fourth resistor a, and the fourth resistor b are resistors with negative temperature coefficients. The resistance of the first resistor is R1, the resistance of the second resistor a and the second resistor b is R2, the resistance of the third resistor a and the third resistor b is R3, and the resistance of the fourth resistor a and the fourth resistor b is R4. The amplification factor of the first-stage instrumentation amplifier is G1 = (1 + 2 * R2 / R1); The second-stage instrumentation amplifier amplifies the differential voltage VoA-VoB output from the chopper demodulation switching circuit by a factor of R3 / R4, adds VCM, and outputs it to the output terminal, i.e., VOUT=VCM+(VoA-VoB)*R3 / R4; The non-inverting input of the first operational amplifier is connected to the first output VH1 and the second output VH2 of the chopper modulation switch circuit, and the inverting input of the first operational amplifier is connected to the first resistor network; the first output VH1 is connected to the second terminal of the first modulation switch Sv1, and the second output VH2 is connected to the second terminal of the second modulation switch Sv2. The non-inverting input of the second operational amplifier is connected to the third output VH3 and the fourth output VH4 of the chopper modulation switch circuit, and the inverting input of the second operational amplifier is also connected to the first resistor network; the third output VH3 is connected to the second terminal of the third modulation switch Sv3, and the fourth output VH4 is connected to the second terminal of the fourth modulation switch Sv4. The output terminal VoA of the RC filter circuit is connected to the first terminal of the fourth resistor a, and the output terminal VoB of the RC filter circuit is connected to the first terminal of the fourth resistor b; the output voltage of the output terminal VoA is VoA=G1*(VH2+VH3) / 2, and the output voltage of the output terminal VoB is VoB=G1*(VH1+VH4) / 2; the chopper demodulation switch circuit restores the amplified Hall voltage signal and filters out noise and offset signals.

5. The linear Hall sensor according to claim 4, characterized in that: The chopper modulation switching circuit modulates the Hall voltages in two mutually perpendicular directions of the Hall plate, dividing them into two phases, namely the zero phase Φ0 and the first phase Φ1. At the zero phase Φ0, the first current switch Si1 and the third current switch Si3 are turned on, and the second current switch Si2 and the fourth current switch Si4 are turned off, generating a current from the power supply voltage VDD to ground, which flows through the Hall plate along the direction from the first port H1 to the third port H3. At this time, the Hall plate generates a Hall voltage along the direction from the second port H2 to the fourth port H4 under the action of the magnetic field. In the first phase Φ1, the second current switch Si2 and the fourth current switch Si4 are turned on, and the first current switch Si1 and the third current switch Si3 are turned off, generating a current along the direction from the second port H2 to the fourth port H4. After flowing through the Hall plate, a Hall voltage is generated along the direction from the third port H3 to the first port H1 under the action of the magnetic field. Under the same magnetic field strength, the Hall voltages at the zero phase Φ0 and the first phase Φ1 are equal in magnitude but opposite in direction. The zero-point drift caused by the Hall plate and operational amplifier misalignment is eliminated by chopping.

6. The linear Hall sensor according to claim 2, characterized in that: The Hall plate is a square N-well resistor sheet integrated on a wafer, used perpendicular to the magnetic field direction. After current flows through one horizontal diagonal direction, it outputs a differential Hall voltage generated by the Hall effect under the action of the magnetic field in the other diagonal direction. The second a resistor, the second b resistor, the third a resistor, and the third b resistor are P+ polycrystalline silicon resistors.

7. A temperature compensation method for a linear Hall sensor, the temperature compensation method comprising: The chopper modulation switching circuit chopper modulates the output voltage of the Hall plate of the linear Hall sensor in two diagonal directions, modulating the original low-frequency Hall signal onto the frequency of the chopper clock and its odd harmonics. The first-stage instrumentation amplifier amplifies the differential Hall voltage signal that has been chopped and modulated by the chopper modulation switching circuit. The first-stage instrumentation amplifier includes a first operational amplifier, a second operational amplifier, and a first resistor network. The first operational amplifier and the second operational amplifier are respectively connected to the first resistor network. The chopper demodulation switch circuit demodulates the modulated signal amplified by the first-stage instrumentation amplifier, and moves the amplified Hall voltage signal back to the baseband, so that the real magnetic field signal is restored to its original low-frequency form, while the offset and noise signals are modulated to a higher frequency band. The high-frequency components are filtered out by a low-pass filter to obtain a pure amplified Hall voltage signal. The second-stage instrumentation amplifier further amplifies the Hall voltage signal obtained by the chopper demodulation switching circuit to obtain a voltage amplification factor that varies with temperature; the second-stage instrumentation amplifier includes a third operational amplifier and a second resistor network, wherein the third operational amplifier is connected to the second resistor network; The types and / or values ​​of the resistors in the first and second resistor networks are configured such that the voltage amplification factor of the Hall voltage signal as a function of temperature cancels out the Hall voltage change caused by the temperature coefficient of the Hall plate itself.

8. The temperature compensation method according to claim 7, characterized in that: The first resistor network includes a first resistor, a second resistor a, and a second resistor b; The non-inverting input of the first operational amplifier is connected to the output of the chopper modulation switch circuit, and the inverting input of the first operational amplifier is connected to the first terminal of the first resistor and the first terminal of the second resistor a, respectively; the output of the first operational amplifier is connected to the second terminal of the second resistor a and the input of the chopper demodulation switch circuit, respectively. The non-inverting input of the second operational amplifier is connected to the output of the chopper modulation switch circuit, and the inverting input of the second operational amplifier is connected to the second terminal of the first resistor and the first terminal of the second b resistor, respectively; the output of the second operational amplifier is connected to the second terminal of the second b resistor and the input of the chopper demodulation switch circuit, respectively. The second resistor network includes a third a resistor, a third b resistor, a fourth a resistor, and a fourth b resistor; The first end of the fourth resistor a is connected to the output terminal VoA of the chopper demodulation switch circuit, and the first end of the fourth resistor b is connected to the output terminal VoB of the chopper demodulation switch circuit. The first terminal of the third resistor a is connected to the reference voltage VCM; the non-inverting input terminal of the third operational amplifier is connected to the second terminal of the third resistor a and the second terminal of the fourth resistor a, respectively; the inverting input terminal of the third operational amplifier is connected to the first terminal of the third resistor b and the second terminal of the fourth resistor b, respectively; the output terminal of the third operational amplifier is connected to the second terminal of the third resistor b, and the output terminal of the third operational amplifier outputs the output voltage VOUT.

9. The temperature compensation method according to claim 8, characterized in that: The Hall plate includes a first port H1, a second port H2, a third port H3, and a fourth port H4; the first port H1 and the third port H3 are diagonally arranged, and the second port H2 and the fourth port H4 are diagonally arranged. The linear Hall sensor further includes a first current switch Si1, a second current switch Si2, a third current switch Si3, and a fourth current switch Si4; the first current switch Si1 and the second current switch Si2 are respectively connected to the power supply voltage, and the third current switch Si3 and the fourth current switch Si4 are respectively grounded. The first port H1 is connected to the first current switch Si1, the second port H2 is connected to the second current switch Si2, the third port H3 is connected to the third current switch Si3, and the fourth port H4 is connected to the fourth current switch Si4. The chopper modulation switch circuit includes a first modulation switch Sv1, a second modulation switch Sv2, a third modulation switch Sv3, and a fourth modulation switch Sv4. The first terminal of the first modulation switch Sv1 is connected to the first current switch Si1, and the second terminal of the first modulation switch Sv1 is connected to the non-inverting input terminal of the first operational amplifier. The first terminal of the second modulation switch Sv2 is connected to the second current switch Si2, and the second terminal of the second modulation switch Sv2 is connected to the non-inverting input terminal of the first operational amplifier. The first terminal of the third modulation switch Sv3 is connected to the third current switch Si3, and the second terminal of the third modulation switch Sv3 is connected to the non-inverting input terminal of the second operational amplifier. The first terminal of the fourth modulation switch Sv4 is connected to the fourth current switch Si4, and the second terminal of the fourth modulation switch Sv4 is connected to the non-inverting input terminal of the second operational amplifier. The chopper demodulation switch circuit includes a first demodulation switch K1, a second demodulation switch K2, a third demodulation switch K3 and a fourth demodulation switch K4, a first buffer, a second buffer, a third buffer, a fourth buffer and an RC filter circuit; The first terminal of the first demodulation switch K1 is connected to the output terminal of the first operational amplifier, and the second terminal of the first demodulation switch K1 is connected to the first terminal of the first buffer. The first terminal of the second demodulation switch K2 is connected to the output terminal of the first operational amplifier, and the second terminal of the second demodulation switch K2 is connected to the first terminal of the second buffer. The first terminal of the third demodulation switch K3 is connected to the output terminal of the second operational amplifier, and the second terminal of the third demodulation switch K3 is connected to the first terminal of the third buffer. The first terminal of the fourth demodulation switch K4 is connected to the output terminal of the second operational amplifier, and the second terminal of the fourth demodulation switch K4 is connected to the first terminal of the fourth buffer. The second ends of the first buffer, the second buffer, the third buffer, and the fourth buffer are respectively connected to an RC filter circuit. The chopper modulation switch circuit and the chopper demodulation switch circuit work synchronously, and the working state of each switch in the chopper modulation switch circuit corresponds one-to-one with the working state of the corresponding switch in the chopper demodulation switch circuit.

10. The temperature compensation method according to claim 9, characterized in that: The second resistor a and the second resistor b have the same resistance value; the third resistor a and the third resistor b have the same resistance value; and the fourth resistor a and the fourth resistor b have the same resistance value. The second resistor a, the second resistor b, the third resistor a, and the third resistor b are resistors with low temperature coefficients; the first resistor, the fourth resistor a, and the fourth resistor b are resistors with negative temperature coefficients. The resistance of the first resistor is R1, the resistance of the second resistor a and the second resistor b is R2, the resistance of the third resistor a and the third resistor b is R3, and the resistance of the fourth resistor a and the fourth resistor b is R4. The amplification factor of the first-stage instrumentation amplifier is G1 = (1 + 2 * R2 / R1); The second-stage instrumentation amplifier amplifies the differential voltage VoA-VoB output from the chopper demodulation switching circuit by a factor of R3 / R4, adds VCM, and outputs it to the output terminal, i.e., VOUT=VCM+(VoA-VoB)*R3 / R4; The non-inverting input of the first operational amplifier is connected to the first output VH1 and the second output VH2 of the chopper modulation switch circuit, and the inverting input of the first operational amplifier is connected to the first resistor network; the first output VH1 is connected to the second terminal of the first modulation switch Sv1, and the second output VH2 is connected to the second terminal of the second modulation switch Sv2. The non-inverting input of the second operational amplifier is connected to the third output VH3 and the fourth output VH4 of the chopper modulation switch circuit, and the inverting input of the second operational amplifier is also connected to the first resistor network; the third output VH3 is connected to the second terminal of the third modulation switch Sv3, and the fourth output VH4 is connected to the second terminal of the fourth modulation switch Sv4. The output terminal VoA of the RC filter circuit is connected to the first terminal of the fourth resistor a, and the output terminal VoB of the RC filter circuit is connected to the first terminal of the fourth resistor b; the output voltage of the output terminal VoA is VoA=G1*(VH2+VH3) / 2, and the output voltage of the output terminal VoB is VoB=G1*(VH1+VH4) / 2; the chopper demodulation switch circuit restores the amplified Hall voltage signal and filters out noise and offset signals; The chopper modulation switching circuit modulates the Hall voltages in two mutually perpendicular directions of the Hall plate, dividing them into two phases, namely the zero phase Φ0 and the first phase Φ1. At the zero phase Φ0, the first current switch Si1 and the third current switch Si3 are turned on, and the second current switch Si2 and the fourth current switch Si4 are turned off, generating a current from the power supply voltage VDD to ground, which flows through the Hall plate along the direction from the first port H1 to the third port H3. At this time, the Hall plate generates a Hall voltage along the direction from the second port H2 to the fourth port H4 under the action of the magnetic field. In the first phase Φ1, the second current switch Si2 and the fourth current switch Si4 are turned on, and the first current switch Si1 and the third current switch Si3 are turned off, generating a current along the direction from the second port H2 to the fourth port H4. After flowing through the Hall plate, a Hall voltage is generated along the direction from the third port H3 to the first port H1 under the action of the magnetic field. Under the same magnetic field strength, the Hall voltages at the zero phase Φ0 and the first phase Φ1 are equal in magnitude but opposite in direction. The zero-point drift caused by the Hall plate and operational amplifier misalignment is eliminated by chopping.

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