Data processing method and device, electronic equipment and readable medium

Abstract

The embodiment of the invention provides a data processing method and device, electronic equipment and a readable medium, and relates to the technical field of computers.The method comprises the steps that an instruction set of software to be executed is obtained to cooperate as a target instruction set; the target instruction set comprises a pre-inserted specific instruction and an instruction obtained after compiling the to-be-executed software. In the execution process of the target instruction set, if any specific instruction is executed, the specific performance counter is accessed in response to the specific instruction, and the value of the specific performance counter is obtained to serve as the value of the target counter. The specific performance counter is determined based on the specified control register and configuration information carried by the specific instruction, the specified control register comprises a first enable bit used for indicating the specific performance counter, and the configuration information comprises a performance counter identifier used for indicating the specific performance counter. Generating performance event data based on the target counter value; the performance event data includes a target counter value. Therefore, the accuracy of the performance event data is improved.

Description

Technical Field

[0001] This invention relates to the field of computer technology, and in particular to a data processing method, apparatus, electronic device, and readable medium. Background Technology

[0002] Currently, with the continuous development of computer technology, software is being used more and more widely. To ensure the normal operation of software, it is often necessary to observe software behavior in order to better understand the software's operating status, analyze performance bottlenecks, and optimize it.

[0003] In related technologies, performance event data is an important source of information that reflects the performance of software during operation. How to obtain performance event data has become an urgent technical problem to be solved. Summary of the Invention

[0004] This invention provides a data processing method, apparatus, electronic device, and readable medium that can solve the problem of how to obtain performance event data.

[0005] To address the above problems, this invention discloses a data processing method, the method comprising: Obtain the instruction set of the software to be executed as the target instruction set; the target instruction set includes pre-inserted specific instructions and instructions obtained after compiling the software to be executed; During the execution of the target instruction set, if any of the specific instructions is executed, a specific performance counter is accessed in response to the specific instruction, and the value of the specific performance counter is obtained as the target counter value. The specific performance counter is determined based on a designated control register and the configuration information carried by the specific instruction. The designated control register includes a first enable bit for indicating the specific performance counter, and the configuration information includes a performance counter identifier for indicating the specific performance counter. Based on the target counter value, performance event data is generated; the performance event data includes the target counter value.

[0006] Optionally, generating performance event data based on the target counter value includes: The system retrieves the current timestamp, the address of the instruction to be executed, and generates source information for the target counter value; the source information is used to characterize the source of the target counter value. The performance event data is generated based on the current timestamp, the current address of the instruction to be executed, the target counter value, and the source information.

[0007] Optionally, the method further includes: determining the specific performance counter from performance counters provided by the electronic device; The step of generating source information for the target counter value includes: Determine the acquisition identifier corresponding to each of the performance counters, and compose the source information based on all the acquisition identifiers; the acquisition identifier corresponding to each performance counter indicates whether the target counter value includes the value of the performance counter.

[0008] Optionally, determining the specific performance counter from the performance counters provided by the electronic device includes: Obtain the value of the first enable bit in the specified control register; the first enable bit includes bits corresponding to each of the performance counters, and the value of the first enable bit is used to indicate whether to obtain the value of the corresponding performance counter; The value is used to represent the performance counter corresponding to the first enable bit obtained, and is determined as the specific performance counter; Alternatively, extract the value of the performance counter identifier from the configuration information carried by the specific instruction; the performance counter identifier includes the identifier corresponding to each performance counter, and the value of the identifier is used to indicate whether to obtain the value of the corresponding performance counter; The numerical value is used to represent the performance counter corresponding to the acquired identifier, and is determined as the specific performance counter.

[0009] Optionally, the method further includes: Extract the value of the timestamp identifier from the configuration information carried by the specific instruction, or obtain the value of the second enable bit in the specified control register; the value is used to indicate whether to record the current timestamp. The step of obtaining the current timestamp includes: obtaining the current timestamp when the numerical representation is being recorded.

[0010] Optionally, the step of accessing a specific performance counter in response to the specific instruction to obtain the current value of the specific performance counter includes: Based on the value of the third enable bit in the specified control register, determine the currently enabled privilege level as the enabled privilege level; If the privilege level of the specific instruction is not higher than the enabled privilege level, the specific performance counter is accessed in response to the specific instruction, and the value of the specific performance counter is obtained. The method further includes: if the privilege level of the specific instruction is higher than the enabled privilege level, not responding to the specific instruction.

[0011] Optionally, the specific instruction is a performance event data retrieval instruction.

[0012] On the other hand, embodiments of the present invention disclose a data processing apparatus, the apparatus comprising: The first acquisition module is used to acquire the instruction set of the software to be executed as the target instruction set; the target instruction set includes pre-inserted specific instructions and instructions obtained after compiling the software to be executed; The second acquisition module is configured to, during the execution of the target instruction set, if any of the specific instructions is executed, access a specific performance counter in response to the specific instruction and acquire the value of the specific performance counter as the target counter value; the specific performance counter is determined based on a specified control register and configuration information carried by the specific instruction, the specified control register includes a first enable bit for indicating the specific performance counter, and the configuration information includes a performance counter identifier for indicating the specific performance counter; A generation module is used to generate performance event data based on the target counter value; the performance event data includes the target counter value.

[0013] Optionally, the generation module is specifically used for: The system retrieves the current timestamp, the address of the instruction to be executed, and generates source information for the target counter value; the source information is used to characterize the source of the target counter value. The performance event data is generated based on the current timestamp, the current address of the instruction to be executed, the target counter value, and the source information.

[0014] Optionally, the apparatus further includes: a determining module, configured to determine the specific performance counter from performance counters provided by the electronic device; The generation module is further configured to: Determine the acquisition identifier corresponding to each of the performance counters, and compose the source information based on all the acquisition identifiers; the acquisition identifier corresponding to each performance counter indicates whether the target counter value includes the value of the performance counter.

[0015] Optionally, the determining module is specifically used for: Obtain the value of the first enable bit in the specified control register; the first enable bit includes bits corresponding to each of the performance counters, and the value of the first enable bit is used to indicate whether to obtain the value of the corresponding performance counter; The value is used to represent the performance counter corresponding to the first enable bit obtained, and is determined as the specific performance counter; Alternatively, extract the value of the performance counter identifier from the configuration information carried by the specific instruction; the performance counter identifier includes the identifier corresponding to each performance counter, and the value of the identifier is used to indicate whether to obtain the value of the corresponding performance counter; The numerical value is used to represent the performance counter corresponding to the acquired identifier, and is determined as the specific performance counter.

[0016] Optionally, the device further includes: The first processing module is used to extract the value of the timestamp identifier from the configuration information carried by the specific instruction, or to obtain the value of the second enable bit in the specified control register; the value is used to indicate whether to record the current timestamp. The generation module is further configured to: obtain the current timestamp when the numerical representation is recorded.

[0017] Optionally, the second acquisition module is specifically used for: Based on the value of the third enable bit in the specified control register, determine the currently enabled privilege level as the enabled privilege level; If the privilege level of the specific instruction is not higher than the enabled privilege level, the specific performance counter is accessed in response to the specific instruction, and the value of the specific performance counter is obtained. If the privilege level of the specific instruction is higher than the enabled privilege level, the specific instruction will not be responded to.

[0018] Optionally, the specific instruction is a performance event data retrieval instruction.

[0019] In another aspect, embodiments of the present invention disclose an electronic device, including: a processor, a memory, a communication interface, and a communication bus, wherein the processor, the memory, and the communication interface communicate with each other through the communication bus; the memory is used to store at least one executable instruction, the executable instruction causing the processor to execute the aforementioned method.

[0020] This invention also discloses a machine-readable medium storing instructions that, when executed by one or more processors, cause the processors to perform the methods described above.

[0021] The embodiments of the present invention have the following advantages: In the data processing method provided by the embodiments of the present invention, the instruction set of the software to be executed is obtained as the target instruction set; the target instruction set includes pre-inserted specific instructions and instructions obtained after compiling the software to be executed. During the execution of the target instruction set, if any specific instruction is executed, a specific performance counter is accessed in response to the specific instruction, and the value of the specific performance counter is obtained as the target counter value. The specific performance counter is determined based on a specified control register and configuration information carried by the specific instruction. The specified control register includes a first enable bit for indicating the specific performance counter, and the configuration information includes a performance counter identifier for indicating the specific performance counter. Performance event data is generated based on the target counter value; the performance event data includes the target counter value. In this way, by using pre-inserted specific instructions, the value of the specific performance counter is obtained once each time a specific instruction is executed, and corresponding performance event data is generated, thus realizing the acquisition of performance event data. At the same time, since no additional code instrumentation is required, and performance event data is generated by accessing the value of the specific performance counter of the hardware through a single inserted specific instruction, additional interference can be reduced and the accuracy of performance event data can be improved. Attached Figure Description

[0022] To more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the description of the embodiments of the present invention will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0023] Figure 1 This is a flowchart of the steps of a data processing method provided in an embodiment of the present invention; Figure 2 This is a block diagram of a data processing device provided in an embodiment of the present invention; Figure 3 This is a schematic diagram of the structure of an electronic device provided in an embodiment of the present invention. Detailed Implementation

[0024] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0025] Figure 1 This is a flowchart of the steps of a data processing method provided in an embodiment of the present invention, as follows: Figure 1As shown, the data processing method may include the following steps: Step 101: Obtain the instruction set of the software to be executed as the target instruction set; the target instruction set includes pre-inserted specific instructions and instructions obtained after compiling the software to be executed.

[0026] Step 102: During the execution of the target instruction set, if any of the specific instructions is executed, a specific performance counter is accessed in response to the specific instruction, and the value of the specific performance counter is obtained as the target counter value. The specific performance counter is determined based on a designated control register and the configuration information carried by the specific instruction. The designated control register includes a first enable bit for indicating the specific performance counter, and the configuration information includes a performance counter identifier for indicating the specific performance counter.

[0027] Step 103: Generate performance event data based on the target counter value; the performance event data includes the target counter value.

[0028] The data processing method provided in this invention can be applied to electronic devices, and the executable software can be any software that runs on the electronic device. The instruction set of the executable software includes instructions obtained after compiling the executable software (hereinafter referred to as raw instructions) and inserted specific instructions. Raw instructions can be obtained by compiling the source code of the executable software, and the compiled raw instructions form the raw instruction set. Specific instructions are inserted into the raw instruction set. For example, a specific instruction can be inserted in advance at the location to be observed. Correspondingly, during execution, when the enabled specific instruction is submitted, performance event data containing the value of a specific performance counter will be generated. The specific instruction can be an instruction used to instruct the electronic device to access the specific performance counter, obtain the value of the specific performance counter, and thereby generate performance event data including the performance counter value. Optionally, the specific instruction can be a performance event data acquisition instruction; specifically, a performance event data acquisition instruction adapted to the architecture of the executable software can be selected. When the executable software needs to be run, the instruction set of the executable software can be loaded from a specified location to obtain the target instruction set. Then, the target instruction set is executed. Accordingly, during the execution of the target instruction set, if a specific instruction is executed, it will trigger the operation of accessing a specific performance counter, obtaining the target counter value, and then generating performance event data. In other words, for a specific instruction that is inserted, a performance event data will be generated.

[0029] Furthermore, since the specific instructions are machine instructions, the performance counter can be used to count the number of performance events. Correspondingly, as the program runs continuously, the value of the performance counter can represent the current number of performance events, reflecting real-time performance event information. Specifically, the performance counter can correspond to a performance monitoring configuration register, which can be configured to set the performance events counted by the performance counter. For example, for any performance counter, the corresponding performance monitoring configuration register can include multiple bits, each representing a performance event. During configuration, the bits corresponding to the performance events to be observed that need to be counted by the performance counter can be enabled according to actual needs, for example, setting the bits corresponding to the performance events to be observed to 1. This allows control over the performance counter to count the required performance events. Specifically, it can count the number of occurrences of the required performance events; that is, the current value of the performance counter can represent the current number of counted performance events, thus reflecting the execution status of these performance events. For example, the number of performance events can include cache hits, hardware prefetches (to facilitate analysis of hardware resource usage), cross-cache line accesses, branch prediction failures, etc., thus providing important reference for software behavior observation.

[0030] A specific performance counter can be some or all of the performance counters provided by an electronic device. Specifically, the performance counters provided by the electronic device can refer to running performance counters, also known as performance monitor counters (PMCs). Performance counters are directly supported by hardware. In practical applications, electronic devices provide multiple performance counters, and a specified number of performance counters can run simultaneously. For example, if an electronic device provides 10 performance counters, 4 of them can run concurrently. These 4 running performance counters can be used as specific performance counters, either all or some. That is, when generating performance event data, one can obtain the current number of performance events counted by all running performance counters, or one can obtain the current number of performance events counted by only some running performance counters.

[0031] To optimize software, it is often necessary to monitor the number of performance events. Therefore, in this embodiment of the invention, by obtaining the value of a specific performance counter as the target counter value, performance event data including the target counter value is generated. This allows for convenient software optimization based on the generated performance event data. Performance event data refers to data related to performance events; it can also be called performance event trace data, trace records, or monitoring data.

[0032] In summary, the data processing method provided in this embodiment of the invention obtains the instruction set of the software to be executed as the target instruction set. The target instruction set includes pre-inserted specific instructions and instructions obtained after compiling the software to be executed. During the execution of the target instruction set, if any specific instruction is executed, a specific performance counter is accessed in response to the specific instruction, and the value of the specific performance counter is obtained as the target counter value. The specific performance counter is determined based on a specified control register and configuration information carried by the specific instruction. The specified control register includes a first enable bit for indicating the specific performance counter, and the configuration information includes a performance counter identifier for indicating the specific performance counter. Performance event data is generated based on the target counter value; the performance event data includes the target counter value. In this way, by using pre-inserted specific instructions, the value of the specific performance counter is obtained once each time a specific instruction is executed, and corresponding performance event data is generated, thus realizing the acquisition of performance event data. At the same time, since no additional code instrumentation is required, and performance event data is generated by accessing the value of the specific performance counter of the hardware through a single inserted specific instruction, additional interference can be reduced, and the accuracy of the performance event data can be improved.

[0033] Optionally, the step of generating performance event data based on the target counter value in the embodiments of the present invention may specifically include: Step 1031: Obtain the current timestamp, obtain the address of the current instruction to be executed, and generate source information for the target counter value; the source information is used to characterize the source of the target counter value.

[0034] Step 1032: Generate the performance event data based on the current timestamp, the current address of the instruction to be executed, the target counter value, and the source information.

[0035] The execution order of obtaining the current timestamp, obtaining the address of the instruction to be executed, and generating source information for the target counter value is not unique. For example, they can be executed synchronously or sequentially. For instance, the current timestamp can be obtained first, followed by the address of the instruction to be executed, and then the source information can be generated. Alternatively, the address of the instruction to be executed can be obtained first, followed by the current timestamp, and then the source information can be generated. Or, the source information can be generated first, followed by the address of the instruction to be executed, and then the current timestamp. This embodiment of the invention does not impose any restrictions on this.

[0036] Specifically, the address of the instruction to be executed can be obtained from the Program Counter (PC), and the current timestamp can be obtained from the Time Stamp Counter (TSC). The current timestamp can be used to identify the generation time of the performance event data, facilitating subsequent analysis. Furthermore, the address of the instruction to be executed can serve as an identifier of the current location, allowing subsequent analysis to distinguish the location of the performance event data based on this address. Of course, other methods can also be used to represent the location of the performance event data; this embodiment of the invention does not limit this. Furthermore, since a specific performance register value is part or all of the running performance counters—that is, the target counter value is the value counted by part or all of the running performance counters, and the target counter value includes the values ​​of one or more performance counters—source information can be generated for the target counter value. This source information can specifically characterize which performance counters the target counter value originates from. This facilitates accurate and convenient identification of the source of the target counter value in the performance event data during subsequent analysis.

[0037] In this embodiment of the invention, performance event data may include a current timestamp, source information, the address of the instruction to be executed, and a target counter value. The current timestamp, source information, the address of the instruction to be executed, and the target counter value can be combined into a single performance event data entry according to a preset format. For example, the preset format may be: the current timestamp, source information, the address of the instruction to be executed, and the target counter value are arranged sequentially from least significant bit to most significant bit. For example, the value of a performance counter occupies 32 bits, the address of the instruction to be executed occupies 48 bits, the current timestamp occupies 28 bits, the source information occupies 4 bits, and the target counter value includes the value of one performance counter, i.e., the specific performance counter is one of the running performance counters. Accordingly, the generated performance event data can be as shown in Table 1 below:

[0038] Table 1 It should be noted that in this example, the target counter value includes only one performance counter value. When the target counter value includes multiple performance counter values, the corresponding values ​​can be recorded starting from bit 112 and extending to the higher bits. Specifically, the bit width occupied by the target counter value in the performance event data can include 32×m, where m represents the number of specific performance counters corresponding to a specific instruction. Of course, in specific implementations, other required data can also be obtained, and performance event data including the current timestamp, source information, current address of the instruction to be executed, target counter value, and other required data can be generated. This embodiment of the invention does not limit this.

[0039] In this embodiment of the invention, the current timestamp, the address of the instruction to be executed, and source information for the target counter value are obtained. The source information characterizes the origin of the target counter value. Performance event data is generated based on the current timestamp, the address of the instruction to be executed, the target counter value, and the source information. This allows the performance event data to convey diverse information, thereby providing a more effective reference for subsequent performance analysis.

[0040] Optionally, embodiments of the present invention may further include the following steps: Step S21, determining the specific performance counter from the performance counters provided by the electronic device. Correspondingly, the step of generating source information for the target counter value may specifically include: Step 1031a: Determine the acquisition identifier corresponding to each of the performance counters, and compose the source information based on all the acquisition identifiers; the acquisition identifier corresponding to the performance counter indicates whether the target counter value includes the value of the performance counter.

[0041] Specifically, a specific performance counter can be determined from the running performance counters provided by the electronic device. For example, a performance counter enabled in a specific control register can be identified as a specific performance counter. Alternatively, a specific performance counter can be determined based on a performance counter identifier carried in a specific instruction.

[0042] Accordingly, a corresponding acquisition identifier can be determined for each running performance counter provided by the electronic device. The acquisition identifier can be a first identifier and a second identifier, where the first identifier indicates that the target counter value includes the value of the performance counter, i.e., the value of the performance counter has been acquired this time; the second identifier indicates that the target counter value does not include the value of the performance counter, i.e., the value of the performance counter has not been acquired this time. The specific forms of the first and second identifiers can be set as needed; for example, the first identifier and the second identifier can be 1 and 0, respectively. Specifically, for any running performance counter provided by the electronic device, if the performance counter is determined to be a specific performance counter this time, a first identifier can be set for that performance counter; if the performance counter is not determined to be a specific performance counter this time, a second identifier can be set for that performance counter.

[0043] Furthermore, the acquisition identifiers of each running performance counter can be combined to obtain source information. One bit in the source information corresponds to one running performance counter. Subsequently, a pre-defined correspondence can be used to determine the performance counter represented by each bit in the source information. Then, based on the value of each bit, it can be determined whether the target counter values ​​included in the performance event data include the value of the performance counter represented by that bit. For example, suppose the running performance counters include: performance counter 0, performance counter 1, performance counter 2, and performance counter 3. If performance counter 1 and performance counter 2 are enabled for recording, then performance counter 1 and performance counter 2 can be identified as specific performance counters. Accordingly, in response to this specific instruction, the system will extract the values ​​of the enabled performance counter 1 and performance counter 2 to generate performance event data including the values ​​of performance counter 1 and performance counter 2. Accordingly, the acquisition identifiers for each running performance counter can be represented as 0, 1, 1, and 0, respectively. These can be combined to form the source information: 0110. 0110 can represent: the value of performance counter 0 (corresponding to the first bit) was not acquired this time; the value of performance counter 1 (corresponding to the second bit) was acquired this time; the value of performance counter 2 (corresponding to the third bit) was acquired this time; and the value of performance counter 3 (corresponding to the fourth bit) was not acquired this time.

[0044] In this embodiment of the invention, a specific performance counter is determined from the performance counters provided by the electronic device. An acquisition identifier corresponding to each performance counter is determined, and based on the source information composed of all acquisition identifiers, the acquisition identifier corresponding to the performance counter indicates whether the target counter value includes the value of that performance counter. This allows for convenient differentiation of which performance counters the counter values ​​included in a performance event data point originate from, based on the acquisition identifier, thus improving the convenience of subsequent analysis operations.

[0045] Optionally, the step of determining the specific performance counter from the performance counters provided by the electronic device may specifically include: Step S21a: Obtain the value of the first enable bit in the specified control register; the first enable bit includes bits corresponding to each of the performance counters, and the value of the first enable bit is used to indicate whether to obtain the value of the corresponding performance counter.

[0046] Step S21b: Use the value to represent the performance counter corresponding to the first enable bit obtained, and determine it as the specific performance counter.

[0047] Alternatively, step S21c extracts the value of the performance counter identifier from the configuration information carried by the specific instruction; the performance counter identifier includes the identifier corresponding to each performance counter, and the value of the identifier is used to indicate whether to obtain the value of the corresponding performance counter.

[0048] Step S21d: Use the value to represent the performance counter corresponding to the acquired identifier, and determine it as the specific performance counter.

[0049] The specified control register can be the specific control register mentioned above. The first enable bit can include at least one bit, where one bit in the first enable bit specifically corresponds to a running performance counter, and correspondingly, one bit in the first enable bit is specifically used to indicate whether recording the corresponding performance counter is enabled. Enabling recording refers to acquiring the value of the performance counter. If the performance counter is not enabled for recording, its value will not be acquired, meaning that the final generated performance event data will not include the value of the performance counter. The value of the first enable bit can be a first value or a second value, where the first value indicates acquisition, i.e., acquiring the value of the corresponding performance counter this time, and the second value indicates non-acquisition, i.e., not acquiring the value of the corresponding performance counter this time. The specific forms of the first and second values ​​can be set as needed; for example, the first and second values ​​can be 1 and 0, respectively. Accordingly, the performance counter corresponding to the bit with a value of 1 in the first enable bit can be determined as a specific performance counter.

[0050] For example, the meaning of each bit in the specified control register can be shown in Table 2 below:

[0051] Table 2 Accordingly, the values ​​of bits 2 through 5 can be obtained to determine the value of the first enable bit. Bits 2 through 5 correspond to performance counters 0, 1, 2, and 3, respectively. Assuming the values ​​of bits 2 through 5 are 0110, it can be determined that performance counters 2 and 3 are enabled this time. Correspondingly, performance counters 1 and 2 can be identified as specific performance counters. This method of determining specific performance counters based on the value of the first enable bit in the specified control register eliminates the need to parse specific instructions to extract the performance counter identifier value, thus simplifying the determination cost of specific performance counters to a certain extent.

[0052] In another implementation, a specific performance counter is determined based on the performance counter identifier in the configuration information carried by a specific instruction, thereby generating corresponding performance event data according to the configuration information. The performance counter identifier may include at least one bit, where one bit in the performance counter identifier specifically corresponds to a running performance counter, and correspondingly, one bit in the performance counter identifier is used to indicate whether recording the corresponding performance counter is enabled. The value of the performance counter identifier can be a first value or a second value. Accordingly, the performance counter corresponding to the bit in the performance counter identifier that is 1 can be determined as the specific performance counter. Specifically, performance counters are accessed using address addressing, and their addresses are adjacent. Therefore, offsets can be specified using immediate values, and different bits in the performance counter identifier can represent different performance counters. Correspondingly, configuration information can be immediate values ​​carried by specific instructions; that is, specific instructions can use instruction encoding methods that carry immediate values. For example, in one implementation, the encoding format of a specific instruction can be as shown in Table 3 below:

[0053] Table 3 Here, si5 represents configuration information, and the definition of si5 can be seen in Table 4 below:

[0054] Table 4 In this method, the performance counter identifier is represented by bits 1-4 of si5, which are the enable recording bits for performance counters 0-3, respectively. Specifically, bit 1 of si5 corresponds to performance counter 0, bit 2 corresponds to performance counter 1, bit 3 corresponds to performance counter 2, and bit 4 corresponds to performance counter 3. Assuming the value of bits 1-4 of si5 is 1100, then performance counter 1 and performance counter 1 can be determined as enabled records. Correspondingly, performance counters 0 and 1 can be identified as specific performance counters. In this method, specific instructions carrying different performance counter identifiers correspond to different specific performance counters. The performance counters that enable records can be adjusted by using the carried performance counter identifiers, providing greater flexibility. Users can insert specific instructions carrying different performance counter identifiers as needed, thereby controlling the generation of performance event data including values ​​of different performance counters. It should be noted that Table 3 above is only an example. In actual scenarios, other implementation methods and instruction encoding methods can be selected according to actual needs. This embodiment of the invention does not impose any restrictions on this.

[0055] Furthermore, when determining the acquisition identifier corresponding to each performance counter, the value of the corresponding bit in the first enable bit can be directly determined as the acquisition identifier corresponding to that performance counter, that is, the value of the first enable bit is determined as the source information. Alternatively, the value of the corresponding bit in the performance counter identifier can be directly determined as the acquisition identifier corresponding to that performance counter, that is, the value of the performance counter identifier is determined as the source information. This can improve the efficiency of source information generation. For example, when generating performance event data, if the specific instruction carries a performance counter identifier, the performance counter identifier can be written as the source information; if the specific instruction does not carry a performance counter identifier, the value of the first enable bit can be written as the source information to indicate the enabling status of the performance counter.

[0056] Optionally, embodiments of the present invention may further include: Step S31: Extract the value of the timestamp identifier from the configuration information carried by the specific instruction, or obtain the value of the second enable bit in the specified control register; the value is used to indicate whether to record the current timestamp.

[0057] Accordingly, obtaining the current timestamp as described above may specifically include: step 1031b, obtaining the current timestamp when the numerical representation is being recorded.

[0058] Specifically, the second enable bit may include a single bit, where one bit of the second enable bit corresponds to the TSC (Timestamp Signature). Accordingly, the second enable bit is specifically used to indicate whether recording the TSC value is enabled. Enabling recording refers to acquiring the TSC value. If recording is not enabled, the TSC value will not be acquired; that is, the final generated performance event data will not include the TSC value, i.e., it will not include the current timestamp. The value of the second enable bit can be either a first value or a second value. For example, the second enable bit can be the 6th bit of a specified control register.

[0059] A timestamp identifier carried in a specific instruction may include a single bit, where each bit of the timestamp identifier corresponds to a TSC (Time Capsule Control). Accordingly, the timestamp identifier is specifically used to indicate whether recording the TSC value is enabled. The value of the timestamp identifier can be a first value or a second value. For example, in the aforementioned example, the 0th bit in si5 is the TSC enabling bit, that is, the timestamp identifier can be the 0th bit of si5.

[0060] Furthermore, if bit 6 of the specified control register is 1, or bit 0 of si5 is 1, then it can be determined that the numerical representation is to be recorded. Accordingly, the current timestamp can be obtained to include the current timestamp in the performance event data. That is, the current timestamp in the performance event data is optional. In other words, when generating performance event data, if the numerical representation is to be recorded, the obtained current timestamp can be written to the corresponding bit; if the numerical representation is not to be recorded, then the timestamp information is not recorded.

[0061] In this embodiment of the invention, the value of the timestamp identifier carried by a specific instruction, or the value of the second enable bit in the control register, determines whether to obtain the current timestamp. In this way, the determination of whether to obtain the current timestamp can be flexibly configured in various ways.

[0062] It should be noted that in this embodiment of the invention, the configuration information can be optional. That is, a specific instruction may or may not carry a performance counter identifier, and a specific instruction may or may not carry a timestamp identifier. Accordingly, specifically, if the configuration information carried by a specific instruction includes a performance counter identifier, the specific performance counter is determined according to steps S21c to S21d described above. If the configuration information carried by a specific instruction does not include a performance counter identifier, the specific performance counter is determined according to steps S21a to S21b described above. In this way, it can be achieved that the specific performance counter for a specific instruction is determined by default according to steps S21a to S21b described above, that is, the specified control register is used as the default configuration. For specific instructions that require personalized configuration, only the performance counter identifier needs to be set in the configuration information carried by these instructions. This reduces the number of instructions that need to have their performance counter identifiers set while maintaining flexibility, thereby improving the insertion efficiency of specific instructions.

[0063] Furthermore, specifically, when a timestamp identifier is included in the configuration information carried by a specific instruction, the value of the timestamp identifier in the configuration information carried by the specific instruction is extracted, and the value of the timestamp identifier is used to determine whether to obtain the current timestamp. For example, if the timestamp identifier is 1, the current timestamp is obtained; otherwise, it is not. If the performance counter identifier is not included in the configuration information carried by a specific instruction, the value of the second enable bit in the specified control register is obtained, and the value of the second enable bit is used to determine whether to obtain the current timestamp. For example, if the second enable bit is 1, the current timestamp is obtained; otherwise, it is not. In this way, the specified control register can be used as the default configuration. For specific instructions that require personalized configuration, only the timestamp identifier needs to be set in the configuration information carried by these instructions, which allows flexible control over whether the performance event data generated for these specific instructions includes the current timestamp. This reduces the number of instructions that need to have timestamp identifiers set while maintaining flexibility, thereby improving the insertion efficiency of specific instructions.

[0064] Optionally, in this embodiment of the invention, the step of accessing a specific performance counter in response to the specific instruction to obtain the value of the specific performance counter may specifically include: Step 1021: Based on the value of the third enable bit in the specified control register, determine the currently enabled privilege level as the enabled privilege level.

[0065] Step 1022: If the privilege level of the specific instruction is not higher than the enabled privilege level, in response to the specific instruction, access the specific performance counter and obtain the value of the specific performance counter.

[0066] The method further includes: step S41, if the privilege level of the specific instruction is higher than the enabled privilege level, not responding to the specific instruction.

[0067] Specifically, the third enable bit can include multiple bits, and the number of binary combinations that can be formed by the bits in the third enable bit is the same as the supported privilege level. For example, the third enable bit includes bits 0 and 1 of the specified control register; correspondingly, four values ​​can be formed using two bits: 00, 01, 10, and 11. 00, 01, 10, and 11 can represent a privilege level: PLV0, PLV1, PLV2, and PLV3, respectively. The smaller the value of the binary combination, the higher the privilege level represented. For example, 00, 01, 10, and 11 can represent kernel mode, system-level first program, system-level second program, and user mode. The system-level first program and system-level second program can be system log monitoring and system resource scheduling, respectively. The privilege level represented by the value of the third enable bit can be determined as the enabled privilege level. Enabling a privilege level means that specific instructions at that privilege level are responded to normally; disabling a privilege level means that specific instructions at that privilege level are treated as No Operation (NOP) instructions and are not responded to. Developers can restrict privilege levels by configuring the first two bits.

[0068] Accordingly, the value of bits 0-1 of the specified control register can be obtained to get the value of the third enable bit. Assuming the value of bits 0-1 is 00, then it can be determined that the privilege level is PLV0.

[0069] Furthermore, the configuration information for a specific instruction may also include information indicating the privilege level of that specific instruction. For example, the configuration information may include an identifier for the privilege level. Assuming the privilege level identifier included in the configuration information for that specific instruction is PLV1, then PLV1 can be determined as the privilege level of that specific instruction. For example, if the instruction set of the software to be executed is based on kernel code, meaning the specific instruction is inserted into the kernel code, an identifier representing kernel mode can be set for that specific instruction. If the instruction set of the software to be executed is based on user-mode code, meaning the specific instruction is inserted into user-mode code, an identifier representing user mode can be set for that specific instruction. Then, the privilege level of the specific instruction is compared with the enabled privilege level. If the privilege level of the specific instruction is not higher than the enabled privilege level, it can be determined that the specific instruction is enabled, and a response can be given to accessing that specific instruction. For example, if the enabled privilege level is PLV3, and the privilege level of the specific instruction is PLV3, then the privilege level of the specific instruction is not higher than the enabled privilege level. Otherwise, it can be determined that the specific instruction is not enabled, and it can be regarded as a NOP instruction, so that no response is made to the specific instruction and no interference is caused to the normal operation of the program.

[0070] In this embodiment of the invention, the currently enabled privilege level is determined based on the value of the third enable bit in the designated control register, and is designated as the enabled privilege level. If the privilege level of a specific instruction is not higher than the enabled privilege level, the specific performance counter is accessed in response to the specific instruction, and its value is obtained. If the privilege level of the specific instruction is higher than the enabled privilege level, no response is given to the specific instruction. In this way, the third enable bit allows for flexible and convenient control over which privilege levels of specific instructions are responded to, improving the flexibility of the solution.

[0071] In this embodiment of the invention, by pre-inserting specific instructions, the value of a performance counter is obtained each time a specific instruction is executed, and corresponding performance event data is generated. In this way, based on the generated performance event data, the software behavior during operation can be observed relatively accurately. Furthermore, as the program runs, multiple performance event data entries can be generated. These performance event data entries are closely related to the code flow and can reflect information related to the code flow. The performance event data includes information provided by the hardware (e.g., the number of performance events provided by the performance counter, the current timestamp provided by the TSC, and the address of the currently pending instruction provided by the program counter), thus reflecting hardware information related to the code flow to a certain extent and providing a reliable reference for software behavior observation.

[0072] One related technique employs software-level instrumentation to insert additional code at specific locations within the executable software. For example, the tool gprof inserts extra code at function entry and exit points during program compilation to collect performance event data such as function call counts and execution times. Alternatively, the Valgrind tool dynamically analyzes binary code at runtime and inserts additional monitoring code to collect performance event data. However, this approach, due to the need for additional code insertion, incurs additional system overhead, interferes with the runtime process, and may alter program behavior and execution timing. Consequently, the obtained performance event data may be inaccurate, hindering precise observation of software behavior.

[0073] In this embodiment of the invention, no instrumentation code is required; only a single specific instruction needs to be inserted. Since the performance counter is directly supported by hardware, inserting a specific instruction to access the performance counter into the instruction set of the software to be executed introduces almost no additional system overhead. This effectively avoids interference with the execution process, prevents changes to program behavior and execution timing, and thus improves the accuracy of performance event data, ensuring precise observation of software behavior. Furthermore, this embodiment eliminates the need to weigh sampling frequency; specific instructions can be inserted as needed. This avoids the limitations of obtaining the current value at a fixed sampling frequency, and also avoids the problems of excessively high sampling frequencies causing system overhead and interference with normal software operation, and excessively low sampling frequencies resulting in incomplete performance event data.

[0074] Furthermore, in this embodiment of the invention, performance event data acquisition instructions developed specifically for that architecture and adapted to that architecture can be used as specific instructions for different architectures. This ensures the versatility of the data processing method, making it applicable to various architectures.

[0075] Optionally, the specific instruction in this embodiment of the invention can be inserted in the following manner: in response to an instruction insertion operation on the target instruction set, insert the specific instruction at the position indicated by the instruction insertion operation in the target instruction set. Alternatively, insert the specific instruction into the target instruction set according to a preset optimization level or a preset insertion flag.

[0076] In this embodiment of the invention, specific instructions can be manually inserted by the user as needed. Specifically, the user can first send an open instruction to control the electronic device to open the target instruction set, and then perform an instruction insertion operation at the location where observation is required. This instruction insertion operation can be a write operation performed at that location. Correspondingly, the electronic device can respond to the instruction insertion operation by inserting a specific instruction at the user-selected write location (i.e., the location indicated by the instruction insertion operation). In this embodiment of the invention, by supporting manual insertion, users can conveniently and flexibly insert specific instructions according to their actual needs.

[0077] Furthermore, in this embodiment of the invention, the insertion of specific instructions is not limited to manual insertion. Instead, specific instructions can be automatically inserted into the code based on preset development tools or compiler plugins. Specifically, optimization levels can be pre-set for the software to be executed in the compiler. Different optimization levels correspond to different compilation options, leading to differences in the content of the compiled target instruction set. Accordingly, the source code of the software to be executed can be compiled according to the pre-set optimization level. Then, based on the compiler plugin, specific instructions can be automatically inserted into specific regions of the final compiled target instruction set. These specific regions can be pre-set as needed. For example, specific regions can include hotspot regions used to implement loops, function calls, or memory access. Alternatively, pre-set insertion markers can be read, with different markers corresponding to different specific regions. For example, insertion marker 1 corresponds to regions implementing loops and function calls, while insertion marker 2 corresponds to regions implementing loops, function calls, and memory access. Accordingly, specific instructions can be automatically inserted into the instructions of the specific regions indicated by the read insertion markers. In this approach, the automated insertion of specific instructions simplifies the development process and makes performance monitoring and code optimization more efficient.

[0078] For example, in this embodiment of the invention, specific instructions can be inserted into the machine instruction section corresponding to a specific code segment. This allows for the observation of the specific code segment, determining the accuracy of software behavior observation, and providing more reliable data support for performance optimization and system tuning. Accordingly, when the specific code segment is executed, performance event data related to that specific code segment can be accurately obtained. Furthermore, specific instructions can be inserted at a fine-grained level, for example, specific instructions can be inserted before and after a function call. This ensures that the final generated performance event data reflects the performance event situation before and after the function call, thereby facilitating subsequent fine-grained analysis of functions and other aspects based on the performance event data.

[0079] Reference Figure 2 The diagram illustrates a block diagram of a data processing apparatus provided in an embodiment of the present invention, such as... Figure 3As shown, the data processing device may specifically include: The first acquisition module 201 is used to acquire the instruction set of the software to be executed as a target instruction set; the target instruction set includes pre-inserted specific instructions and instructions obtained after compiling the software to be executed; The second acquisition module 202 is configured to, during the execution of the target instruction set, if any of the specific instructions is executed, access a specific performance counter in response to the specific instruction, acquire the value of the specific performance counter, and use it as the target counter value; the specific performance counter is determined based on a specified control register and configuration information carried by the specific instruction, the specified control register includes a first enable bit for indicating the specific performance counter, and the configuration information includes a performance counter identifier for indicating the specific performance counter; The generation module 203 is used to generate performance event data based on the target counter value; the performance event data includes the target counter value.

[0080] Optionally, the generation module 203 is specifically used for: The system retrieves the current timestamp, the address of the instruction to be executed, and generates source information for the target counter value; the source information is used to characterize the source of the target counter value. The performance event data is generated based on the current timestamp, the current address of the instruction to be executed, the target counter value, and the source information.

[0081] Optionally, the apparatus further includes: a determining module, configured to determine the specific performance counter from performance counters provided by the electronic device; The generation module 203 is further configured to: Determine the acquisition identifier corresponding to each of the performance counters, and compose the source information based on all the acquisition identifiers; the acquisition identifier corresponding to each performance counter indicates whether the target counter value includes the value of the performance counter.

[0082] Optionally, the determining module is specifically used for: Obtain the value of the first enable bit in the specified control register; the first enable bit includes bits corresponding to each of the performance counters, and the value of the first enable bit is used to indicate whether to obtain the value of the corresponding performance counter; The value is used to represent the performance counter corresponding to the first enable bit obtained, and is determined as the specific performance counter; Alternatively, extract the value of the performance counter identifier from the configuration information carried by the specific instruction; the performance counter identifier includes the identifier corresponding to each performance counter, and the value of the identifier is used to indicate whether to obtain the value of the corresponding performance counter; The numerical value is used to represent the performance counter corresponding to the acquired identifier, and is determined as the specific performance counter.

[0083] Optionally, the device further includes: The first processing module is used to extract the value of the timestamp identifier from the configuration information carried by the specific instruction, or to obtain the value of the second enable bit in the specified control register; the value is used to indicate whether to record the current timestamp. The generation module 203 is further configured to: obtain the current timestamp when the numerical representation is recorded.

[0084] Optionally, the second acquisition module 202 is specifically used for: Based on the value of the third enable bit in the specified control register, determine the currently enabled privilege level as the enabled privilege level; If the privilege level of the specific instruction is not higher than the enabled privilege level, the specific performance counter is accessed in response to the specific instruction, and the value of the specific performance counter is obtained. If the privilege level of the specific instruction is higher than the enabled privilege level, the specific instruction will not be responded to.

[0085] Optionally, the specific instruction is a performance event data retrieval instruction.

[0086] In summary, the data processing apparatus provided in this embodiment of the invention obtains the instruction set of the software to be executed as a target instruction set. The target instruction set includes pre-inserted specific instructions and instructions obtained after compiling the software to be executed. During the execution of the target instruction set, if any specific instruction is executed, a specific performance counter is accessed in response to the specific instruction, and the value of the specific performance counter is obtained as the target counter value. The specific performance counter is determined based on a specified control register and configuration information carried by the specific instruction. The specified control register includes a first enable bit for indicating the specific performance counter, and the configuration information includes a performance counter identifier for indicating the specific performance counter. Performance event data is generated based on the target counter value; the performance event data includes the target counter value. In this way, by using pre-inserted specific instructions, the value of the specific performance counter is obtained once each time a specific instruction is executed, and corresponding performance event data is generated, thus realizing the acquisition of performance event data. At the same time, since no additional code instrumentation is required, and performance event data is generated by accessing the value of the specific performance counter of the hardware through a single inserted specific instruction, additional interference can be reduced, and the accuracy of the performance event data can be improved.

[0087] Reference Figure 3 This is a schematic diagram of the structure of the electronic device provided in an embodiment of the present invention. Figure 3 As shown, the electronic device includes: a processor, a memory, a communication interface, and a communication bus.

[0088] The processor, the memory, and the communication interface communicate with each other via the communication bus; the memory stores at least one executable instruction, which causes the processor to execute the data processing method of the aforementioned embodiments. The executable instructions can form a program.

[0089] This invention provides a machine-readable medium storing instructions that, when executed by one or more processors, enable the processors to perform the data processing method described in the foregoing embodiments. The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. The same or similar parts between the various embodiments can be referred to each other.

[0090] Those skilled in the art will understand that embodiments of the present invention can be provided as methods, apparatus, or computer program products. Therefore, embodiments of the present invention can take the form of entirely hardware embodiments, entirely software embodiments, or embodiments combining software and hardware aspects. Furthermore, embodiments of the present invention can take the form of computer program products implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0091] It should be noted that all actions involving the acquisition of signals, information, or data in this application are carried out in compliance with the relevant data protection laws and policies of the country where the application is located, and with the authorization granted by the owner of the relevant device.

[0092] Embodiments of the present invention are described with reference to flowchart illustrations and / or block diagrams of methods, terminal devices (systems), and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing terminal device to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing terminal device, generate instructions for implementing the flowchart illustrations and / or block diagrams. Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0093] These computer program instructions may also be stored in a computer-readable storage medium capable of directing a computer or other programmable data processing terminal device to operate in a predictive manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0094] These computer program instructions can also be loaded onto a computer or other programmable data processing terminal equipment, causing a series of operational steps to be performed on the computer or other programmable terminal equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable terminal equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0095] Although preferred embodiments of the present invention have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments as well as all changes and modifications falling within the scope of the embodiments of the present invention.

[0096] Finally, it should be noted that in this paper, relational terms such as first and second are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations.

[0097] Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or terminal device that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or terminal device. Without further limitation, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or terminal device that includes said element.

[0098] The foregoing has provided a detailed description of a data processing method, a data processing device, an electronic device, and one or more readable media provided by the present invention. Specific examples have been used to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only for the purpose of helping to understand the method and core ideas of the present invention. At the same time, for those skilled in the art, there will be changes in specific implementation methods and application scope based on the ideas of the present invention. Therefore, the content of this specification should not be construed as a limitation of the present invention.

Claims

1. A data processing method, characterized in that, The method includes: Obtain the instruction set of the software to be executed as the target instruction set; the target instruction set includes pre-inserted specific instructions and instructions obtained after compiling the software to be executed; During the execution of the target instruction set, if any of the specific instructions is executed, a specific performance counter is accessed in response to the specific instruction, and the value of the specific performance counter is obtained as the target counter value. The specific performance counter is determined based on a designated control register and the configuration information carried by the specific instruction. The designated control register includes a first enable bit for indicating the specific performance counter, and the configuration information includes a performance counter identifier for indicating the specific performance counter. Based on the target counter value, performance event data is generated; the performance event data includes the target counter value.

2. The method according to claim 1, characterized in that, The process of generating performance event data based on the target counter value includes: The system retrieves the current timestamp, the address of the instruction to be executed, and generates source information for the target counter value; the source information is used to characterize the source of the target counter value. The performance event data is generated based on the current timestamp, the current address of the instruction to be executed, the target counter value, and the source information.

3. The method according to claim 2, characterized in that, The method further includes: determining the specific performance counter from a performance counter provided by the electronic device; The step of generating source information for the target counter value includes: Determine the acquisition identifier corresponding to each of the performance counters, and compose the source information based on all the acquisition identifiers; the acquisition identifier corresponding to each performance counter indicates whether the target counter value includes the value of the performance counter.

4. The method according to claim 3, characterized in that, Determining the specific performance counter from the performance counters provided by the electronic device includes: Obtain the value of the first enable bit in the specified control register; the first enable bit includes bits corresponding to each of the performance counters, and the value of the first enable bit is used to indicate whether to obtain the value of the corresponding performance counter; The value is used to represent the performance counter corresponding to the first enable bit obtained, and is determined as the specific performance counter; Alternatively, extract the value of the performance counter identifier from the configuration information carried by the specific instruction; the performance counter identifier includes the identifier corresponding to each performance counter, and the value of the identifier is used to indicate whether to obtain the value of the corresponding performance counter; The numerical value is used to represent the performance counter corresponding to the acquired identifier, and is determined as the specific performance counter.

5. The method according to claim 2, characterized in that, The method further includes: Extract the value of the timestamp identifier from the configuration information carried by the specific instruction, or obtain the value of the second enable bit in the specified control register; the value is used to indicate whether to record the current timestamp. The step of obtaining the current timestamp includes: obtaining the current timestamp when the numerical representation is being recorded.

6. The method according to claim 1, characterized in that, The step of accessing a specific performance counter in response to the specific instruction to obtain the current value of the specific performance counter includes: Based on the value of the third enable bit in the specified control register, determine the currently enabled privilege level as the enabled privilege level; If the privilege level of the specific instruction is not higher than the enabled privilege level, the specific performance counter is accessed in response to the specific instruction, and the value of the specific performance counter is obtained. The method further includes: if the privilege level of the specific instruction is higher than the enabled privilege level, not responding to the specific instruction.

7. The method according to any one of claims 1-6, characterized in that, The specific instruction is a performance event data retrieval instruction.

8. A data processing apparatus, characterized in that, The device includes: The first acquisition module is used to acquire the instruction set of the software to be executed as the target instruction set; the target instruction set includes pre-inserted specific instructions and instructions obtained after compiling the software to be executed; The second acquisition module is configured to, during the execution of the target instruction set, if any of the specific instructions is executed, access a specific performance counter in response to the specific instruction and acquire the value of the specific performance counter as the target counter value; the specific performance counter is determined based on a specified control register and configuration information carried by the specific instruction, the specified control register includes a first enable bit for indicating the specific performance counter, and the configuration information includes a performance counter identifier for indicating the specific performance counter; A generation module is used to generate performance event data based on the target counter value; the performance event data includes the target counter value.

9. The apparatus according to claim 8, characterized in that, The generation module is specifically used for: The system retrieves the current timestamp, the address of the instruction to be executed, and generates source information for the target counter value; the source information is used to characterize the source of the target counter value. The performance event data is generated based on the current timestamp, the current address of the instruction to be executed, the target counter value, and the source information.

10. The apparatus according to claim 9, characterized in that, The apparatus further includes: a determining module for determining the specific performance counter from a performance counter provided by an electronic device; The generation module is further configured to: Determine the acquisition identifier corresponding to each of the performance counters, and compose the source information based on all the acquisition identifiers; the acquisition identifier corresponding to each performance counter indicates whether the target counter value includes the value of the performance counter.

11. The apparatus according to claim 10, characterized in that, The determining module is specifically used for: Obtain the value of the first enable bit in the specified control register; the first enable bit includes bits corresponding to each of the performance counters, and the value of the first enable bit is used to indicate whether to obtain the value of the corresponding performance counter; The value is used to represent the performance counter corresponding to the first enable bit obtained, and is determined as the specific performance counter; Alternatively, extract the value of the performance counter identifier from the configuration information carried by the specific instruction; the performance counter identifier includes the identifier corresponding to each performance counter, and the value of the identifier is used to indicate whether to obtain the value of the corresponding performance counter; The numerical value is used to represent the performance counter corresponding to the acquired identifier, and is determined as the specific performance counter.

12. The apparatus according to claim 9, characterized in that, The device further includes: The first processing module is used to extract the value of the timestamp identifier from the configuration information carried by the specific instruction, or to obtain the value of the second enable bit in the specified control register; the value is used to indicate whether to record the current timestamp. The generation module is further configured to: obtain the current timestamp when the numerical representation is recorded.

13. The apparatus according to claim 8, characterized in that, The second acquisition module is specifically used for: Based on the value of the third enable bit in the specified control register, determine the currently enabled privilege level as the enabled privilege level; If the privilege level of the specific instruction is not higher than the enabled privilege level, the specific performance counter is accessed in response to the specific instruction, and the value of the specific performance counter is obtained. If the privilege level of the specific instruction is higher than the enabled privilege level, the specific instruction will not be responded to.

14. The apparatus according to any one of claims 8-13, characterized in that, The specific instruction is a performance event data retrieval instruction.

15. An electronic device, characterized in that, include: The processor, memory, communication interface, and communication bus are provided, wherein the processor, memory, and communication interface communicate with each other via the communication bus. The memory is used to store executable instructions that cause the processor to perform the method as described in any one of claims 1 to 7.

16. One or more machine-readable media, characterized in that, It stores instructions that, when executed by one or more processors, cause the processors to perform the method as described in any one of claims 1-7.

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