Video coding method and device, video decoding method and device, electronic equipment and storage medium

Abstract

The invention provides a video coding method and device, a video decoding method and device, electronic equipment and a storage medium. The video coding method comprises the following steps: determining a pixel value interval of a video frame in a to-be-processed video; merging the pixel value intervals of the video frames of the same scene to obtain a merged pixel value interval, and generating information indicating the merged pixel value interval to which the video frames belong; according to the information indicating the merged pixel value interval to which the video frame belongs, the reconstructed pixel value of the video frame is clipped to the merged pixel value interval to which the video frame belongs; and generating a bit stream based on the video frame of which the pixel values are clipped, and encoding information indicating the merged pixel value interval to which the video frame belongs into the bit stream.

Description

Technical Field

[0001] This disclosure relates to the field of video processing technology, and more particularly to a method, apparatus, electronic device, and storage medium for video encoding and video decoding by pre-analyzing video content. Background Technology

[0002] Various electronic devices (such as digital televisions, laptops or desktop computers, tablets, digital cameras, digital recording devices, digital media players, video game consoles, smartphones, video conferencing equipment, video streaming devices, etc.) support digital video. Electronic devices send and receive, or otherwise transmit, digital video data via communication networks, and / or store digital video data on storage devices. Due to the limited bandwidth capacity of communication networks and the limited storage resources of storage devices, video data can be compressed using one or more video codec standards before being transmitted or stored. For example, video codec standards include the earlier Advanced Video Coding Standard (AVC / H.264), the currently mainstream High Efficiency Video Coding Standard (HEVC / H.265), and the latest General Purpose Video Coding Standard (VVC / H.266). Video codecs typically employ prediction methods that utilize the inherent redundancy in video data (e.g., inter-frame prediction, intra-frame prediction, etc.). Video codecs aim to compress video data into a form using a lower bitrate while avoiding or minimizing video quality degradation.

[0003] In related technologies, the core objective of video coding is to maintain acceptable visual quality while minimizing data volume. However, due to the inherent characteristics of compression algorithms, encoded videos often exhibit distortion during decoding and reconstruction, leading to a decrease in image quality. This distortion is caused by various technical trade-offs during the encoding process (such as quantization, motion estimation, and downsampling). One manifestation of this distortion is that the pixel values ​​after decoding are not equal to the pixel values ​​of the original image, resulting in areas that are too bright or too dark, leading to a poor user experience. Summary of the Invention

[0004] According to a first aspect of this disclosure, a video encoding method is provided, comprising: determining pixel value ranges of video frames in a video to be processed; merging pixel value ranges of video frames with the same scene to obtain a merged pixel value range, and generating information indicating the merged pixel value range to which the video frame belongs; cropping the reconstructed pixel values ​​of the video frame to the merged pixel value range to which the video frame belongs based on the information indicating the merged pixel value range to which the video frame belongs; generating a bitstream based on the video frame with cropped pixel values, and encoding the information indicating the merged pixel value range to which the video frame belongs into the bitstream.

[0005] According to a first aspect of this disclosure, merging pixel value intervals of video frames with the same scene to obtain merged pixel value intervals includes: determining the scene change position of the video to be processed based on the content changes of adjacent video frames, and dividing the video frames into multiple groups according to the scene change position; merging the pixel value intervals of video frames in each of the multiple groups to obtain a first number of merged pixel value intervals; counting the number of video frames covered by each merged pixel value interval, and determining a predetermined number of merged pixel value intervals whose number of covered video frames is higher than a preset value based on the number of video frames covered by each merged pixel value interval.

[0006] According to a first aspect of this disclosure, determining the scene change position of a video frame based on the content changes of adjacent video frames, and dividing the video frame to be processed into multiple groups according to the scene change position includes: traversing all video frames of the video to be processed, and determining the position of the video frame whose maximum and minimum pixel value differences between adjacent video frames are both greater than a threshold as the scene change position.

[0007] According to a first aspect of this disclosure, the method further includes repeating the following operations until the threshold is increased to a predetermined size or the second number no longer changes: in response to the number of merged pixel value intervals being greater than a preset value, increasing the threshold and redetermining the scene change position based on the increased threshold; re-segmenting the video to be processed into multiple groups based on the redetermined scene change position, and merging the pixel value intervals of the video frames in each of the multiple groups to obtain a second number of merged pixel value intervals.

[0008] According to a first aspect of this disclosure, the pixel value range of a video frame includes a range for each component value of a pixel, and the predetermined number of merged pixel value ranges are sorted into sequential pixel value ranges in descending order of the number of video frames covered. The information indicating the merged pixel value range to which a video frame belongs is represented as information about the sequential pixel value range and an index corresponding to the sorting of one of the merged pixel value ranges in the sequential pixel value range.

[0009] According to a first aspect of this disclosure, generating information indicating the merged pixel value interval to which a video frame belongs includes: sequentially searching for a merged pixel value interval that can cover the pixel value interval of the video frame, starting from a first merged pixel value interval included in the sequence pixel value interval, and generating an index of the merged pixel value interval and information about the sequence pixel value interval as information indicating the merged pixel value interval to which the video frame belongs.

[0010] According to a first aspect of this disclosure, the method further includes: after preprocessing the video frames of the video to be processed, cropping the pixel values ​​of the preprocessed video frames to the merged pixel value range to which the video frames belong.

[0011] According to a second aspect of this disclosure, a video decoding method is provided, comprising: receiving a bitstream generated by the video encoding method described above, and decoding from the bitstream to obtain information indicating a merged pixel value interval to which a video frame belongs; obtaining a merged pixel value interval for the video frame based on the information indicating the merged pixel value interval to which the video frame belongs; and cropping the pixel values ​​of the video frame based on the merged pixel value interval of the video frame.

[0012] According to a third aspect of this disclosure, a video encoding apparatus is provided, comprising: a pixel value determination unit configured to determine pixel value ranges of video frames in a video to be processed; a merging unit configured to merge pixel value ranges of video frames with the same scene to obtain a merged pixel value range, and generate information indicating the merged pixel value range to which the video frame belongs; a cropping unit configured to crop the reconstructed pixel values ​​of the video frame to the merged pixel value range to which the video frame belongs based on the information indicating the merged pixel value range to which the video frame belongs; and an encoding unit configured to generate a bitstream based on the video frames with cropped pixel values, and encode the information indicating the merged pixel value range to which the video frame belongs into the bitstream.

[0013] According to a third aspect of this disclosure, the merging unit is configured to: determine the scene change position of the video to be processed based on the content changes of adjacent video frames, and divide the video frames into multiple groups according to the scene change position; merge the pixel value intervals of the video frames in each of the multiple groups to obtain a first number of merged pixel value intervals; count the number of video frames covered by each merged pixel value interval, and determine a predetermined number of merged pixel value intervals whose number of covered video frames is higher than a preset value based on the number of video frames covered by each merged pixel value interval.

[0014] According to a third aspect of this disclosure, the merging unit is configured to: traverse all video frames of the video to be processed, and determine the positions of video frames whose maximum and minimum pixel value differences between adjacent video frames are both greater than a threshold as scene transition positions.

[0015] According to a third aspect of this disclosure, the merging unit is configured to repeatedly perform the following operations until a threshold is increased to a predetermined size or a second number no longer changes: in response to the number of merged pixel value intervals being greater than a preset value, increasing the threshold and redetermining the scene change position based on the increased threshold; re-segmenting the video to be processed into multiple groups based on the redetermined scene change position, and merging the pixel value intervals of the video frames in each of the multiple groups to obtain a second number of merged pixel value intervals.

[0016] According to a third aspect of this disclosure, the pixel value range of a video frame includes a range for each component value of a pixel, and the predetermined number of merged pixel value ranges are sorted into sequential pixel value ranges in descending order of the number of video frames covered. The information indicating the merged pixel value range to which a video frame belongs is represented as information about the sequential pixel value range and an index corresponding to the sorting of one of the merged pixel value ranges in the sequential pixel value range.

[0017] According to a third aspect of this disclosure, the merging unit is configured to: sequentially search for a merged pixel value interval that can cover the pixel value intervals of the video frame, starting from the first merged pixel value interval included in the sequence pixel value interval, and generate information indicating the merged pixel value interval to which the video frame belongs, using the index of the merged pixel value interval and information about the sequence pixel value interval.

[0018] According to a third aspect of this disclosure, the cropping unit is configured to: after preprocessing the video frames of the video to be processed, crop the pixel values ​​of the preprocessed video frames to the merged pixel value range to which the video frames belong.

[0019] According to a fourth aspect of the disclosure, a video decoding apparatus is provided, comprising: a receiving unit configured to receive a bitstream generated by the video encoding method described above, and to decode from the bitstream information indicating a merged pixel value interval to which a video frame belongs; a determining unit configured to determine a merged pixel value interval for a video frame based on the information indicating the merged pixel value interval to which the video frame belongs; and a cropping unit configured to crop the pixel values ​​of the video frame based on the merged pixel value interval of the video frame.

[0020] According to a fifth aspect of this disclosure, an electronic device is provided, comprising: at least one processor; and at least one memory storing computer-executable instructions, wherein the computer-executable instructions, when executed by the at least one processor, cause the at least one processor to perform the video encoding method and / or video decoding method as described above.

[0021] According to a fifth aspect of this disclosure, a computer-readable storage medium is provided that, when instructions in the computer-readable storage medium are executed by at least one processor, enables the at least one processor to perform the video encoding method and / or video decoding method as described above.

[0022] According to a sixth aspect of this disclosure, a method for storing a bitstream is provided, comprising: generating a bitstream according to the video encoding method described above; and storing the bitstream into a computer-readable storage medium.

[0023] The technical solutions provided by the embodiments of this disclosure offer at least the following advantages: By pre-analyzing the pixel value range of video frames, information for controlling the range of reconstructed pixels can be obtained, thereby limiting the pixel value range based on this information during pixel reconstruction and reducing compression distortion. By combining the pixel value ranges of multiple video frames, the amount of information that needs to be transmitted can be reduced, while retaining the flexibility for cropping the pixel value range for each video frame, thus balancing the efficiency and quality of video compression.

[0024] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and are not intended to limit this disclosure. Attached Figure Description

[0025] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this disclosure and, together with the description, serve to explain the principles of this disclosure, and are not intended to unduly limit this disclosure.

[0026] Figure 1 This is a block diagram illustrating an exemplary system for encoding and decoding video blocks according to some embodiments of the present disclosure.

[0027] Figure 2 This is a block diagram illustrating an exemplary video encoder according to some embodiments of the present disclosure.

[0028] Figure 3 This is a block diagram illustrating an exemplary video decoder according to some embodiments of the present disclosure.

[0029] Figure 4 This is a schematic diagram illustrating the overall environment in which a video frame processing scheme according to an exemplary embodiment of the present disclosure is applied.

[0030] Figure 5 This is a flowchart illustrating a video encoding method according to an exemplary embodiment of the present disclosure.

[0031] Figure 6 This is a schematic diagram illustrating the execution of a pixel value clipping operation according to an exemplary embodiment of the present disclosure.

[0032] Figure 7 This is a flowchart illustrating a video decoding method according to an exemplary embodiment of the present disclosure.

[0033] Figure 8 This is a block diagram illustrating a video encoding apparatus according to an exemplary embodiment of the present disclosure.

[0034] Figure 9 This is a block diagram illustrating a video decoding apparatus according to an exemplary embodiment of the present disclosure.

[0035] Figure 10This is a diagram illustrating a computing environment coupled to a user interface according to some embodiments of the present disclosure. Detailed Implementation

[0036] Referring now to the detailed description, examples of which are illustrated in the accompanying drawings. Numerous non-limiting details are set forth in the following detailed description to aid in understanding the subject matter presented herein. However, various alternatives may be used without departing from the scope of the claims, and the subject matter may be practiced without these specific details. For example, the subject matter presented herein can be implemented on many types of electronic devices with digital video capabilities.

[0037] It should be noted that the terms "first," "second," etc., in the specification, claims, and drawings of this disclosure are used to distinguish objects and are not used to describe any specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of this disclosure described herein can be implemented in sequences other than those shown in the drawings or described in this disclosure.

[0038] Figure 1 This is a block diagram illustrating an exemplary system 10 for encoding and decoding video blocks in parallel, according to some embodiments of the present disclosure. Figure 1 As shown, system 10 includes a source device 12 that generates and encodes video data that will later be decoded by a target device 14. The source device 12 and target device 14 can include any electronic device from a wide variety of electronic devices, including cloud servers, server computers, desktop or laptop computers, tablet computers, smartphones, set-top boxes, digital televisions, cameras, display devices, digital media players, video game consoles, video streaming devices, etc. In some embodiments, the source device 12 and target device 14 are equipped with wireless communication capabilities.

[0039] In some implementations, the target device 14 may receive the encoded video data to be decoded via link 16. Link 16 may include any type of communication medium or device capable of moving the encoded video data from the source device 12 to the target device 14.

[0040] In some other implementations, the encoded video data can be sent from the output interface 22 to the storage device 32. Subsequently, the target device 14 can access the encoded video data in the storage device 32 via the input interface 28.

[0041] like Figure 1As shown, source device 12 includes a video source 18, a video encoder 20, and an output interface 22. The video source 18 may include sources or combinations of such sources, such as: a video capture device (e.g., a camera), a video archive containing previously captured video, a video feed interface for receiving video from a video content provider, and / or a computer graphics system for generating computer graphics data as source video.

[0042] The captured, pre-captured, or computer-generated video can be encoded by the video encoder 20. The encoded video data can be sent directly to the target device 14 via the output interface 22 of the source device 12. Alternatively, the encoded video data can be stored on the storage device 32 for later access by the target device 14 or other devices for decoding and / or playback.

[0043] Target device 14 includes an input interface 28, a video decoder 30, and a display device 34. Input interface 28 may include a receiver and / or a modem, and receives encoded video data via link 16. The encoded video data transmitted via link 16 or provided on storage device 32 may include various syntax elements generated by video encoder 20 for use by video decoder 30 when decoding the video data. Such syntax elements may be included within encoded video data transmitted on a communication medium, stored on a storage medium, or stored on a file server.

[0044] Video encoder 20 and video decoder 30 can operate according to proprietary or industry standards (e.g., VVC, HEVC, MPEG-4 Part 10, AVC) or extensions of such standards. It should be understood that this application is not limited to any particular video encoding / decoding standard and can be applied to other video encoding / decoding standards. It is generally understood that the video encoder 20 of source device 12 can be configured to encode video data according to any of these current or future standards. Similarly, it is also generally understood that the video decoder 30 of target device 14 can be configured to decode video data according to any of these current or future standards.

[0045] The video encoder 20 and video decoder 30 can be implemented as any circuit of a variety of suitable encoder and / or decoder circuits, such as one or more microprocessors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), discrete logic devices, software, hardware, firmware, or any combination thereof. When partially implemented in software, the electronic device may store instructions for software in a suitable non-transitory computer-readable medium and use one or more processors to execute the instructions in hardware to perform the video encoding / decoding operations disclosed in this disclosure. Each of the video encoder 20 and video decoder 30 may be included in one or more encoders or decoders, and either encoder or decoder may be integrated as part of a combined encoder / decoder (CODEC) in the respective device.

[0046] Figure 2 This is a block diagram illustrating an exemplary video encoder 20 according to some embodiments described in this application. The video encoder 20 can perform intra-frame predictive coding and inter-frame predictive coding on video blocks within a video frame. Intra-frame predictive coding relies on spatial prediction to reduce or remove spatial redundancy in the video data within a given video frame or picture. Inter-frame predictive coding relies on temporal prediction to reduce or remove temporal redundancy in the video data within neighboring video frames or pictures of a video sequence. It should be noted that in the field of video encoding and decoding, the term "frame" can be used as a synonym for the terms "image" or "picture".

[0047] like Figure 2As shown, the video encoder 20 includes a video data memory 40, a prediction processing unit 41, a decoded picture buffer (DPB) 64, an adder 50, a transform processing unit 52, a quantization unit 54, and an entropy coding unit 56. The prediction processing unit 41 further includes a motion estimation unit 42, a motion compensation unit 44, a segmentation unit 45, an intra-frame prediction processing unit 46, and an intra-frame block copy (BC) unit 48. In some embodiments, the video encoder 20 also includes an inverse quantization unit 58, an inverse transform processing unit 60, and an adder 62 for video block reconstruction. A loop filter 63, such as a deblocking filter, can be located between the adder 62 and the DPB 64 to filter block boundaries to remove block artifacts from the reconstructed video. In addition to the deblocking filter, another loop filter (e.g., a sample adaptive offset (SAO) filter, a cross-component sample adaptive offset (CCSAO) filter, and / or an adaptive loop filter (ALF)) can be used to filter the output of the adder 62. In some examples, the loop filter can be omitted, and the decoded video block can be directly provided to the DPB 64 by the adder 62. The video encoder 20 can take the form of a fixed or programmable hardware unit, or it can be distributed among one or more of the fixed or programmable hardware units described.

[0048] The video data storage device 40 can store video data encoded by the components of the video encoder 20. For example, it can store data from... Figure 1 The video source 18 shown obtains video data from the video data storage 40. The DPB 64 is a buffer that stores reference video data (e.g., reference frames or pictures) used by the video encoder 20 (e.g., in intra-frame or inter-frame predictive coding mode) when encoding the video data.

[0049] like Figure 2 As shown, after receiving video data, the segmentation unit 45 within the prediction processing unit 41 segments the video data into video blocks. This segmentation may also include segmenting the video frame into strips, tiles (e.g., a collection of video blocks) or other larger coding units (CUs) according to a predefined splitting structure (e.g., a quadtree (QT) structure) associated with the video data. It should be noted that the term "block" or "video block" as used herein can be a portion of a frame or image, particularly a rectangular (square or non-square) portion. Referring to, for example, HEVC and VVC, a block or video block can be or corresponds to a coding tree unit (CTU), CU, prediction unit (PU), or transform unit (TU) and / or can be or corresponds to a corresponding block (e.g., coding tree block (CTB), coding block (CB), prediction block (PB), or transform block (TB)) and / or sub-block.

[0050] The prediction processing unit 41 can select one of several feasible predictive coding modes for the current video block based on error results (e.g., coding rate and distortion level), such as one or more inter-frame predictive coding modes among multiple intra-frame predictive coding modes. The prediction processing unit 41 can provide the resulting intra-frame or inter-frame predictive coding block to adder 50 to generate a residual block, and to adder 62 to reconstruct the coding block for subsequent use as part of a reference frame. The prediction processing unit 41 also provides syntax elements (e.g., motion vectors, intra-frame mode indicators, segmentation information, and other such syntax information) to entropy coding unit 56.

[0051] To select a suitable intra-predictive coding mode for the current video block, the intra-predictive processing unit 46 within the prediction processing unit 41 can perform intra-predictive coding of the current video block in relation to one or more neighboring blocks in the same frame as the current block to be encoded to provide spatial prediction. The motion estimation unit 42 and motion compensation unit 44 within the prediction processing unit 41 perform inter-predictive coding of the current video block in relation to one or more prediction blocks in one or more reference frames to provide temporal prediction. The video encoder 20 can perform multiple coding passes, for example, to select a suitable coding mode for each block of video data.

[0052] In some implementations, motion estimation unit 42 determines an inter-frame prediction mode for the current video frame by generating motion vectors based on a predetermined pattern within the video frame sequence. The motion vectors indicate the displacement of a video block within the current video frame relative to a prediction block within a reference video frame. Motion estimation performed by motion estimation unit 42 is the process of generating motion vectors that estimate the motion of video blocks. For example, the motion vectors may indicate the displacement of a video block within the current video frame or picture relative to a prediction block within a reference frame associated with the current block being encoded in the current frame. The predetermined pattern may designate video frames in the sequence as P-frames or B-frames. Intra-frame BC unit 48 may determine vectors (e.g., block vectors) for intra-frame BC coding in a similar manner to how motion estimation unit 42 determines motion vectors for inter-frame prediction, or the block vectors may be determined using motion estimation unit 42.

[0053] Regardless of whether the predicted block comes from the same frame predicted intra-frame or from different frames predicted inter-frame, the video encoder 20 can form a residual video block by subtracting the pixel values ​​of the predicted block from the pixel values ​​of the current video block being encoded. The pixel difference forming the residual video block can include both luma component difference and chroma component difference.

[0054] Intra-prediction processing unit 46 can encode the current block using various intra-prediction modes, for example, during individual encoding passes, and intra-prediction processing unit 46 (or, in some examples, mode selection unit) can select a suitable intra-prediction mode from the tested intra-prediction modes for use. Intra-prediction processing unit 46 can provide information indicating the intra-prediction mode selected for the block to entropy coding unit 56. Entropy coding unit 56 can encode the information indicating the selected intra-prediction mode into the bitstream.

[0055] After prediction processing unit 41 determines the prediction block for the current video block via inter-frame prediction or intra-frame prediction, adder 50 forms a residual video block by subtracting the prediction block from the current video block. The residual video data in the residual block may be included in one or more TUs and provided to transform processing unit 52. Transform processing unit 52 uses a transform (e.g., discrete cosine transform (DCT) or a conceptually similar transform) to transform the residual video data into residual transform coefficients.

[0056] The transform processing unit 52 can send the resulting transform coefficients to the quantization unit 54. The quantization unit 54 quantizes the transform coefficients to further reduce the bit rate. The quantization process can also reduce the bit depth associated with some or all of the coefficients. The degree of quantization can be modified by adjusting the quantization parameters. In some examples, the quantization unit 54 can subsequently perform a scan on the matrix including the quantized transform coefficients. Alternatively, the entropy coding unit 56 can perform the scan.

[0057] After quantization, the entropy coding unit 56 entropy codes the quantized transform coefficients into a video bitstream using, for example, context-adaptive variable-length coding (CAVLC), context-adaptive binary arithmetic coding (CABAC), syntax-based context-adaptive binary arithmetic coding (SBAC), probabilistic interval segmented entropy (PIPE) coding, or another entropy coding method or technique. The encoded bitstream can then be sent to, for example,... Figure 1 The video decoder 30 shown, or archived in, for example Figure 1 The data is stored in storage device 32 for later transmission to or retrieval by video decoder 30. Entropy coding unit 56 can also entropy code the motion vectors and other syntax elements used for the current video frame being encoded.

[0058] The inverse quantization unit 58 and the inverse transform processing unit 60 apply inverse quantization and inverse transform, respectively, to reconstruct residual video blocks in the pixel domain for generating reference blocks to predict other video blocks. As noted above, the motion compensation unit 44 can generate motion-compensated prediction blocks from one or more reference blocks of frames stored in the DPB 64. The motion compensation unit 44 can also apply one or more interpolation filters to the prediction blocks to compute sub-integer pixel values ​​for use in motion estimation.

[0059] Adder 62 adds the reconstructed residual block to the motion-compensated prediction block generated by motion compensation unit 44 to generate a reference block for storage in DPB 64. The reference block can then be used as a prediction block by intra-frame BC unit 48, motion estimation unit 42, and motion compensation unit 44 for inter-frame prediction of another video block in subsequent video frames.

[0060] Figure 3 This is a block diagram illustrating an exemplary video decoder 30 according to some embodiments of this application. The video decoder 30 includes a video data memory 79, an entropy decoding unit 80, a prediction processing unit 81, an inverse quantization unit 86, an inverse transform processing unit 88, an adder 90, and a DPB 92. The prediction processing unit 81 further includes a motion compensation unit 82, an intra-frame prediction unit 84, and an intra-frame BC unit 85. The video decoder 30 can perform operations in conjunction with the above. Figure 2 The decoding process described for the video encoder 20 is essentially the inverse of the encoding process. For example, the motion compensation unit 82 can generate prediction data based on the motion vectors received from the entropy decoding unit 80, while the intra-frame prediction unit 84 can generate prediction data based on the intra-frame prediction mode indicator received from the entropy decoding unit 80.

[0061] In some examples, embodiments of this disclosure may be distributed across one or more units of the video decoder 30. For example, the intra-frame prediction (BC) unit 85 may perform embodiments of this application individually or in combination with other units of the video decoder 30, such as the motion compensation unit 82, the intra-frame prediction unit 84, and the entropy decoding unit 80. In some examples, the video decoder 30 may not include the intra-frame prediction (BC) unit 85, and the functionality of the intra-frame prediction (BC) unit 85 may be performed by other components of the prediction processing unit 81, such as the motion compensation unit 82.

[0062] Video data storage 79 can store video data, such as encoded video bitstreams, that will be decoded by other components of video decoder 30. The video data stored in video data storage 79 can be obtained, for example, from storage device 32, from a local video source (e.g., a camera), via wired or wireless network communication of video data, or by accessing a physical data storage medium (e.g., a flash drive or hard disk). During the decoding process, the video decoder 30 receives a encoded video bitstream representing video blocks and associated syntax elements of encoded video frames. The entropy decoding unit 80 of the video decoder 30 performs entropy decoding on the bitstream to generate quantization coefficients, motion vectors or intra-prediction mode indicators, and other syntax elements. The entropy decoding unit 80 then forwards the motion vectors or intra-prediction mode indicators, and other syntax elements to the prediction processing unit 81.

[0063] When a video frame is encoded as an intra-predictive coded (I) frame or used as an intra-coded prediction block in other types of frames, the intra-predictive unit 84 of the prediction processing unit 81 can generate prediction data for the video block of the current video frame based on the intra-predictive mode transmitted by the signal and reference data from the previous decoded block of the current frame.

[0064] When a video frame is encoded as an inter-frame predictive coded (i.e., B or P) frame, the motion compensation unit 82 of the prediction processing unit 81 generates one or more prediction blocks for the current video frame based on motion vectors and other syntax elements received from the entropy decoding unit 80. Each of the prediction blocks can be generated from a reference frame within a reference frame list. The video decoder 30 can construct the reference frame list, i.e., list 0 and list 1, based on the reference frames stored in the DPB 92 using a default construction technique.

[0065] In some examples, when a video block is encoded according to the intra-BC mode described herein, the intra-BC unit 85 of the prediction processing unit 81 generates a prediction block for the current video block based on the block vector and other syntax elements received from the entropy decoding unit 80. The prediction block can be located within a reconstructed region of the same image as the current video block, as defined by the video encoder 20.

[0066] The motion compensation unit 82 and / or the intra-frame BC unit 85 determine the prediction information for the video block of the current video frame by parsing motion vectors and other syntax elements, and then use the prediction information to generate a prediction block for the current video block being decoded.

[0067] The motion compensation unit 82 can also perform interpolation using interpolation filters, such as those used by the video encoder 20 during encoding of video blocks, to calculate interpolated values ​​for sub-integer pixels of the reference block. In this case, the motion compensation unit 82 can determine the interpolation filters used by the video encoder 20 based on the received syntax elements and use these interpolation filters to generate the prediction block.

[0068] The dequantization unit 86 dequantizes the quantized transform coefficients provided in the bitstream and entropy-decoded by the entropy decoding unit 80 using the same quantization parameters calculated by the video encoder 20 for each video block in the video frame to determine the degree of quantization. The inverse transform processing unit 88 applies an inverse transform (e.g., inverse DCT, inverse integer transform, or a conceptually similar inverse transform process) to the transform coefficients in order to reconstruct the residual block in the pixel domain.

[0069] After the motion compensation unit 82 or the intra-frame BC unit 85 generates a prediction block for the current video block based on vectors and other syntax elements, the adder 90 reconstructs the decoded video block for the current video block by adding the residual block from the inverse transform processing unit 88 to the corresponding prediction block generated by the motion compensation unit 82 and the intra-frame BC unit 85. A loop filter 91 (e.g., a deblocking filter, SAO filter, CCSAO filter, and / or ALF) may be located between the adder 90 and the DPB 92 for further processing of the decoded video block. In some examples, the loop filter 91 may be omitted, and the decoded video block may be directly provided to the DPB 92 by the adder 90. The decoded video block in a given frame is then stored in the DPB 92, which stores reference frames for subsequent motion compensation of the next video block. The DPB 92 or a separate memory device may also store the decoded video for later presentation on a display device (e.g., ...). Figure 1 On the display device 34).

[0070] Before introducing the embodiments of this disclosure, some key terms involved in the embodiments of this disclosure will be introduced below.

[0071] In video coding, block partitioning refers to dividing the video frame (or image frame) to be encoded into several non-overlapping image blocks (or coding units). These image blocks are the basic units of video coding.

[0072] Motion estimation (ME) is the process of obtaining motion vectors (MV). The quality of motion estimation typically determines the size of the residual in video coding, thus affecting the efficiency of video coding. The motion estimation process can be viewed as finding matching blocks using matching criteria.

[0073] The implementation environment involved in the embodiments of this disclosure is described below.

[0074] Figure 4 This is a schematic diagram illustrating the implementation environment of the video frame processing method and apparatus according to embodiments of the present disclosure. See also... Figure 4The implementation environment includes electronic device 401. In some embodiments, electronic device 401 can access a network via wired or wireless communication to enable more functions.

[0075] Electronic device 401 is used to implement at least one of the following functions for video: filtering, encoding, enhancement, denoising, etc., which are not limited in this disclosure. In some embodiments, taking the implementation of filtering and encoding functions for video by electronic device 401 as an example, electronic device 401 samples the video to be encoded to obtain multiple video frames to be encoded, performs temporal filtering on these video frames, encodes these filtered video frames based on the video coding standard, obtains the corresponding video encoded data (also called bitstream), and transmits the video encoded data to the decoding device (the decoding device can also be electronic device 401, for example, by implementing video decoding and video encoding functions through different functional modules of electronic device 401 respectively). Among them, the video coding standard usually adopts a block-based hybrid coding framework, including but not limited to: High Efficiency Video Coding (HEVC), Versatile Video Coding (VVC), and Audio Video Coding Standard 3 (AVS3), etc., which are not limited in this disclosure.

[0076] Furthermore, this disclosure does not limit the form of electronic device 401. For example, electronic device 401 may be a terminal or a server. Taking electronic device 401 as a terminal as an example, the terminal may be at least one of the following: smartphone, smartwatch, desktop computer, laptop, virtual reality terminal, augmented reality terminal, wireless terminal, and laptop computer. The terminal has communication functions and can access wired or wireless networks. Taking electronic device 401 as a server as an example, the server may be an independent physical server, a server cluster composed of multiple physical servers, or a distributed file system. It may also be a cloud server that provides basic cloud computing services such as cloud services, cloud databases, cloud computing, cloud functions, cloud storage, network services, cloud communication, middleware services, domain name services, security services, CDN (Content Delivery Network), and big data and artificial intelligence platforms. Of course, the server may also include other functional servers to provide more comprehensive and diversified services.

[0077] The following will refer to Figure 5 This invention describes a video encoding method according to exemplary embodiments of the present disclosure. This method can be performed in, for example, the electronic device 401 described above.

[0078] like Figure 5 As shown, in step S501, the pixel value range of the video frames in the video to be processed is determined.

[0079] In video encoding, the output video is typically in RGB or YUV format. YUV format stores luminance and chrominance information separately, which better aligns with the human eye's higher sensitivity to luminance than chrominance. Therefore, YUV format is widely used in video compression (such as H.264 and H.265) and transmission (such as HDMI and broadcast television). YUV data usually consists of three components, and the numerical precision (i.e., bit depth) of each component directly affects the color and luminance representation of the image. Common bit depths include 8-bit and 10-bit, used for video acquisition, processing, and encoding in different scenarios. For example, each component of 8-bit YUV can be represented as 256 values, where 0 represents black and 255 represents white. Its standard range can be: Y ∈ [16, 235], UV ∈ [16, 240], or YUV ∈ [0, 255]. Each component of 10-bit YUV can be represented as 1024 values, where 0 represents black and 1023 represents white. Its standard range can be: Y ∈ [64, 940], UV ∈ [64, 960], or YUV ∈ [0, 1023]. 10-bit YUV is commonly used in high dynamic range (HDR) and professional film and television production (such as 4K H.265). In addition, the distribution range of pixel values ​​varies depending on the content of the video. For example, in low-light scenes, the range of pixel values ​​may be concentrated in smaller values. The following explanation uses YUV as an example to illustrate the range of pixel values ​​(i.e., pixel value intervals) included in a video frame. For a video consisting of N frames, the maximum and minimum values ​​of the YUV components in each frame can be obtained to determine the pixel value intervals of the three components of the video frame's pixels. For example, the pixel value intervals of the N video frames to be processed can be determined as follows: Frame 1: Y [0,126], U [120,145], V [119,134] Frame 2: Y [10,176], U [118,129], V [178,189] Information about the pixel value range for each frame can be stored in the form of a list.

[0080] In step S503, the pixel value ranges of video frames with the same scene are merged to obtain a merged pixel value range, and information indicating the merged pixel value range to which the video frame belongs is generated.

[0081] Video frames of the same scene usually have a very small difference in the pixel value ranges of consecutive video frames with little change in video content. Therefore, the pixel value ranges of video frames of the same scene can be merged, which can reduce the information to be transmitted in subsequent encoding, reduce the bit rate of the bitstream, and improve the compression efficiency.

[0082] According to an exemplary embodiment of the present disclosure, whether a scene change occurs can be determined by analyzing the content change between adjacent video frames. Step S503 may include: determining the scene transformation position of the video to be processed based on the content change between adjacent video frames, and dividing the video frames into multiple groups according to the scene transformation position; respectively merging the pixel value ranges of the video frames in each of the multiple groups to obtain a first number of merged pixel value ranges; counting the number of video frames covered by each merged pixel value range, and determining a predetermined number of merged pixel value ranges whose covered video frame number is higher than a preset value according to the number of video frames covered by each merged pixel value range.

[0083] For example, for a video including N frames, there may originally be N pixel value ranges, and each pixel value range may include respective pixel value ranges for three components. Through merging, the original N pixel value ranges can be reduced to M, where M < N, and both M and N are natural numbers. The merging here can merge the respective minimum and maximum values of two or more pixel value ranges into one minimum and one maximum value. For example, assume that two frames determined to be the same or of the same scene are Frame 1 and Frame 2, where the pixel value range of Frame 1 is Y [0,126], U [120,135], V [119,134], and the pixel value range of Frame 2 is Y [10,136], U [118,129], V [128,144]. Then the merged pixel value range is Y [0,136], U [118,135], V [119,144].

[0084] The scene transformation position, that is, the frame where the scene transformation occurs, can be determined in various ways. According to an exemplary embodiment of the present disclosure, all video frames of the video to be processed can be traversed, and the video frame positions where the maximum value difference and the minimum value difference of the pixel values between adjacent video frames are both greater than a threshold are determined as the scene transformation positions.

[0085] Specifically, assuming the threshold is TH1, it is possible to determine whether the difference between the minimum values and the difference between the maximum values of the pixel values of two adjacent frames are both less than TH1. For an N-frame video, the comparison can start from the first frame and the second frame. Assuming the pixel value range of frame 1 is {[Ymin1, Ymax1], [Umin1, Umax1], [Vmin1, Vmax1]}, and the pixel value range of frame 2 is {[Ymin2, Ymax2], [Umin2, Umax2], [Vmin2, Vmax2]}, then when |Ymin1 – Ymin2 | < TH1 and |Ymax1 – Ymax2 | < TH1 and |Umin1 – Umin2 | < TH1 and |Umax1 – Umax2 | < TH1 and |Vmin1– Vmin2 | < TH1 and |Vmax1 – Vmax2 | < TH1, it can be determined that frame 1 and frame 2 belong to the same scene, and then the pixel value ranges of these two frames can be merged. If it is determined that frame 1 and frame 2 do not belong to the same scene, the pixel value ranges of frame 1 and frame 2 are not merged, and the above comparison and merging process is continued for subsequent frames 3 and 4 until all video frames of the video are traversed.

[0086] It should be understood that the above method for determining the same scene is only an example, and the scene transition position can also be determined by other methods. For example, the scene transition position can be determined by comparing the histogram differences of adjacent frames, which is not limited here.

[0087] According to an exemplary embodiment of the present disclosure, the meaning that the merged pixel value range covers the video frame indicates that the pixel value range of the video frame is a subset of the merged pixel value range. If a certain video frame falls into multiple merged pixel value ranges, it can be counted among the video frames covered by the merged pixel value range with a smaller range.

[0088] According to an exemplary embodiment of the present disclosure, the merging operation can also repeat the following operations until the threshold is increased to a predetermined size or the second quantity no longer changes: in response to the number of merged pixel value ranges being greater than a preset value, increase the threshold and re-determine the scene transition position according to the increased threshold; re-segment the video to be processed into multiple groups according to the re-determined scene transition position, and merge the pixel value ranges of the video frames in each group to obtain a second quantity of merged pixel value ranges.

[0089] In other words, after the first merging of pixel value intervals in video frames of the same scene to obtain M merged pixel value intervals, if the number of merged pixel value intervals is too large, the number of merged pixel value intervals can be further reduced by increasing the threshold TH1 until the upper limit of the threshold is reached. Here, the amount of threshold increase each time can be preset, for example, the amount of threshold increase each time is 1 / 10 of the original threshold. In this repeated process, if the number of merged pixel value intervals generated does not change even after increasing the threshold, further merging operations can be stopped, thus obtaining P merged pixel value intervals, where P can be less than or equal to M. Through the above operations, the amount of information that needs to be encoded and transmitted in subsequent encoding processes can be further reduced.

[0090] According to an exemplary embodiment of this disclosure, the aforementioned predetermined number of merged pixel value intervals can be merged pixel value intervals that cover a number of video frames higher than a preset value. For example, the distribution of N video frames in P merged pixel value intervals can be statistically analyzed. That is, the number of video frames covered by each interval in the P merged pixel value intervals (i.e., the number of video frames in which the pixel value interval is a subset of the merged pixel value interval) can be counted, and merged pixel value intervals that cover fewer than a predetermined number of video frames are excluded, ultimately resulting in Q merged pixel value intervals, where Q can be less than or equal to P.

[0091] According to an exemplary embodiment of this disclosure, a predetermined number of merged pixel value intervals are sorted into sequence pixel value intervals in descending order of the number of video frames covered, and information indicating the merged pixel value interval to which a video frame belongs is represented as information about the sequence pixel value interval and an index corresponding to the sorting of one of the merged pixel value intervals in the sequence pixel value interval.

[0092] According to an exemplary embodiment of this disclosure, S503 may include sequentially searching for a merged pixel value interval that can cover the pixel value intervals of a video frame, starting from the first merged pixel value interval included in the sequence pixel value interval, and generating information indicating the merged pixel value interval to which the video frame belongs, using the index of the merged pixel value interval and information about the sequence pixel value interval.

[0093] Assuming that Q most frequently used merged pixel value intervals are obtained from the P merged pixel value intervals mentioned above, the Q merged pixel value intervals can be sorted in descending order according to the number of video frames included in each merged pixel value interval to obtain the final sequence pixel value intervals. The sequence pixel value intervals including the Q merged pixel value intervals can be represented as a list Q_frame_idx_range[Y][U][V], where the index of each item in the list can be represented as Q_frame_idx, and the list can contain the information about the sequence pixel value intervals mentioned above. Starting from the first merged pixel value interval in the list Q_frame_idx_range[Y][U][V], a merged pixel value interval that can cover the pixel value intervals of the video frame can be searched, and the index of the merged pixel value interval in the list is recorded as information indicating the merged pixel value interval to which the video frame belongs. Obtaining the Q most frequently used merged pixel value intervals from the P merged pixel value intervals can exclude some intervals that cover fewer video frames, further improving encoding efficiency.

[0094] Next, in step S505, the reconstructed pixel values ​​of the video frame are cropped to the merged pixel value range to which the video frame belongs, based on the information indicating the merged pixel value range to which the video frame belongs.

[0095] like Figure 6 As shown, after obtaining the reconstructed pixels by adding the predicted values ​​of the pixels in the video frame generated through inter-frame or intra-frame prediction to the prediction residual values, a cropping operation can be performed on the reconstructed pixels to crop the reconstructed pixel value range of the video frame to a specific pixel value range within the sequence pixel value range. Here, cropping can be performed before and after filtering the reconstructed pixels, such as... Figure 6 As shown in 601 and 602.

[0096] For example, for the Y component of a pixel in this video frame, the cropping operation can be defined as: `recon_value_new = max (min(Ymax, recon_value), Ymin)`, where `recon_value` represents the reconstructed pixel value, `recon_value_new` represents the new reconstructed pixel value obtained after the cropping operation, `Ymax` represents the maximum value of the Y component interval within the merged pixel value interval corresponding to this video frame (i.e., the candidate values ​​indicated by `Q_frame_idx` in `Q_frame_idx_range[Y][U][V]`), and `Ymin` represents the minimum value of the Y component interval within the merged pixel value interval corresponding to this video frame. Similar processing can be performed on the U and V components, and will not be repeated here.

[0097] According to an exemplary embodiment of this disclosure, the cropping operation in S505 can be performed after preprocessing the video frames of the video to be processed and before predicting the video frames. Since the encoder may perform preprocessing such as motion-compensated temporal filtering (MCTF) before predicting the original video frames, causing changes in the pixel values ​​of the original video frames, a cropping operation as described above needs to be performed after preprocessing to ensure that the range of pixel values ​​after preprocessing remains consistent with the range of pixel values ​​after encoding. Figure 6 As shown, the cropping operation can be performed after the preprocessing operation for the original video frame indicated in 603.

[0098] By performing the above operations, the range of pixel values ​​can be kept consistent with the original range of pixel values ​​after preprocessing and / or reconstructing the pixels of the video frame, thereby preventing video distortion.

[0099] Refer back Figure 5 After performing cropping and obtaining information indicating the merged pixel value range to which each video frame belongs, in step S507, a bitstream is generated based on the video frames whose pixel values ​​have been cropped, and the information indicating the merged pixel value range to which the video frames belong is encoded into the bitstream.

[0100] Reference Figure 6 After the reconstructed pixels are cropped, the predicted values ​​generated by inter-frame or intra-frame prediction are compared with the original pixel values ​​to produce a prediction residual. This residual is then transformed and quantized to obtain quantization coefficients. The quantization coefficients, motion information, and intra-frame prediction information are entropy-encoded to generate a bitstream. Additionally, information indicating the merged pixel value interval to which the video frame belongs needs to be encoded into the bitstream. It should be understood that only information about the sequence of pixel value intervals, or information about the sequence of pixel value intervals to which each video frame belongs, can be encoded into the bitstream. If only information corresponding to the merged pixel value interval to which the video frame belongs is encoded, then the merged pixel value interval to which each video frame belongs (i.e., the respective pixel value intervals of the YUV components of that video frame) needs to be encoded, rather than the list index of the sequence of pixel value intervals to which it belongs. If only the sequence of pixel value interval information is encoded, then by default, all video frames use the same merged pixel value interval.

[0101] Information about the range of pixel values ​​in a sequence can be encoded into the Sequence Parameter Set (SPS) of the bitstream, for example, using the following syntax: WRITE_FLAG("sps_pixel_clip"); Whether to enable the overall scheme. if (sps_pixel_clip=enabled) { WRITE_UVLC("sps_pixel_clip_range_num", Q); This function represents the number of candidates in the list, i.e., the number of Q. for (int i = 0; i <Q; i++) { WRITE_CODE("sps_luma_pixel_max"); Maximum value of Y component WRITE_CODE("sps_luma_pixel_min"); Minimum value of Y component WRITE_CODE("sps_chroma_u_pixel_max"); Maximum value of U component WRITE_CODE("sps_chroma_u_pixel_min"); Minimum value of U component WRITE_CODE("sps_chroma_v_pixel_max"); Maximum value of V component WRITE_CODE("sps_chroma_v_pixel_min"); Minimum value of V component } } According to exemplary embodiments of this disclosure, the pixel value range of each frame can be converted into an index of a list of sequential pixel value ranges and encoded into a slice header, thereby minimizing frame-level marking information. For example, the following syntax can be used: if (sps_pixel_clip=enabled) { WRITE_FLAG("sh_pixel_scale_enable_flag"); Whether to enable cropping for this frame. if (sps_pixel_clip_range_num>1&&sh_pixel_scale_enable_flag=on) { WRITE_UVLC("sh_pixel_range_idx"); means writing Q_frame_idx. } } Figure 7 A flowchart of a video decoding method according to an exemplary embodiment of the present disclosure is shown.

[0102] It should be understood that the video decoding method according to this disclosure and Figure 5 The corresponding video encoding method is that decoding is performed according to the reverse logic of the encoding process.

[0103] In step S701, the data can be received according to... Figure 5 The video encoding method shown generates a bitstream, and information indicating the merged pixel value range to which a video frame belongs is obtained by decoding the bitstream. For example, a list Q_frame_idx_range [Y][U][V] and the corresponding index Q_frame_idx in the list indicating the merged pixel value range to which each video frame belongs can be obtained from the bitstream.

[0104] Next, in step S703, the merged pixel value range for the video frame is obtained based on the information indicating the merged pixel value range to which the video frame belongs. For example, a candidate corresponding to the index Q_frame_idx_range[Y][U][V] can be found from the list Q_frame_idx_range[Y][U][V] according to the index Q_frame_idx indicating the merged pixel value range to which the video frame belongs. This candidate can include merged pixel value range information about the YUV components.

[0105] Then, in step S705, the pixel values ​​of the video frame are cropped based on the merged pixel value range of the video frame. Here, this can be done in conjunction with the encoding module performing the cropping operation (e.g., such as...). Figure 6 The decoding module corresponding to the adder module (shown as generating reconstructed pixels) performs the clipping operation.

[0106] The video encoding and decoding methods described above, by pre-analyzing the pixel value range of video frames, can obtain information for controlling the range of reconstructed pixels. This allows for limiting the pixel value range during reconstruction based on this range information, reducing compression distortion. By combining the pixel value ranges of multiple video frames, the amount of information that needs to be transmitted can be reduced, while retaining flexibility in cropping pixel value ranges for each video frame, thus balancing the efficiency and quality of video compression.

[0107] Figure 8 This is a block diagram illustrating a video encoding apparatus according to an exemplary embodiment of the present disclosure.

[0108] like Figure 8 As shown, a video encoding apparatus 800 according to an exemplary embodiment of the present disclosure may include: a pixel value determination unit 810, a merging unit 820, a cropping unit 830, and an encoding unit 840.

[0109] The pixel value determination unit 810 is configured to determine the pixel value range of video frames in the video to be processed.

[0110] The merging unit 820 is configured to merge pixel value ranges of video frames with the same scene to obtain merged pixel value ranges and generate information indicating the merged pixel value range to which the video frame belongs.

[0111] The cropping unit 830 is configured to crop the reconstructed pixel values ​​of the video frame to the merged pixel value range to which the video frame belongs, based on information indicating the merged pixel value range to which the video frame belongs.

[0112] The encoding unit 840 is configured to generate a bitstream based on video frames whose pixel values ​​have been cropped, and to encode information indicating the merged pixel value range to which the video frame belongs into the bitstream.

[0113] According to an exemplary embodiment of this disclosure, the merging unit 820 is configured to: determine the scene change position of the video to be processed based on the content changes of adjacent video frames, and divide the video frames into multiple groups according to the scene change position; merge the pixel value intervals of the video frames in each of the multiple groups to obtain a first number of merged pixel value intervals; count the number of video frames covered by each merged pixel value interval, and determine a predetermined number of merged pixel value intervals whose number of covered video frames is higher than a preset value based on the number of video frames covered by each merged pixel value interval.

[0114] According to an embodiment of this disclosure, the merging unit 820 is configured to: traverse all video frames of the video to be processed, and determine the video frame positions where the maximum difference and minimum difference of pixel values ​​between adjacent video frames are both greater than a threshold as scene transition positions.

[0115] According to an embodiment of this disclosure, the merging unit 820 is configured to repeatedly perform the following operations until the threshold is increased to a predetermined size or the second number no longer changes: in response to the number of merged pixel value intervals being greater than a preset value, the threshold is increased and the scene change position is re-determined based on the increased threshold; the video to be processed is re-divided into multiple groups based on the re-determined scene change position, and the pixel value intervals of the video frames in each of the multiple groups are merged to obtain the second number of merged pixel value intervals.

[0116] According to embodiments of this disclosure, the pixel value range of a video frame includes a range for each component value of a pixel, and the predetermined number of merged pixel value ranges are sorted into sequential pixel value ranges in descending order of the number of video frames covered. The information indicating the merged pixel value range to which a video frame belongs is represented as information about the sequential pixel value range and an index corresponding to the sorting of one of the merged pixel value ranges in the sequential pixel value range.

[0117] According to an embodiment of this disclosure, the merging unit 820 is configured to: sequentially search for a merged pixel value interval that can cover the pixel value interval of the video frame, starting from the first merged pixel value interval included in the sequence pixel value interval, and generate information indicating the merged pixel value interval to which the video frame belongs, using the index of the merged pixel value interval and information about the sequence pixel value interval.

[0118] According to embodiments of this disclosure, the cropping unit 830 is further configured to perform a cropping operation after preprocessing the video frames of the video to be processed, so as to crop the pixel values ​​of the preprocessed video frames to a range of merged pixel values ​​determined to correspond to the video frames.

[0119] Detailed descriptions of the operations performed by each component unit of the video frame processing apparatus 800 can be found in the above reference. Figures 5-6 The various operations of the described video frame processing method correspond to each other, so they will not be repeated here.

[0120] Figure 9 This is a block diagram illustrating a decoding apparatus according to an exemplary embodiment of the present disclosure.

[0121] like Figure 9 As shown, the decoding apparatus 900 according to an exemplary embodiment of the present disclosure may include a receiving unit 910, a determining unit 920, and a trimming unit 930.

[0122] The receiving unit 910 is configured to receive data via a reference. Figure 5 The video encoding method described generates a bitstream, and information indicating the merged pixel value range to which the video frame belongs is obtained from the bitstream decoding.

[0123] The determining unit 920 is configured to determine the merged pixel value range for a video frame based on information indicating the merged pixel value range to which the video frame belongs.

[0124] The cropping unit 930 is configured to crop the pixel values ​​of the video frame based on the merged pixel value range of the video frame.

[0125] The above has been referred to Figures 5-7 The determination of the merged pixel value range and the cropping operation have been described in detail, and will not be repeated here.

[0126] Figure 10 This is a diagram illustrating a computing environment coupled to a user interface, applied to embodiments of the present disclosure according to some implementations of the present disclosure. Figure 10 A computing environment 1010 coupled to a user interface 1050 is shown. The computing environment 1010 may be part of a data processing server. The computing environment 1010 includes a processor 1020, a memory 1030, and an input / output (I / O) interface 1040.

[0127] Processor 1020 typically controls the overall operation of computing environment 1010, such as operations associated with display, data acquisition, data communication, and image processing. Processor 1020 may include one or more processors for executing instructions to perform all or some of the steps in the methods described above. Furthermore, processor 1020 may include one or more modules that facilitate interaction between processor 1020 and other components. The processor may be a central processing unit (CPU), microprocessor, microcontroller, graphics processing unit (GPU), etc.

[0128] Memory 1030 is configured to store various types of data to support the operation of computing environment 1010. Memory 1030 may include predefined software 1032. Examples of such data include instructions for any application or method operating on computing environment 1010, video datasets, image data, etc. Memory 1030 can be implemented using any type of volatile or non-volatile memory device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic storage, flash memory, magnetic disk, or optical disk.

[0129] I / O interface 1040 provides an interface between processor 1020 and peripheral interface modules (such as keyboard, click wheel, buttons, etc.). Buttons may include, but are not limited to, a home button, a start scan button, and a stop scan button. I / O interface 1040 can be coupled to encoders and decoders.

[0130] In an embodiment, a non-transitory computer-readable storage medium is also provided, including, for example, a plurality of programs in memory 1030 and / or a storage medium for storing bitstreams generated by the video processing method described above. The plurality of programs can be executed by processor 1020 in computing environment 1010 to perform the methods described above. In one example, the plurality of programs can be executed by processor 1020 in computing environment 1010 to (e.g., from...) Figure 2 The video encoder 20 in the computing environment 1010 receives a bitstream or data stream including encoded video information (e.g., video blocks representing encoded video frames, and / or one or more associated syntax elements, etc.), and can also be executed by the processor 1020 in the computing environment 1010 to perform the video processing method described above based on the received bitstream or data stream. In another example, the plurality of programs can be executed by the processor 1020 in the computing environment 1010 to perform the video frame processing method described above to encode video information (e.g., video blocks representing video frames, and / or one or more associated syntax elements, etc.) into a bitstream or data stream, and can also be executed by the processor 1020 in the computing environment 1010 to (e.g., to...) Figure 3 The video decoder 30 in the middle sends the bitstream or data stream. Alternatively, a non-transitory computer-readable storage medium may store data generated by the encoder (e.g., Figure 2 The video encoder 20 in the video encoder (e.g., the one described above) generates the video frames for the decoder (e.g., the one described above) using video frame processing methods. Figure 3 The video decoder 30 in the video decoder uses a bitstream or data stream that includes encoded video information (e.g., video blocks representing encoded video frames, and / or one or more associated syntax elements, etc.) when decoding video data. Non-transitory computer-readable storage media can be, for example, ROM, random access memory (RAM), CD-ROM, magnetic tape, floppy disk, optical data storage devices, etc.

[0131] In one embodiment, a computing device is also provided, comprising: one or more processors (e.g., processor 1020); and a non-transitory computer-readable storage medium or memory 1030 therein storing a plurality of programs executable by the one or more processors, wherein the one or more processors are configured to perform the video encoding method and / or video decoding method described above when executing the plurality of programs.

[0132] In one embodiment, a computer program product having instructions for storing or transmitting a bitstream, the bitstream including coded video information generated by the video frame processing method described above is also provided. In another embodiment, a computer program product including, for example, a plurality of programs in memory 1030, which can be executed by a processor 1020 in computing environment 1010 to perform the methods described above. For example, the computer program product may include a non-transitory computer-readable storage medium.

[0133] In one embodiment, a method for storing a bitstream is also provided, comprising: generating a bitstream according to the video encoding method described above, and storing the bitstream in a computer-readable medium.

[0134] In an embodiment, the computing environment 1010 may be implemented by one or more ASICs, DSPs, digital signal processing devices (DSPDs), programmable logic devices (PLDs), FPGAs, GPUs, controllers, microcontrollers, microprocessors, or other electronic components for performing the methods described above.

[0135] The description in this disclosure has been presented for illustrative purposes and is not intended to be exhaustive or limited to this disclosure. Many modifications, variations, and alternative embodiments will be apparent to those skilled in the art from the teachings presented in the foregoing description and the associated drawings.

[0136] Unless otherwise specifically stated, the order of steps in the method according to this disclosure is intended to be illustrative only, and the steps of the method according to this disclosure are not limited to the specific order described above, but may be changed according to actual circumstances. Furthermore, at least one step in the method according to this disclosure may be adjusted, combined, or omitted as needed.

[0137] The examples chosen and described are intended to explain the principles of this disclosure and to enable others skilled in the art to understand the various embodiments of this disclosure, and preferably to utilize the basic principles and various embodiments with various modifications suitable for the intended particular purpose. Therefore, it will be understood that the scope of this disclosure is not limited to the specific examples of the disclosed embodiments, and that modifications and other embodiments are intended to be included within the scope of this disclosure.

Claims

1. A video encoding method, characterized in that, include: Determine the pixel value range of the video frames in the video to be processed; The pixel value ranges of video frames with the same scene are merged to obtain a merged pixel value range, and information indicating the merged pixel value range to which the video frame belongs is generated. The reconstructed pixel values ​​of the video frame are cropped to the merged pixel value range to which the video frame belongs, based on the information indicating the merged pixel value range to which the video frame belongs; A bitstream is generated based on video frames whose pixel values ​​have been cropped, and information indicating the merged pixel value range to which the video frames belong is encoded into the bitstream.

2. The method as described in claim 1, characterized in that, Merging pixel value ranges from video frames with the same scene to obtain a merged pixel value range includes: The scene change position of the video to be processed is determined based on the content changes of adjacent video frames, and the video frames are divided into multiple groups according to the scene change position. The pixel value ranges of the video frames in each of the plurality of groups are merged to obtain a first number of merged pixel value ranges; The number of video frames covered by each merged pixel value interval is counted, and a predetermined number of merged pixel value intervals with a number of video frames covered exceeding a preset value are determined based on the number of video frames covered by each merged pixel value interval.

3. The method as described in claim 2, characterized in that, The scene transition position of a video frame is determined based on the content changes of adjacent video frames, and the video frame to be processed is divided into multiple groups according to the scene transition position, including: Traverse all video frames of the video to be processed, and determine the video frame positions where the difference between the maximum and minimum pixel values ​​of adjacent video frames is greater than the threshold.

4. The method as described in claim 3, characterized in that, This also includes repeating the following operations until the threshold is increased to a predetermined size or the second quantity no longer changes: In response to the number of merged pixel value intervals exceeding a preset value, the threshold is increased and the scene transformation position is redefined based on the increased threshold; The video to be processed is re-divided into multiple groups based on the redefined scene change position, and the pixel value ranges of the video frames in each of the multiple groups are merged to obtain a second number of merged pixel value ranges.

5. The claim as described in claim 2, characterized in that, The pixel value range of a video frame includes a range for each component value of a pixel. The predetermined number of merged pixel value ranges are sorted into sequence pixel value ranges in descending order of the number of video frames they cover. The information indicating the merged pixel value range to which a video frame belongs is represented as information about the sequence pixel value range and an index corresponding to the sorting of one of the merged pixel value ranges in the sequence pixel value range.

6. The method as described in claim 5, characterized in that, Generate information indicating the merged pixel value range to which the video frame belongs, including: Starting from the first merged pixel value interval included in the sequence pixel value interval, sequentially search for the merged pixel value interval that can cover the pixel value interval of the video frame, and generate information indicating the merged pixel value interval to which the video frame belongs by the index of the merged pixel value interval and information about the sequence pixel value interval.

7. The method as described in claim 1, characterized in that, Also includes: After preprocessing the video frames of the video to be processed, the pixel values ​​of the preprocessed video frames are cropped to the merged pixel value range to which the video frames belong.

8. A video decoding method, characterized in that, include: Receive a bitstream generated by the video encoding method of any one of claims 1-7, and decode from the bitstream information indicating the merged pixel value range to which the video frame belongs and / or information about the sequence pixel value range; The merged pixel value range for the video frame is obtained based on the information indicating the merged pixel value range to which the video frame belongs; The pixel values ​​of the video frame are cropped based on the merged pixel value range of the video frame.

9. A video encoding apparatus, comprising: The pixel value determination unit is configured to determine the pixel value range of video frames in the video to be processed; The merging unit is configured to merge pixel value ranges of video frames with the same scene to obtain merged pixel value ranges and generate information indicating the merged pixel value range to which the video frame belongs. The cropping unit is configured to crop the reconstructed pixel values ​​of the video frame to the merged pixel value range to which the video frame belongs, based on information indicating the merged pixel value range to which the video frame belongs; The encoding unit is configured to generate a bitstream based on video frames whose pixel values ​​have been cropped, and to encode information indicating the merged pixel value range to which the video frame belongs into the bitstream.

10. A video decoding device, characterized in that, include: The receiving unit is configured to receive a bitstream generated by the video encoding method of any one of claims 1-7, and decode information from the bitstream indicating the range of merged pixel values ​​to which the video frame belongs; The determining unit is configured to determine the merged pixel value range for a video frame based on the information indicating the merged pixel value range to which the video frame belongs; The cropping unit is configured to crop the pixel values ​​of the video frame based on the merged pixel value range of the video frame.

11. An electronic device, characterized in that, include: At least one processor; At least one memory that stores computer-executable instructions. Wherein, when the computer-executable instructions are executed by the at least one processor, they cause the at least one processor to perform the method as described in any one of claims 1 to 8.

12. A computer-readable storage medium, wherein instructions in the computer-readable storage medium, when executed by at least one processor, enable the at least one processor to perform the method as claimed in any one of claims 1 to 8.

13. A method for storing a bit stream, comprising: A bitstream is generated according to the video encoding method according to any one of claims 1 to 7; Store the bitstream in a computer-readable storage medium.

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